diff --git a/scripts/cmake/platforms/mps3/mps3-sse-300.ld b/scripts/cmake/platforms/mps3/mps3-sse-300.ld
index d369fa7..3e930a0 100644
--- a/scripts/cmake/platforms/mps3/mps3-sse-300.ld
+++ b/scripts/cmake/platforms/mps3/mps3-sse-300.ld
@@ -15,7 +15,7 @@
  * limitations under the License.
  */
 
-__STACK_SIZE = 0x00060000;
+__STACK_SIZE = 0x00008000;
 __HEAP_SIZE  = 0x000C0000;
 
 /* System memory brief */
diff --git a/scripts/cmake/platforms/mps3/mps3-sse-300.sct b/scripts/cmake/platforms/mps3/mps3-sse-300.sct
index f78dc25..0a38778 100644
--- a/scripts/cmake/platforms/mps3/mps3-sse-300.sct
+++ b/scripts/cmake/platforms/mps3/mps3-sse-300.sct
@@ -16,10 +16,12 @@
 ; *************************************************************
 ; ***       Scatter-Loading Description File                ***
 ; *************************************************************
-; Please see docs/sections/appendix.md for memory mapping information.
+; Please see docs/sections/appendix.md for memory mapping
+; information.
 ;
-; Note: Ethos-U NPU can access BRAM, internal SRAM and the DDR sections => activation buffers and
-;       the model should only be placed in those regions.
+; Note: Ethos-U NPU can access BRAM, internal SRAM and the DDR
+;       sections => activation buffers and the model should
+;       only be placed in those regions.
 ;
 ;---------------------------------------------------------
 ; First load region (ITCM)
@@ -40,23 +42,23 @@
     }
 
     ;-----------------------------------------------------
-    ; 128kiB of 512kiB DTCM is used for any other RW or ZI
+    ; 384kiB of 512kiB DTCM is used for any other RW or ZI
     ; data. Note: this region is internal to the Cortex-M
     ; CPU.
     ;-----------------------------------------------------
-    dtcm.bin        0x20000000                  0x00020000
+    dtcm.bin        0x20000000                  0x00060000
     {
         ; Any R/W and/or zero initialised data
         .ANY(+RW +ZI)
     }
 
     ;-----------------------------------------------------
-    ; 384kiB of stack space within the DTCM region. See
+    ; 32 kiB of stack space within the DTCM region. See
     ; `dtcm.bin` for the first section. Note: by virtue of
     ; being part of DTCM, this region is only accessible
-    ; from Cortex-M55.
+    ; from Cortex-M55. We use the last DTCM bank
     ;-----------------------------------------------------
-    ARM_LIB_STACK   0x20020000 EMPTY ALIGN 8    0x00060000
+    ARM_LIB_STACK   0x20060000 EMPTY ALIGN 8    0x00008000
     {}
 
     ;-----------------------------------------------------
diff --git a/scripts/cmake/platforms/simple_platform/simple_platform.ld b/scripts/cmake/platforms/simple_platform/simple_platform.ld
index 82cb18e..7f1c9c2 100644
--- a/scripts/cmake/platforms/simple_platform/simple_platform.ld
+++ b/scripts/cmake/platforms/simple_platform/simple_platform.ld
@@ -15,7 +15,7 @@
  * limitations under the License.
  */
 
-__STACK_SIZE = 0x00060000;
+__STACK_SIZE = 0x00008000;
 __HEAP_SIZE  = 0x000C0000;
 
 /* System memory brief */
diff --git a/scripts/cmake/platforms/simple_platform/simple_platform.sct b/scripts/cmake/platforms/simple_platform/simple_platform.sct
index 5825d47..af639d6 100644
--- a/scripts/cmake/platforms/simple_platform/simple_platform.sct
+++ b/scripts/cmake/platforms/simple_platform/simple_platform.sct
@@ -16,11 +16,12 @@
 ; *************************************************************
 ; ***       Scatter-Loading Description File                ***
 ; *************************************************************
-; Please see docs/sections/appendix.md for memory mapping information.
+; Please see docs/sections/appendix.md for memory mapping
+; information.
 ;
 ; Note: Ethos-U NPU can access BRAM, internal SRAM and the DDR
-;       sections => activation buffers and the model should only
-;       be placed in those regions.
+;       sections => activation buffers and the model should
+;       only be placed in those regions.
 ;
 ;---------------------------------------------------------
 ; First load region (ITCM)
@@ -41,28 +42,28 @@
     }
 
     ;-----------------------------------------------------
-    ; 128kiB of 512kiB DTCM is used for any other RW or ZI
+    ; 384kiB of 512kiB DTCM is used for any other RW or ZI
     ; data. Note: this region is internal to the Cortex-M
     ; CPU.
     ;-----------------------------------------------------
-    dtcm.bin        0x20000000                  0x00020000
+    dtcm.bin        0x20000000                  0x00060000
     {
         ; Any R/W and/or zero initialised data
         .ANY(+RW +ZI)
     }
 
     ;-----------------------------------------------------
-    ; 384kiB of stack space within the DTCM region. See
+    ; 32 kiB of stack space within the DTCM region. See
     ; `dtcm.bin` for the first section. Note: by virtue of
     ; being part of DTCM, this region is only accessible
-    ; from Cortex-M55.
+    ; from Cortex-M55. We use the last DTCM bank
     ;-----------------------------------------------------
-    ARM_LIB_STACK   0x20020000 EMPTY ALIGN 8    0x00060000
+    ARM_LIB_STACK   0x20060000 EMPTY ALIGN 8    0x00008000
     {}
 
     ;-----------------------------------------------------
-    ; SSE-300's internal SRAM of 2MiB - reserved for
-    ; activation buffers.
+    ; FPGA internal SRAM of 2MiB - reserved for activation
+    ; buffers.
     ; This region should have 3 cycle read latency from
     ; both Cortex-M55 and Ethos-U NPU
     ;-----------------------------------------------------
diff --git a/scripts/cmake/toolchains/bare-metal-armclang.cmake b/scripts/cmake/toolchains/bare-metal-armclang.cmake
index 9752053..d0b0824 100644
--- a/scripts/cmake/toolchains/bare-metal-armclang.cmake
+++ b/scripts/cmake/toolchains/bare-metal-armclang.cmake
@@ -84,14 +84,21 @@
 add_link_options(${CPU_LINK_OPT})
 set(CMAKE_ASM_FLAGS "${CPU_LINK_OPT}")
 
+set(ARMCLANG_INFO_STR "sizes,totals,unused,veneers,summarysizes")
+if(CMAKE_BUILD_TYPE STREQUAL Debug)
+    # For debug builds, we can add stack information too:
+    set(ARMCLANG_INFO_STR "${ARMCLANG_INFO_STR},stack,summarystack")
+endif()
+
 # Warnings to be ignored:
 # L6314W = No section matches pattern
 # L6439W = Multiply defined Global Symbol
 add_link_options(
     --diag_suppress=L6439W,L6314W
-    --info sizes,totals,unused,veneers
+    --info ${ARMCLANG_INFO_STR}
     --strict
     --callgraph
+    --no_exceptions
     --load_addr_map_info
     --xref
     "$<$<CONFIG:RELEASE>:--no_debug>")