MLECO-2917 Replacing platform CMake definitions with headers

Moving away from CMake description of targets and generation of
platform header files (for memory addresses and IRQ numbers).
Instead these headers are part of the repository under their
respective platform-driver packages under HAL sources.

Change-Id: I9bd3e68eb17385f8b93eb3d8d76b212ce0e1a6d5
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
diff --git a/source/hal/source/components/npu/CMakeLists.txt b/source/hal/source/components/npu/CMakeLists.txt
index 729a297..c53dd02 100644
--- a/source/hal/source/components/npu/CMakeLists.txt
+++ b/source/hal/source/components/npu/CMakeLists.txt
@@ -33,6 +33,12 @@
 # For the driver, we need to provide the CMSIS_PATH variable
 set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory")
 
+# Definitions that will be set.
+set(ETHOS_U_BASE_ADDR    "0x58102000"    CACHE STRING "Ethos-U NPU base address")
+set(ETHOS_U_IRQN         "56"            CACHE STRING "Ethos-U NPU Interrupt")
+set(ETHOS_U_SEC_ENABLED  "1"             CACHE STRING "Ethos-U NPU Security enable")
+set(ETHOS_U_PRIV_ENABLED "1"             CACHE STRING "Ethos-U NPU Privilege enable")
+
 # Driver needs to know what MAC configuration to build for.
 if(ETHOS_U_NPU_CONFIG_ID MATCHES "^[A-Z]([0-9]+$)")
     set(ETHOSU_MACS ${CMAKE_MATCH_1})
@@ -145,7 +151,11 @@
 target_compile_definitions(${ETHOS_U_NPU_COMPONENT}
     PUBLIC
     ARM_NPU
-    ${ETHOS_U_NPU_MEMORY_MODE_FLAG})
+    ${ETHOS_U_NPU_MEMORY_MODE_FLAG}
+    ETHOS_U_BASE_ADDR=${ETHOS_U_BASE_ADDR}
+    ETHOS_U_IRQN=${ETHOS_U_IRQN}
+    ETHOS_U_SEC_ENABLED=${ETHOS_U_SEC_ENABLED}
+    ETHOS_U_PRIV_ENABLED=${ETHOS_U_PRIV_ENABLED})
 
 # Display status
 message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
diff --git a/source/hal/source/components/npu/ethosu_npu_init.c b/source/hal/source/components/npu/ethosu_npu_init.c
index 9ccd887..e24ddd9 100644
--- a/source/hal/source/components/npu/ethosu_npu_init.c
+++ b/source/hal/source/components/npu/ethosu_npu_init.c
@@ -18,8 +18,6 @@
 #include "ethosu_npu_init.h"
 
 #include "RTE_Components.h"         /* For CPU related defintiions */
-#include "peripheral_memmap.h"      /* Peripheral memory map definitions. */
-#include "peripheral_irqs.h"        /* IRQ numbers for this platform. */
 #include "log_macros.h"             /* Logging functions */
 
 #include "ethosu_mem_config.h"      /* Arm Ethos-U memory config */
@@ -62,7 +60,7 @@
  **/
 static void arm_ethosu_npu_irq_init(void)
 {
-    const IRQn_Type ethosu_irqnum = (IRQn_Type)EthosU_IRQn;
+    const IRQn_Type ethosu_irqnum = (IRQn_Type)ETHOS_U_IRQN;
 
     /* Register the EthosU IRQ handler in our vector table.
      * Note, this handler comes from the EthosU driver */
@@ -83,15 +81,15 @@
     arm_ethosu_npu_irq_init();
 
     /* Initialise Ethos-U device */
-    const void *ethosu_base_address = (void *)(SEC_ETHOS_U_NPU_BASE);
+    const void *ethosu_base_address = (void *)(ETHOS_U_BASE_ADDR);
 
     if (0 != (err = ethosu_init(
                   &ethosu_drv,            /* Ethos-U driver device pointer */
                   ethosu_base_address,    /* Ethos-U NPU's base address. */
                   get_cache_arena(),      /* Pointer to fast mem area - NULL for U55. */
                   get_cache_arena_size(), /* Fast mem region size. */
-                  1,                      /* Security enable. */
-                  1)))                    /* Privilege enable. */
+                  ETHOS_U_SEC_ENABLED,    /* Security enable. */
+                  ETHOS_U_PRIV_ENABLED))) /* Privilege enable. */
     {
         printf_err("failed to initialise Ethos-U device\n");
         return err;