MLECO-3096: Removing "timer" from HAL profile.
Attempting to have timer functionality contained within
the platform drivers "package" as it should (in line with
the refactoring work done so far under HAL). This will
ensure that we don't need two timer implementations under
HAL "profiles" and therefore, this whole directory can be
removed.
This change also addressed issue with the applicatio level
Profiler code knowing about how the PMU has been set up by
the platform code. This link has been removed completely.
This will make it much easier to add/amend the Ethos-U PMU
event counters types and give each platform the capability
of populating their relvant counters. The application level
Profiler doesn't know which metrics it is displaying but
just calculates and maintains statistics for whatever PMU
counters it receives from the HAL level.
A fix for timing adapter issue introduced in the last CR
is also included.
Change-Id: Ia46e03a06e7b8e42b9ed2ba8f2af2dcd2229c110
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
diff --git a/source/hal/source/components/npu/CMakeLists.txt b/source/hal/source/components/npu/CMakeLists.txt
index c53dd02..9d0bf42 100644
--- a/source/hal/source/components/npu/CMakeLists.txt
+++ b/source/hal/source/components/npu/CMakeLists.txt
@@ -126,7 +126,8 @@
target_sources(${ETHOS_U_NPU_COMPONENT}
PRIVATE
ethosu_npu_init.c
- ethosu_cpu_cache.c)
+ ethosu_cpu_cache.c
+ ethosu_profiler.c)
## Add dependencies:
target_link_libraries(${ETHOS_U_NPU_COMPONENT} PUBLIC
diff --git a/source/hal/source/components/npu/ethosu_profiler.c b/source/hal/source/components/npu/ethosu_profiler.c
new file mode 100644
index 0000000..3ac3497
--- /dev/null
+++ b/source/hal/source/components/npu/ethosu_profiler.c
@@ -0,0 +1,144 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ethosu_profiler.h"
+#include "log_macros.h"
+
+#include <string.h>
+
+extern struct ethosu_driver ethosu_drv; /* Default Arm Ethos-U NPU device driver object */
+static ethosu_pmu_counters npu_counters; /* NPU counter local instance */
+
+/**
+ * @brief Gets the npu counter instance to be used.
+ * @return Pointer to the npu counter instance.
+ */
+static ethosu_pmu_counters* get_counter_instance(void)
+{
+ return &npu_counters;
+}
+
+/**
+ * @brief Checks if the counter has overflown.
+ * @param pmu_counter_mask Mask for the event counter.
+ * @return true if overflow is detected, false otherwise.
+ */
+static bool counter_overflow(uint32_t pmu_counter_mask)
+{
+ /* Check for overflow: The idle counter is 32 bit while the
+ total cycle count is 64 bit. */
+ const uint32_t overflow_status = ETHOSU_PMU_Get_CNTR_OVS(ðosu_drv);
+ return pmu_counter_mask & overflow_status ? true : false;
+}
+
+void ethosu_pmu_init(void)
+{
+ uint32_t i = 0;
+ uint32_t evt_mask = ETHOSU_PMU_CCNT_Msk;
+ ethosu_pmu_counters* counters = get_counter_instance();
+ memset(counters, 0, sizeof(*counters));
+
+ /* Total counters = event counters + derived counters + total cycle count */
+ counters->num_total_counters = ETHOSU_PROFILER_NUM_COUNTERS;
+
+#if ETHOSU_PMU_NCOUNTERS >= 4
+ counters->npu_evt_counters[0].event_type = ETHOSU_PMU_NPU_IDLE;
+ counters->npu_evt_counters[0].event_mask = ETHOSU_PMU_CNT1_Msk;
+ counters->npu_evt_counters[0].name = "NPU IDLE";
+ counters->npu_evt_counters[0].unit = "cycles";
+
+ counters->npu_evt_counters[1].event_type = ETHOSU_PMU_AXI0_RD_DATA_BEAT_RECEIVED;
+ counters->npu_evt_counters[1].event_mask = ETHOSU_PMU_CNT2_Msk;
+ counters->npu_evt_counters[1].name = "NPU AXI0_RD_DATA_BEAT_RECEIVED";
+ counters->npu_evt_counters[1].unit = "beats";
+
+ counters->npu_evt_counters[2].event_type = ETHOSU_PMU_AXI0_WR_DATA_BEAT_WRITTEN;
+ counters->npu_evt_counters[2].event_mask = ETHOSU_PMU_CNT3_Msk;
+ counters->npu_evt_counters[2].name = "NPU AXI0_WR_DATA_BEAT_WRITTEN";
+ counters->npu_evt_counters[2].unit = "beats";
+
+ counters->npu_evt_counters[3].event_type = ETHOSU_PMU_AXI1_RD_DATA_BEAT_RECEIVED;
+ counters->npu_evt_counters[3].event_mask = ETHOSU_PMU_CNT4_Msk;
+ counters->npu_evt_counters[3].name = "NPU AXI1_RD_DATA_BEAT_RECEIVED";
+ counters->npu_evt_counters[3].unit = "beats";
+#else /* ETHOSU_PMU_NCOUNTERS >= 4 */
+ #error "NPU PMU expects a minimum of 4 available event triggered counters!"
+#endif /* ETHOSU_PMU_NCOUNTERS >= 4 */
+
+#if ETHOSU_DERIVED_NCOUNTERS >= 1
+ counters->npu_derived_counters[0].name = "NPU ACTIVE";
+ counters->npu_derived_counters[0].unit = "cycles";
+#endif /* ETHOSU_DERIVED_NCOUNTERS >= 1 */
+
+ for (i = 0; i < ETHOSU_PMU_NCOUNTERS; ++i) {
+ ETHOSU_PMU_Set_EVTYPER(ðosu_drv, i, counters->npu_evt_counters[i].event_type);
+ evt_mask |= counters->npu_evt_counters[i].event_mask;
+ }
+
+ /* Reset overflow status. */
+ ETHOSU_PMU_Set_CNTR_OVS(ðosu_drv, evt_mask);
+
+ /* Enable PMU. */
+ ETHOSU_PMU_Enable(ðosu_drv);
+
+ /* Enable counters for cycle and event counters. */
+ ETHOSU_PMU_CNTR_Disable(ðosu_drv, evt_mask);
+ ethosu_pmu_reset_counters();
+ ETHOSU_PMU_CNTR_Enable(ðosu_drv, evt_mask);
+}
+
+/**
+ * @brief Resets the Arm Ethos-U NPU PMU counters.
+ */
+void ethosu_pmu_reset_counters(void)
+{
+ /* Reset all cycle and event counters. */
+ ETHOSU_PMU_CYCCNT_Reset(ðosu_drv);
+ ETHOSU_PMU_EVCNTR_ALL_Reset(ðosu_drv);
+}
+
+/**
+ * @brief Get the Arm Ethos-U NPU PMU counters
+ * @return ethosu_pmu_counters
+ */
+ethosu_pmu_counters ethosu_get_pmu_counters(void)
+{
+ ethosu_pmu_counters* counters = get_counter_instance();
+ uint32_t i = 0;
+
+ /* Event counters */
+ for (i = 0; i < ETHOSU_PMU_NCOUNTERS; ++i) {
+ if (counter_overflow(counters->npu_evt_counters[i].event_mask)) {
+ warn("Counter overflow detected for %s.\n", counters->npu_evt_counters[i].name);
+ }
+ counters->npu_evt_counters[i].counter_value =
+ ETHOSU_PMU_Get_EVCNTR(ðosu_drv, i);
+ }
+
+ /* Total cycle count */
+ counters->npu_total_ccnt = ETHOSU_PMU_Get_CCNTR(ðosu_drv);
+
+ /* Derived counters */
+#if ETHOSU_DERIVED_NCOUNTERS >= 1
+ if (counters->npu_evt_counters[0].event_type == ETHOSU_PMU_NPU_IDLE) {
+ counters->npu_derived_counters[0].counter_value =
+ counters->npu_total_ccnt - counters->npu_evt_counters[0].counter_value;
+ }
+#endif /* ETHOSU_DERIVED_NCOUNTERS >= 1 */
+
+ return *counters;
+}
diff --git a/source/hal/source/components/npu/include/ethosu_profiler.h b/source/hal/source/components/npu/include/ethosu_profiler.h
new file mode 100644
index 0000000..ca95b19
--- /dev/null
+++ b/source/hal/source/components/npu/include/ethosu_profiler.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef ETHOS_U_PROFILER_H
+#define ETHOS_U_PROFILER_H
+
+#include "pmu_ethosu.h"
+
+#define ETHOSU_DERIVED_NCOUNTERS 1 /**< Number of counters derived from event counters */
+#define ETHOSU_PROFILER_NUM_COUNTERS ( \
+ ETHOSU_DERIVED_NCOUNTERS + \
+ ETHOSU_PMU_NCOUNTERS + \
+ 1 /* total CCNT */)
+
+typedef struct npu_event_counter_ {
+ enum ethosu_pmu_event_type event_type;
+ uint32_t event_mask;
+ uint32_t counter_value;
+ char* unit;
+ char* name;
+} npu_evt_counter;
+
+typedef struct npu_derived_counter_ {
+ uint32_t counter_value;
+ char* unit;
+ char* name;
+} npu_derived_counter;
+
+typedef struct ethosu_pmu_counters_ {
+ uint64_t npu_total_ccnt; /**< Total NPU cycles */
+ npu_evt_counter npu_evt_counters[ETHOSU_PMU_NCOUNTERS];
+ npu_derived_counter npu_derived_counters[ETHOSU_DERIVED_NCOUNTERS];
+ uint32_t num_total_counters; /**< Total number of counters */
+} ethosu_pmu_counters;
+
+/**
+ * @brief Initialise the Arm Ethos-U NPU performance monitoring unit.
+ */
+void ethosu_pmu_init(void);
+
+/**
+ * @brief Resets the Arm Ethos-U NPU PMU counters.
+ */
+void ethosu_pmu_reset_counters(void);
+
+/**
+ * @brief Get the Arm Ethos-U NPU PMU counters
+ * @return ethosu_pmu_counters
+ */
+ethosu_pmu_counters ethosu_get_pmu_counters(void);
+
+#endif /* ETHOS_U_PROFILER_H */
diff --git a/source/hal/source/components/npu_ta/CMakeLists.txt b/source/hal/source/components/npu_ta/CMakeLists.txt
index 6f7dac5..73bbef7 100644
--- a/source/hal/source/components/npu_ta/CMakeLists.txt
+++ b/source/hal/source/components/npu_ta/CMakeLists.txt
@@ -36,6 +36,10 @@
set(SOURCE_GEN_DIR ${CMAKE_BINARY_DIR}/generated/ta)
endif()
+# Base address definitions for the two timing adapters (platform should override these):
+set(TA0_BASE "0x58103000" CACHE STRING "Ethos-U NPU timing adapter 0")
+set(TA1_BASE "0x58103200" CACHE STRING "Ethos-U NPU timing adapter 1")
+
## If a TA config file is provided, we generate a settings file
if (DEFINED TA_CONFIG_FILE)
include(${TA_CONFIG_FILE})
diff --git a/source/hal/source/components/npu_ta/ethosu_ta_init.c b/source/hal/source/components/npu_ta/ethosu_ta_init.c
index 323ab73..f3c95b6 100644
--- a/source/hal/source/components/npu_ta/ethosu_ta_init.c
+++ b/source/hal/source/components/npu_ta/ethosu_ta_init.c
@@ -42,13 +42,13 @@
.histbin = TA0_HISTBIN,
.histcnt = TA0_HISTCNT};
- if (0 != ta_init(&ta_0, TA0_BASE))
- {
+ if (0 != ta_init(&ta_0, TA0_BASE)) {
printf_err("TA0 initialisation failed\n");
return 1;
}
ta_set_all(&ta_0, &ta_0_settings);
+ info("TA0 values set\n");
#endif /* defined (TA0_BASE) */
#if defined(TA1_BASE)
@@ -76,6 +76,7 @@
}
ta_set_all(&ta_1, &ta_1_settings);
+ info("TA1 values set\n");
#endif /* defined (TA1_BASE) */
return 0;
diff --git a/source/hal/source/components/platform_pmu/CMakeLists.txt b/source/hal/source/components/platform_pmu/CMakeLists.txt
new file mode 100644
index 0000000..3ef407d
--- /dev/null
+++ b/source/hal/source/components/platform_pmu/CMakeLists.txt
@@ -0,0 +1,30 @@
+#----------------------------------------------------------------------------
+# Copyright (c) 2022 Arm Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#----------------------------------------------------------------------------
+
+#####################################################################
+# Interface library for platform performance monitoring unit #
+#####################################################################
+cmake_minimum_required(VERSION 3.15.6)
+
+project(platform_pmu
+ DESCRIPTION "Header/interface for platform PMU"
+ LANGUAGES C)
+
+# Interface library:
+set(PLATFORM_PMU_TARGET platform_pmu)
+add_library(${PLATFORM_PMU_TARGET} INTERFACE)
+target_include_directories(${PLATFORM_PMU_TARGET} INTERFACE include)
diff --git a/source/hal/source/components/platform_pmu/include/platform_pmu.h b/source/hal/source/components/platform_pmu/include/platform_pmu.h
new file mode 100644
index 0000000..3724e57
--- /dev/null
+++ b/source/hal/source/components/platform_pmu/include/platform_pmu.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef PLATFORM_PMU_INTERFACE_H
+#define PLATFORM_PMU_INTERFACE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+#include <stdbool.h>
+
+#define NUM_PMU_COUNTERS (10) /**< Maximum number of available counters. */
+
+/**
+ * @brief Container for a single unit for a PMU counter.
+ */
+typedef struct _pmu_counter_unit {
+ uint64_t value; /**< Value of the counter expressed as 64 bits unsigned integer. */
+ const char* name; /**< Name for the counter. */
+ const char* unit; /**< Unit that the counter value represents (like cycles, beats, or milliseconds). */
+} pmu_counter_unit;
+
+/**
+ * @brief Container for a an array of counters
+ */
+typedef struct _pmu_counters {
+ pmu_counter_unit counters[NUM_PMU_COUNTERS]; /**< Counter array. */
+ uint32_t num_counters; /**< Number of valid counters. */
+ bool initialised; /**< Initialised or not. */
+} pmu_counters;
+
+/**
+ * @brief Resets the counters.
+ */
+void platform_reset_counters(void);
+
+/**
+ * @brief Gets the current counter values.
+ * @returns A populated instance of pmu_counters struct.
+ **/
+pmu_counters platform_get_counters(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* PLATFORM_PMU_INTERFACE_H */