MLECO-3659: Improvement for NPU PMU counters
The NPU idle count could have been erraneously high as
the counters were always running. This change utilises
callback functions to start/stop the counters only when
the inferences start/stop executing on the NPU.
Changes have been made to cache maintenance functions
called from within the NPU driver's pipeline to reduce
the overhead caused by these.
Change-Id: I69db0d3b3f3fe5b2847e15b5c3096cb1e0484176
Signed-off-by: Kshitij Sisodia <kshitij.sisodia@arm.com>
diff --git a/source/hal/source/components/npu/include/ethosu_cpu_cache.h b/source/hal/source/components/npu/include/ethosu_cpu_cache.h
index faf26c2..d5de3d5 100644
--- a/source/hal/source/components/npu/include/ethosu_cpu_cache.h
+++ b/source/hal/source/components/npu/include/ethosu_cpu_cache.h
@@ -21,6 +21,11 @@
#include <stddef.h>
/**
+ * @brief Clears all the cache state members.
+ */
+void ethosu_clear_cache_states(void);
+
+/**
* @brief Flush/clean the data cache by address and size. Passing NULL as p argument
* expects the whole cache to be flushed.
* @param[in] p Pointer to the start address.