MLECO-2976: Configurable Ethos-U cache size for Dedicated_Sram
MLECO-2949: Platform drivers should own NPU and TA init
Change-Id: I13606a0197f137816bae803eb9d7d46c358b5fb8
Signed-off-by: Isabella Gottardi <isabella.gottardi@arm.com>
diff --git a/source/hal/CMakeLists.txt b/source/hal/CMakeLists.txt
index 0d844b2..536682f 100644
--- a/source/hal/CMakeLists.txt
+++ b/source/hal/CMakeLists.txt
@@ -67,11 +67,6 @@
############################ bare-metal profile #############################
if (PLATFORM_PROFILE STREQUAL bare-metal)
- ## Additional include directories - public
- target_include_directories(${HAL_TARGET}
- PUBLIC
- ${PLATFORM_PROFILE_DIR}/bsp/include)
-
## Additional include directories - private
target_include_directories(${HAL_TARGET}
PRIVATE
@@ -95,71 +90,6 @@
# Add dependencies for platform_driver first, in case they are needed by it.
add_subdirectory(cmsis_device ${CMAKE_BINARY_DIR}/cmsis_device)
- # If Ethos-U is enabled, we need the driver library too
- if (ETHOS_U_NPU_ENABLED)
-
- if (NOT DEFINED ETHOS_U_NPU_DRIVER_SRC_PATH)
- message(FATAL_ERROR "ETHOS_U_NPU_DRIVER_SRC_PATH should"
- " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
- endif()
-
- # Timing adapter, should, in theory be part of platform-drivers. For now
- # limiting the scope of refactoring - but in future, TA should not be
- # needed if not available on the target platform.
- if (NOT DEFINED ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH)
- message(FATAL_ERROR "ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH should"
- " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
- endif()
-
- target_compile_definitions(${HAL_TARGET}
- PUBLIC
- ARM_NPU)
-
- # For the driver, we need to provide the CMSIS_PATH variable
- set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory")
- add_subdirectory(${ETHOS_U_NPU_DRIVER_SRC_PATH} ${CMAKE_BINARY_DIR}/ethos-u-driver)
- add_subdirectory(${ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH} ${CMAKE_BINARY_DIR}/timing-adapter)
-
- target_link_libraries(${HAL_TARGET}
- PUBLIC
- ethosu_core_driver
- timing_adapter)
-
- if (NOT DEFINED ETHOS_U_NPU_ID)
- set(ETHOS_U_NPU_ID U55)
- endif()
-
- if (NOT DEFINED ETHOS_U_NPU_MEMORY_MODE)
- set(ETHOS_U_NPU_MEMORY_MODE Shared_Sram)
- endif()
-
- if (ETHOS_U_NPU_MEMORY_MODE STREQUAL Sram_Only)
- if (ETHOS_U_NPU_ID STREQUAL U55)
- set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEM_MODE_SRAM_ONLY")
- else ()
- message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `sram_only` can be used only for Ethos-U55.")
- endif ()
-
- elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Shared_Sram)
- # Shared Sram can be used for Ethos-U55 and Ethos-U65
- set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM")
-
- elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Dedicated_Sram)
- # Dedicated Sram is used only for Ethos-U65
- if (ETHOS_U_NPU_ID STREQUAL U65)
- set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM")
- else ()
- message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `dedicated_sram` can be used only for Ethos-U65.")
- endif ()
- else ()
- message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode ${ETHOS_U_NPU_MEMORY_MODE}")
- endif ()
-
- target_compile_definitions(${HAL_TARGET}
- PUBLIC
- ${ETHOS_U_NPU_MEMORY_MODE_FLAG})
- endif()
-
############################ native profile #############################
elseif (PLATFORM_PROFILE STREQUAL native)
diff --git a/source/hal/components/ethosu_npu_init/ethosu_npu_init.c b/source/hal/components/ethosu_npu_init/ethosu_npu_init.c
new file mode 100644
index 0000000..2fed693
--- /dev/null
+++ b/source/hal/components/ethosu_npu_init/ethosu_npu_init.c
@@ -0,0 +1,122 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ethosu_npu_init.h"
+
+#include "RTE_components.h" /* For CPU related defintiions */
+#include "peripheral_memmap.h" /* Peripheral memory map definitions. */
+#include "peripheral_irqs.h" /* IRQ numbers for this platform. */
+#include "log_macros.h" /* Logging functions */
+
+#include "ethosu_mem_config.h" /* Arm Ethos-U memory config */
+#include "ethosu_driver.h" /* Arm Ethos-U driver header */
+
+struct ethosu_driver ethosu_drv; /* Default Ethos-U device driver */
+
+#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0)
+static uint8_t cache_arena[ETHOS_U_CACHE_BUF_SZ] CACHE_BUF_ATTRIBUTE;
+#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
+static uint8_t *cache_arena = NULL;
+#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
+
+uint8_t *get_cache_arena()
+{
+ return cache_arena;
+}
+
+size_t get_cache_arena_size()
+{
+#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0)
+ return sizeof(cache_arena);
+#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
+ return 0;
+#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
+}
+
+/**
+ * @brief Defines the Ethos-U interrupt handler: just a wrapper around the default
+ * implementation.
+ **/
+void arm_ethosu_npu_irq_handler(void)
+{
+ /* Call the default interrupt handler from the NPU driver */
+ ethosu_irq_handler(ðosu_drv);
+}
+
+/**
+ * @brief Initialises the NPU IRQ
+ **/
+void arm_ethosu_npu_irq_init(void)
+{
+ const IRQn_Type ethosu_irqnum = (IRQn_Type)EthosU_IRQn;
+
+ /* Register the EthosU IRQ handler in our vector table.
+ * Note, this handler comes from the EthosU driver */
+ NVIC_SetVector(ethosu_irqnum, (uint32_t)arm_ethosu_npu_irq_handler);
+
+ /* Enable the IRQ */
+ NVIC_EnableIRQ(ethosu_irqnum);
+
+ debug("EthosU IRQ#: %u, Handler: 0x%p\n",
+ ethosu_irqnum, arm_ethosu_npu_irq_handler);
+}
+
+int arm_ethosu_npu_init(void)
+{
+ int err = 0;
+
+ /* Initialise the IRQ */
+ arm_ethosu_npu_irq_init();
+
+ /* Initialise Ethos-U device */
+ const void *ethosu_base_address = (void *)(SEC_ETHOS_U_NPU_BASE);
+
+ if (0 != (err = ethosu_init(
+ ðosu_drv, /* Ethos-U driver device pointer */
+ ethosu_base_address, /* Ethos-U NPU's base address. */
+ get_cache_arena(), /* Pointer to fast mem area - NULL for U55. */
+ get_cache_arena_size(), /* Fast mem region size. */
+ 1, /* Security enable. */
+ 1))) /* Privilege enable. */
+ {
+ printf_err("failed to initialise Ethos-U device\n");
+ return err;
+ }
+
+ info("Ethos-U device initialised\n");
+
+ /* Get Ethos-U version */
+ struct ethosu_driver_version driver_version;
+ struct ethosu_hw_info hw_info;
+
+ ethosu_get_driver_version(&driver_version);
+ ethosu_get_hw_info(ðosu_drv, &hw_info);
+
+ info("Ethos-U version info:\n");
+ info("\tArch: v%" PRIu32 ".%" PRIu32 ".%" PRIu32 "\n",
+ hw_info.version.arch_major_rev,
+ hw_info.version.arch_minor_rev,
+ hw_info.version.arch_patch_rev);
+ info("\tDriver: v%" PRIu8 ".%" PRIu8 ".%" PRIu8 "\n",
+ driver_version.major,
+ driver_version.minor,
+ driver_version.patch);
+ info("\tMACs/cc: %" PRIu32 "\n", (uint32_t)(1 << hw_info.cfg.macs_per_cc));
+ info("\tCmd stream: v%" PRIu32 "\n", hw_info.cfg.cmd_stream_version);
+
+ return 0;
+}
diff --git a/source/hal/profiles/bare-metal/bsp/include/bsp.h b/source/hal/components/ethosu_npu_init/include/ethosu_npu_init.h
similarity index 67%
rename from source/hal/profiles/bare-metal/bsp/include/bsp.h
rename to source/hal/components/ethosu_npu_init/include/ethosu_npu_init.h
index e6dd0b5..c562f6c 100644
--- a/source/hal/profiles/bare-metal/bsp/include/bsp.h
+++ b/source/hal/components/ethosu_npu_init/include/ethosu_npu_init.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,13 +14,17 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
-#ifndef BSP_H
-#define BSP_H
-
-#include "platform_drivers.h"
+#ifndef ETHOS_U_NPU_INIT_H
+#define ETHOS_U_NPU_INIT_H
#if defined(ARM_NPU)
-#include "ethosu_mem_config.h"
-#endif /* defined(ARM_NPU) */
-#endif /* BSP_H */
+/**
+ * @brief Initialises the Arm Ethos-U NPU
+ * @return 0 if successful, error code otherwise
+ **/
+int arm_ethosu_npu_init(void);
+
+#endif /* ARM_NPU */
+
+#endif /* ETHOS_U_NPU_INIT_H */
diff --git a/source/hal/components/ethosu_ta_init/ethosu_ta_init.c b/source/hal/components/ethosu_ta_init/ethosu_ta_init.c
new file mode 100644
index 0000000..26eeb5c
--- /dev/null
+++ b/source/hal/components/ethosu_ta_init/ethosu_ta_init.c
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "ethosu_ta_init.h"
+
+#include "log_macros.h" /* Logging functions */
+
+#if defined(TIMING_ADAPTER_AVAILABLE)
+
+#include "timing_adapter.h" /* Arm Ethos-U timing adapter driver header */
+#include "timing_adapter_settings.h" /* Arm Ethos-U timing adapter settings */
+
+int arm_ethosu_timing_adapter_init(void)
+{
+#if defined(TA0_BASE)
+ struct timing_adapter ta_0;
+ struct timing_adapter_settings ta_0_settings = {
+ .maxr = TA0_MAXR,
+ .maxw = TA0_MAXW,
+ .maxrw = TA0_MAXRW,
+ .rlatency = TA0_RLATENCY,
+ .wlatency = TA0_WLATENCY,
+ .pulse_on = TA0_PULSE_ON,
+ .pulse_off = TA0_PULSE_OFF,
+ .bwcap = TA0_BWCAP,
+ .perfctrl = TA0_PERFCTRL,
+ .perfcnt = TA0_PERFCNT,
+ .mode = TA0_MODE,
+ .maxpending = 0, /* This is a read-only parameter */
+ .histbin = TA0_HISTBIN,
+ .histcnt = TA0_HISTCNT};
+
+ if (0 != ta_init(&ta_0, TA0_BASE))
+ {
+ printf_err("TA0 initialisation failed\n");
+ return 1;
+ }
+
+ ta_set_all(&ta_0, &ta_0_settings);
+#endif /* defined (TA0_BASE) */
+
+#if defined(TA1_BASE)
+ struct timing_adapter ta_1;
+ struct timing_adapter_settings ta_1_settings = {
+ .maxr = TA1_MAXR,
+ .maxw = TA1_MAXW,
+ .maxrw = TA1_MAXRW,
+ .rlatency = TA1_RLATENCY,
+ .wlatency = TA1_WLATENCY,
+ .pulse_on = TA1_PULSE_ON,
+ .pulse_off = TA1_PULSE_OFF,
+ .bwcap = TA1_BWCAP,
+ .perfctrl = TA1_PERFCTRL,
+ .perfcnt = TA1_PERFCNT,
+ .mode = TA1_MODE,
+ .maxpending = 0, /* This is a read-only parameter */
+ .histbin = TA1_HISTBIN,
+ .histcnt = TA1_HISTCNT};
+
+ if (0 != ta_init(&ta_1, TA1_BASE))
+ {
+ printf_err("TA1 initialisation failed\n");
+ return 1;
+ }
+
+ ta_set_all(&ta_1, &ta_1_settings);
+#endif /* defined (TA1_BASE) */
+
+ return 0;
+}
+
+#endif /* TIMING_ADAPTER_AVAILABLE */
diff --git a/source/hal/components/ethosu_ta_init/include/ethosu_ta_init.h b/source/hal/components/ethosu_ta_init/include/ethosu_ta_init.h
new file mode 100644
index 0000000..2ab7fb2
--- /dev/null
+++ b/source/hal/components/ethosu_ta_init/include/ethosu_ta_init.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef ETHOS_U_TA_INIT_H
+#define ETHOS_U_TA_INIT_H
+
+#if defined(ARM_NPU) && defined(TIMING_ADAPTER_AVAILABLE)
+
+/**
+ * @brief Initialises the Arm Ethos-U NPU timing adapter
+ * @return 0 if successful, error code otherwise
+ **/
+int arm_ethosu_timing_adapter_init(void);
+
+#endif /* ARM_NPU && TIMING_ADAPTER_AVAILABLE */
+
+#endif /* ETHOS_U_TA_INIT_H */
diff --git a/source/hal/hal.c b/source/hal/hal.c
index d78ac95..2715a17 100644
--- a/source/hal/hal.c
+++ b/source/hal/hal.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021-2022 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,7 +16,6 @@
*/
#include "hal.h" /* API */
-#include "hal_config.h" /* HAL configuration */
#include "platform_drivers.h" /* Platform drivers */
#include "log_macros.h" /* Logging macros */
@@ -24,46 +23,6 @@
#include <assert.h>
#include <string.h>
-#if defined(ARM_NPU)
-
-#include "ethosu_mem_config.h" /* Arm Ethos-U memory config */
-#include "ethosu_driver.h" /* Arm Ethos-U driver header */
-#include "timing_adapter.h" /* Arm Ethos-U timing adapter driver header */
-
-#if defined(TIMING_ADAPTER_AVAILABLE)
-#include "timing_adapter_settings.h" /* Arm Ethos-U timing adapter settings */
-#endif /* defined(TIMING_ADAPTER_AVAILABLE) */
-
-struct ethosu_driver ethosu_drv; /* Default Ethos-U device driver */
-
-#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0)
- static uint8_t cache_arena[ETHOS_U_CACHE_BUF_SZ] CACHE_BUF_ATTRIBUTE;
-#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
- static uint8_t* cache_arena = NULL;
-#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
-
-/**
- * @brief Initialises the Arm Ethos-U NPU
- * @return 0 if successful, error code otherwise
- **/
-static int arm_npu_init(void);
-
-static uint8_t * get_cache_arena()
-{
- return cache_arena;
-}
-
-static size_t get_cache_arena_size()
-{
-#if defined(ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0)
- return sizeof(cache_arena);
-#else /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
- return 0;
-#endif /* defined (ETHOS_U_CACHE_BUF_SZ) && (ETHOS_U_CACHE_BUF_SZ > 0) */
-}
-
-#endif /* ARM_NPU */
-
int hal_init(hal_platform* platform, data_acq_module* data_acq,
data_psn_module* data_psn, platform_timer* timer)
{
@@ -96,14 +55,14 @@
/* Initialise platform */
if (0 != (state = platform->platform_init())) {
- printf_err("failed to initialise platform %s\n", platform->plat_name);
+ printf_err("Failed to initialise platform %s\n", platform->plat_name);
return state;
}
/* Initialise the data acquisition module */
if (0 != (state = data_acq_channel_init(platform->data_acq))) {
if (!platform->data_acq->inited) {
- printf_err("failed to initialise data acq module: %s\n",
+ printf_err("Failed to initialise data acq module: %s\n",
platform->data_acq->system_name);
}
hal_platform_release(platform);
@@ -112,29 +71,20 @@
/* Initialise the presentation module */
if (0 != (state = data_psn_system_init(platform->data_psn))) {
- printf_err("failed to initialise data psn module: %s\n",
+ printf_err("Failed to initialise data psn module: %s\n",
platform->data_psn->system_name);
data_acq_channel_release(platform->data_acq);
hal_platform_release(platform);
return state;
}
-#if defined(ARM_NPU)
-
- /* If Arm Ethos-U NPU is to be used, we initialise it here */
- if (0 != (state = arm_npu_init())) {
- return state;
- }
-
-#endif /* ARM_NPU */
-
- /* followed by the timer module */
+ /* Followed by the timer module */
init_timer(platform->timer);
info("%s platform initialised\n", platform->plat_name);
- debug("using %s module for data acquisition\n",
+ debug("Using %s module for data acquisition\n",
platform->data_acq->system_name);
- debug("using %s module for data presentation\n",
+ debug("Using %s module for data presentation\n",
platform->data_psn->system_name);
platform->inited = !state;
@@ -149,151 +99,6 @@
data_psn_system_release(platform->data_psn);
hal_platform_clear(platform);
- info("releasing platform %s\n", platform->plat_name);
+ info("Releasing platform %s\n", platform->plat_name);
platform->platform_release();
}
-
-#if defined(ARM_NPU)
-/**
- * @brief Defines the Ethos-U interrupt handler: just a wrapper around the default
- * implementation.
- **/
-static void arm_npu_irq_handler(void)
-{
- /* Call the default interrupt handler from the NPU driver */
- ethosu_irq_handler(ðosu_drv);
-}
-
-/**
- * @brief Initialises the NPU IRQ
- **/
-static void arm_npu_irq_init(void)
-{
- const IRQn_Type ethosu_irqnum = (IRQn_Type)EthosU_IRQn;
-
- /* Register the EthosU IRQ handler in our vector table.
- * Note, this handler comes from the EthosU driver */
- NVIC_SetVector(ethosu_irqnum, (uint32_t)arm_npu_irq_handler);
-
- /* Enable the IRQ */
- NVIC_EnableIRQ(ethosu_irqnum);
-
- debug("EthosU IRQ#: %u, Handler: 0x%p\n",
- ethosu_irqnum, arm_npu_irq_handler);
-}
-
-#if defined(TIMING_ADAPTER_AVAILABLE)
- static int _arm_npu_timing_adapter_init(void)
- {
- #if defined (TA0_BASE)
- struct timing_adapter ta_0;
- struct timing_adapter_settings ta_0_settings = {
- .maxr = TA0_MAXR,
- .maxw = TA0_MAXW,
- .maxrw = TA0_MAXRW,
- .rlatency = TA0_RLATENCY,
- .wlatency = TA0_WLATENCY,
- .pulse_on = TA0_PULSE_ON,
- .pulse_off = TA0_PULSE_OFF,
- .bwcap = TA0_BWCAP,
- .perfctrl = TA0_PERFCTRL,
- .perfcnt = TA0_PERFCNT,
- .mode = TA0_MODE,
- .maxpending = 0, /* This is a read-only parameter */
- .histbin = TA0_HISTBIN,
- .histcnt = TA0_HISTCNT
- };
-
- if (0 != ta_init(&ta_0, TA0_BASE)) {
- printf_err("TA0 initialisation failed\n");
- return 1;
- }
-
- ta_set_all(&ta_0, &ta_0_settings);
- #endif /* defined (TA0_BASE) */
-
- #if defined (TA1_BASE)
- struct timing_adapter ta_1;
- struct timing_adapter_settings ta_1_settings = {
- .maxr = TA1_MAXR,
- .maxw = TA1_MAXW,
- .maxrw = TA1_MAXRW,
- .rlatency = TA1_RLATENCY,
- .wlatency = TA1_WLATENCY,
- .pulse_on = TA1_PULSE_ON,
- .pulse_off = TA1_PULSE_OFF,
- .bwcap = TA1_BWCAP,
- .perfctrl = TA1_PERFCTRL,
- .perfcnt = TA1_PERFCNT,
- .mode = TA1_MODE,
- .maxpending = 0, /* This is a read-only parameter */
- .histbin = TA1_HISTBIN,
- .histcnt = TA1_HISTCNT
- };
-
- if (0 != ta_init(&ta_1, TA1_BASE)) {
- printf_err("TA1 initialisation failed\n");
- return 1;
- }
-
- ta_set_all(&ta_1, &ta_1_settings);
- #endif /* defined (TA1_BASE) */
-
- return 0;
- }
-#endif /* defined(TIMING_ADAPTER_AVAILABLE) */
-
-static int arm_npu_init(void)
-{
- int err = 0;
-
- /* If the platform has timing adapter blocks along with Ethos-U core
- * block, initialise them here. */
-#if defined(TIMING_ADAPTER_AVAILABLE)
- if (0 != (err = _arm_npu_timing_adapter_init())) {
- return err;
- }
-#endif /* defined(TIMING_ADAPTER_AVAILABLE) */
-
- /* Initialise the IRQ */
- arm_npu_irq_init();
-
- /* Initialise Ethos-U device */
- const void * ethosu_base_address = (void *)(SEC_ETHOS_U_NPU_BASE);
-
- if (0 != (err = ethosu_init(
- ðosu_drv, /* Ethos-U driver device pointer */
- ethosu_base_address, /* Ethos-U NPU's base address. */
- get_cache_arena(), /* Pointer to fast mem area - NULL for U55. */
- get_cache_arena_size(), /* Fast mem region size. */
- 1, /* Security enable. */
- 1))) { /* Privilege enable. */
- printf_err("failed to initalise Ethos-U device\n");
- return err;
- }
-
- info("Ethos-U device initialised\n");
-
- /* Get Ethos-U version */
- struct ethosu_driver_version driver_version;
- struct ethosu_hw_info hw_info;
-
- ethosu_get_driver_version(&driver_version);
- ethosu_get_hw_info(ðosu_drv, &hw_info);
-
- info("Ethos-U version info:\n");
- info("\tArch: v%"PRIu32".%"PRIu32".%"PRIu32"\n",
- hw_info.version.arch_major_rev,
- hw_info.version.arch_minor_rev,
- hw_info.version.arch_patch_rev);
- info("\tDriver: v%"PRIu8".%"PRIu8".%"PRIu8"\n",
- driver_version.major,
- driver_version.minor,
- driver_version.patch);
- info("\tMACs/cc: %"PRIu32"\n", (uint32_t)(1 << hw_info.cfg.macs_per_cc));
- info("\tCmd stream: v%"PRIu32"\n", hw_info.cfg.cmd_stream_version);
-
- return 0;
-}
-
-#endif /* ARM_NPU */
diff --git a/source/hal/include/hal_config.h b/source/hal/include/hal_config.h
deleted file mode 100644
index ca32f4e..0000000
--- a/source/hal/include/hal_config.h
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (c) 2021 Arm Limited. All rights reserved.
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-#ifndef HAL_CONFIG_H
-#define HAL_CONFIG_H
-
-/* This header provides some basic configuration for HAL */
-
-/* Platform definitions for the systems we expect to support */
-#define PLATFORM_CORTEX_M_BAREMETAL 1U
-#define PLATFORM_UNKNOWN_LINUX_OS 3U
-
-/* This should come from compile time definition */
-#ifndef PLATFORM_HAL
- #define PLATFORM_HAL PLATFORM_UNKNOWN_LINUX_OS /* Default platform */
-#endif /* PLATFORM_HAL */
-
-#if ((PLATFORM_HAL) == PLATFORM_CORTEX_M_BAREMETAL)
- #include "bsp.h"
-#endif
-
-#if !defined (DESIGN_NAME)
- #define DESIGN_NAME ("N/A")
-#endif /* !defined (DESIGN_NAME) */
-
-#endif /* HAL_CONFIG_H */
diff --git a/source/hal/include/timer.h b/source/hal/include/timer.h
index 56aad5b..4429388 100644
--- a/source/hal/include/timer.h
+++ b/source/hal/include/timer.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -17,7 +17,6 @@
#ifndef HAL_TIMER_H
#define HAL_TIMER_H
-#include "hal_config.h"
#include "platform_timer.h"
/** Struct for describing the capabilities available for
diff --git a/source/hal/platform/mps3/CMakeLists.txt b/source/hal/platform/mps3/CMakeLists.txt
index cd95d6c..75e70a2 100644
--- a/source/hal/platform/mps3/CMakeLists.txt
+++ b/source/hal/platform/mps3/CMakeLists.txt
@@ -82,7 +82,7 @@
source/timer_mps3.c
source/platform_drivers.c)
-## Directory for additional compnents required by MPS3:
+## Directory for additional components required by MPS3:
if (NOT DEFINED COMPONENTS_DIR)
set(COMPONENTS_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../components)
endif()
@@ -115,7 +115,87 @@
target_link_libraries(${PLATFORM_DRIVERS_TARGET} PUBLIC
log cmsis_device)
-# Display status:
+# If Ethos-U is enabled, we need the driver library too
+if (ETHOS_U_NPU_ENABLED)
+
+
+ ## Platform component: Ethos-U initialization
+ target_sources(${PLATFORM_DRIVERS_TARGET}
+ PRIVATE
+ ${COMPONENTS_DIR}/ethosu_npu_init/ethosu_npu_init.c)
+ target_include_directories(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ${COMPONENTS_DIR}/ethosu_npu_init/include)
+
+ ## Platform component: Ethos-U timing apadpter initialization
+ target_sources(${PLATFORM_DRIVERS_TARGET}
+ PRIVATE
+ ${COMPONENTS_DIR}/ethosu_ta_init/ethosu_ta_init.c)
+ target_include_directories(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ${COMPONENTS_DIR}/ethosu_ta_init/include)
+
+ if (NOT DEFINED ETHOS_U_NPU_DRIVER_SRC_PATH)
+ message(FATAL_ERROR "ETHOS_U_NPU_DRIVER_SRC_PATH should"
+ " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
+ endif()
+
+ # Timing adapter
+ if (NOT DEFINED ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH)
+ message(FATAL_ERROR "ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH should"
+ " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
+ endif()
+
+ target_compile_definitions(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ARM_NPU)
+
+ # For the driver, we need to provide the CMSIS_PATH variable
+ set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory")
+ add_subdirectory(${ETHOS_U_NPU_DRIVER_SRC_PATH} ${CMAKE_BINARY_DIR}/ethos-u-driver)
+ add_subdirectory(${ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH} ${CMAKE_BINARY_DIR}/timing-adapter)
+
+ target_link_libraries(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ethosu_core_driver
+ timing_adapter)
+
+ if (NOT DEFINED ETHOS_U_NPU_ID)
+ set(ETHOS_U_NPU_ID U55)
+ endif()
+
+ if (NOT DEFINED ETHOS_U_NPU_MEMORY_MODE)
+ set(ETHOS_U_NPU_MEMORY_MODE Shared_Sram)
+ endif()
+
+ if (ETHOS_U_NPU_MEMORY_MODE STREQUAL Sram_Only)
+ if (ETHOS_U_NPU_ID STREQUAL U55)
+ set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEM_MODE_SRAM_ONLY")
+ else ()
+ message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `sram_only` can be used only for Ethos-U55.")
+ endif ()
+
+ elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Shared_Sram)
+ # Shared Sram can be used for Ethos-U55 and Ethos-U65
+ set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM")
+
+ elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Dedicated_Sram)
+ # Dedicated Sram is used only for Ethos-U65
+ if (ETHOS_U_NPU_ID STREQUAL U65)
+ list(APPEND ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM" "-DETHOS_U_NPU_CACHE_SIZE=${ETHOS_U_NPU_CACHE_SIZE}")
+ else ()
+ message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `dedicated_sram` can be used only for Ethos-U65.")
+ endif ()
+ else ()
+ message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode ${ETHOS_U_NPU_MEMORY_MODE}")
+ endif ()
+
+ target_compile_definitions(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ${ETHOS_U_NPU_MEMORY_MODE_FLAG})
+endif()
+
+# 5. Display status:
message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
message(STATUS "*******************************************************")
message(STATUS "Library : " ${PLATFORM_DRIVERS_TARGET})
diff --git a/source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h b/source/hal/platform/mps3/include/ethosu_mem_config.h
similarity index 87%
rename from source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h
rename to source/hal/platform/mps3/include/ethosu_mem_config.h
index b393a03..aa0cfda 100644
--- a/source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h
+++ b/source/hal/platform/mps3/include/ethosu_mem_config.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,6 +14,7 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
+
#ifndef ETHOS_U_NPU_MEM_CONFIG_H
#define ETHOS_U_NPU_MEM_CONFIG_H
@@ -28,7 +29,11 @@
#endif /* ETHOS_U_NPU_MEMORY_MODE */
#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM)
- #define ETHOS_U_CACHE_BUF_SZ (393216U) /* See vela doc? for reference? */
+ #ifndef ETHOS_U_NPU_CACHE_SIZE
+ #define ETHOS_U_CACHE_BUF_SZ (393216U) /* See vela doc for reference */
+ #else
+ #define ETHOS_U_CACHE_BUF_SZ ETHOS_U_NPU_CACHE_SIZE
+ #endif /* ETHOS_U_NPU_CACHE_SIZE */
#else
#define ETHOS_U_CACHE_BUF_SZ (0U)
#endif /* CACHE_BUF_SZ */
@@ -50,4 +55,4 @@
#define CACHE_BUF_ATTRIBUTE __attribute__((aligned(ETHOS_U_MEM_BYTE_ALIGNMENT), CACHE_BUF_SECTION))
#endif
-#endif /* ETHOS_U_NPU_MEM_CONFIG_H */
\ No newline at end of file
+#endif /* ETHOS_U_NPU_MEM_CONFIG_H */
diff --git a/source/hal/platform/mps3/source/platform_drivers.c b/source/hal/platform/mps3/source/platform_drivers.c
index da2b39c..3046c12 100644
--- a/source/hal/platform/mps3/source/platform_drivers.c
+++ b/source/hal/platform/mps3/source/platform_drivers.c
@@ -23,6 +23,15 @@
#include <string.h> /* For strncpy */
+#if defined(ARM_NPU)
+#include "ethosu_npu_init.h"
+
+#if defined(TIMING_ADAPTER_AVAILABLE)
+#include "ethosu_ta_init.h"
+#endif /* TIMING_ADAPTER_AVAILABLE */
+
+#endif /* ARM_NPU */
+
/**
* @brief Checks if the platform is valid by checking
* the CPU ID for the FPGA implementation against
@@ -45,7 +54,30 @@
return err;
}
- /** TODO: Add ARM NPU and TA init here */
+#if defined(ARM_NPU)
+
+#if defined(TIMING_ADAPTER_AVAILABLE)
+ /* If the platform has timing adapter blocks along with Ethos-U core
+ * block, initialise them here. */
+ if (0 != (err = arm_ethosu_timing_adapter_init()))
+ {
+ return err;
+ }
+#endif /* TIMING_ADAPTER_AVAILABLE */
+
+ int state;
+
+ /* If Arm Ethos-U NPU is to be used, we initialise it here */
+ if (0 != (state = arm_ethosu_npu_init()))
+ {
+ return state;
+ }
+
+#endif /* ARM_NPU */
+
+ /* Print target design info */
+ info("Target system design: %s\n", DESIGN_NAME);
+
return 0;
}
diff --git a/source/hal/platform/simple/CMakeLists.txt b/source/hal/platform/simple/CMakeLists.txt
index 44c4089..105fc9b 100644
--- a/source/hal/platform/simple/CMakeLists.txt
+++ b/source/hal/platform/simple/CMakeLists.txt
@@ -52,7 +52,7 @@
configure_file("${IRQ_PROFILE_TEMPLATE}" "${SOURCE_GEN_DIR}/peripheral_irqs.h")
configure_file("${MEM_REGIONS_TEMPLATE}" "${SOURCE_GEN_DIR}/mem_regions.h")
-# If a TA config file is provided, we generate a settings file
+## If a TA config file is provided, we generate a settings file
if (DEFINED TA_CONFIG_FILE)
include(${TA_CONFIG_FILE})
set(TA_SETTINGS_TEMPLATE ${CMAKE_CURRENT_SOURCE_DIR}/cmake/templates/timing_adapter_settings.template)
@@ -75,13 +75,18 @@
source/timer_simple_platform.c
source/platform_drivers.c)
+## Directory for additional components required by generic platform:
+if (NOT DEFINED COMPONENTS_DIR)
+ set(COMPONENTS_DIR ${CMAKE_CURRENT_SOURCE_DIR}/../../components)
+endif()
+
## Platform component: uart
target_sources(${PLATFORM_DRIVERS_TARGET}
PRIVATE
- ${CMAKE_CURRENT_SOURCE_DIR}/../../components/uart_pl011/uart_pl011.c)
+ ${COMPONENTS_DIR}/uart_pl011/uart_pl011.c)
target_include_directories(${PLATFORM_DRIVERS_TARGET}
PUBLIC
- ${CMAKE_CURRENT_SOURCE_DIR}/../../components/uart_pl011/include)
+ ${COMPONENTS_DIR}/uart_pl011/include)
## Compile defs
target_compile_definitions(${PLATFORM_DRIVERS_TARGET}
@@ -89,11 +94,91 @@
ACTIVATION_BUF_SRAM_SZ=${ACTIVATION_BUF_SRAM_SZ}
$<$<BOOL:TA_CONFIG_FILE>:TIMING_ADAPTER_AVAILABLE>)
+# Add dependencies:
target_link_libraries(${PLATFORM_DRIVERS_TARGET} PUBLIC
cmsis_device
log)
-# 6 Display status:
+# If Ethos-U is enabled, we need the driver library too
+if (ETHOS_U_NPU_ENABLED)
+
+ ## Platform component: Ethos-U initialization
+ target_sources(${PLATFORM_DRIVERS_TARGET}
+ PRIVATE
+ ${COMPONENTS_DIR}/ethosu_npu_init/ethosu_npu_init.c)
+ target_include_directories(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ${COMPONENTS_DIR}/ethosu_npu_init/include)
+
+ ## Platform component: Ethos-U timing apadpter initialization
+ target_sources(${PLATFORM_DRIVERS_TARGET}
+ PRIVATE
+ ${COMPONENTS_DIR}/ethosu_ta_init/ethosu_ta_init.c)
+ target_include_directories(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ${COMPONENTS_DIR}/ethosu_ta_init/include)
+
+ if (NOT DEFINED ETHOS_U_NPU_DRIVER_SRC_PATH)
+ message(FATAL_ERROR "ETHOS_U_NPU_DRIVER_SRC_PATH should"
+ " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
+ endif()
+
+ # Timing adapter
+ if (NOT DEFINED ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH)
+ message(FATAL_ERROR "ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH should"
+ " be defined when ETHOS_U_NPU_ENABLED=${ETHOS_U_NPU_ENABLED}")
+ endif()
+
+ target_compile_definitions(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ARM_NPU)
+
+ # For the driver, we need to provide the CMSIS_PATH variable
+ set(CMSIS_PATH ${CMSIS_SRC_PATH} CACHE PATH "Path to CMSIS directory")
+ add_subdirectory(${ETHOS_U_NPU_DRIVER_SRC_PATH} ${CMAKE_BINARY_DIR}/ethos-u-driver)
+ add_subdirectory(${ETHOS_U_NPU_TIMING_ADAPTER_SRC_PATH} ${CMAKE_BINARY_DIR}/timing-adapter)
+
+ target_link_libraries(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ethosu_core_driver
+ timing_adapter)
+
+ if (NOT DEFINED ETHOS_U_NPU_ID)
+ set(ETHOS_U_NPU_ID U55)
+ endif()
+
+ if (NOT DEFINED ETHOS_U_NPU_MEMORY_MODE)
+ set(ETHOS_U_NPU_MEMORY_MODE Shared_Sram)
+ endif()
+
+ if (ETHOS_U_NPU_MEMORY_MODE STREQUAL Sram_Only)
+ if (ETHOS_U_NPU_ID STREQUAL U55)
+ set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEM_MODE_SRAM_ONLY")
+ else ()
+ message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `sram_only` can be used only for Ethos-U55.")
+ endif ()
+
+ elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Shared_Sram)
+ # Shared Sram can be used for Ethos-U55 and Ethos-U65
+ set(ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_SHARED_SRAM")
+
+ elseif (ETHOS_U_NPU_MEMORY_MODE STREQUAL Dedicated_Sram)
+ # Dedicated Sram is used only for Ethos-U65
+ if (ETHOS_U_NPU_ID STREQUAL U65)
+ list(APPEND ETHOS_U_NPU_MEMORY_MODE_FLAG "-DETHOS_U_NPU_MEMORY_MODE=ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM" "-DETHOS_U_NPU_CACHE_SIZE=${ETHOS_U_NPU_CACHE_SIZE}")
+ else ()
+ message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode and processor ${ETHOS_U_NPU_MEMORY_MODE} - ${ETHOS_U_NPU_ID}. `dedicated_sram` can be used only for Ethos-U65.")
+ endif ()
+ else ()
+ message(FATAL_ERROR "Non compatible Ethos-U NPU memory mode ${ETHOS_U_NPU_MEMORY_MODE}")
+ endif ()
+
+ target_compile_definitions(${PLATFORM_DRIVERS_TARGET}
+ PUBLIC
+ ${ETHOS_U_NPU_MEMORY_MODE_FLAG})
+endif()
+
+# 5. Display status:
message(STATUS "CMAKE_CURRENT_SOURCE_DIR: " ${CMAKE_CURRENT_SOURCE_DIR})
message(STATUS "*******************************************************")
message(STATUS "Library : " ${PLATFORM_DRIVERS_TARGET})
diff --git a/source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h b/source/hal/platform/simple/include/ethosu_mem_config.h
similarity index 87%
copy from source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h
copy to source/hal/platform/simple/include/ethosu_mem_config.h
index b393a03..aa0cfda 100644
--- a/source/hal/profiles/bare-metal/bsp/include/ethosu_mem_config.h
+++ b/source/hal/platform/simple/include/ethosu_mem_config.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,6 +14,7 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
+
#ifndef ETHOS_U_NPU_MEM_CONFIG_H
#define ETHOS_U_NPU_MEM_CONFIG_H
@@ -28,7 +29,11 @@
#endif /* ETHOS_U_NPU_MEMORY_MODE */
#if (ETHOS_U_NPU_MEMORY_MODE==ETHOS_U_NPU_MEMORY_MODE_DEDICATED_SRAM)
- #define ETHOS_U_CACHE_BUF_SZ (393216U) /* See vela doc? for reference? */
+ #ifndef ETHOS_U_NPU_CACHE_SIZE
+ #define ETHOS_U_CACHE_BUF_SZ (393216U) /* See vela doc for reference */
+ #else
+ #define ETHOS_U_CACHE_BUF_SZ ETHOS_U_NPU_CACHE_SIZE
+ #endif /* ETHOS_U_NPU_CACHE_SIZE */
#else
#define ETHOS_U_CACHE_BUF_SZ (0U)
#endif /* CACHE_BUF_SZ */
@@ -50,4 +55,4 @@
#define CACHE_BUF_ATTRIBUTE __attribute__((aligned(ETHOS_U_MEM_BYTE_ALIGNMENT), CACHE_BUF_SECTION))
#endif
-#endif /* ETHOS_U_NPU_MEM_CONFIG_H */
\ No newline at end of file
+#endif /* ETHOS_U_NPU_MEM_CONFIG_H */
diff --git a/source/hal/platform/simple/source/platform_drivers.c b/source/hal/platform/simple/source/platform_drivers.c
index c92a964..6a89c61 100644
--- a/source/hal/platform/simple/source/platform_drivers.c
+++ b/source/hal/platform/simple/source/platform_drivers.c
@@ -20,6 +20,15 @@
#include "uart_stdout.h"
#include <string.h>
+#if defined(ARM_NPU)
+#include "ethosu_npu_init.h"
+
+#if defined(TIMING_ADAPTER_AVAILABLE)
+#include "ethosu_ta_init.h"
+#endif /* TIMING_ADAPTER_AVAILABLE */
+
+#endif /* ARM_NPU */
+
int platform_init(void)
{
SystemCoreClockUpdate(); /* From start up code */
@@ -30,7 +39,30 @@
info("%s: complete\n", __FUNCTION__);
- /** TODO: Add ARM NPU and TA init here */
+#if defined(ARM_NPU)
+
+ int state;
+
+ /* If the platform has timing adapter blocks along with Ethos-U core
+ * block, initialise them here. */
+#if defined(TIMING_ADAPTER_AVAILABLE)
+ int err;
+
+ if (0 != (err = arm_ethosu_timing_adapter_init())) {
+ return err;
+ }
+#endif /* TIMING_ADAPTER_AVAILABLE */
+
+ /* If Arm Ethos-U NPU is to be used, we initialise it here */
+ if (0 != (state = arm_ethosu_npu_init())) {
+ return state;
+ }
+
+#endif /* ARM_NPU */
+
+ /* Print target design info */
+ info("Target system design: %s\n", DESIGN_NAME);
+
return 0;
}
diff --git a/source/hal/profiles/bare-metal/data_acquisition/data_acq.c b/source/hal/profiles/bare-metal/data_acquisition/data_acq.c
index 7113a24..b7eba2d 100644
--- a/source/hal/profiles/bare-metal/data_acquisition/data_acq.c
+++ b/source/hal/profiles/bare-metal/data_acquisition/data_acq.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021-2022 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,8 +16,8 @@
*/
#include "data_acq.h"
-#include "bsp.h"
#include "log_macros.h"
+#include "platform_drivers.h"
#include "uart_stdout.h"
#include <assert.h>
diff --git a/source/hal/profiles/bare-metal/data_presentation/data_psn.c b/source/hal/profiles/bare-metal/data_presentation/data_psn.c
index 474d552..de088d7 100644
--- a/source/hal/profiles/bare-metal/data_presentation/data_psn.c
+++ b/source/hal/profiles/bare-metal/data_presentation/data_psn.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,8 +16,8 @@
*/
#include "data_psn.h"
-#include "bsp.h"
#include "lcd_img.h"
+#include "platform_drivers.h"
#include <assert.h>
#include <string.h>
diff --git a/source/hal/profiles/bare-metal/data_presentation/lcd/lcd_img.c b/source/hal/profiles/bare-metal/data_presentation/lcd/lcd_img.c
index bb950c3..6e05f29 100644
--- a/source/hal/profiles/bare-metal/data_presentation/lcd/lcd_img.c
+++ b/source/hal/profiles/bare-metal/data_presentation/lcd/lcd_img.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021-2022 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -16,8 +16,8 @@
*/
#include "lcd_img.h"
-#include "bsp.h"
#include "log_macros.h"
+#include "platform_drivers.h"
#include <string.h>
#include <assert.h>
diff --git a/source/hal/profiles/bare-metal/timer/include/platform_timer.h b/source/hal/profiles/bare-metal/timer/include/platform_timer.h
index 6338e0b..dd3934e 100644
--- a/source/hal/profiles/bare-metal/timer/include/platform_timer.h
+++ b/source/hal/profiles/bare-metal/timer/include/platform_timer.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -17,7 +17,7 @@
#ifndef BAREMETAL_TIMER_H
#define BAREMETAL_TIMER_H
-#include "bsp.h"
+#include "platform_drivers.h"
#include <stdint.h>
#include <time.h>
diff --git a/source/hal/profiles/bare-metal/timer/platform_timer.c b/source/hal/profiles/bare-metal/timer/platform_timer.c
index 11ccf8b..0388198 100644
--- a/source/hal/profiles/bare-metal/timer/platform_timer.c
+++ b/source/hal/profiles/bare-metal/timer/platform_timer.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021-2022 Arm Limited. All rights reserved.
+ * Copyright (c) 2022 Arm Limited. All rights reserved.
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the "License");
@@ -14,9 +14,9 @@
* See the License for the specific language governing permissions and
* limitations under the License.
*/
-#include "bsp.h"
#include "timer.h"
#include "log_macros.h"
+#include "platform_drivers.h"
#include <assert.h>
#include <string.h>