MLECO-2976: Configurable Ethos-U cache size for Dedicated_Sram
MLECO-2949: Platform drivers should own NPU and TA init
Change-Id: I13606a0197f137816bae803eb9d7d46c358b5fb8
Signed-off-by: Isabella Gottardi <isabella.gottardi@arm.com>
diff --git a/source/hal/platform/mps3/source/platform_drivers.c b/source/hal/platform/mps3/source/platform_drivers.c
index da2b39c..3046c12 100644
--- a/source/hal/platform/mps3/source/platform_drivers.c
+++ b/source/hal/platform/mps3/source/platform_drivers.c
@@ -23,6 +23,15 @@
#include <string.h> /* For strncpy */
+#if defined(ARM_NPU)
+#include "ethosu_npu_init.h"
+
+#if defined(TIMING_ADAPTER_AVAILABLE)
+#include "ethosu_ta_init.h"
+#endif /* TIMING_ADAPTER_AVAILABLE */
+
+#endif /* ARM_NPU */
+
/**
* @brief Checks if the platform is valid by checking
* the CPU ID for the FPGA implementation against
@@ -45,7 +54,30 @@
return err;
}
- /** TODO: Add ARM NPU and TA init here */
+#if defined(ARM_NPU)
+
+#if defined(TIMING_ADAPTER_AVAILABLE)
+ /* If the platform has timing adapter blocks along with Ethos-U core
+ * block, initialise them here. */
+ if (0 != (err = arm_ethosu_timing_adapter_init()))
+ {
+ return err;
+ }
+#endif /* TIMING_ADAPTER_AVAILABLE */
+
+ int state;
+
+ /* If Arm Ethos-U NPU is to be used, we initialise it here */
+ if (0 != (state = arm_ethosu_npu_init()))
+ {
+ return state;
+ }
+
+#endif /* ARM_NPU */
+
+ /* Print target design info */
+ info("Target system design: %s\n", DESIGN_NAME);
+
return 0;
}