Kshitij Sisodia | f9c19ea | 2021-05-07 16:08:14 +0100 | [diff] [blame] | 1 | TITLE: Arm MPS3 FPGA prototyping board Images Configuration File |
| 2 | |
Kshitij Sisodia | 661959c | 2021-11-24 10:39:52 +0000 | [diff] [blame^] | 3 | ; MCC mapping for Corstone-300 MPS3 bitfile package AN547 and |
| 4 | ; AN552 |
Kshitij Sisodia | f9c19ea | 2021-05-07 16:08:14 +0100 | [diff] [blame] | 5 | ; +-------------+---------------+-------------------------------+ |
| 6 | ; | FPGA addr | MCC addr | Region | |
| 7 | ; +-------------+---------------+-------------------------------+ |
| 8 | ; | 0x00000000 | 0x00000000 | ITCM (NS) | |
| 9 | ; | 0x01000000 | 0x02000000 | BRAM or FPGA's data SRAM (NS) | |
| 10 | ; | 0x60000000 | 0x08000000 | DDR (NS) | |
| 11 | ; | 0x70000000 | 0x0c000000 | DDR (S) | |
| 12 | ; +-------------+---------------+-------------------------------+ |
| 13 | |
| 14 | [IMAGES] |
| 15 | |
| 16 | TOTALIMAGES: 2 ;Number of Images (Max: 32) |
| 17 | |
| 18 | IMAGE0ADDRESS: 0x00000000 ; MCC@0x00000000 <=> FPGA@0x00000000 |
| 19 | IMAGE0UPDATE: AUTO |
| 20 | IMAGE0FILE: \SOFTWARE\itcm.bin |
| 21 | |
| 22 | IMAGE1ADDRESS: 0x0c000000 ; MCC@0x0c000000 <=> FPGA@0x70000000 |
| 23 | IMAGE1UPDATE: AUTO |
| 24 | IMAGE1FILE: \SOFTWARE\ddr.bin |