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Kshitij Sisodiaa1256e32022-02-23 14:40:45 +00001/*
2 * Copyright (c) 2022 Arm Limited. All rights reserved.
3 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 */
17
18#include "platform_drivers.h"
19
20#include "uart_stdout.h"
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +000021#include "peripheral_memmap.h"
22
23
Kshitij Sisodiaa1256e32022-02-23 14:40:45 +000024#include <string.h>
25
Isabella Gottardiee4920b2022-02-25 14:29:32 +000026#if defined(ARM_NPU)
27#include "ethosu_npu_init.h"
28
Kshitij Sisodiad5679cc2022-03-03 16:30:07 +000029#if defined(ETHOS_U_NPU_TIMING_ADAPTER_ENABLED)
Isabella Gottardiee4920b2022-02-25 14:29:32 +000030#include "ethosu_ta_init.h"
Kshitij Sisodiad5679cc2022-03-03 16:30:07 +000031#endif /* ETHOS_U_NPU_TIMING_ADAPTER_ENABLED */
Isabella Gottardiee4920b2022-02-25 14:29:32 +000032
Kshitij Sisodia8bc863d2022-03-24 17:53:34 +000033#if defined(ETHOS_U_BASE_ADDR)
34 #if (ETHOS_U_NPU_BASE != ETHOS_U_BASE_ADDR) && (SEC_ETHOS_U_NPU_BASE != ETHOS_U_BASE_ADDR)
35 #error "NPU component configured with incorrect NPU base address."
36 #endif /* (ETHOS_U_NPU_BASE != ETHOS_U_BASE_ADDR) && (SEC_ETHOS_U_NPU_BASE == ETHOS_U_BASE_ADDR) */
37#else
38 #error "ETHOS_U_BASE_ADDR should have been defined by the NPU component."
39#endif /* defined(ETHOS_U_BASE_ADDR) */
40
Isabella Gottardiee4920b2022-02-25 14:29:32 +000041#endif /* ARM_NPU */
42
Kshitij Sisodia4cc40212022-04-08 09:54:53 +010043/* Platform name */
44static const char* s_platform_name = DESIGN_NAME;
45
Kshitij Sisodiaa1256e32022-02-23 14:40:45 +000046int platform_init(void)
47{
48 SystemCoreClockUpdate(); /* From start up code */
49
50 /* UART init - will enable valid use of printf (stdout
51 * re-directed at this UART (UART0) */
52 UartStdOutInit();
53
54 info("%s: complete\n", __FUNCTION__);
55
Isabella Gottardiee4920b2022-02-25 14:29:32 +000056#if defined(ARM_NPU)
57
58 int state;
59
60 /* If the platform has timing adapter blocks along with Ethos-U core
61 * block, initialise them here. */
Kshitij Sisodiad5679cc2022-03-03 16:30:07 +000062#if defined(ETHOS_U_NPU_TIMING_ADAPTER_ENABLED)
Isabella Gottardiee4920b2022-02-25 14:29:32 +000063 int err;
64
65 if (0 != (err = arm_ethosu_timing_adapter_init())) {
66 return err;
67 }
Kshitij Sisodiad5679cc2022-03-03 16:30:07 +000068#endif /* ETHOS_U_NPU_TIMING_ADAPTER_ENABLED */
Isabella Gottardiee4920b2022-02-25 14:29:32 +000069
70 /* If Arm Ethos-U NPU is to be used, we initialise it here */
71 if (0 != (state = arm_ethosu_npu_init())) {
72 return state;
73 }
74
75#endif /* ARM_NPU */
76
77 /* Print target design info */
Kshitij Sisodia4cc40212022-04-08 09:54:53 +010078 info("Target system design: %s\n", s_platform_name);
Isabella Gottardiee4920b2022-02-25 14:29:32 +000079
Kshitij Sisodiaa1256e32022-02-23 14:40:45 +000080 return 0;
81}
82
83void platform_release(void)
84{
85 __disable_irq();
86}
87
Kshitij Sisodia4cc40212022-04-08 09:54:53 +010088const char* platform_name(void)
Kshitij Sisodiaa1256e32022-02-23 14:40:45 +000089{
Kshitij Sisodia4cc40212022-04-08 09:54:53 +010090 return s_platform_name;
Kshitij Sisodiaa1256e32022-02-23 14:40:45 +000091}