alexander | 3c79893 | 2021-03-26 21:42:19 +0000 | [diff] [blame] | 1 | /* |
Kshitij Sisodia | a1256e3 | 2022-02-23 14:40:45 +0000 | [diff] [blame^] | 2 | * Copyright (c) 2021-2022 Arm Limited. All rights reserved. |
alexander | 3c79893 | 2021-03-26 21:42:19 +0000 | [diff] [blame] | 3 | * SPDX-License-Identifier: Apache-2.0 |
| 4 | * |
| 5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
| 6 | * you may not use this file except in compliance with the License. |
| 7 | * You may obtain a copy of the License at |
| 8 | * |
| 9 | * http://www.apache.org/licenses/LICENSE-2.0 |
| 10 | * |
| 11 | * Unless required by applicable law or agreed to in writing, software |
| 12 | * distributed under the License is distributed on an "AS IS" BASIS, |
| 13 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 14 | * See the License for the specific language governing permissions and |
| 15 | * limitations under the License. |
| 16 | */ |
| 17 | #include "device_mps3.h" |
| 18 | |
alexander | 31ae9f0 | 2022-02-10 16:15:54 +0000 | [diff] [blame] | 19 | #include "log_macros.h" |
alexander | 3c79893 | 2021-03-26 21:42:19 +0000 | [diff] [blame] | 20 | #include "smm_mps3.h" |
| 21 | |
Kshitij Sisodia | f9c19ea | 2021-05-07 16:08:14 +0100 | [diff] [blame] | 22 | #include <inttypes.h> |
| 23 | |
alexander | 3c79893 | 2021-03-26 21:42:19 +0000 | [diff] [blame] | 24 | uint32_t GetMPS3CoreClock(void) |
| 25 | { |
Kshitij Sisodia | a1256e3 | 2022-02-23 14:40:45 +0000 | [diff] [blame^] | 26 | const uint32_t default_clock = 32000000 /* 32 MHz clock */; |
alexander | 3c79893 | 2021-03-26 21:42:19 +0000 | [diff] [blame] | 27 | static int warned_once = 0; |
| 28 | if (0 != MPS3_SCC->CFG_ACLK) { |
Kshitij Sisodia | 105ed71 | 2021-10-04 14:31:25 +0100 | [diff] [blame] | 29 | if (default_clock != MPS3_SCC->CFG_ACLK) { |
| 30 | warn("System clock is different to the MPS3 config set clock.\n"); |
| 31 | } |
alexander | 3c79893 | 2021-03-26 21:42:19 +0000 | [diff] [blame] | 32 | return MPS3_SCC->CFG_ACLK; |
| 33 | } |
| 34 | |
| 35 | if (!warned_once) { |
Kshitij Sisodia | f9c19ea | 2021-05-07 16:08:14 +0100 | [diff] [blame] | 36 | warn("MPS3_SCC->CFG_ACLK reads 0. Assuming default clock of %" PRIu32 "\n", |
alexander | 3c79893 | 2021-03-26 21:42:19 +0000 | [diff] [blame] | 37 | default_clock); |
| 38 | warned_once = 1; |
| 39 | } |
| 40 | return default_clock; |
| 41 | } |