blob: 6330269a21be576ce1bfb56f06cf30511de3c7d2 [file] [log] [blame]
alexander3c798932021-03-26 21:42:19 +00001/*
Kshitij Sisodiad5679cc2022-03-03 16:30:07 +00002 * Copyright (c) 2022 Arm Limited. All rights reserved.
alexander3c798932021-03-26 21:42:19 +00003 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Licensed under the Apache License, Version 2.0 (the "License");
6 * you may not use this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * http://www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an "AS IS" BASIS,
13 * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 */
17#include "timer_mps3.h"
18
alexander31ae9f02022-02-10 16:15:54 +000019#include "log_macros.h"
Kshitij Sisodiad5679cc2022-03-03 16:30:07 +000020#include "smm_mps3.h" /* Memory map for MPS3. */
alexander3c798932021-03-26 21:42:19 +000021
Kshitij Sisodiaa1256e32022-02-23 14:40:45 +000022static uint64_t cpu_cycle_count = 0; /* 64-bit cpu cycle counter */
23
24/**
25 * @brief Gets the system tick triggered cycle counter for the CPU.
26 * @return 64-bit counter value.
27 **/
28static uint64_t Get_SysTick_Cycle_Count(void);
29
30/**
31 * SysTick initialisation
32 */
33static int Init_SysTick(void);
Kshitij Sisodiaf9c19ea2021-05-07 16:08:14 +010034
Kshitij Sisodiada2ec062022-04-01 14:43:53 +010035/**
36 * @brief Adds one PMU counter to the counters' array
37 * @param value Value of the counter
38 * @param name Name for the given counter
39 * @param unit Unit for the "value"
40 * @param counters Pointer to the counter struct - the one to be populated.
41 * @return true if successfully added, false otherwise
42 */
43static bool add_pmu_counter(
44 uint64_t value,
45 const char* name,
46 const char* unit,
47 pmu_counters* counters);
48
49/**
50 * @brief Gets the evaluated millisecond timestamp from the given MPS3 counter struct.
51 * @param mps3_counters Pointer to the MPS3 counters.
52 * @return microseconds timestamp as 32 bit unsigned integer.
53 */
54static uint32_t get_tstamp_milliseconds(mps3_pmu_counters* mps3_counters);
55
56void platform_reset_counters(void)
alexander3c798932021-03-26 21:42:19 +000057{
58 MPS3_FPGAIO->CLK1HZ = 0;
59 MPS3_FPGAIO->CLK100HZ = 0;
60 MPS3_FPGAIO->COUNTER = 0;
61
62 if (0 != Init_SysTick()) {
63 printf_err("Failed to initialise system tick config\n");
64 }
65 debug("system tick config ready\n");
Kshitij Sisodiada2ec062022-04-01 14:43:53 +010066
67#if defined (ARM_NPU)
68 ethosu_pmu_init();
69#endif /* defined (ARM_NPU) */
alexander3c798932021-03-26 21:42:19 +000070}
71
Kshitij Sisodiada2ec062022-04-01 14:43:53 +010072pmu_counters platform_get_counters(void)
alexander3c798932021-03-26 21:42:19 +000073{
Kshitij Sisodiada2ec062022-04-01 14:43:53 +010074 pmu_counters platform_counters = {
75 .num_counters = 0,
76 .initialised = true
alexander3c798932021-03-26 21:42:19 +000077 };
Kshitij Sisodiada2ec062022-04-01 14:43:53 +010078 uint32_t i = 0;
79
80#if defined (ARM_NPU)
81 ethosu_pmu_counters npu_counters = ethosu_get_pmu_counters();
82 for (i = 0; i < ETHOSU_PMU_NCOUNTERS; ++i) {
83 add_pmu_counter(
84 npu_counters.npu_evt_counters[i].counter_value,
85 npu_counters.npu_evt_counters[i].name,
86 npu_counters.npu_evt_counters[i].unit,
87 &platform_counters);
88 }
89 for (i = 0; i < ETHOSU_DERIVED_NCOUNTERS; ++i) {
90 add_pmu_counter(
91 npu_counters.npu_derived_counters[i].counter_value,
92 npu_counters.npu_derived_counters[i].name,
93 npu_counters.npu_derived_counters[i].unit,
94 &platform_counters);
95 }
96 add_pmu_counter(
97 npu_counters.npu_total_ccnt,
98 "NPU TOTAL",
99 "cycles",
100 &platform_counters);
101#endif /* defined (ARM_NPU) */
102
103#if defined(CPU_PROFILE_ENABLED)
104 mps3_pmu_counters mps3_counters = {
105 .counter_1Hz = MPS3_FPGAIO->CLK1HZ,
106 .counter_100Hz = MPS3_FPGAIO->CLK100HZ,
107 .counter_fpga = MPS3_FPGAIO->COUNTER,
108 .counter_systick = Get_SysTick_Cycle_Count()
109 };
110
111 add_pmu_counter(
112 mps3_counters.counter_systick,
113 "CPU TOTAL",
114 "cycles",
115 &platform_counters);
116
117 add_pmu_counter(
118 get_tstamp_milliseconds(&mps3_counters),
119 "DURATION",
120 "milliseconds",
121 &platform_counters);
122#endif /* defined(CPU_PROFILE_ENABLED) */
123
124#if !defined(CPU_PROFILE_ENABLED)
125 UNUSED(get_tstamp_milliseconds);
126 UNUSED(Get_SysTick_Cycle_Count);
127#if !defined(ARM_NPU)
128 UNUSED(add_pmu_counter);
129 UNUSED(i);
130#endif /* !defined(ARM_NPU) */
131#endif /* !defined(CPU_PROFILE_ENABLED) */
132
133 return platform_counters;
alexander3c798932021-03-26 21:42:19 +0000134}
135
Kshitij Sisodiada2ec062022-04-01 14:43:53 +0100136uint32_t get_mps3_core_clock(void)
alexander3c798932021-03-26 21:42:19 +0000137{
Kshitij Sisodiada2ec062022-04-01 14:43:53 +0100138 const uint32_t default_clock = 32000000 /* 32 MHz clock */;
139 static int warned_once = 0;
140 if (0 != MPS3_SCC->CFG_ACLK) {
141 if (default_clock != MPS3_SCC->CFG_ACLK) {
142 warn("System clock is different to the MPS3 config set clock.\n");
143 }
144 return MPS3_SCC->CFG_ACLK;
alexander3c798932021-03-26 21:42:19 +0000145 }
146
Kshitij Sisodiada2ec062022-04-01 14:43:53 +0100147 if (!warned_once) {
148 warn("MPS3_SCC->CFG_ACLK reads 0. Assuming default clock of %" PRIu32 "\n",
149 default_clock);
150 warned_once = 1;
alexander3c798932021-03-26 21:42:19 +0000151 }
Kshitij Sisodiada2ec062022-04-01 14:43:53 +0100152 return default_clock;
alexander3c798932021-03-26 21:42:19 +0000153}
Kshitij Sisodiaa1256e32022-02-23 14:40:45 +0000154
155void SysTick_Handler(void)
156{
157 /* Increment the cycle counter based on load value. */
158 cpu_cycle_count += SysTick->LOAD + 1;
159}
160
161/**
162 * Gets the current SysTick derived counter value
163 */
164static uint64_t Get_SysTick_Cycle_Count(void)
165{
166 uint32_t systick_val;
167
168 NVIC_DisableIRQ(SysTick_IRQn);
169 systick_val = SysTick->VAL & SysTick_VAL_CURRENT_Msk;
170 NVIC_EnableIRQ(SysTick_IRQn);
171
172 return cpu_cycle_count + (SysTick->LOAD - systick_val);
173}
174
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +0000175
Kshitij Sisodiaa1256e32022-02-23 14:40:45 +0000176/**
177 * SysTick initialisation
178 */
179static int Init_SysTick(void)
180{
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +0000181 const uint32_t ticks_10ms = get_mps3_core_clock()/100 + 1;
Kshitij Sisodiaa1256e32022-02-23 14:40:45 +0000182 int err = 0;
183
184 /* Reset CPU cycle count value. */
185 cpu_cycle_count = 0;
186
187 /* Changing configuration for sys tick => guard from being
188 * interrupted. */
189 NVIC_DisableIRQ(SysTick_IRQn);
190
191 /* SysTick init - this will enable interrupt too. */
192 err = SysTick_Config(ticks_10ms);
193
194 /* Enable interrupt again. */
195 NVIC_EnableIRQ(SysTick_IRQn);
196
197 /* Wait for SysTick to kick off */
198 while (!err && !SysTick->VAL) {
199 __NOP();
200 }
201
202 return err;
203}
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +0000204
Kshitij Sisodiada2ec062022-04-01 14:43:53 +0100205static bool add_pmu_counter(uint64_t value,
206 const char* name,
207 const char* unit,
208 pmu_counters* counters)
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +0000209{
Kshitij Sisodiada2ec062022-04-01 14:43:53 +0100210 const uint32_t idx = counters->num_counters;
211 if (idx < NUM_PMU_COUNTERS) {
212 counters->counters[idx].value = value;
213 counters->counters[idx].name = name;
214 counters->counters[idx].unit = unit;
215 ++counters->num_counters;
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +0000216
Kshitij Sisodiada2ec062022-04-01 14:43:53 +0100217 debug("%s: %" PRIu64 " %s\n", name, value, unit);
218 return true;
Kshitij Sisodiac22e80e2022-03-14 09:26:48 +0000219 }
Kshitij Sisodiada2ec062022-04-01 14:43:53 +0100220 printf_err("Failed to add PMU counter!\n");
221 return false;
222}
223
224static uint32_t get_tstamp_milliseconds(mps3_pmu_counters* mps3_counters)
225{
226 const uint32_t divisor = get_mps3_core_clock() / 1000;
227 if (mps3_counters->counter_100Hz > 100) {
228 return (mps3_counters->counter_100Hz * 10);
229 }
230 return (mps3_counters->counter_systick/divisor);
231}