diff --git a/reference_model/src/ops/ewise_binary.cc b/reference_model/src/ops/ewise_binary.cc
index 16c4901..d6a95e1 100644
--- a/reference_model/src/ops/ewise_binary.cc
+++ b/reference_model/src/ops/ewise_binary.cc
@@ -301,16 +301,16 @@
 }
 
 template <int Rank, DType Dtype>
-int OpDiv<Rank, Dtype>::register_fcn()
+int OpIntdiv<Rank, Dtype>::register_fcn()
 {
     switch (InDtype)
     {
         case DType_INT32:
             this->fcn = [this](InEigenType a, InEigenType b) -> OutEigenType {
-                REQUIRE(b != 0, "OpDiv: divisor must be non-zero value");
+                REQUIRE(b != 0, "OpIntDiv: divisor must be non-zero value");
                 int64_t res_in_64     = static_cast<int64_t>(a) / b;
                 int64_t i32_max_in_64 = static_cast<int64_t>(std::numeric_limits<InEigenType>::max());
-                REQUIRE(a <= i32_max_in_64, "OpDiv: result not in i32 range");
+                REQUIRE(a <= i32_max_in_64, "OpIntDiv: result not in i32 range");
                 return static_cast<InEigenType>(res_in_64);
             };
             break;
@@ -637,7 +637,7 @@
 DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT16);
 DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT32);
 
-DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpDiv, INT32);
+DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpIntdiv, INT32);
 
 DEF_INSTANTIATE_RANK0_6_ONE_RANK_ONE_TYPE(OpLogicalAnd, BOOL);
 
diff --git a/reference_model/src/ops/ewise_binary.h b/reference_model/src/ops/ewise_binary.h
index 86b2101..66da97a 100644
--- a/reference_model/src/ops/ewise_binary.h
+++ b/reference_model/src/ops/ewise_binary.h
@@ -125,7 +125,7 @@
 DEF_TEMPLATE_BINARY_OP_DEFAULT(BitwiseAnd, BITWISE_AND)
 DEF_TEMPLATE_BINARY_OP_DEFAULT(BitwiseOr, BITWISE_OR)
 DEF_TEMPLATE_BINARY_OP_DEFAULT(BitwiseXor, BITWISE_XOR)
-DEF_TEMPLATE_BINARY_OP_DEFAULT(Div, DIV)
+DEF_TEMPLATE_BINARY_OP_DEFAULT(Intdiv, INTDIV)
 DEF_TEMPLATE_BINARY_OP_DEFAULT(LogicalAnd, LOGICAL_AND)
 DEF_TEMPLATE_BINARY_OP_DEFAULT(LogicalLeftShift, LOGICAL_LEFT_SHIFT)
 DEF_TEMPLATE_BINARY_OP_DEFAULT(LogicalRightShift, LOGICAL_RIGHT_SHIFT)
diff --git a/reference_model/src/ops/op_factory.cc b/reference_model/src/ops/op_factory.cc
index 2d9e428..193b2af 100644
--- a/reference_model/src/ops/op_factory.cc
+++ b/reference_model/src/ops/op_factory.cc
@@ -135,8 +135,8 @@
             DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT16);
             DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpBitwiseXor, INT32);
             break;
-        case Op_DIV:
-            DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpDiv, INT32);
+        case Op_INTDIV:
+            DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpIntdiv, INT32);
             break;
         case Op_LOGICAL_AND:
             DEF_FACTORY_RANK0_6_ONE_RANK_ONE_TYPE(OpLogicalAnd, BOOL);
diff --git a/thirdparty/serialization_lib b/thirdparty/serialization_lib
index 3ce5634..ab905ec 160000
--- a/thirdparty/serialization_lib
+++ b/thirdparty/serialization_lib
@@ -1 +1 @@
-Subproject commit 3ce563449c1e607b016b82c5dbb6e33883f846a5
+Subproject commit ab905ec865a9f4889e6818ce1c4bc934cff2070d
diff --git a/verif/tosa_test_gen.py b/verif/tosa_test_gen.py
index d41d6e2..0d5169c 100644
--- a/verif/tosa_test_gen.py
+++ b/verif/tosa_test_gen.py
@@ -1840,14 +1840,14 @@
                 self.buildPlaceholderTensors(shapeList[0:pCount], dtypeList[0:pCount])
             )
             tens.extend(self.buildConstTensors(shapeList[pCount:], dtypeList[pCount:]))
-        elif op["op"] == Op.DIV:
+        elif op["op"] == Op.INTDIV:
             assert (
                 pCount == 2 and cCount == 0
-            ), "Op.Div must have 2 placeholders, 0 consts"
+            ), "Op.INTDIV must have 2 placeholders, 0 consts"
 
             placeholders = []
 
-            # Two invalid cases for Op.DIV:
+            # Two invalid cases for Op.INTDIV:
             # 1. divisor == 0
             # 2. dividend == -(1<<31) and divisor == -1
             while True:
@@ -2219,8 +2219,8 @@
             "build_fcn": (build_binary_broadcast, TosaTensorGen.tgBroadcastFuzz, None),
             "types": TYPE_INT,
         },
-        "div": {
-            "op": Op.DIV,
+        "intdiv": {
+            "op": Op.INTDIV,
             "operands": (2, 0),
             "build_fcn": (build_binary_broadcast, TosaTensorGen.tgBroadcastFuzz, None),
             "types": [DType.INT32],