commit 630c17c5b46aed13edebc60321fcee5659c688bb
author Matthew Haddon <matthew.haddon@arm.com> Thu Oct 14 15:05:41 2021 +0100
committer Eric Kunze <eric.kunze@arm.com> Tue Nov 09 15:11:29 2021 +0000
tree a6e52eaa5b2794454fbb53334e50fb929a254dcc
parent bb5676f55df0d14be7e07981c39645971a587ed2

Add negative testing to cond_if, while_loop

Signed-off-by: Matthew Haddon <matthew.haddon@arm.com>
Signed-off-by: Les Bell <les.bell@arm.com>
Change-Id: Ie6c8c8653874f9eed6007a54a3ad526601a4a669

verif/tosa_error_if.py

diff --git a/verif/tosa_error_if.py b/verif/tosa_error_if.py
index 9fcc374..f0e752f 100644
--- a/verif/tosa_error_if.py
+++ b/verif/tosa_error_if.py
@@ -56,5 +56,14 @@
     MaxSmallerMin = "MaxSmallerMin"
     ConcatInputRankMismatch = "ConcatInputRankMismatch"
     ConcatInputDimMismatch = "ConcatInputDimMismatch"
+    CondIfInputListThenGraphMismatch = "CondIfInputListThenGraphMismatch"
+    CondIfInputListElseGraphMismatch = "CondIfInputListElseGraphMismatch"
+    CondIfOutputListThenGraphMismatch = "CondIfOutputListThenGraphMismatch"
+    CondIfOutputListElseGraphMismatch = "CondIfOutputListElseGraphMismatch"
+    InputListOutputListMismatch = "InputListOutputListMismatch"
+    InputListCondGraphMismatch = "InputListCondGraphMismatch"
+    InputListBodyGraphInputMismatch = "InputListBodyGraphInputMismatch"
+    InputListBodyGraphOutputMismatch = "InputListBodyGraphOutputMismatch"
+    CondGraphOutputNotMatchingBool = "CondGraphOutputNotMatchingBool"