Michalis Spyrou | 16934a5 | 2018-08-21 18:03:58 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2018 ARM Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | |
| 25 | #include "arm_compute/runtime/CL/functions/CLSpaceToBatchLayer.h" |
| 26 | |
| 27 | #include "arm_compute/core/Error.h" |
| 28 | #include "arm_compute/core/TensorInfo.h" |
| 29 | #include "arm_compute/core/Types.h" |
| 30 | #include "arm_compute/core/Validate.h" |
| 31 | #include "arm_compute/runtime/CL/CLScheduler.h" |
| 32 | |
| 33 | namespace arm_compute |
| 34 | { |
| 35 | CLSpaceToBatchLayer::CLSpaceToBatchLayer() |
| 36 | : _space_to_batch_kernel(), _output(nullptr), _has_padding(false) |
| 37 | { |
| 38 | } |
| 39 | |
| 40 | void CLSpaceToBatchLayer::configure(const ICLTensor *input, const ICLTensor *block_shape, const ICLTensor *paddings, ICLTensor *output) |
| 41 | { |
| 42 | ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); |
| 43 | |
| 44 | if(input->info()->tensor_shape().total_size() != output->info()->tensor_shape().total_size()) |
| 45 | { |
| 46 | _has_padding = true; |
| 47 | } |
| 48 | |
| 49 | _output = output; |
| 50 | _space_to_batch_kernel.configure(input, block_shape, paddings, output); |
| 51 | } |
| 52 | |
| 53 | void CLSpaceToBatchLayer::configure(const ICLTensor *input, const int block_shape_x, const int block_shape_y, const Size2D &padding_left, const Size2D &padding_right, ICLTensor *output) |
| 54 | { |
| 55 | ARM_COMPUTE_ERROR_ON_NULLPTR(input, output); |
| 56 | |
| 57 | if(input->info()->tensor_shape().total_size() != output->info()->tensor_shape().total_size()) |
| 58 | { |
| 59 | _has_padding = true; |
| 60 | } |
| 61 | |
| 62 | _output = output; |
| 63 | _space_to_batch_kernel.configure(input, block_shape_x, block_shape_y, padding_left, padding_right, output); |
| 64 | } |
| 65 | |
| 66 | Status CLSpaceToBatchLayer::validate(const ITensorInfo *input, const ITensorInfo *block_shape, const ITensorInfo *paddings, const ITensorInfo *output) |
| 67 | { |
| 68 | return CLSpaceToBatchLayerKernel::validate(input, block_shape, paddings, output); |
| 69 | } |
| 70 | |
| 71 | Status CLSpaceToBatchLayer::validate(const ITensorInfo *input, const int block_shape_x, const int block_shape_y, const Size2D &padding_left, const Size2D &padding_right, |
| 72 | const ITensorInfo *output) |
| 73 | { |
| 74 | return CLSpaceToBatchLayerKernel::validate(input, block_shape_x, block_shape_y, padding_left, padding_right, output); |
| 75 | } |
| 76 | |
| 77 | void CLSpaceToBatchLayer::run() |
| 78 | { |
| 79 | // Zero out output only if we have paddings |
| 80 | // TODO(micspy01): replace with memset once ready |
| 81 | if(_has_padding) |
| 82 | { |
| 83 | _output->map(CLScheduler::get().queue(), true); |
| 84 | if(is_data_type_quantized_asymmetric(_output->info()->data_type())) |
| 85 | { |
| 86 | const uint8_t quantized_zero = _output->info()->quantization_info().offset; |
| 87 | std::fill_n(_output->buffer(), _output->info()->total_size(), quantized_zero); |
| 88 | } |
| 89 | else |
| 90 | { |
| 91 | memset(_output->buffer(), 0, _output->info()->total_size()); |
| 92 | } |
| 93 | _output->unmap(CLScheduler::get().queue()); |
| 94 | } |
| 95 | |
| 96 | CLScheduler::get().enqueue(_space_to_batch_kernel, true); |
| 97 | } |
| 98 | } // namespace arm_compute |