Pablo Tello | 181e651 | 2017-11-15 13:28:27 +0000 | [diff] [blame^] | 1 | /* Copyright (c) 2017 ARM Limited. |
| 2 | * |
| 3 | * SPDX-License-Identifier: MIT |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 6 | * of this software and associated documentation files (the "Software"), to |
| 7 | * deal in the Software without restriction, including without limitation the |
| 8 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 9 | * sell copies of the Software, and to permit persons to whom the Software is |
| 10 | * furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice shall be included in all |
| 13 | * copies or substantial portions of the Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 18 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 21 | * SOFTWARE. |
| 22 | */ |
| 23 | #include "arm_compute/runtime/NEON/functions/NEGEMMLowpAssemblyMatrixMultiplyCore.h" |
| 24 | |
| 25 | #include "arm_compute/core/Error.h" |
| 26 | #include "arm_compute/core/Helpers.h" |
| 27 | #include "arm_compute/core/ITensor.h" |
| 28 | #include "arm_compute/core/NEON/kernels/NEGEMMAssemblyBaseKernel.h" |
| 29 | #include "arm_compute/core/NEON/kernels/NEGEMMInterleave4x4Kernel.h" |
| 30 | #include "arm_compute/core/NEON/kernels/NEGEMMLowpMatrixMultiplyKernel.h" |
| 31 | #include "arm_compute/core/NEON/kernels/NEGEMMTranspose1xWKernel.h" |
| 32 | #include "arm_compute/core/NEON/kernels/arm64/NEGEMMLowpAArch64Kernel.h" |
| 33 | #include "arm_compute/core/NEON/kernels/arm64/NEGEMMLowpAArch64V8P4Kernel.h" |
| 34 | #include "arm_compute/core/TensorInfo.h" |
| 35 | #include "arm_compute/core/Types.h" |
| 36 | #include "arm_compute/core/Validate.h" |
| 37 | #include "arm_compute/runtime/NEON/NEScheduler.h" |
| 38 | #include "arm_compute/runtime/TensorAllocator.h" |
| 39 | #include "support/ToolchainSupport.h" |
| 40 | |
| 41 | namespace arm_compute |
| 42 | { |
| 43 | #include "arm_compute/core/NEON/kernels/assembly/gemm_interleaved.hpp" |
| 44 | #include "arm_compute/core/NEON/kernels/assembly/kernels/a64_gemm_s8_12x8.hpp" |
| 45 | #include "arm_compute/core/NEON/kernels/assembly/kernels/a64_gemm_s8_4x4.hpp" |
| 46 | |
| 47 | } // namespace arm_compute |
| 48 | |
| 49 | using namespace arm_compute; |
| 50 | |
| 51 | NEGEMMLowpAssemblyMatrixMultiplyCore::NEGEMMLowpAssemblyMatrixMultiplyCore(std::shared_ptr<IMemoryManager> memory_manager) |
| 52 | : _memory_group(std::move(memory_manager)), _mm_kernel(nullptr), _mtx_a_reshape_kernel(nullptr), _mtx_b_reshape_kernel(nullptr), _tmp_a(), _tmp_b(), _workspace() |
| 53 | { |
| 54 | } |
| 55 | |
| 56 | void NEGEMMLowpAssemblyMatrixMultiplyCore::configure(const ITensor *a, const ITensor *b, ITensor *output) |
| 57 | { |
| 58 | ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(a, 1, DataType::S8); |
| 59 | ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(output, 1, DataType::S32); |
| 60 | ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(a, b); |
| 61 | ARM_COMPUTE_ERROR_ON_MSG((a)->info()->dimension(0) != (b)->info()->dimension(1), "The product AB is defined only if the number of columns in A is equal to the number of rows in B"); |
| 62 | ARM_COMPUTE_ERROR_ON_MSG((a)->info()->dimension(1) != (output)->info()->dimension(1), "The output matrix must have the same number of rows as the matrix A"); |
| 63 | ARM_COMPUTE_ERROR_ON_MSG((b)->info()->dimension(0) != (output)->info()->dimension(0), "The output matrix must have the same number of columns as the matrix B"); |
| 64 | |
| 65 | #ifdef __aarch64__ |
| 66 | const int M = output->info()->tensor_shape().y(); |
| 67 | const int N = output->info()->tensor_shape().x(); |
| 68 | const int K = a->info()->tensor_shape().x(); |
| 69 | constexpr size_t workspace_alignment = 4096; |
| 70 | const struct CPUInfo ci = NEScheduler::get().cpu_info(); |
| 71 | #endif /* __aarch64__ */ |
| 72 | |
| 73 | #ifdef ARM_COMPUTE_AARCH64_V8_2 |
| 74 | if(ci.CPU == CPUTarget::A75_DOT) |
| 75 | { |
| 76 | // Configure matrix multiply kernel |
| 77 | GemmInterleaved<gemm_s8_12x8, int8_t, int32_t> gemm(&ci, M, N, K, false, false); |
| 78 | _workspace.allocator()->init(TensorInfo(TensorShape{ (gemm.get_working_size() + workspace_alignment - 1) * NEScheduler::get().num_threads() }, 1, DataType::U8)); |
| 79 | _memory_group.manage(&_workspace); |
| 80 | |
| 81 | // Configure matrix multiplication kernel |
| 82 | auto k = arm_compute::support::cpp14::make_unique<NEGEMMLowpAArch64V8P4Kernel>(); |
| 83 | k->configure(a, b, output, &_workspace, 1.f, 1.f); |
| 84 | _mm_kernel = std::move(k); |
| 85 | _workspace.allocator()->allocate(); |
| 86 | } |
| 87 | else if(ci.CPU == CPUTarget::A55_DOT) |
| 88 | { |
| 89 | ARM_COMPUTE_ERROR_ON("WIP"); |
| 90 | } |
| 91 | else |
| 92 | #elif defined(ARM_COMPUTE_AARCH64_V8A) |
| 93 | if(1) |
| 94 | { |
| 95 | // Configure matrix multiply kernel |
| 96 | GemmInterleaved<gemm_s8_4x4, int8_t, int32_t> gemm(&ci, M, N, K, false, false); |
| 97 | _workspace.allocator()->init(TensorInfo(TensorShape{ (gemm.get_working_size() + workspace_alignment - 1) * NEScheduler::get().num_threads() }, 1, DataType::U8)); |
| 98 | _memory_group.manage(&_workspace); |
| 99 | // Configure matrix multiplication kernel |
| 100 | auto k = arm_compute::support::cpp14::make_unique<NEGEMMLowpAArch64Kernel>(); |
| 101 | k->configure(a, b, output, &_workspace, 1.f, 1.f); |
| 102 | _mm_kernel = std::move(k); |
| 103 | _workspace.allocator()->allocate(); |
| 104 | } |
| 105 | else |
| 106 | #endif /* ARM_COMPUTE_AARCH64_V8_2 */ |
| 107 | { |
| 108 | // The interleaved output matrix will have the following shape: [ a_height * 4, ceil(a_width / 4.0f) ] |
| 109 | TensorShape shape_tmp_a = a->info()->tensor_shape(); |
| 110 | shape_tmp_a.set(0, a->info()->dimension(0) * 4); |
| 111 | shape_tmp_a.set(1, std::ceil(a->info()->dimension(1) / 4.f)); |
| 112 | |
| 113 | // The transpose1xW output matrix will have the following shape: [ b_height * 16, ceil(b_width / 16.0f) ] |
| 114 | TensorShape shape_tmp_b = b->info()->tensor_shape(); |
| 115 | shape_tmp_b.set(0, b->info()->dimension(1) * 16); |
| 116 | shape_tmp_b.set(1, std::ceil(b->info()->dimension(0) / 16.f)); |
| 117 | |
| 118 | TensorInfo info_a(shape_tmp_a, 1, a->info()->data_type()); |
| 119 | TensorInfo info_b(shape_tmp_b, 1, b->info()->data_type()); |
| 120 | _tmp_a.allocator()->init(info_a); |
| 121 | _tmp_b.allocator()->init(info_b); |
| 122 | _memory_group.manage(&_tmp_a); |
| 123 | _memory_group.manage(&_tmp_b); |
| 124 | |
| 125 | // Configure interleave kernel |
| 126 | { |
| 127 | auto k = arm_compute::support::cpp14::make_unique<NEGEMMInterleave4x4Kernel>(); |
| 128 | k->configure(a, &_tmp_a); |
| 129 | _mtx_a_reshape_kernel = std::move(k); |
| 130 | } |
| 131 | |
| 132 | // Configure transpose kernel |
| 133 | { |
| 134 | auto k = arm_compute::support::cpp14::make_unique<NEGEMMTranspose1xWKernel>(); |
| 135 | k->configure(b, &_tmp_b); |
| 136 | _mtx_b_reshape_kernel = std::move(k); |
| 137 | } |
| 138 | |
| 139 | // Configure matrix multiply kernel |
| 140 | { |
| 141 | auto k = arm_compute::support::cpp14::make_unique<NEGEMMLowpMatrixMultiplyKernel>(); |
| 142 | k->configure(&_tmp_a, &_tmp_b, output); |
| 143 | _mm_kernel = std::move(k); |
| 144 | } |
| 145 | |
| 146 | // Allocate tensors |
| 147 | _tmp_a.allocator()->allocate(); |
| 148 | _tmp_b.allocator()->allocate(); |
| 149 | } |
| 150 | } |
| 151 | |
| 152 | void NEGEMMLowpAssemblyMatrixMultiplyCore::run() |
| 153 | { |
| 154 | _memory_group.acquire(); |
| 155 | if(_mtx_a_reshape_kernel) |
| 156 | { |
| 157 | NEScheduler::get().schedule(_mtx_a_reshape_kernel.get(), Window::DimY); |
| 158 | } |
| 159 | |
| 160 | if(_mtx_b_reshape_kernel) |
| 161 | { |
| 162 | NEScheduler::get().schedule(_mtx_b_reshape_kernel.get(), Window::DimY); |
| 163 | } |
| 164 | |
| 165 | NEScheduler::get().schedule(_mm_kernel.get(), Window::DimY); |
| 166 | |
| 167 | _memory_group.release(); |
| 168 | } |