blob: c4e70339145aeef0521fa8e07b014368143f8f4c [file] [log] [blame]
Giorgio Arena232c4522022-03-03 10:09:01 +00001/*
2 * Copyright (c) 2022 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24
25#if defined(ENABLE_EXPERIMENTAL_DYNAMIC_FUSION)
26
27#include "src/gpu/cl/kernels/experimental/dynamic_fusion/ClCompositeKernel.h"
28
29#include "src/core/utils/helpers/float_ops.h"
30#include "src/gpu/cl/kernels/ClElementwiseKernel.h"
31#include "src/gpu/cl/kernels/ClGemmMatrixMultiplyNativeKernel.h"
32#include "tests/CL/CLAccessor.h"
33#include "tests/framework/Macros.h"
34#include "tests/framework/datasets/Datasets.h"
35#include "tests/validation/Validation.h"
36#include "tests/validation/reference/ElementwiseOperations.h"
37#include "tests/validation/reference/GEMM.h"
38
39#include "arm_compute/core/utils/misc/ShapeCalculator.h"
40#include "src/core/AccessWindowStatic.h"
41#include "src/core/helpers/AutoConfiguration.h"
42#include "src/core/helpers/WindowHelpers.h"
43
44#include <chrono>
45
46using namespace arm_compute::experimental::dynamic_fusion;
47
48namespace arm_compute
49{
50namespace test
51{
52namespace validation
53{
54namespace
55{
56/** Macros which measures the wall clock time, and records it into a map measurement_map with name clock_name */
57#define TICK(clock_name) \
58 auto clock_name##_tick = std::chrono::high_resolution_clock::now();
59#define TOCK(clock_name, measurement_map) \
60 auto clock_name##_tock = std::chrono::high_resolution_clock::now(); \
61 measurement_map["\"" #clock_name "\""] = duration_cast<microseconds>(clock_name##_tock - clock_name##_tick);
62#define TOCK_AVG(clock_name, measurement_map, num_iterations) \
63 auto clock_name##_tock = std::chrono::high_resolution_clock::now(); \
64 measurement_map["\"" #clock_name "\""] = duration_cast<microseconds>((clock_name##_tock - clock_name##_tick) / (num_iterations));
65
66template <typename T, typename U>
67void fill(U &&tensor, int seed)
68{
69 static_assert(std::is_floating_point<T>::value || std::is_same<T, half>::value, "Only floating point data types supported.");
70 using DistributionType = typename std::conditional<std::is_same<T, half>::value, arm_compute::utils::uniform_real_distribution_16bit<T>, std::uniform_real_distribution<T>>::type;
71
72 DistributionType distribution{ T(-1.0f), T(1.0f) };
73 library->fill(tensor, distribution, seed);
74
75 // Fill border with infinity in order to check the presence of NaN values (i.e. inf * 0)
76 DistributionType distribution_inf{ T(std::numeric_limits<float>::infinity()), T(std::numeric_limits<float>::infinity()) };
77 library->fill_borders_with_garbage(tensor, distribution_inf, seed);
78}
79
80using ElementsProcessed = Steps;
81std::pair<Status, Window> mock_gemm_native_validate_and_configure_window(ITensorInfo *src0, ITensorInfo *src1, ITensorInfo *src2, ITensorInfo *dst, const GEMMLHSMatrixInfo &lhs_info,
82 const GEMMRHSMatrixInfo &rhs_info,
83 const GEMMKernelInfo &gemm_info, ElementsProcessed &num_elements_processed)
84{
85 unsigned int &num_elems_processed_per_iteration_x = num_elements_processed[0];
86 unsigned int &num_elems_processed_per_iteration_y = num_elements_processed[1];
87 bool reinterpret_input_as_3d = gemm_info.reinterpret_input_as_3d;
88 bool reinterpret_output_as_3d = gemm_info.depth_output_gemm3d != 0;
89
90 Window win{};
91 Window win_out{};
92 bool window_changed = false;
93
94 // In case both input and dst have to be reinterpreted as 3D tensors,
95 // force reinterpret_input_as_3d and reinterpret_output_as_3d to be false.
96 if(reinterpret_input_as_3d == reinterpret_output_as_3d)
97 {
98 reinterpret_output_as_3d = false;
99 }
100
101 // dst tensor auto initialization if not yet initialized
102 auto_init_if_empty(*dst, src0->clone()->set_tensor_shape(misc::shape_calculator::compute_mm_shape(*src0, *src1, gemm_info)));
103
104 TensorInfo tmp_info(*dst);
105
106 if(reinterpret_output_as_3d)
107 {
108 // Since the dst tensor has to be reinterpreted as 3D and the execute window is based on a 2D GEMM,
109 // the window needs to be constructed on the 2D collapsed version of the tensor
110 TensorShape tmp_shape(dst->tensor_shape());
111 tmp_shape.collapse(2U, 1U);
112 tmp_info.set_tensor_shape(tmp_shape);
113 }
114
115 // Configure kernel window
116 num_elems_processed_per_iteration_x = rhs_info.n0;
117 num_elems_processed_per_iteration_y = lhs_info.m0;
118
119 win = calculate_max_window(tmp_info, Steps(num_elems_processed_per_iteration_x, num_elems_processed_per_iteration_y));
120 win_out = calculate_max_window(*dst, Steps(num_elems_processed_per_iteration_x, num_elems_processed_per_iteration_y));
121
122 AccessWindowStatic src0_access(src0, 0, 0,
123 src0->dimension(0),
124 src0->dimension(1));
125 AccessWindowStatic src1_access(src1, 0, 0,
126 ceil_to_multiple(src1->dimension(0), num_elems_processed_per_iteration_x),
127 src1->dimension(1));
128 AccessWindowStatic dst_access(dst, 0, 0,
129 dst->dimension(0),
130 dst->dimension(1));
131
132 if(src2 != nullptr)
133 {
134 const int bias_processed_per_iteration_x = num_elems_processed_per_iteration_x;
135
136 AccessWindowStatic src2_access(src2, 0, 0,
137 ceil_to_multiple(src2->dimension(0), bias_processed_per_iteration_x),
138 src2->dimension(1));
139
140 window_changed = update_window_and_padding(win, src0_access, src1_access, src2_access) || // window used by the execute_window_loop
141 update_window_and_padding(win_out, dst_access); // window used to update the padding requirements of dst tensor
142 }
143 else
144 {
145 window_changed = update_window_and_padding(win, src0_access, src1_access) || // window used by the execute_window_loop
146 update_window_and_padding(win_out, dst_access); // window used to update the padding requirements of dst tensor
147 }
148
149 // Collapse along the Z direction
150 // This collapse needs to be here in order to tune the Z dimension of LWS
151 Window collapsed = win;
152 const unsigned int dimension_to_collapse = std::min(static_cast<unsigned int>(dst->num_dimensions()), 2u);
153 collapsed = win.collapse(win, dimension_to_collapse);
154
155 Status err = (window_changed) ? ARM_COMPUTE_CREATE_ERROR(ErrorCode::RUNTIME_ERROR, "Insufficient Padding!") : Status{};
156 return std::make_pair(err, collapsed);
157}
158
159void set_build_options(ClKernelCode &cl_code, GemmNativeDescriptor gemm_native_desc,
160 const TensorInfo &t_lhs_info,
161 const TensorInfo &t_rhs_info,
162 const TensorInfo *t_bias_info,
163 const TensorInfo &t_dst_info)
164{
165 CLBuildOptions ref_cl_build_options;
166 {
167 // If reinterpret_input_as_3d = reinterpret_output_as_3d = true,
168 // we will dispatch a batched-GEMM to reduce the complexity of the address calculation within the OpenCL kernel.
169 // This means that the actual m used by the kernel is given by dst->dimension(1) and not by gemm_info.m
170 auto reinterpret_input_as_3d = gemm_native_desc.reinterpret_input_as_3d;
171 auto reinterpret_output_as_3d = gemm_native_desc.depth_output_gemm3d != 0;
172 auto _slide_matrix_b = (t_rhs_info.num_dimensions() >= t_lhs_info.num_dimensions());
173 auto _use_dummy_work_items = false;
174 // In case both input and dst have to be reinterpreted as 3D tensors,
175 // force reinterpret_input_as_3d and reinterpret_output_as_3d to be false.
176 if(reinterpret_input_as_3d == reinterpret_output_as_3d)
177 {
178 reinterpret_input_as_3d = false;
179 reinterpret_output_as_3d = false;
180 }
181
182 const unsigned int internal_m = reinterpret_output_as_3d ? gemm_native_desc.m : t_dst_info.dimension(1);
183
184 const unsigned int h_gemm_3d = reinterpret_output_as_3d ? t_dst_info.dimension(1) : t_lhs_info.dimension(1);
185 const unsigned int d_gemm_3d = reinterpret_output_as_3d ? t_dst_info.dimension(2) : t_lhs_info.dimension(2);
186
187 // Calculate partial (store instead of load) M0 and partial N0 for the partial blocks at the end of a row/column if any. This is to avoid padding.
188 const unsigned int partial_store_m0 = internal_m % gemm_native_desc.lhs_info.m0;
189 const unsigned int partial_store_n0 = gemm_native_desc.n % gemm_native_desc.rhs_info.n0;
190
191 // Shrink M0 to be always <= M (internal_m) to prevent out-of-bounds reads.
192 const unsigned int internal_m0 = std::min(internal_m, gemm_native_desc.lhs_info.m0);
193
194 ref_cl_build_options.add_option("-DDATA_TYPE=" + get_cl_type_from_data_type(t_dst_info.data_type()));
195 ref_cl_build_options.add_option_if(!(helpers::float_ops::is_one(gemm_native_desc.alpha)), "-DALPHA=" + float_to_string_with_full_precision(gemm_native_desc.alpha));
196 ref_cl_build_options.add_option_if(t_bias_info != nullptr, "-DBETA=" + float_to_string_with_full_precision(gemm_native_desc.beta));
197 ref_cl_build_options.add_option_if(helpers::float_ops::is_one(gemm_native_desc.beta), "-DUNIT_BETA");
198 ref_cl_build_options.add_option_if(gemm_native_desc.broadcast_bias, "-DBROADCAST_BIAS");
199 ref_cl_build_options.add_option_if(reinterpret_input_as_3d, "-DREINTERPRET_INPUT_AS_3D");
200 ref_cl_build_options.add_option_if(reinterpret_output_as_3d, "-DREINTERPRET_OUTPUT_AS_3D");
201 ref_cl_build_options.add_option_if(reinterpret_input_as_3d || reinterpret_output_as_3d, "-DHEIGHT_GEMM3D=" + support::cpp11::to_string(h_gemm_3d));
202 ref_cl_build_options.add_option_if(reinterpret_input_as_3d || reinterpret_output_as_3d, "-DDEPTH_GEMM3D=" + support::cpp11::to_string(d_gemm_3d));
203 ref_cl_build_options.add_option_if(!_slide_matrix_b, "-DMATRIX_B_DEPTH=" + support::cpp11::to_string(t_rhs_info.dimension(2)));
204 ref_cl_build_options.add_option_if(_use_dummy_work_items, "-DDUMMY_WORK_ITEMS");
205 ref_cl_build_options.add_option("-DM=" + support::cpp11::to_string(internal_m));
206 ref_cl_build_options.add_option("-DN=" + support::cpp11::to_string(gemm_native_desc.n));
207 ref_cl_build_options.add_option("-DK=" + support::cpp11::to_string(gemm_native_desc.k));
208 ref_cl_build_options.add_option("-DM0=" + support::cpp11::to_string(internal_m0));
209 ref_cl_build_options.add_option("-DN0=" + support::cpp11::to_string(gemm_native_desc.rhs_info.n0));
210 ref_cl_build_options.add_option("-DK0=" + support::cpp11::to_string(gemm_native_desc.rhs_info.k0));
211 ref_cl_build_options.add_option("-DPARTIAL_STORE_M0=" + support::cpp11::to_string(partial_store_m0));
212 ref_cl_build_options.add_option("-DPARTIAL_STORE_N0=" + support::cpp11::to_string(partial_store_n0));
213 // Manually add PostOps
214 {
215 ref_cl_build_options.add_option("-DOP=ADD_X_POS_1");
216 ref_cl_build_options.add_option("-DP2_ELTWISE_ARG1_HEIGHT=" + support::cpp11::to_string(t_dst_info.dimension(1)));
217 ref_cl_build_options.add_option("-DP2_ELTWISE_ARG1_WIDTH=" + support::cpp11::to_string(t_dst_info.dimension(0)));
218 }
219 }
220 cl_code.build_options = ref_cl_build_options;
221}
222} // namespace
223
224TEST_SUITE(CL)
225TEST_SUITE(UNIT)
226TEST_SUITE(DYNAMIC_FUSION)
227TEST_SUITE(ClCompositeKernel)
228TEST_SUITE(Validate)
229
230TEST_CASE(MoveNet_SubGraph_1, framework::DatasetMode::ALL)
231{
232 /* Computation:
233 * out = add(addend, gemm_native(lhs, rhs, bias)) (non-broadcast)
234 */
235 const auto data_type = DataType::F32;
236 const auto m = 5U;
237 const auto n = 4U;
238 const auto k = 3U;
239 const auto t_lhs_shape = TensorShape(k, m);
240 const auto t_rhs_shape = TensorShape(n, k);
241 const auto t_dst_shape = TensorShape(n, m);
242 auto t_lhs_info = TensorInfo(t_lhs_shape, 1, data_type);
243 auto t_rhs_info = TensorInfo(t_rhs_shape, 1, data_type);
244 const auto t_bias_info = TensorInfo(TensorShape(), 1, DataType::F32);
245 auto t_dst_info = TensorInfo(t_dst_shape, 1, data_type);
246
247 const ClTensorDescriptor t_lhs_desc{ &t_lhs_info, 2 };
248 const ClTensorDescriptor t_rhs_desc{ &t_rhs_info, 2 };
249 const ClTensorDescriptor t_bias_desc{ &t_bias_info, 2 };
250 const ClTensorDescriptor t_addend_desc{ &t_dst_info, 2 };
251 const ClTensorDescriptor t_dst_desc{ &t_dst_info, 2 };
252
253 ClKernelBlueprint bp;
254 ArgumentID tid_lhs;
255 ArgumentID tid_rhs;
256 ArgumentID tid_l0_bias = g_arg_placeholder;
257 ArgumentID tid_l1_addend;
258 ArgumentID tid_dst;
259 auto st = add_tensor_argument(bp, t_lhs_desc, tid_lhs);
260 st = add_tensor_argument(bp, t_rhs_desc, tid_rhs);
261 st = add_tensor_argument(bp, t_addend_desc, tid_l1_addend);
262 st = add_tensor_argument(bp, t_dst_desc, tid_dst);
263
264 const auto common_kernel_desc = ClKernelComponentDescriptor{};
265 const GemmNativeDescriptor gemm_native_desc{ 1.0, 1.0, m, n, k };
266 const GEMMKernelInfo gemm_info{ m, n, k, 0, false, false, false, false, ActivationLayerInfo{}, 1, 1, gemm_native_desc.lhs_info, gemm_native_desc.rhs_info, 0, 0 };
267 const EltwiseAddDescriptor eltwise_add_desc{ ConvertPolicy::WRAP };
268 const TileDescriptor store_tile_info{};
269
270 ArgumentID tid_acc;
271 st = add_tensor_intermed(bp, tid_acc);
272 st = add_kcomp_gemm_native(bp, common_kernel_desc, gemm_native_desc, tid_lhs, tid_rhs, tid_l0_bias, tid_acc);
273
274 st = add_kcomp_eltwise_add(bp, common_kernel_desc, EltwiseAddDescriptor{}, tid_l1_addend, tid_acc, tid_acc);
275 st = add_kcomp_store(bp, common_kernel_desc, tid_acc, tid_dst, StoreType::StoreBlockBoundaryAware);
276
277 ClKernelCode cl_code;
278
279 st = set_tile_info(bp, store_tile_info);
280 st = build(cl_code, ClCodeBuilderContext{ GpuInfo{ GPUTarget::G71 } }, bp);
281
282 set_build_options(cl_code, gemm_native_desc, t_lhs_info, t_rhs_info, nullptr, t_dst_info);
283 ElementsProcessed num_elements_processed{};
284 auto win_config = mock_gemm_native_validate_and_configure_window(&t_lhs_info, &t_rhs_info, nullptr, &t_dst_info, gemm_native_desc.lhs_info, gemm_native_desc.rhs_info, gemm_info,
285 num_elements_processed);
286 ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
287 cl_code.window = win_config.second;
288
289 ClExecutionDescriptor exec_desc;
290 st = tune_static(exec_desc, cl_code);
291
292 CLScheduler::get().default_init();
293 ClCompositeKernel kernel;
294 kernel.configure(CLKernelLibrary::get().get_compile_context(), cl_code);
295
296 // Construct tensors
297 CLTensor t_lhs{};
298 CLTensor t_rhs{};
299 CLTensor t_l1_addend{};
300 CLTensor t_dst{};
301 // Init tensors
302 {
303 t_lhs.allocator()->init(t_lhs_info);
304 t_rhs.allocator()->init(t_rhs_info);
305 t_l1_addend.allocator()->init(t_dst_info);
306 t_dst.allocator()->init(t_dst_info);
307 }
308 // "Pack" tensors
309 TensorBinding tensors({ { tid_lhs, &t_lhs },
310 { tid_rhs, &t_rhs },
311 { tid_l1_addend, &t_l1_addend },
312 { tid_dst, &t_dst }
313 });
314 // Allocate and fill tensors
315 {
316 t_lhs.allocator()->allocate();
317 t_rhs.allocator()->allocate();
318 t_l1_addend.allocator()->allocate();
319 t_dst.allocator()->allocate();
320 fill<float>(CLAccessor(t_lhs), 0);
321 fill<float>(CLAccessor(t_rhs), 1);
322 fill<float>(CLAccessor(t_l1_addend), 2);
323 }
324
325 CLScheduler::get().enqueue_op(kernel, tensors, exec_desc, true);
326
327 // Create reference
328 SimpleTensor<float> ref_t_lhs{ t_lhs_shape, data_type, 1 };
329 SimpleTensor<float> ref_t_rhs{ t_rhs_shape, data_type, 1 };
330 SimpleTensor<float> ref_t_bias_placeholder{ t_dst_shape, data_type, 1 };
331 SimpleTensor<float> ref_t_l1_addend{ t_dst_shape, data_type, 1 };
332
333 // Fill reference
334 fill<float>(ref_t_lhs, 0);
335 fill<float>(ref_t_rhs, 1);
336 fill<float>(ref_t_l1_addend, 2);
337 const auto ref_t_dst = reference::arithmetic_operation(
338 ArithmeticOperation::ADD,
339 ref_t_l1_addend,
340 reference::gemm(ref_t_lhs, ref_t_rhs, ref_t_bias_placeholder, gemm_native_desc.alpha, 0.f /* To disable bias */),
341 data_type,
342 eltwise_add_desc.convert_policy);
343
344 RelativeTolerance<float> tolerance_f32(0.001f); /**< Tolerance value for comparing reference's output against implementation's output for floating point data types */
345 validate(CLAccessor(t_dst), ref_t_dst, tolerance_f32);
346}
347
348TEST_SUITE_END() // Validate
349
350TEST_SUITE(Benchmark)
351TEST_CASE(MoveNet_SubGraph_1, framework::DatasetMode::ALL)
352{
353 using std::chrono::duration_cast;
354 using std::chrono::microseconds;
355 const int num_iterations = 200;
356 std::map<std::string, std::chrono::microseconds> measurements;
357 /* Computation:
358 * out = add(addend, gemm_native(lhs, rhs, bias))
359 */
360 const auto data_type = DataType::F32;
361 const unsigned int m = 12 * 12;
362 const unsigned int n = 64;
363 const unsigned int k = 384;
364 const auto t_lhs_shape = TensorShape(k, m);
365 const auto t_rhs_shape = TensorShape(n, k);
366 const auto t_dst_shape = TensorShape(n, m);
367 auto t_lhs_info = TensorInfo(t_lhs_shape, 1, data_type);
368 auto t_rhs_info = TensorInfo(t_rhs_shape, 1, data_type);
369 auto t_bias_info = TensorInfo(TensorShape(), 1, data_type);
370 auto t_l0_dst_info = TensorInfo(t_dst_shape, 1, data_type); // Intermediate tensor for cond3
371 auto t_l1_rhs_info = TensorInfo(t_dst_shape, 1, data_type);
372 auto t_dst_info = TensorInfo(t_dst_shape, 1, data_type);
373
374 const auto common_kernel_desc = ClKernelComponentDescriptor{};
375 const GemmNativeDescriptor gemm_native_desc{ 1.0, 0.0, m, n, k };
376 const GEMMKernelInfo gemm_info{ m, n, k, 0, false, false, false, false, ActivationLayerInfo{}, 1, 1, gemm_native_desc.lhs_info, gemm_native_desc.rhs_info, 0, 0 };
377 const EltwiseAddDescriptor eltwise_add_desc{ ConvertPolicy::WRAP };
378 const TileDescriptor store_tile_info{};
379
380 // Create reference
381 SimpleTensor<float> ref_t_lhs{ t_lhs_shape, data_type, 1 };
382 SimpleTensor<float> ref_t_rhs{ t_rhs_shape, data_type, 1 };
383 SimpleTensor<float> ref_t_bias_placeholder{ t_dst_shape, data_type, 1 };
384 SimpleTensor<float> ref_t_l1_addend{ t_dst_shape, data_type, 1 };
385
386 // Fill reference
387 fill<float>(ref_t_lhs, 0);
388 fill<float>(ref_t_rhs, 1);
389 fill<float>(ref_t_l1_addend, 2);
390 const auto ref_t_dst = reference::arithmetic_operation(
391 ArithmeticOperation::ADD,
392 ref_t_l1_addend,
393 reference::gemm(ref_t_lhs, ref_t_rhs, ref_t_bias_placeholder, gemm_native_desc.alpha, 0.f /* To disable bias */),
394 data_type,
395 eltwise_add_desc.convert_policy);
396
397 CLScheduler::get().default_init();
398
399 /* Condition 0: Dynamic Fused Kernel */
400 CLTensor cond0_t_dst{};
401 {
402 TICK(cond0_0_startup_time);
403
404 ClKernelBlueprint bp;
405 ArgumentID tid_lhs;
406 ArgumentID tid_rhs;
407 ArgumentID tid_l0_bias = g_arg_placeholder;
408 ArgumentID tid_l1_addend;
409 ArgumentID tid_dst;
410
411 const ClTensorDescriptor t_lhs_desc{ &t_lhs_info, 2 };
412 const ClTensorDescriptor t_rhs_desc{ &t_rhs_info, 2 };
413 const ClTensorDescriptor t_bias_desc{ &t_bias_info, 2 };
414 const ClTensorDescriptor t_addend_desc{ &t_dst_info, 2 };
415 const ClTensorDescriptor t_dst_desc{ &t_dst_info, 2 };
416
417 ClKernelCode cl_code;
418 TICK(cond0_build_time)
419 auto st = add_tensor_argument(bp, t_lhs_desc, tid_lhs);
420 st = add_tensor_argument(bp, t_rhs_desc, tid_rhs);
421 st = add_tensor_argument(bp, t_addend_desc, tid_l1_addend);
422 st = add_tensor_argument(bp, t_dst_desc, tid_dst);
423
424 ArgumentID tid_acc;
425 st = add_tensor_intermed(bp, tid_acc);
426 st = add_kcomp_gemm_native(bp, common_kernel_desc, gemm_native_desc, tid_lhs, tid_rhs, tid_l0_bias, tid_acc);
427
428 st = add_kcomp_eltwise_add(bp, common_kernel_desc, EltwiseAddDescriptor{}, tid_l1_addend, tid_acc, tid_acc);
429
430 st = add_kcomp_store(bp, common_kernel_desc, tid_acc, tid_dst, StoreType::StoreBlockBoundaryAware);
431
432 st = set_tile_info(bp, store_tile_info);
433 st = build(cl_code, ClCodeBuilderContext{ GpuInfo{ GPUTarget::G71 } }, bp);
434 set_build_options(cl_code, gemm_native_desc, t_lhs_info, t_rhs_info, nullptr, t_dst_info);
435 ElementsProcessed num_elements_processed{};
436 auto win_config = mock_gemm_native_validate_and_configure_window(&t_lhs_info, &t_rhs_info, nullptr, &t_dst_info, gemm_native_desc.lhs_info, gemm_native_desc.rhs_info, gemm_info,
437 num_elements_processed);
438 ARM_COMPUTE_ERROR_THROW_ON(win_config.first);
439 cl_code.window = win_config.second;
440 TOCK(cond0_build_time, measurements)
441
442 TICK(cond0_tune_time)
443 ClExecutionDescriptor exec_desc;
444 st = tune_static(exec_desc, cl_code);
445 TOCK(cond0_tune_time, measurements)
446
447 TICK(cond0_configure_time)
448 ClCompositeKernel kernel;
449 kernel.configure(CLKernelLibrary::get().get_compile_context(), cl_code);
450 TOCK(cond0_configure_time, measurements)
451
452 // Construct tensors
453 CLTensor t_lhs{};
454 CLTensor t_rhs{};
455 CLTensor t_l1_addend{};
456
457 // Init tensors
458 {
459 t_lhs.allocator()->init(t_lhs_info);
460 t_rhs.allocator()->init(t_rhs_info);
461 t_l1_addend.allocator()->init(t_dst_info);
462 cond0_t_dst.allocator()->init(t_dst_info);
463 }
464 // Allocate tensors
465 {
466 t_lhs.allocator()->allocate();
467 t_rhs.allocator()->allocate();
468 t_l1_addend.allocator()->allocate();
469 cond0_t_dst.allocator()->allocate();
470 fill<float>(CLAccessor(t_lhs), 0);
471 fill<float>(CLAccessor(t_rhs), 1);
472 fill<float>(CLAccessor(t_l1_addend), 2);
473 }
474
475 // "Pack" tensors
476 TensorBinding tensors({ { tid_lhs, &t_lhs }, { tid_rhs, &t_rhs }, { tid_l1_addend, &t_l1_addend }, { tid_dst, &cond0_t_dst } });
477
478 CLScheduler::get().enqueue_op(kernel, tensors, exec_desc, true);
479 CLScheduler::get().sync();
480 TOCK(cond0_0_startup_time, measurements)
481
482 TICK(cond0_1_latency)
483 for(int i = 0; i < num_iterations; ++i)
484 {
485 CLScheduler::get().enqueue_op(kernel, tensors, exec_desc, true);
486 }
487 CLScheduler::get().sync();
488 TOCK_AVG(cond0_1_latency, measurements, num_iterations)
489 }
490 /* Condition 1: Dynamic Unfused Kernel */
491 /* Condition 2: Static Fused Kernel (current) */
492 CLTensor cond2_t_dst{};
493 {
494 TICK(cond2_0_startup_time);
495 arm_compute::opencl::kernels::ClGemmMatrixMultiplyNativeKernel l0_gemm_mm;
496
497 TICK(cond2_configure_time);
498 experimental::PostOpList<ITensorInfo *> post_ops;
499 post_ops.push_back_op<experimental::PostOpEltwiseAdd<ITensorInfo *>>(&t_dst_info, 1, eltwise_add_desc.convert_policy);
500 GEMMKernelInfo gemm_info{ m, n, k, 0, false, false, false, false, ActivationLayerInfo{}, 1, 1, gemm_native_desc.lhs_info, gemm_native_desc.rhs_info, 0, 0, post_ops };
501 l0_gemm_mm.configure(CLKernelLibrary::get().get_compile_context(), &t_lhs_info, &t_rhs_info, nullptr, &t_dst_info, gemm_native_desc.alpha, gemm_native_desc.beta, gemm_native_desc.lhs_info,
502 gemm_native_desc.rhs_info, gemm_info);
503 TOCK(cond2_configure_time, measurements);
504
505 // Construct tensors
506 CLTensor t_lhs{};
507 CLTensor t_rhs{};
508 CLTensor t_l1_addend{};
509
510 // Init tensors
511 {
512 t_lhs.allocator()->init(t_lhs_info);
513 t_rhs.allocator()->init(t_rhs_info);
514 t_l1_addend.allocator()->init(t_dst_info);
515 cond2_t_dst.allocator()->init(t_dst_info);
516 }
517 // Allocate tensors
518 {
519 t_lhs.allocator()->allocate();
520 t_rhs.allocator()->allocate();
521 t_l1_addend.allocator()->allocate();
522 cond2_t_dst.allocator()->allocate();
523 fill<float>(CLAccessor(t_lhs), 0);
524 fill<float>(CLAccessor(t_rhs), 1);
525 fill<float>(CLAccessor(t_l1_addend), 2);
526 }
527
528 // "Pack" tensors
529 ITensorPack tensors
530 {
531 { ACL_SRC_0, &t_lhs },
532 { ACL_SRC_1, &t_rhs },
533 { EXPERIMENTAL_ACL_POST_OP_ARG_FIRST, &t_l1_addend },
534 { ACL_DST, &cond2_t_dst },
535 };
536 CLScheduler::get().enqueue_op(l0_gemm_mm, tensors, true);
537 CLScheduler::get().sync();
538 TOCK(cond2_0_startup_time, measurements);
539
540 TICK(cond2_1_latency);
541 for(int i = 0; i < num_iterations; ++i)
542 {
543 CLScheduler::get().enqueue_op(l0_gemm_mm, tensors, true);
544 }
545 CLScheduler::get().sync();
546 TOCK_AVG(cond2_1_latency, measurements, num_iterations);
547 }
548 /* Condition 3: Static Unfused Kernel (current) */
549 CLTensor cond3_t_dst{};
550 {
551 TICK(cond3_0_startup_time);
552 arm_compute::opencl::kernels::ClGemmMatrixMultiplyNativeKernel l0_gemm_mm;
553 arm_compute::opencl::kernels::ClSaturatedArithmeticKernel l1_add;
554
555 TICK(cond3_configure_time);
556 GEMMKernelInfo gemm_info{ m, n, k, 0, false, false, false, false, ActivationLayerInfo{}, 1, 1, gemm_native_desc.lhs_info, gemm_native_desc.rhs_info, 0, 0 };
557 l0_gemm_mm.configure(CLKernelLibrary::get().get_compile_context(), &t_lhs_info, &t_rhs_info, nullptr, &t_l0_dst_info, gemm_native_desc.alpha, gemm_native_desc.beta, gemm_native_desc.lhs_info,
558 gemm_native_desc.rhs_info, gemm_info);
559 l1_add.configure(CLKernelLibrary::get().get_compile_context(), ArithmeticOperation::ADD, &t_l0_dst_info, &t_l1_rhs_info, &t_dst_info, eltwise_add_desc.convert_policy);
560 TOCK(cond3_configure_time, measurements);
561
562 // Construct tensors
563 CLTensor t_lhs{};
564 CLTensor t_rhs{};
565 CLTensor t_l0_dst{};
566 CLTensor t_l1_addend{};
567
568 // Init tensors
569 {
570 t_lhs.allocator()->init(t_lhs_info);
571 t_rhs.allocator()->init(t_rhs_info);
572 t_l0_dst.allocator()->init(t_l0_dst_info);
573 t_l1_addend.allocator()->init(t_dst_info);
574 cond3_t_dst.allocator()->init(t_dst_info);
575 }
576 // Allocate tensors
577 {
578 t_lhs.allocator()->allocate();
579 t_rhs.allocator()->allocate();
580 t_l0_dst.allocator()->allocate();
581 t_l1_addend.allocator()->allocate();
582 cond3_t_dst.allocator()->allocate();
583 fill<float>(CLAccessor(t_lhs), 0);
584 fill<float>(CLAccessor(t_rhs), 1);
585 fill<float>(CLAccessor(t_l1_addend), 2);
586 }
587
588 // "Pack" tensors
589 ITensorPack tensors_l0
590 {
591 { ACL_SRC_0, &t_lhs },
592 { ACL_SRC_1, &t_rhs },
593 { ACL_DST, &t_l0_dst },
594 };
595 ITensorPack tensors_l1
596 {
597 { ACL_SRC_0, &t_l0_dst },
598 { ACL_SRC_1, &t_l1_addend },
599 { ACL_DST, &cond3_t_dst },
600 };
601 CLScheduler::get().enqueue_op(l0_gemm_mm, tensors_l0, true);
602 CLScheduler::get().enqueue_op(l1_add, tensors_l1, true);
603 CLScheduler::get().sync();
604 TOCK(cond3_0_startup_time, measurements);
605
606 TICK(cond3_1_latency);
607 for(int i = 0; i < num_iterations; ++i)
608 {
609 CLScheduler::get().enqueue_op(l0_gemm_mm, tensors_l0, true);
610 CLScheduler::get().enqueue_op(l1_add, tensors_l1, true);
611 }
612 CLScheduler::get().sync();
613 TOCK_AVG(cond3_1_latency, measurements, num_iterations);
614 }
615
616 RelativeTolerance<float> tolerance_f32(0.001f); /**< Tolerance value for comparing reference's output against implementation's output for floating point data types */
617 std::cout << "cond0 validation: " << std::endl;
618 validate(CLAccessor(cond0_t_dst), ref_t_dst, tolerance_f32);
619 std::cout << "cond2 validation: " << std::endl;
620 validate(CLAccessor(cond2_t_dst), ref_t_dst, tolerance_f32);
621 std::cout << "cond3 validation: " << std::endl;
622 validate(CLAccessor(cond3_t_dst), ref_t_dst, tolerance_f32);
623
624 /* Report */
625 std::cout << "Performance comparison (gemm native + add)" << std::endl;
626 std::cout << "cond0: dynamic fusion module" << std::endl;
627 std::cout << "cond2: static fused with post ops" << std::endl;
628 std::cout << "cond3: static unfused" << std::endl;
629 for(auto m : measurements)
630 {
631 std::cout << m.first << ": " << m.second.count() << "us" << std::endl;
632 }
633}
634TEST_SUITE_END() // Benchmark
635TEST_SUITE_END() // ClCompositeKernel
636TEST_SUITE_END() // DYNAMIC_FUSION
637TEST_SUITE_END() // UNIT
638TEST_SUITE_END() // CL
639} // namespace validation
640} // namespace test
641} // namespace arm_compute
642
643#endif // defined(ENABLE_EXPERIMENTAL_DYNAMIC_FUSION)