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SiCong Lif44bbc52022-08-29 18:25:51 +01001/*
SiCong Li5a2bc012023-01-12 12:54:49 +00002 * Copyright (c) 2022-2023 Arm Limited.
SiCong Lif44bbc52022-08-29 18:25:51 +01003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#ifndef ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_MEMORYDESCRIPTOR
25#define ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_MEMORYDESCRIPTOR
26
27#include "arm_compute/core/ITensorInfo.h"
28
29namespace arm_compute
30{
31namespace experimental
32{
33namespace dynamic_fusion
34{
SiCong Li5a2bc012023-01-12 12:54:49 +000035/** Type of memory used by a workload tensor
36 *
37 * We can classify tensors in 2 dimensions: Topology (where they are in a workload) and Memory allocation:
38 * Topology:
39 * Argument tensors: "Outer" tensors exposed to the users as inputs and outputs (arguments)
40 * Intermediate tensors: "Inner" tensors hidden from the users as links between operators
41 * Memory allocation:
42 * Alloc: Tensors that need to be allocated real backing memory
43 * No-Alloc: Tensors that don't need to be allocated real backing memory
44 *
45 * We end up with 3 MemoryType based on the product of these two classifications
46 * | Argument | Intermediate |
47 * ---------*----------------*-------------------*
48 * Alloc | User | Auxiliary |
49 * ---------*----------------*-------------------*
50 * No-Alloc * N/A | Virtual |
51 * ---------*----------------*-------------------*
52 */
SiCong Lif44bbc52022-08-29 18:25:51 +010053enum class MemoryType
54{
SiCong Li5a2bc012023-01-12 12:54:49 +000055 /** Both User and Auxiliary types are of Alloc type. Since they require memory allocation */
SiCong Lif44bbc52022-08-29 18:25:51 +010056 User = 0, /**< Memory coming directly from users, e.g. for argument tensors */
SiCong Li5a2bc012023-01-12 12:54:49 +000057 Auxiliary = 1, /**< Additional memory required by the workload tensor, e.g. for tensors holding temporary results between kernels */
58 /** Virtual type is of No-Alloc type. Since it doesn't require memory allocation */
59 Virtual = 2, /**< Temporary tile which is not allocated as a whole tensor in the memory. It is mainly used at sketch time to link operators; there should be no Virtual tensors at runtime */
SiCong Lif44bbc52022-08-29 18:25:51 +010060};
61
62/** Memory information for tensors with @ref MemoryType::Auxiliary.
63 * This informs how much additional memory is required for auxiliary tensors
64 */
65struct AuxMemoryInfo
66{
67 AuxMemoryInfo() = default;
68
69 AuxMemoryInfo(size_t size, size_t alignment = 0) noexcept
70 : size(size),
71 alignment(alignment)
72 {
73 }
74
75 friend bool operator==(const AuxMemoryInfo &info0, const AuxMemoryInfo &info1)
76 {
77 return info0.size == info1.size && info0.alignment == info1.alignment;
78 }
79 size_t size{ 0 }; /**< Total memory size in bytes */
80 size_t alignment{ 0 }; /**< Memory alignment in bytes */
81};
82
83/** Descriptor of a workload tensor memory */
84struct MemoryDescriptor
85{
86 MemoryType memory_type{}; /**< Memory Type*/
87 AuxMemoryInfo aux_memory_info{}; /**< Auxiliary Tensor Memory Information */
88};
89
90/** A map from @ref ITensorInfo to their corresponding @ref MemoryDescriptor */
91using MemoryDescriptorMap = std::map<ITensorInfo::Id, MemoryDescriptor>;
92
93} // namespace dynamic_fusion
94} // namespace experimental
95} // namespace arm_compute
96#endif /* ARM_COMPUTE_DYNAMIC_FUSION_SKETCH_MEMORYDESCRIPTOR */