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Chunosovf450caa2017-11-08 16:09:35 +07001/*
2 * Copyright (c) 2017 ARM Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#ifndef ARM_COMPUTE_ASYMM_HELPER_H
25#define ARM_COMPUTE_ASYMM_HELPER_H
26
27// TODO These functions were implemented to be used in softmax-uint8 kernel and therefore process only vectors of length 16.
28// But they can be managed to process arbitrary vector length using VEC_DATA_TYPE(int, size) definition to be more reusable.
29
30// Algoriths for these functions were taken from
31// https://github.com/google/gemmlowp/blob/master/fixedpoint/fixedpoint.h
32// and adapted to operate on integer vectors.
33
34/** For each element of input vector, the corresponding bits of the result item are set
35 * if the input item is zero.
36 *
37 * @param[in] a Input vector whose zero bits define which corresponding bits in result will be set.
38 *
39 * @returns Output vector with bits set when corresponding bit in @p a is zero.
40 */
41inline int16 asymm_mask_if_zero(int16 a)
42{
43 const int16 all_zeros = 0;
44 const int16 all_ones = ~0;
45 return select(all_zeros, all_ones, a == 0);
46}
47
48/** For each element of input vector, the corresponding bits of the result item are set
49 * if the input item is non-zero.
50 *
51 * @param[in] a Input vector whose non-zero bits define which corresponding bits in result will be set.
52 *
53 * @returns Output vector with bits set when corresponding bit in @p a is non zero.
54 */
55inline int16 asymm_mask_if_non_zero(int16 a)
56{
57 const int16 all_zeros = 0;
58 const int16 all_ones = ~0;
59 return select(all_zeros, all_ones, a != 0);
60}
61
62/** Each bit of the result is set to the corresponding bit of either then_val or
63 * else_val depending on whether the corresponding bit of if_mask is set.
64 * Equivalent to the VBSL instruction in ARM NEON.
65 *
66 * @param[in] if_mask Mask defines will bit be taken from @p then_val or @p else_val depending on corresponding bit in mask is set or not.
67 * @param[in] then_val Value whose bit will be used for result when corresponding bit in @p if_mask is set.
68 * @param[in] else_val Value whose bit will be used for result when corresponding bit in @p if_mask is not set.
69 *
70 * @returns Result contaning bits from @p then_val or from @p else_val depending on corresponding bit in @p if_mask is set or not.
71 */
72inline int16 asymm_select_using_mask(int16 if_mask, int16 then_val, int16 else_val)
73{
74 return (if_mask & then_val) ^ (~if_mask & else_val);
75}
76
77/** Correctly rounded to nearest division by a power of two.
78 * Also known as a rounding arithmetic right shift.
79 *
80 * @param[in] x Value needed to be divided by power of two.
81 * @param[in] exponent Power of two, must be positive number.
82 *
83 * @return Arithmetic right shift.
84 */
85inline int16 asymm_rounding_divide_by_pow2(int16 x, int exponent)
86{
87 int16 mask = (1 << exponent) - 1;
88 const int16 zero = 0;
89 const int16 one = 1;
90 int16 threshold = (mask >> 1) + select(zero, one, x < 0);
91 return (x >> exponent) + select(zero, one, (x & mask) > threshold);
92}
93
94/** Calculates the product of a integer value by a power of two, with either a positive exponent
95 * (equivalent to an arithmetic left shift, saturating) or a negative exponent
96 * (equivalent to an arithmetic right shift, rounding to nearest).
97 *
98 * @param[in] x Value needed to be multiplied or divided by power of two depending on sign of @p exponent.
99 * @param[in] exponent Power of two, can be positive or negative number.
100 *
101 * @return Arithmetic left or right shift.
102 */
103inline int16 asymm_saturating_rounding_mult_by_pow2(int16 x, int exponent)
104{
105 if(exponent < 0)
106 {
107 return asymm_rounding_divide_by_pow2(x, -exponent);
108 }
109
110 const int16 min = INT_MIN;
111 const int16 max = INT_MAX;
112 int threshold = ((1 << (31 - exponent)) - 1);
113 int16 positive_mask = asymm_mask_if_non_zero(x > threshold);
114 int16 negative_mask = asymm_mask_if_non_zero(x < -threshold);
115 int16 result = x << exponent;
116 result = asymm_select_using_mask(positive_mask, max, result);
117 result = asymm_select_using_mask(negative_mask, min, result);
118 return result;
119}
120
121/** Calculates (a+b)/2, rounded to the nearest integer.
122 * Equivalent to VRHADD in the ARM NEON instruction set.
123 *
124 * @param[in] a First term of half-sum.
125 * @param[in] b Second term of half-sum.
126 *
127 * @return (a+b)/2, rounded to the nearest integer.
128 */
129inline int16 asymm_rounding_half_sum(int16 a, int16 b)
130{
131 long16 a64 = convert_long16(a);
132 long16 b64 = convert_long16(b);
133 long16 sum = a64 + b64;
134 const long16 one = 1;
135 const long16 minus_one = -1;
136 long16 sign = select(minus_one, one, sum >= 0);
137 return convert_int16((sum + sign) / 2);
138}
139
140/** Product of two numbers, interpreting them as fixed-point values in the interval [-1, 1),
141 * rounding to the nearest value, and saturating -1 * -1 to the maximum value.
142 * This is equivalent to the VQRDMULH instruction in ARM NEON.
143 *
144 * @param[in] a First term of product.
145 * @param[in] b Second term of product.
146 *
147 * @return Product of two numbers.
148 */
149inline int16 asymm_saturating_rounding_doubling_high_mul(int16 a, int16 b)
150{
151 int16 overflow = (a == b) && (a == INT_MIN);
152 long16 a_64 = convert_long16(a);
153 long16 b_64 = convert_long16(b);
154 long16 ab_64 = a_64 * b_64;
155 long16 mask1 = 1 << 30;
156 long16 mask2 = 1 - (1 << 30);
157 long16 nudge = select(mask2, mask1, ab_64 >= 0);
158 long16 mask = 1ll << 31;
159 int16 ab_x2_high32 = convert_int16((ab_64 + nudge) / mask);
160 return select(ab_x2_high32, INT_MAX, overflow);
161}
162
163/** Fixed-point multiplication.
164 *
165 * @param[in] a Argument 1 in fixed-point format Q(a).
166 * @param[in] b Argument 2 in fixed-point format Q(b).
167 *
168 * @return Result in fixed-point format Q(a+b).
169 */
170inline int16 asymm_mult(int16 a, int16 b)
171{
172 return asymm_saturating_rounding_doubling_high_mul(a, b);
173}
174
175/** Calculates \f$ exp(x) \f$ for x in [-1/4, 0).
176 *
177 * @param[in] a Argument in fixed-point format Q0.
178 *
179 * @return Result in fixed-point format Q0.
180 */
181inline int16 asymm_exp_on_interval_between_negative_one_quarter_and_0_excl(int16 a)
182{
183 const int16 constant_term = 1895147668;
184 const int16 constant_1_over_3 = 715827883;
185 const int k_fractional_bits = 31;
186 int16 x = a + (1 << (k_fractional_bits - 3));
187 int16 x2 = asymm_mult(x, x);
188 int16 x3 = asymm_mult(x2, x);
189 int16 x4 = asymm_mult(x2, x2);
190 int16 x4_over_4 = asymm_rounding_divide_by_pow2(x4, 2);
191 int16 x4_over_24_plus_x3_over_6_plus_x2 = asymm_mult((x4_over_4 + x3), constant_1_over_3) + x2;
192 int16 x4_over_24_plus_x3_over_6_plus_x2_over_2 = asymm_rounding_divide_by_pow2(x4_over_24_plus_x3_over_6_plus_x2, 1);
193 return constant_term + asymm_mult(constant_term, x + x4_over_24_plus_x3_over_6_plus_x2_over_2);
194}
195
196/** Calculates \f$ exp(x) \f$ for x < 0.
197 *
198 * @param[in] a Argument in fixed-point format Q(k_integer_bits).
199 * @param[in] k_integer_bits Number of integer bit in argument.
200 *
201 * @return Result in fixed-point format Q0.
202 */
203inline int16 asymm_exp_on_negative_values(int16 a, int k_integer_bits)
204{
205 const int k_fractional_bits = 31 - k_integer_bits;
206 int16 k_one_quarter = 1 << (k_fractional_bits - 2);
207 int16 mask = k_one_quarter - 1;
208 int16 a_mod_quarter_minus_one_quarter = (a & mask) - k_one_quarter;
209 int16 a_mod_quarter_minus_one_quarter_scaled = a_mod_quarter_minus_one_quarter << k_integer_bits;
210 int16 result = asymm_exp_on_interval_between_negative_one_quarter_and_0_excl(a_mod_quarter_minus_one_quarter_scaled);
211 int16 remainder = a_mod_quarter_minus_one_quarter - a;
212
213#define EXP_BARREL_SHIFTER(Exponent, FixedPointMultiplier) \
214 if(k_integer_bits > Exponent) \
215 { \
216 const int k_shift_amount = k_integer_bits > Exponent ? k_fractional_bits + Exponent : 0; \
217 result = asymm_select_using_mask( \
218 asymm_mask_if_non_zero(remainder & (1 << k_shift_amount)), \
219 asymm_mult(result, FixedPointMultiplier), result); \
220 }
221 EXP_BARREL_SHIFTER(-2, 1672461947);
222 EXP_BARREL_SHIFTER(-1, 1302514674);
223 EXP_BARREL_SHIFTER(+0, 790015084);
224 EXP_BARREL_SHIFTER(+1, 290630308);
225 EXP_BARREL_SHIFTER(+2, 39332535);
226 EXP_BARREL_SHIFTER(+3, 720401);
227 EXP_BARREL_SHIFTER(+4, 242);
228#undef EXP_BARREL_SHIFTER
229
230 if(k_integer_bits > 5)
231 {
232 const int16 clamp = -(1 << (k_fractional_bits + 5));
233 result = asymm_select_using_mask(asymm_mask_if_non_zero(a < clamp), 0, result);
234 }
235
236 const int16 Q0_one = INT_MAX;
237 return asymm_select_using_mask(asymm_mask_if_zero(a), Q0_one, result);
238}
239
240/** Calculates \f$ 1 / (1 + x) \f$ for x in (0, 1).
241 *
242 * @param[in] a Argument in fixed-point format Q0.
243 *
244 * @return Result in fixed-point format Q0.
245 */
246inline int16 asymm_one_over_one_plus_x_for_x_in_0_1(int16 a)
247{
248 const int16 Q0_one = INT_MAX;
249 const int16 Q2_one = 1 << (31 - 2);
250 int16 half_denominator = asymm_rounding_half_sum(a, Q0_one);
251 const int16 Q2_48_over_17 = 1515870810;
252 const int16 Q2_neg_32_over_17 = -1010580540;
253 int16 x = Q2_48_over_17 + asymm_mult(half_denominator, Q2_neg_32_over_17);
254 for(int i = 0; i < 3; i++)
255 {
256 int16 half_denominator_times_x = asymm_mult(half_denominator, x);
257 int16 one_minus_half_denominator_times_x = Q2_one - half_denominator_times_x;
258 int16 tmp = asymm_mult(x, one_minus_half_denominator_times_x);
259 x = x + asymm_saturating_rounding_mult_by_pow2(tmp, 2);
260 }
261 return asymm_saturating_rounding_mult_by_pow2(x, 1);
262}
263
264/** Considering the integer value as fixed-point, change the number of integer bits and update value accordingly.
265 *
266 * @param[in] value Value to be rescaled.
267 * @param[in] src_integer_bits Old number of integer bits.
268 * @param[in] dst_integer_bits New number of integer bits.
269 *
270 * @return Rescaled value.
271 */
272inline int16 asymm_rescale(int16 value, int src_integer_bits, int dst_integer_bits)
273{
274 int exponent = src_integer_bits - dst_integer_bits;
275 return asymm_saturating_rounding_mult_by_pow2(value, exponent);
276}
277
278#endif // ARM_COMPUTE_ASYMM_HELPER_H