Sheri Zhang | 6d9c982 | 2021-09-24 16:02:57 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #include "arm_compute/runtime/NEON/functions/NEConv3D.h" |
| 25 | |
| 26 | #include "arm_compute/core/PixelValue.h" |
| 27 | #include "arm_compute/core/Utils.h" |
| 28 | #include "arm_compute/core/Validate.h" |
| 29 | #include "src/common/utils/Log.h" |
| 30 | #include "src/core/helpers/MemoryHelpers.h" |
| 31 | #include "src/cpu/operators/CpuDirectConv3d.h" |
| 32 | |
| 33 | namespace arm_compute |
| 34 | { |
| 35 | using namespace arm_compute::experimental; |
| 36 | |
| 37 | struct NEConv3D::Impl |
| 38 | { |
| 39 | std::unique_ptr<cpu::ICpuOperator> op{ nullptr }; |
| 40 | ITensorPack run_pack{}; |
| 41 | }; |
| 42 | |
| 43 | NEConv3D::NEConv3D() |
| 44 | : _impl(std::make_unique<Impl>()) |
| 45 | { |
| 46 | } |
| 47 | |
| 48 | NEConv3D::~NEConv3D() = default; |
| 49 | |
| 50 | void NEConv3D::configure(ITensor *input, const ITensor *weights, const ITensor *biases, ITensor *output, const Conv3dInfo &conv_info) |
| 51 | { |
| 52 | // Perform validate step |
| 53 | ARM_COMPUTE_ERROR_ON_NULLPTR(input, weights, output); |
| 54 | ARM_COMPUTE_ERROR_THROW_ON(cpu::CpuDirectConv3d::validate(input->info(), weights->info(), ((biases != nullptr) ? biases->info() : nullptr), output->info(), conv_info)); |
| 55 | ARM_COMPUTE_LOG_PARAMS(input, weights, biases, output, conv_info); |
| 56 | |
| 57 | auto f = std::make_unique<cpu::CpuDirectConv3d>(); |
| 58 | f->configure(input->info(), weights->info(), ((biases != nullptr) ? biases->info() : nullptr), output->info(), conv_info); |
| 59 | _impl->op = std::move(f); |
| 60 | |
| 61 | if(_impl->op) |
| 62 | { |
| 63 | _impl->run_pack = { { ACL_SRC_0, input }, { ACL_SRC_1, weights }, { ACL_SRC_2, biases }, { ACL_DST, output } }; |
| 64 | } |
| 65 | } |
| 66 | |
| 67 | Status NEConv3D::validate(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *output, const Conv3dInfo &conv_info) |
| 68 | { |
| 69 | ARM_COMPUTE_RETURN_ON_ERROR(cpu::CpuDirectConv3d::validate(input, weights, biases, output, conv_info)); |
| 70 | |
| 71 | return Status{}; |
| 72 | } |
| 73 | |
| 74 | void NEConv3D::run() |
| 75 | { |
| 76 | if(_impl->op) |
| 77 | { |
| 78 | _impl->op->run(_impl->run_pack); |
| 79 | } |
| 80 | } |
| 81 | } // namespace arm_compute |