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review.mlplatform.org / ml / ComputeLibrary / 731fe667e3009bfbfee8b0eb74ecb68b291e4311 / . / src / common / cpuinfo / CpuModel.cpp
blob: 9f4d5d14333582b9067e5d9946b942b60e0d6a66 [file] [log] [blame]
Georgios Pinitas08302c12021-06-09 10:08:27 +0100[diff] [blame]1/*
2 * Copyright (c) 2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "src/common/cpuinfo/CpuModel.h"
25
26namespace arm_compute
27{
28namespace cpuinfo
29{
30std::string cpu_model_to_string(CpuModel model)
31{
32 switch(model)
33 {
34#define X(MODEL) \
35case CpuModel::MODEL: \
36 return #MODEL;
37 ARM_COMPUTE_CPU_MODEL_LIST
38#undef X
39 default:
40 {
41 return std::string("GENERIC");
42 }
43 };
44}
45
46bool model_supports_fp16(CpuModel model)
47{
48 switch(model)
49 {
50 case CpuModel::GENERIC_FP16:
51 case CpuModel::GENERIC_FP16_DOT:
52 case CpuModel::A55r1:
53 case CpuModel::X1:
54 case CpuModel::KLEIN:
55 return true;
56 default:
57 return false;
58 }
59}
60
61bool model_supports_dot(CpuModel model)
62{
63 switch(model)
64 {
65 case CpuModel::GENERIC_FP16_DOT:
66 case CpuModel::A55r1:
67 case CpuModel::X1:
68 case CpuModel::KLEIN:
69 return true;
70 default:
71 return false;
72 }
73}
74
75bool model_supports_sve(CpuModel model)
76{
77 switch(model)
78 {
79 case CpuModel::KLEIN:
80 return true;
81 default:
82 return false;
83 }
84}
85
86CpuModel midr_to_model(uint32_t midr)
87{
88 CpuModel model = CpuModel::GENERIC;
89
90 // Unpack variant and CPU ID
91 const int implementer = (midr >> 24) & 0xFF;
92 const int variant = (midr >> 20) & 0xF;
93 const int cpunum = (midr >> 4) & 0xFFF;
94
95 if(implementer == 0x41) // Arm CPUs
96 {
97 // Only CPUs we have code paths for are detected. All other CPUs can be safely classed as "GENERIC"
98 switch(cpunum)
99 {
100 case 0xd03: // A53
101 case 0xd04: // A35
102 model = CpuModel::A53;
103 break;
104 case 0xd05: // A55
105 if(variant != 0)
106 {
107 model = CpuModel::A55r1;
108 }
109 else
110 {
111 model = CpuModel::A55r0;
112 }
113 break;
114 case 0xd09: // A73
115 model = CpuModel::A73;
116 break;
117 case 0xd0a: // A75
118 if(variant != 0)
119 {
120 model = CpuModel::GENERIC_FP16_DOT;
121 }
122 else
123 {
124 model = CpuModel::GENERIC_FP16;
125 }
126 break;
127 case 0xd06: // A65
128 case 0xd0b: // A76
129 case 0xd0c: // N1
130 case 0xd0d: // A77
131 case 0xd0e: // A76AE
132 case 0xd41: // A78
133 case 0xd42: // A78AE
134 case 0xd4a: // E1
135 model = CpuModel::GENERIC_FP16_DOT;
136 break;
137 case 0xd44: // X1
138 model = CpuModel::X1;
139 break;
140 case 0xd46:
141 model = CpuModel::KLEIN;
142 break;
143 default:
144 model = CpuModel::GENERIC;
145 break;
146 }
147 }
148 else if(implementer == 0x48)
149 {
150 // Only CPUs we have code paths for are detected. All other CPUs can be safely classed as "GENERIC"
151 switch(cpunum)
152 {
153 case 0xd40: // A76
154 model = CpuModel::GENERIC_FP16_DOT;
155 break;
156 default:
157 model = CpuModel::GENERIC;
158 break;
159 }
160 }
161 else if(implementer == 0x51)
162 {
163 // Only CPUs we have code paths for are detected. All other CPUs can be safely classed as "GENERIC"
164 switch(cpunum)
165 {
166 case 0x800: // A73
167 model = CpuModel::A73;
168 break;
169 case 0x801: // A53
170 model = CpuModel::A53;
171 break;
172 case 0x803: // A55r0
173 model = CpuModel::A55r0;
174 break;
175 case 0x804: // A76
176 model = CpuModel::GENERIC_FP16_DOT;
177 break;
178 case 0x805: // A55r1
179 model = CpuModel::A55r1;
180 break;
181 default:
182 model = CpuModel::GENERIC;
183 break;
184 }
185 }
186
187 return model;
188}
189} // namespace cpuinfo
190} // namespace arm_compute