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Michele Di Giorgio19289042021-02-03 16:05:00 +00001/*
2 * Copyright (c) 2021 Arm Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
Georgios Pinitas7891a732021-08-20 21:39:25 +010024#include "src/cpu/operators/CpuPool2d.h"
Michele Di Giorgio19289042021-02-03 16:05:00 +000025
26#include "arm_compute/core/ITensor.h"
27#include "arm_compute/core/TensorInfo.h"
28#include "arm_compute/runtime/NEON/NEScheduler.h"
29#include "src/core/NEON/kernels/NEFillBorderKernel.h"
Georgios Pinitas7891a732021-08-20 21:39:25 +010030#include "src/cpu/kernels/CpuPool2dKernel.h"
31#include "src/cpu/kernels/internal/CpuPool2dAssemblyWrapperKernel.h"
Michele Di Giorgio19289042021-02-03 16:05:00 +000032
Manuel Bottini94f799e2021-06-09 16:37:32 +010033using namespace arm_compute::experimental;
34
Michele Di Giorgio19289042021-02-03 16:05:00 +000035namespace arm_compute
36{
37namespace cpu
38{
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010039CpuPool2d::CpuPool2d()
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +010040 : _pooling_layer_kernel(),
41 _border_handler(),
42 _asm_glue(),
43 _is_global_pooling_layer(false),
44 _data_layout(DataLayout::NCHW),
Manuel Bottini94f799e2021-06-09 16:37:32 +010045 _aux_mem(1)
Michele Di Giorgio19289042021-02-03 16:05:00 +000046{
47}
48
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010049CpuPool2d::~CpuPool2d() = default;
Michele Di Giorgio19289042021-02-03 16:05:00 +000050
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010051void CpuPool2d::configure(ITensorInfo *src, ITensorInfo *dst, const PoolingLayerInfo &pool_info, ITensorInfo *indices)
Michele Di Giorgio19289042021-02-03 16:05:00 +000052{
53 // Check if we can run assembly kernels. Currently, indices are not supported by those kernels
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010054 const bool run_optimised = bool(kernels::CpuPool2dAssemblyWrapperKernel::validate(src, dst, pool_info)) && (indices == nullptr);
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +010055
56 // Get data layout
57 _data_layout = pool_info.data_layout == DataLayout::UNKNOWN ? src->data_layout() : pool_info.data_layout;
58
59 // Check if we have Global Pooling Layer
60 const unsigned int idx_width = get_data_layout_dimension_index(_data_layout, DataLayoutDimension::WIDTH);
61 const unsigned int idx_height = get_data_layout_dimension_index(_data_layout, DataLayoutDimension::HEIGHT);
62 _is_global_pooling_layer = (src->dimension(idx_width) == pool_info.pool_size.width) && (src->dimension(idx_height) == pool_info.pool_size.height);
Michele Di Giorgio19289042021-02-03 16:05:00 +000063
64 if(run_optimised)
65 {
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +010066 const CPUInfo &ci = NEScheduler::get().cpu_info();
67 const unsigned int num_threads = NEScheduler::get().num_threads();
68
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010069 auto pooling_wrapper = std::make_unique<kernels::CpuPool2dAssemblyWrapperKernel>();
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +010070 ARM_COMPUTE_ERROR_ON(pooling_wrapper == nullptr);
71 pooling_wrapper->configure(src, dst, pool_info, ci);
72
73 // Get kernel's memory requirements
74 constexpr size_t alignment = 4096;
75 const size_t workspace_size = pooling_wrapper->get_working_size(num_threads);
Manuel Bottini94f799e2021-06-09 16:37:32 +010076 _aux_mem[0] = MemoryInfo(TensorType::ACL_INT_0, MemoryLifetime::Temporary, workspace_size, alignment);
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +010077
78 _asm_glue = std::move(pooling_wrapper);
Michele Di Giorgio19289042021-02-03 16:05:00 +000079 }
80 else
81 {
Michele Di Giorgio19289042021-02-03 16:05:00 +000082 // Configure pooling kernel
Manuel Bottinib4bb6a02021-05-24 16:01:32 +010083 auto k = std::make_unique<kernels::CpuPool2dKernel>();
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +010084 k->configure(src, dst, pool_info, indices);
Michele Di Giorgio19289042021-02-03 16:05:00 +000085 _pooling_layer_kernel = std::move(k);
86
87 switch(_data_layout)
88 {
89 case DataLayout::NCHW:
90 {
91 // Configure border depending on operation required (quantize border in case of asymmetric data_type)
92 BorderMode border_mode = (!indices && pool_info.pool_type == PoolingType::MAX) ? BorderMode::REPLICATE : BorderMode::CONSTANT;
93 PixelValue zero_value((indices) ? std::numeric_limits<int>::min() : 0.f);
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +010094 if(is_data_type_quantized_asymmetric(src->data_type()) && !pool_info.exclude_padding)
Michele Di Giorgio19289042021-02-03 16:05:00 +000095 {
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +010096 zero_value = PixelValue(0, src->data_type(), src->quantization_info());
Michele Di Giorgio19289042021-02-03 16:05:00 +000097 }
98 auto b = std::make_unique<NEFillBorderKernel>();
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +010099 b->configure(src, _pooling_layer_kernel->border_size(), border_mode, zero_value);
Michele Di Giorgio19289042021-02-03 16:05:00 +0000100 _border_handler = std::move(b);
101 break;
102 }
103 case DataLayout::NHWC:
104 break;
105 default:
106 ARM_COMPUTE_ERROR("Data layout not supported");
107 }
108 }
109}
110
Manuel Bottinib4bb6a02021-05-24 16:01:32 +0100111Status CpuPool2d::validate(const ITensorInfo *src, const ITensorInfo *dst, const PoolingLayerInfo &pool_info, const ITensorInfo *indices)
Michele Di Giorgio19289042021-02-03 16:05:00 +0000112{
Manuel Bottinib4bb6a02021-05-24 16:01:32 +0100113 const bool run_optimised = bool(kernels::CpuPool2dAssemblyWrapperKernel::validate(src, dst, pool_info)) && (indices == nullptr);
Michele Di Giorgio19289042021-02-03 16:05:00 +0000114
115 if(run_optimised)
116 {
117 return Status{};
118 }
119
Manuel Bottinib4bb6a02021-05-24 16:01:32 +0100120 return kernels::CpuPool2dKernel::validate(src, dst, pool_info, indices);
Michele Di Giorgio19289042021-02-03 16:05:00 +0000121}
122
Manuel Bottinib4bb6a02021-05-24 16:01:32 +0100123void CpuPool2d::run(ITensorPack &tensors)
Michele Di Giorgio19289042021-02-03 16:05:00 +0000124{
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +0100125 ARM_COMPUTE_ERROR_ON_MSG(tensors.empty(), "No tensors provided");
126
127 if(_asm_glue)
Michele Di Giorgio19289042021-02-03 16:05:00 +0000128 {
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +0100129 const auto hints = (_is_global_pooling_layer) ? Window::DimX : Window::DimY;
130 NEScheduler::get().schedule_op(_asm_glue.get(), hints, _asm_glue->window(), tensors);
Michele Di Giorgio19289042021-02-03 16:05:00 +0000131 }
132 else
133 {
134 switch(_data_layout)
135 {
136 case DataLayout::NCHW:
137 // Fill border
138 NEScheduler::get().schedule_op(_border_handler.get(), Window::DimY, _border_handler->window(), tensors);
139
140 // Run pooling layer
141 NEScheduler::get().schedule_op(_pooling_layer_kernel.get(), _is_global_pooling_layer ? Window::DimZ : Window::DimY, _pooling_layer_kernel->window(), tensors);
142 break;
143 case DataLayout::NHWC:
144 // Run pooling layer
145 NEScheduler::get().schedule_op(_pooling_layer_kernel.get(), Window::DimX, _pooling_layer_kernel->window(), tensors);
146 break;
147 default:
148 ARM_COMPUTE_ERROR("Data layout not supported");
149 }
150 }
151}
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +0100152
Manuel Bottinib4bb6a02021-05-24 16:01:32 +0100153experimental::MemoryRequirements CpuPool2d::workspace() const
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +0100154{
Manuel Bottini94f799e2021-06-09 16:37:32 +0100155 return _aux_mem;
Michele Di Giorgio0c19cbd2021-05-11 17:41:32 +0100156}
Michele Di Giorgio19289042021-02-03 16:05:00 +0000157} // namespace cpu
158} // namespace arm_compute