Michele Di Giorgio | 93b75e0 | 2021-06-21 12:00:43 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2016-2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #include "src/core/cpu/kernels/CpuGemmInterleave4x4Kernel.h" |
| 25 | |
| 26 | #include "arm_compute/core/ITensor.h" |
| 27 | #include "arm_compute/core/Validate.h" |
| 28 | #include "arm_compute/core/Window.h" |
| 29 | #include "arm_compute/core/utils/misc/ShapeCalculator.h" |
| 30 | #include "src/core/helpers/AutoConfiguration.h" |
| 31 | #include "src/core/helpers/WindowHelpers.h" |
| 32 | |
| 33 | #include <arm_neon.h> |
| 34 | |
| 35 | namespace arm_compute |
| 36 | { |
| 37 | namespace cpu |
| 38 | { |
| 39 | namespace kernels |
| 40 | { |
| 41 | using namespace arm_compute::misc::shape_calculator; |
| 42 | |
| 43 | namespace |
| 44 | { |
| 45 | template <typename ScalarType> |
| 46 | void gemm_interleave4x4(const ITensor *src, ITensor *dst, const Window &window) |
| 47 | { |
| 48 | const size_t window_start_x = window.x().start(); |
| 49 | const size_t window_end_x = window.x().end(); |
| 50 | |
| 51 | const size_t in_height = src->info()->dimension(1); |
| 52 | const size_t in_stride = src->info()->strides_in_bytes()[1]; |
| 53 | |
| 54 | const size_t partial_y = in_height % 4; |
| 55 | |
| 56 | // Set window for the src tensor |
| 57 | Window win = window; |
| 58 | win.set(Window::DimX, Window::Dimension(0, 1, 1)); |
| 59 | |
| 60 | // Set window for the dst tensor |
| 61 | Window win_out(window); |
| 62 | win_out.set(Window::DimX, Window::Dimension(0, 1, 1)); |
| 63 | win_out.scale(Window::DimY, 0.25f); |
| 64 | |
| 65 | Iterator in(src, win); |
| 66 | Iterator out(dst, win_out); |
| 67 | |
| 68 | execute_window_loop(win, [&](const Coordinates & id) |
| 69 | { |
| 70 | if(id.y() + 4 <= static_cast<int>(in_height)) |
| 71 | { |
| 72 | for(size_t x = window_start_x; x < window_end_x; ++x) |
| 73 | { |
| 74 | const ScalarType data[4] = |
| 75 | { |
| 76 | *(reinterpret_cast<const ScalarType *>(in.ptr() + 0 * in_stride) + x), |
| 77 | *(reinterpret_cast<const ScalarType *>(in.ptr() + 1 * in_stride) + x), |
| 78 | *(reinterpret_cast<const ScalarType *>(in.ptr() + 2 * in_stride) + x), |
| 79 | *(reinterpret_cast<const ScalarType *>(in.ptr() + 3 * in_stride) + x), |
| 80 | }; |
| 81 | std::memcpy(out.ptr() + x * 4 * sizeof(ScalarType), data, 4 * sizeof(ScalarType)); |
| 82 | } |
| 83 | } |
| 84 | else |
| 85 | { |
| 86 | for(size_t x = window_start_x; x < window_end_x; ++x) |
| 87 | { |
| 88 | ScalarType data[4] = { 0, 0, 0, 0 }; |
| 89 | |
| 90 | for(size_t y = 0; y < partial_y; ++y) |
| 91 | { |
| 92 | data[y] = *(reinterpret_cast<const ScalarType *>(in.ptr() + y * in_stride) + x); |
| 93 | } |
| 94 | |
| 95 | std::memcpy(out.ptr() + x * 4 * sizeof(ScalarType), data, 4 * sizeof(ScalarType)); |
| 96 | } |
| 97 | } |
| 98 | }, |
| 99 | in, out); |
| 100 | } |
| 101 | } // namespace |
| 102 | |
| 103 | void CpuGemmInterleave4x4Kernel::configure(const ITensorInfo *src, ITensorInfo *dst) |
| 104 | { |
| 105 | ARM_COMPUTE_ERROR_ON_NULLPTR(src, dst); |
| 106 | |
| 107 | // dst auto inizialitation if not yet initialized |
| 108 | auto_init_if_empty(*dst, src->clone()->set_tensor_shape(compute_interleaved_shape(*src))); |
| 109 | |
| 110 | // Perform validate step |
| 111 | ARM_COMPUTE_ERROR_THROW_ON(CpuGemmInterleave4x4Kernel::validate(src, dst)); |
| 112 | |
| 113 | switch(src->element_size()) |
| 114 | { |
| 115 | case 1: |
| 116 | _func = &gemm_interleave4x4<uint8_t>; |
| 117 | break; |
| 118 | case 2: |
| 119 | _func = &gemm_interleave4x4<uint16_t>; |
| 120 | break; |
| 121 | case 4: |
| 122 | _func = &gemm_interleave4x4<uint32_t>; |
| 123 | break; |
| 124 | default: |
| 125 | ARM_COMPUTE_ERROR_ON("Element size not supported"); |
| 126 | break; |
| 127 | } |
| 128 | |
| 129 | Window win = calculate_max_window(*src, Steps(1, 4)); |
| 130 | ICPPKernel::configure(win); |
| 131 | } |
| 132 | |
| 133 | Status CpuGemmInterleave4x4Kernel::validate(const ITensorInfo *src, const ITensorInfo *dst) |
| 134 | { |
| 135 | ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, dst); |
| 136 | //Note: ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(src) is not needed here as this kernel doesn't use CPU FP16 instructions. |
| 137 | ARM_COMPUTE_RETURN_ERROR_ON(src->data_type() == DataType::UNKNOWN); |
| 138 | |
| 139 | if(dst->total_size() != 0) |
| 140 | { |
| 141 | const TensorShape dst_shape = compute_interleaved_shape(*src); |
| 142 | ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DIMENSIONS(dst->tensor_shape(), dst_shape); |
| 143 | ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(src, dst); |
| 144 | ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_QUANTIZATION_INFO(src, dst); |
| 145 | } |
| 146 | |
| 147 | return Status{}; |
| 148 | } |
| 149 | |
| 150 | void CpuGemmInterleave4x4Kernel::run_op(ITensorPack &tensors, const Window &window, const ThreadInfo &info) |
| 151 | { |
| 152 | ARM_COMPUTE_UNUSED(info); |
| 153 | ARM_COMPUTE_ERROR_ON_UNCONFIGURED_KERNEL(this); |
| 154 | ARM_COMPUTE_ERROR_ON_INVALID_SUBWINDOW(IKernel::window(), window); |
| 155 | ARM_COMPUTE_ERROR_ON(_func == nullptr); |
| 156 | ARM_COMPUTE_ERROR_ON(tensors.empty()); |
| 157 | /* |
| 158 | * This kernel puts the values in a 4x4 block of Matrix A on the same row (Interleaved values) |
| 159 | * |a00 a01 a02 a03| |
| 160 | * |a10 a11 a12 a13| |
| 161 | * |a20 a21 a22 a23| = | a00 a10 a20 a30 || a01 a11 a21 a31 || a02 a12 a22 a32 || a03 a13 a23 a33 | |
| 162 | * |a30 a31 a32 a33| |
| 163 | * |
| 164 | * After this operation, the dst matrix will have the following shape: [ height * 4, ceil(width / 4.0f) ] |
| 165 | */ |
| 166 | const ITensor *src = tensors.get_const_tensor(TensorType::ACL_SRC); |
| 167 | ITensor *dst = tensors.get_tensor(TensorType::ACL_DST); |
| 168 | |
| 169 | (*_func)(src, dst, window); |
| 170 | } |
| 171 | |
| 172 | const char *CpuGemmInterleave4x4Kernel::name() const |
| 173 | { |
| 174 | return "CpuGemmInterleave4x4Kernel"; |
| 175 | } |
| 176 | } // namespace kernels |
| 177 | } // namespace cpu |
| 178 | } // namespace arm_compute |