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Michele Di Giorgio4dfc5532021-06-30 12:05:34 +01001/*
Francesco.Petrogalli@arm.com5fcf22d2022-04-05 10:31:08 +00002 * Copyright (c) 2021-2022 Arm Limited.
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +01003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
Georgios Pinitas7891a732021-08-20 21:39:25 +010024#include "src/cpu/operators/CpuGemm.h"
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +010025
26#include "arm_compute/core/TensorInfo.h"
27#include "arm_compute/core/Validate.h"
28#include "arm_compute/core/utils/misc/ShapeCalculator.h"
29#include "arm_compute/runtime/NEON/NEScheduler.h"
ramelg013ae3d882021-09-12 23:07:47 +010030#include "src/common/utils/Log.h"
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +010031#include "src/core/CPP/Validate.h"
32#include "src/core/helpers/AutoConfiguration.h"
33#include "src/core/helpers/MemoryHelpers.h"
Georgios Pinitas7891a732021-08-20 21:39:25 +010034#include "src/cpu/utils/CpuAuxTensorHandler.h"
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +010035
36using namespace arm_compute::experimental;
37using namespace arm_compute::misc::shape_calculator;
38
39namespace arm_compute
40{
41namespace cpu
42{
43namespace
44{
45cpu::AsmGemmInfo init_assembly_metadata(const GEMMInfo &info)
46{
47 cpu::AsmGemmInfo asm_info;
48 asm_info.method = cpu::AsmConvMethod::Im2Col;
49 asm_info.reinterpret_input_as_3d = info.reinterpret_input_as_3d();
50 asm_info.depth_output_gemm3d = info.depth_output_gemm3d();
51 asm_info.activation_info = info.activation_info();
Georgios Pinitas4ee8b152021-07-16 16:16:43 +010052 asm_info.fast_mode = info.fast_math();
Francesco.Petrogalli@arm.com5fcf22d2022-04-05 10:31:08 +000053 asm_info.fixed_format = info.fixed_format();
Francesco Petrogalli553f6952022-06-30 10:22:01 +000054 asm_info.weight_format = info.weight_format();
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +010055
56 return asm_info;
57}
58} // namespace
59
60void CpuGemm::configure(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, ITensorInfo *d, float alpha, float beta, const GEMMInfo &gemm_info)
61{
62 ARM_COMPUTE_ERROR_ON_NULLPTR(a, b, d);
63 ARM_COMPUTE_ERROR_THROW_ON(CpuGemm::validate(a, b, c, d, alpha, beta, gemm_info));
ramelg013ae3d882021-09-12 23:07:47 +010064 ARM_COMPUTE_LOG_PARAMS(a, b, c, d, alpha, beta, gemm_info);
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +010065
66 const cpu::AsmGemmInfo asm_info = init_assembly_metadata(gemm_info);
67 const bool is_c_bias = gemm_info.reshape_b_only_on_first_run();
68 bool run_optimised = bool(cpu::CpuGemmAssemblyDispatch::validate(a, b, (is_c_bias) ? c : nullptr, d, asm_info));
69
70 // Check if we need to reshape the matrix B only on the first run
71 _is_prepared = false;
72 _reshape_b_only_on_first_run = gemm_info.reshape_b_only_on_first_run();
73 _run_vector_matrix_multiplication = a->dimension(1) < 2;
74 _run_alpha_scale = alpha != 1.f;
75 _run_bias_addition = c != nullptr && gemm_info.reshape_b_only_on_first_run();
76 _run_addition = beta != 0 && c != nullptr && !gemm_info.reshape_b_only_on_first_run();
Francesco.Petrogalli@arm.com5fcf22d2022-04-05 10:31:08 +000077 _run_activation = gemm_info.activation_info().enabled() && (!run_optimised || (run_optimised && !cpu::CpuGemmAssemblyDispatch::is_activation_supported(gemm_info.activation_info())));
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +010078
79 if(run_optimised)
80 {
81 const ITensorInfo *c_to_use = is_c_bias ? c : nullptr;
82 _asm_glue = std::make_unique<cpu::CpuGemmAssemblyDispatch>();
83 _asm_glue->configure(a, b, c_to_use, d, asm_info);
84 ARM_COMPUTE_ERROR_ON(!_asm_glue->is_configured());
85
86 auto asm_mem_req = _asm_glue->workspace();
87 _aux_mem[AsmGemmWorkspace] = asm_mem_req[AsmGemmWorkspace];
88 _aux_mem[Pretraspose] = asm_mem_req[Pretraspose];
89
90 // Scale product by alpha
91 if(_run_alpha_scale)
92 {
93 _alpha_scale_func = std::make_unique<cpu::CpuActivation>();
94 _alpha_scale_func->configure(d, nullptr, ActivationLayerInfo(ActivationLayerInfo::ActivationFunction::LINEAR, alpha, 0.f));
95 }
96 }
97 else
98 {
99 // Pick output tensor in case bias addition should be performed
100 ITensorInfo *gemm_output_to_use = (_run_bias_addition) ? &_tmp_d : d;
101
102 _mm_kernel = std::make_unique<cpu::kernels::CpuGemmMatrixMultiplyKernel>();
103
104 // Select between GEMV and GEMM
105 if(_run_vector_matrix_multiplication)
106 {
107 // Configure the matrix multiply kernel
108 _mm_kernel->configure(a, b, gemm_output_to_use, alpha, false);
109 }
110 else
111 {
112 const int m = a->dimension(1);
113 const int n = b->dimension(0);
114 const int k = a->dimension(0);
115
116 // Configure interleave kernel
117 _interleave_kernel = std::make_unique<cpu::kernels::CpuGemmInterleave4x4Kernel>();
118 _interleave_kernel->configure(a, &_tmp_a);
119 _aux_mem[InterleavedLHS] = MemoryInfo(offset_int_vec(InterleavedLHS), MemoryLifetime::Temporary, _tmp_a.total_size());
120
121 // Configure transpose kernel
122 _transpose_kernel = std::make_unique<cpu::kernels::CpuGemmTranspose1xWKernel>();
123 _transpose_kernel->configure(b, &_tmp_b);
124 _aux_mem[TransposedRHS] = MemoryInfo(offset_int_vec(TransposedRHS), MemoryLifetime::Persistent, _tmp_b.total_size());
125
126 // Configure matrix multiplication kernel
127 _mm_kernel->configure(&_tmp_a, &_tmp_b, gemm_output_to_use, alpha, true, GEMMReshapeInfo(m, n, k));
128 }
129
130 if(_run_bias_addition)
131 {
132 _add_bias = std::make_unique<cpu::CpuAdd>();
133 _add_bias->configure(gemm_output_to_use, c, d, ConvertPolicy::SATURATE);
Michele Di Giorgiod9cdf142021-07-02 15:17:08 +0100134 _aux_mem[TempResult] = MemoryInfo(offset_int_vec(TempResult), MemoryLifetime::Temporary, _tmp_d.total_size());
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +0100135 }
136 }
137
138 // Configure matrix addition kernel
139 if(_run_addition)
140 {
141 _ma_kernel = std::make_unique<cpu::kernels::CpuGemmMatrixAdditionKernel>();
142 _ma_kernel->configure(c, d, beta);
143 }
144
145 // Configure activation
146 if(_run_activation)
147 {
148 _activation_func = std::make_unique<cpu::CpuActivation>();
149 _activation_func->configure(d, nullptr, gemm_info.activation_info());
150 }
151}
152
153Status CpuGemm::validate(const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *d, float alpha, float beta, const GEMMInfo &gemm_info)
154{
155 ARM_COMPUTE_UNUSED(alpha);
156 const bool is_c_bias = gemm_info.reshape_b_only_on_first_run();
157
158 ARM_COMPUTE_RETURN_ERROR_ON_CPU_F16_UNSUPPORTED(a);
159 ARM_COMPUTE_RETURN_ERROR_ON_CPU_BF16_UNSUPPORTED(a);
160 ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(a, 1, DataType::BFLOAT16, DataType::F16, DataType::F32);
161 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(a, b);
162 ARM_COMPUTE_RETURN_ERROR_ON_MSG(a->dimension(0) != b->dimension(1), "The product AB is defined only if the number of columns in A is equal to the number of rows in B");
163 ARM_COMPUTE_RETURN_ERROR_ON_MSG(gemm_info.is_a_reshaped(), "Matrix A already reshaped is not supported");
164 ARM_COMPUTE_RETURN_ERROR_ON_MSG(gemm_info.is_b_reshaped(), "Matrix B already reshaped is not supported");
165 if(a->data_type() != DataType::BFLOAT16)
166 {
167 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(a, d);
168 }
169
170 if(c != nullptr && !is_c_bias)
171 {
172 ARM_COMPUTE_RETURN_ERROR_ON(gemm_info.depth_output_gemm3d() != 0);
173 ARM_COMPUTE_RETURN_ERROR_ON(gemm_info.reinterpret_input_as_3d());
174 ARM_COMPUTE_RETURN_ERROR_ON_MISMATCHING_DATA_TYPES(c, d);
175 ARM_COMPUTE_RETURN_ERROR_ON_MSG(a->dimension(1) != c->dimension(1), "The C matrix must have the same number of rows as the matrix A");
176 ARM_COMPUTE_RETURN_ERROR_ON_MSG(b->dimension(0) != c->dimension(0), "The C matrix must have the same number of columns as the matrix B");
177 }
178
179 if(d->total_size() != 0)
180 {
Francesco Petrogalli553f6952022-06-30 10:22:01 +0000181 // For fixed format we are expecting some kind of blocked format for B/RHS so the dimension won't necessarily match the result matrix any more.
182 ARM_COMPUTE_RETURN_ERROR_ON(!gemm_info.fixed_format() && b->dimension(0) != d->dimension(0));
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +0100183 if(gemm_info.depth_output_gemm3d() != 0)
184 {
185 if(gemm_info.reinterpret_input_as_3d())
186 {
187 ARM_COMPUTE_RETURN_ERROR_ON(a->dimension(1) != d->dimension(1));
188 ARM_COMPUTE_RETURN_ERROR_ON(a->dimension(2) != d->dimension(2));
189 }
190 else
191 {
192 ARM_COMPUTE_RETURN_ERROR_ON(a->dimension(1) != d->dimension(1) * d->dimension(2));
193 }
194 }
195 else
196 {
197 ARM_COMPUTE_RETURN_ERROR_ON(a->dimension(1) != d->dimension(1));
198 }
199 }
200
201 // Check if we need to run the optimized assembly kernel
202 cpu::AsmGemmInfo asm_info = init_assembly_metadata(gemm_info);
203 const bool run_optimised = bool(cpu::CpuGemmAssemblyDispatch::validate(a, b, is_c_bias ? c : nullptr, d, asm_info));
204
205 if(!run_optimised)
206 {
207 ARM_COMPUTE_RETURN_ERROR_ON_MSG(gemm_info.reinterpret_input_as_3d(), "CpuGemm cannot reinterpret the input tensor as 3D");
208 ARM_COMPUTE_RETURN_ERROR_ON_MSG(gemm_info.depth_output_gemm3d() != 0, "CpuGemm cannot reinterpret the output tensor as 3D");
209
210 // Check if the first input tensor is a vector.
211 const bool run_vector_matrix_multiplication = a->dimension(1) < 2;
212 // Check if we need to reshape the matrix A and matrix B
213 const bool run_interleave_transpose = !run_vector_matrix_multiplication && !(gemm_info.reshape_b_only_on_first_run());
214
215 // Arguments used by GEMMReshapeInfo
216 // If we pass the matrix A and matrix B reshaped to CpuGemmMatrixMultiplyKernel, we need to pass m, n, k, mult_transpose1xW_width and mult_interleave4x4_height to GEMMReshapeInfo
217 // in order to know how the matrices have been reshaped
218 const int m = a->dimension(1);
219 const int n = b->dimension(0);
220 const int k = a->dimension(0);
221 int mult_transpose1xW_width = 1;
222 int mult_interleave4x4_height = 1;
223
224 const GEMMReshapeInfo reshape_info = GEMMReshapeInfo(m, n, k, mult_transpose1xW_width, mult_interleave4x4_height, gemm_info.depth_output_gemm3d());
225
226 const ITensorInfo *matrix_a_info = a;
227 const ITensorInfo *matrix_b_info = b;
228
229 TensorInfo tmp_a_info{};
230 TensorInfo tmp_b_info{};
231 TensorInfo tmp_output_info = *d->clone();
232
233 if(run_interleave_transpose)
234 {
235 matrix_a_info = &tmp_a_info;
236 matrix_b_info = &tmp_b_info;
237
238 // Validate interleave kernel
239 auto_init_if_empty(tmp_a_info, a->clone()->set_tensor_shape(compute_interleaved_shape(*a, mult_interleave4x4_height, gemm_info.reinterpret_input_as_3d())));
240 ARM_COMPUTE_RETURN_ON_ERROR(cpu::kernels::CpuGemmInterleave4x4Kernel::validate(a, &tmp_a_info));
241
242 // Validate transpose kernel
243 auto_init_if_empty(tmp_b_info, b->clone()->set_tensor_shape(compute_transpose1xW_with_element_size_shape(*b, mult_transpose1xW_width)));
244 ARM_COMPUTE_RETURN_ON_ERROR(cpu::kernels::CpuGemmTranspose1xWKernel::validate(b, &tmp_b_info));
245 }
246
247 // Validate matrix multiply
248 auto_init_if_empty(tmp_output_info, matrix_a_info->clone()->set_tensor_shape(compute_mm_shape(*matrix_a_info, *matrix_b_info, run_interleave_transpose, reshape_info)));
249 ARM_COMPUTE_RETURN_ON_ERROR(cpu::kernels::CpuGemmMatrixMultiplyKernel::validate(matrix_a_info, matrix_b_info, &tmp_output_info, alpha, run_interleave_transpose, reshape_info));
250
251 if(c != nullptr && gemm_info.reshape_b_only_on_first_run())
252 {
253 ARM_COMPUTE_RETURN_ON_ERROR(cpu::CpuAdd::validate(&tmp_output_info, c, d, ConvertPolicy::SATURATE));
254 }
255 }
256
257 // Validate matrix addition kernel
258 if(beta != 0 && c != nullptr && !is_c_bias)
259 {
260 ARM_COMPUTE_RETURN_ON_ERROR(cpu::kernels::CpuGemmMatrixAdditionKernel::validate(c, d, beta));
261 }
262
263 // Validate activation
264 const ActivationLayerInfo &activation = gemm_info.activation_info();
265 if(activation.enabled())
266 {
267 ARM_COMPUTE_RETURN_ON_ERROR(cpu::CpuActivation::validate(d, nullptr, activation));
268 }
269
270 return Status{};
271}
272
273void CpuGemm::run(ITensorPack &tensors)
274{
275 prepare(tensors);
276
277 auto a = tensors.get_const_tensor(ACL_SRC_0);
278 auto b = tensors.get_const_tensor(ACL_SRC_1);
279 auto c = tensors.get_const_tensor(ACL_SRC_2);
280 auto d = tensors.get_tensor(ACL_DST);
281
Francesco Petrogalli553f6952022-06-30 10:22:01 +0000282 if(_asm_glue && _asm_glue->is_configured())
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +0100283 {
284 // Pass c to asm dispatch only if it's the bias tensor
285 ITensorPack asm_pack = tensors;
286 asm_pack.add_const_tensor(ACL_SRC_2, (_reshape_b_only_on_first_run) ? c : nullptr);
287 _asm_glue->run(asm_pack);
288 if(_run_alpha_scale)
289 {
290 ITensorPack pack{ { ACL_SRC, d }, { ACL_DST, d } };
291 _alpha_scale_func->run(pack);
292 }
293 }
294 else
295 {
296 CpuAuxTensorHandler interleaved_a(offset_int_vec(InterleavedLHS), _tmp_a, tensors, true);
297 CpuAuxTensorHandler transposed_b(offset_int_vec(TransposedRHS), _tmp_b, tensors, true);
298 CpuAuxTensorHandler temp_d(offset_int_vec(TempResult), _tmp_d, tensors, true);
299
300 ITensorPack mm_pack{ { ACL_SRC_0, a }, { ACL_SRC_1, b }, { ACL_DST, (_run_bias_addition) ? temp_d.get() : d } };
301 if(!_run_vector_matrix_multiplication)
302 {
303 // Run interleave kernel
304 ITensorPack interleave_pack{ { ACL_SRC, a }, { ACL_DST, interleaved_a.get() } };
305 NEScheduler::get().schedule_op(_interleave_kernel.get(), Window::DimY, _interleave_kernel->window(), interleave_pack);
306
307 if(!_reshape_b_only_on_first_run)
308 {
309 // Run transpose kernel
310 ITensorPack transpose_pack{ { ACL_SRC, b }, { ACL_DST, transposed_b.get() } };
311 NEScheduler::get().schedule_op(_transpose_kernel.get(), Window::DimY, _transpose_kernel->window(), transpose_pack);
312 }
313
314 // Use reshaped matrices
315 mm_pack.add_const_tensor(ACL_SRC_0, interleaved_a.get());
316 mm_pack.add_const_tensor(ACL_SRC_1, transposed_b.get());
317 }
318
319 NEScheduler::get().schedule_op(_mm_kernel.get(), _run_vector_matrix_multiplication ? Window::DimX : Window::DimY, _mm_kernel->window(), mm_pack);
320
321 // Run bias addition kernel
322 if(_run_bias_addition)
323 {
324 ITensorPack pack{ { ACL_SRC_0, temp_d.get() }, { ACL_SRC_1, c }, { ACL_DST, d } };
325 _add_bias->run(pack);
326 }
327 }
328
329 // Run matrix addition kernel
330 if(_run_addition)
331 {
332 ITensorPack c_add_pack{ { ACL_SRC, c }, { ACL_DST, d } };
333 NEScheduler::get().schedule_op(_ma_kernel.get(), Window::DimY, _ma_kernel->window(), c_add_pack);
334 }
335
336 // Run activation function
337 if(_run_activation)
338 {
339 ITensorPack pack{ { ACL_SRC, d }, { ACL_DST, d } };
340 _activation_func->run(pack);
341 }
342}
343
344void CpuGemm::prepare(ITensorPack &tensors)
345{
346 if(!_is_prepared)
347 {
Francesco Petrogalli553f6952022-06-30 10:22:01 +0000348 if(_asm_glue && _asm_glue->is_configured())
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +0100349 {
350 _asm_glue->prepare(tensors);
351 }
352 else if(_reshape_b_only_on_first_run && !_run_vector_matrix_multiplication)
353 {
354 const ITensor *b = tensors.get_const_tensor(ACL_SRC_1);
355 ITensor *b_aux = utils::cast::polymorphic_cast<ITensor *>(tensors.get_tensor(offset_int_vec(TransposedRHS)));
356 ARM_COMPUTE_ERROR_ON_NULLPTR(b, b_aux);
357
358 CpuAuxTensorHandler transposed_b(_tmp_b, *b_aux);
359 ITensorPack transpose_pack{ { ACL_SRC, b }, { ACL_DST, transposed_b.get() } };
360 NEScheduler::get().schedule_op(_transpose_kernel.get(), Window::DimY, _transpose_kernel->window(), transpose_pack);
361 }
362 _is_prepared = true;
363 }
364}
365
366experimental::MemoryRequirements CpuGemm::workspace() const
367{
368 return _aux_mem;
369}
Francesco Petrogalli553f6952022-06-30 10:22:01 +0000370
371Status CpuGemm::has_opt_impl(arm_gemm::WeightFormat &expected_weight_format, const ITensorInfo *a, const ITensorInfo *b, const ITensorInfo *c, const ITensorInfo *d,
372 const GEMMInfo &gemm_info)
373{
374 const cpu::AsmGemmInfo asm_info = init_assembly_metadata(gemm_info);
375
376 return CpuGemmAssemblyDispatch::has_opt_impl(expected_weight_format, a, b, c, d, asm_info);
377}
378
379bool CpuGemm::isVarWeightsKernel() const
380{
381 return _asm_glue && _asm_glue->isVarWeightsKernel();
382}
Michele Di Giorgio4dfc5532021-06-30 12:05:34 +0100383} // namespace cpu
384} // namespace arm_compute