blob: 0e1f3353a65696fe881b3b5bea2fa5f1f370199d [file] [log] [blame]
Pablo Tello7fad9b12018-03-14 17:55:27 +00001/*
2 * Copyright (c) 2018 ARM Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/runtime/CPUUtils.h"
25
26#include "arm_compute/core/CPP/CPPTypes.h"
27#include "arm_compute/core/Error.h"
28#include "support/ToolchainSupport.h"
29
30#include <array>
31#include <cstdlib>
32#include <cstring>
33#include <fcntl.h>
34#include <fstream>
35#include <map>
36#include <sched.h>
37#include <sys/stat.h>
38#include <sys/types.h>
39#include <unistd.h>
40
41#ifndef BARE_METAL
42#include <regex>
43#include <thread>
44#endif /* BARE_METAL */
45
46#if !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__))
47#include <sys/auxv.h>
48
49/* Get HWCAP bits from asm/hwcap.h */
50#include <asm/hwcap.h>
51#endif /* !BARE_METAL */
52
53/* Make sure the bits we care about are defined, just in case asm/hwcap.h is
54 * out of date (or for bare metal mode) */
55#ifndef HWCAP_ASIMDHP
56#define HWCAP_ASIMDHP (1 << 10)
57#endif /* HWCAP_ASIMDHP */
58
59#ifndef HWCAP_CPUID
60#define HWCAP_CPUID (1 << 11)
61#endif /* HWCAP_CPUID */
62
63#ifndef HWCAP_ASIMDDP
64#define HWCAP_ASIMDDP (1 << 20)
65#endif /* HWCAP_ASIMDDP */
66
67namespace
68{
69using namespace arm_compute;
70
71#if !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__))
Pablo Tello7fad9b12018-03-14 17:55:27 +000072
Anthony Barbier3efb3752018-07-20 15:30:46 +010073bool model_supports_dot(CPUModel model)
74{
75 switch(model)
76 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +010077 case CPUModel::GENERIC_FP16_DOT:
Anthony Barbier3efb3752018-07-20 15:30:46 +010078 case CPUModel::A55r1:
Anthony Barbier3efb3752018-07-20 15:30:46 +010079 return true;
80 default:
81 return false;
82 }
83}
84
85bool model_supports_fp16(CPUModel model)
86{
87 switch(model)
88 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +010089 case CPUModel::GENERIC_FP16:
90 case CPUModel::GENERIC_FP16_DOT:
Anthony Barbier3efb3752018-07-20 15:30:46 +010091 case CPUModel::A55r1:
Anthony Barbier3efb3752018-07-20 15:30:46 +010092 return true;
93 default:
94 return false;
95 }
96}
Pablo Tello7fad9b12018-03-14 17:55:27 +000097/* Convert an MIDR register value to a CPUModel enum value. */
98CPUModel midr_to_model(const unsigned int midr)
99{
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100100 CPUModel model = CPUModel::GENERIC;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000101
102 // Unpack variant and CPU ID
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100103 const int implementer = (midr >> 24) & 0xFF;
104 const int variant = (midr >> 20) & 0xF;
105 const int cpunum = (midr >> 4) & 0xFFF;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000106
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100107 if(implementer == 0x41) // Arm CPUs
Pablo Tello7fad9b12018-03-14 17:55:27 +0000108 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100109 // Only CPUs we have code paths for are detected. All other CPUs can be safely classed as "GENERIC"
110 switch(cpunum)
111 {
112 case 0xd03: // A53
113 case 0xd04: // A35
114 model = CPUModel::A53;
115 break;
116 case 0xd05: // A55
117 if(variant != 0)
118 {
119 model = CPUModel::A55r1;
120 }
121 else
122 {
123 model = CPUModel::A55r0;
124 }
125 break;
126 case 0xd0a: // A75
127 if(variant != 0)
128 {
129 model = CPUModel::GENERIC_FP16_DOT;
130 }
131 else
132 {
133 model = CPUModel::GENERIC_FP16;
134 }
135 break;
136 case 0xd0b: // A76
137 case 0xd06: // Helios FIXME: Unreleased CPU, remove before release
138 case 0xd0c: // Ares FIXME: Unreleased CPU, remove before release
139 case 0xd0d: // Deimos FIXME: Unreleased CPU, remove before release
140 model = CPUModel::GENERIC_FP16_DOT;
141 break;
142 default:
143 model = CPUModel::GENERIC;
144 break;
145 }
Pablo Tello7fad9b12018-03-14 17:55:27 +0000146 }
147
148 return model;
149}
150
Anthony Barbier3efb3752018-07-20 15:30:46 +0100151void populate_models_cpuid(std::vector<CPUModel> &cpusv)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000152{
153 // If the CPUID capability is present, MIDR information is provided in /sys. Use that to populate the CPU model table.
154 uint32_t i = 0;
155 for(auto &c : cpusv)
156 {
157 std::stringstream str;
158 str << "/sys/devices/system/cpu/cpu" << i++ << "/regs/identification/midr_el1";
159 std::ifstream file;
160 file.open(str.str(), std::ios::in);
161 if(file.is_open())
162 {
163 std::string line;
164 if(bool(getline(file, line)))
165 {
Pablo Tello65f99822018-05-24 11:40:15 +0100166 const unsigned long midr = support::cpp11::stoul(line, nullptr, support::cpp11::NumericBase::BASE_16);
Anthony Barbier3efb3752018-07-20 15:30:46 +0100167 c = midr_to_model(midr & 0xffffffff);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000168 }
169 }
170 }
171}
172
Anthony Barbier3efb3752018-07-20 15:30:46 +0100173void populate_models_cpuinfo(std::vector<CPUModel> &cpusv)
Pablo Tello7fad9b12018-03-14 17:55:27 +0000174{
175 // If "long-form" cpuinfo is present, parse that to populate models.
176 std::regex proc_regex("^processor.*(\\d+)$");
177 std::regex imp_regex("^CPU implementer.*0x(..)$");
178 std::regex var_regex("^CPU variant.*0x(.)$");
179 std::regex part_regex("^CPU part.*0x(...)$");
180 std::regex rev_regex("^CPU revision.*(\\d+)$");
181
182 std::ifstream file;
183 file.open("/proc/cpuinfo", std::ios::in);
184
185 if(file.is_open())
186 {
187 std::string line;
188 int midr = 0;
189 int curcpu = -1;
190
191 while(bool(getline(file, line)))
192 {
193 std::smatch match;
194
195 if(std::regex_match(line, match, proc_regex))
196 {
197 std::string id = match[1];
Pablo Tello65f99822018-05-24 11:40:15 +0100198 int newcpu = support::cpp11::stoi(id, nullptr);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000199
200 if(curcpu >= 0 && midr == 0)
201 {
202 // Matched a new CPU ID without any description of the previous one - looks like old format.
203 return;
204 }
205
206 if(curcpu >= 0)
207 {
Anthony Barbier3efb3752018-07-20 15:30:46 +0100208 cpusv[curcpu] = midr_to_model(midr);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000209 }
210
211 midr = 0;
212 curcpu = newcpu;
213
214 continue;
215 }
216
217 if(std::regex_match(line, match, imp_regex))
218 {
Pablo Tello65f99822018-05-24 11:40:15 +0100219 int impv = support::cpp11::stoi(match[1], nullptr, support::cpp11::NumericBase::BASE_16);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000220 midr |= (impv << 24);
221 continue;
222 }
223
224 if(std::regex_match(line, match, var_regex))
225 {
Pablo Tello65f99822018-05-24 11:40:15 +0100226 int varv = support::cpp11::stoi(match[1], nullptr, support::cpp11::NumericBase::BASE_16);
Anthony Barbier3efb3752018-07-20 15:30:46 +0100227 midr |= (varv << 20);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000228 continue;
229 }
230
231 if(std::regex_match(line, match, part_regex))
232 {
Pablo Tello65f99822018-05-24 11:40:15 +0100233 int partv = support::cpp11::stoi(match[1], nullptr, support::cpp11::NumericBase::BASE_16);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000234 midr |= (partv << 4);
235 continue;
236 }
237
238 if(std::regex_match(line, match, rev_regex))
239 {
Pablo Tello65f99822018-05-24 11:40:15 +0100240 int regv = support::cpp11::stoi(match[1], nullptr);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000241 midr |= (regv);
242 midr |= (0xf << 16);
243 continue;
244 }
245 }
246
247 if(curcpu >= 0)
248 {
Anthony Barbier3efb3752018-07-20 15:30:46 +0100249 cpusv[curcpu] = midr_to_model(midr);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000250 }
251 }
252}
253
254int get_max_cpus()
255{
256 int max_cpus = 1;
257#if !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__))
258 std::ifstream CPUspresent;
259 CPUspresent.open("/sys/devices/system/cpu/present", std::ios::in);
260 bool success = false;
261
262 if(CPUspresent.is_open())
263 {
264 std::string line;
265
266 if(bool(getline(CPUspresent, line)))
267 {
268 /* The content of this file is a list of ranges or single values, e.g.
269 * 0-5, or 1-3,5,7 or similar. As we are interested in the
270 * max valid ID, we just need to find the last valid
271 * delimiter ('-' or ',') and parse the integer immediately after that.
272 */
273 auto startfrom = line.begin();
274
275 for(auto i = line.begin(); i < line.end(); ++i)
276 {
277 if(*i == '-' || *i == ',')
278 {
279 startfrom = i + 1;
280 }
281 }
282
283 line.erase(line.begin(), startfrom);
284
Pablo Tello65f99822018-05-24 11:40:15 +0100285 max_cpus = support::cpp11::stoi(line, nullptr) + 1;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000286 success = true;
287 }
288 }
289
290 // Return std::thread::hardware_concurrency() as a fallback.
291 if(!success)
292 {
293 max_cpus = std::thread::hardware_concurrency();
294 }
295#endif /* BARE_METAL */
Pablo Tello7fad9b12018-03-14 17:55:27 +0000296 return max_cpus;
297}
298#endif /* !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__)) */
299
300} // namespace
301
302namespace arm_compute
303{
304void get_cpu_configuration(CPUInfo &cpuinfo)
305{
306#if !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__))
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100307 bool cpuid = false;
308 bool hwcaps_fp16_support = false;
309 bool hwcaps_dot_support = false;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000310
311 const uint32_t hwcaps = getauxval(AT_HWCAP);
312
313 if((hwcaps & HWCAP_CPUID) != 0)
314 {
315 cpuid = true;
316 }
317
318 if((hwcaps & HWCAP_ASIMDHP) != 0)
319 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100320 hwcaps_fp16_support = true;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000321 }
322
323 if((hwcaps & HWCAP_ASIMDDP) != 0)
324 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100325 hwcaps_dot_support = true;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000326 }
327
Pablo Tello7fad9b12018-03-14 17:55:27 +0000328 const unsigned int max_cpus = get_max_cpus();
329 cpuinfo.set_cpu_num(max_cpus);
Anthony Barbier3efb3752018-07-20 15:30:46 +0100330 std::vector<CPUModel> percpu(max_cpus, CPUModel::GENERIC);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000331 if(cpuid)
332 {
333 populate_models_cpuid(percpu);
334 }
335 else
336 {
337 populate_models_cpuinfo(percpu);
338 }
339 int j(0);
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100340 // Update dot product and FP16 support if all CPUs support these features:
341 bool all_support_dot = true;
342 bool all_support_fp16 = true;
Pablo Tello7fad9b12018-03-14 17:55:27 +0000343 for(const auto &v : percpu)
344 {
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100345 all_support_dot &= model_supports_dot(v);
346 all_support_fp16 &= model_supports_fp16(v);
Anthony Barbier3efb3752018-07-20 15:30:46 +0100347 cpuinfo.set_cpu_model(j++, v);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000348 }
Anthony Barbier5a3ee4f2018-07-24 11:24:17 +0100349 cpuinfo.set_dotprod(all_support_dot || hwcaps_dot_support);
350 cpuinfo.set_fp16(all_support_fp16 || hwcaps_fp16_support);
Pablo Tello7fad9b12018-03-14 17:55:27 +0000351#else /* !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__)) */
352 ARM_COMPUTE_UNUSED(cpuinfo);
353#endif /* !defined(BARE_METAL) && (defined(__arm__) || defined(__aarch64__)) */
354}
355
356unsigned int get_threads_hint()
357{
358 unsigned int num_threads_hint = 1;
359
360#ifndef BARE_METAL
361 std::map<std::string, unsigned int> cpu_part_occurrence_map;
362
363 // CPU part regex
364 std::regex cpu_part_rgx(R"(.*CPU part.+?(?=:).+?(?=\w+)(\w+).*)");
365 std::smatch cpu_part_match;
366
367 // Read cpuinfo and get occurrence of each core
368 std::ifstream cpuinfo;
369 cpuinfo.open("/proc/cpuinfo", std::ios::in);
370 if(cpuinfo.is_open())
371 {
372 std::string line;
373 while(bool(getline(cpuinfo, line)))
374 {
375 if(std::regex_search(line.cbegin(), line.cend(), cpu_part_match, cpu_part_rgx))
376 {
377 std::string cpu_part = cpu_part_match[1];
378 if(cpu_part_occurrence_map.find(cpu_part) != cpu_part_occurrence_map.end())
379 {
380 cpu_part_occurrence_map[cpu_part]++;
381 }
382 else
383 {
384 cpu_part_occurrence_map[cpu_part] = 1;
385 }
386 }
387 }
388 }
389
390 // Get min number of threads
391 auto min_common_cores = std::min_element(cpu_part_occurrence_map.begin(), cpu_part_occurrence_map.end(),
392 [](const std::pair<std::string, unsigned int> &p1, const std::pair<std::string, unsigned int> &p2)
393 {
394 return p1.second < p2.second;
395 });
396
397 // Set thread hint
398 num_threads_hint = cpu_part_occurrence_map.empty() ? std::thread::hardware_concurrency() : min_common_cores->second;
399#endif /* BARE_METAL */
400
401 return num_threads_hint;
402}
403
404} // namespace arm_compute