Manuel Bottini | ae58bdf | 2021-06-17 17:18:45 +0100 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2021 Arm Limited. |
| 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #ifndef ARM_COMPUTE_CPU_GEMMLOWP_OUTPUTSTAGE_H |
| 25 | #define ARM_COMPUTE_CPU_GEMMLOWP_OUTPUTSTAGE_H |
| 26 | |
| 27 | #include "arm_compute/core/Types.h" |
| 28 | #include "src/runtime/cpu/ICpuOperator.h" |
| 29 | |
| 30 | /** This file contains all available output stages for GEMMLowp. |
| 31 | * |
| 32 | * In gemmlowp, the "output stage" is the process that takes a final int32 accumulator value (the output of @ref NEGEMMLowpMatrixMultiplyCore), |
| 33 | * and processes it to obtain the final ASYMM8 value. |
| 34 | * |
| 35 | * More information about the GEMMLowp output stage can be found at https://github.com/google/gemmlowp/blob/master/doc/output.md |
| 36 | */ |
| 37 | |
| 38 | namespace arm_compute |
| 39 | { |
| 40 | namespace cpu |
| 41 | { |
| 42 | /** Basic function to execute GEMMLowpQuantizeDown kernels. |
| 43 | * |
| 44 | * This function calls the following kernels: |
| 45 | * |
| 46 | * -# @ref kernels::CpuGemmLowpQuantizeDownInt32ScaleKernel |
| 47 | * -# @ref kernels::CpuGemmLowpQuantizeDownInt32ToUint8ScaleByFixedPointKernel |
| 48 | * -# @ref kernels::CpuGemmLowpQuantizeDownInt32ToInt8ScaleByFixedPointKernel |
| 49 | * -# @ref kernels::CpuGemmLowpQuantizeDownInt32ToInt16ScaleByFixedPointKernel |
| 50 | */ |
| 51 | class CpuGemmLowpOutputStage : public ICpuOperator |
| 52 | { |
| 53 | public: |
| 54 | /** Constructor */ |
| 55 | CpuGemmLowpOutputStage() = default; |
| 56 | /** Default destructor */ |
| 57 | ~CpuGemmLowpOutputStage() = default; |
| 58 | /** Initialise the kernel's inputs, output |
| 59 | * |
| 60 | * Valid data layouts: |
| 61 | * - All |
| 62 | * |
| 63 | * Valid data type configurations: |
| 64 | * |src0 |src1 |dst | |
| 65 | * |:--------------|:-------------|:-------------| |
| 66 | * |S32 |S32 |QASYMM8 | |
| 67 | * |S32 |S32 |QASYMM8_SIGNED| |
| 68 | * |S32 |S32 |QSYMM16 | |
| 69 | * |
| 70 | * @param[in] src Input tensor info. Data type supported: S32 |
| 71 | * @param[in] bias Biases tensor info. Only shared biases supported and it can be a nullptr if the biases addition is not required. |
| 72 | * Biases are 1D tensor with dimensions [OFM]. Data type supported: Same as @p input. |
| 73 | * @param[out] dst Output tensor info. Data type supported: Data type supported: QASYMM8/QASYMM8_SIGNED/QSYMM16 |
| 74 | * @param[in] info GEMMLowp output stage metadata. |
| 75 | */ |
| 76 | void configure(ITensorInfo *src, ITensorInfo *bias, ITensorInfo *dst, const GEMMLowpOutputStageInfo &info); |
| 77 | /** Static function to check if given info will lead to a valid configuration |
| 78 | * |
| 79 | * Similar to CpuGemmLowpOutputStage::configure() |
| 80 | * |
| 81 | * @return a status |
| 82 | */ |
| 83 | static Status validate(const ITensorInfo *src, const ITensorInfo *bias, const ITensorInfo *dst, const GEMMLowpOutputStageInfo &info); |
| 84 | |
| 85 | // Inherited methods overridden: |
| 86 | void run(ITensorPack &tensors) override; |
| 87 | }; |
| 88 | } // namespace cpu |
| 89 | } // namespace arm_compute |
| 90 | #endif /* ARM_COMPUTE_CPU_GEMMLOWP_OUTPUTSTAGE_H */ |