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Anthony Barbier6ff3b192017-09-04 18:44:23 +01001/*
2 * Copyright (c) 2017 ARM Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#include "arm_compute/runtime/NEON/functions/NEGEMM.h"
25
26#include "arm_compute/core/Error.h"
27#include "arm_compute/core/Helpers.h"
28#include "arm_compute/core/ITensor.h"
29#include "arm_compute/core/TensorInfo.h"
30#include "arm_compute/core/Types.h"
31#include "arm_compute/core/Validate.h"
32#include "arm_compute/runtime/NEON/NEScheduler.h"
33#include "arm_compute/runtime/TensorAllocator.h"
34
35#include <cmath>
36
37using namespace arm_compute;
38
39NEGEMM::NEGEMM()
40 : _interleave_kernel(), _transpose_kernel(), _mm_kernel(), _ma_kernel(), _tmp_a(), _tmp_b(), _run_vector_matrix_multiplication(false), _run_addition(false)
41{
42}
43
44void NEGEMM::configure(const ITensor *a, const ITensor *b, const ITensor *c, ITensor *d, float alpha, float beta)
45{
46 ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(a, 1, DataType::F32, DataType::F16, DataType::QS8);
47 ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(b, 1, DataType::F32, DataType::F16, DataType::QS8);
48 ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(d, 1, DataType::F32, DataType::F16, DataType::QS8);
49
50 if(c != nullptr)
51 {
52 ARM_COMPUTE_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(c, 1, DataType::F32, DataType::F16, DataType::QS8);
53 ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(a, c);
54 ARM_COMPUTE_ERROR_ON_MSG(a->info()->dimension(1) != c->info()->dimension(1), "The C matrix must have the same number of rows as the matrix A");
55 ARM_COMPUTE_ERROR_ON_MSG(b->info()->dimension(0) != c->info()->dimension(0), "The C matrix must have the same number of columns as the matrix B");
56 ARM_COMPUTE_ERROR_ON_MSG(c->info()->dimension(0) != d->info()->dimension(0), "The C matrix must have the same number of rows as the output matrix");
57 ARM_COMPUTE_ERROR_ON_MSG(c->info()->dimension(1) != d->info()->dimension(1), "The C matrix must have the same number of columns as the output matrix");
58 }
59
60 ARM_COMPUTE_ERROR_ON_MISMATCHING_DATA_TYPES(a, b, d);
61 ARM_COMPUTE_ERROR_ON_MSG(a->info()->dimension(0) != b->info()->dimension(1), "The product AB is defined only if the number of columns in A is equal to the number of rows in B");
62
63 // Check if the first input tensor is a vector. If so, all the kernels for reshaping the tensors can be skipped
64 if((a->info()->dimension(1) == 1))
65 {
66 _run_vector_matrix_multiplication = true;
67
68 // Configure the matrix multiply kernel
69 _mm_kernel.configure(a, b, d, alpha);
70 }
71 else
72 {
73 _run_vector_matrix_multiplication = false;
74
75 TensorShape shape_tmp_a = a->info()->tensor_shape();
76 TensorShape shape_tmp_b = b->info()->tensor_shape();
77
78 shape_tmp_a.set(0, a->info()->dimension(0) * 4);
79 shape_tmp_a.set(1, std::ceil(a->info()->dimension(1) / 4.0f));
80
81 switch(a->info()->data_type())
82 {
83 case DataType::F32:
84 {
85 shape_tmp_b.set(0, b->info()->dimension(1) * 4);
86 shape_tmp_b.set(1, std::ceil(b->info()->dimension(0) / 4.0f));
87 break;
88 }
89 case DataType::F16:
90#ifdef ARM_COMPUTE_ENABLE_FP16
91 {
92 shape_tmp_b.set(0, b->info()->dimension(1) * 8);
93 shape_tmp_b.set(1, std::ceil(b->info()->dimension(0) / 8.0f));
94 break;
95 }
96#endif
97 case DataType::QS8:
98 {
99 shape_tmp_b.set(0, b->info()->dimension(1) * 16);
100 shape_tmp_b.set(1, std::ceil(b->info()->dimension(0) / 16.0f));
101 break;
102 }
103 default:
104 {
105 ARM_COMPUTE_ERROR_ON("Data type not supported");
106 }
107 }
108
109 TensorInfo info_a(shape_tmp_a, 1, a->info()->data_type(), a->info()->fixed_point_position());
110 TensorInfo info_b(shape_tmp_b, 1, b->info()->data_type(), a->info()->fixed_point_position());
111
112 _tmp_a.allocator()->init(info_a);
113 _tmp_b.allocator()->init(info_b);
114
115 // Configure interleave kernel
116 _interleave_kernel.configure(a, &_tmp_a);
117
118 // Configure transpose kernel
119 _transpose_kernel.configure(b, &_tmp_b);
120
121 // Configure matrix multiplication kernel
122 _mm_kernel.configure(&_tmp_a, &_tmp_b, d, alpha);
123
124 // Allocate once the all configure methods have been called
125 _tmp_a.allocator()->allocate();
126 _tmp_b.allocator()->allocate();
127 }
128
129 // Configure matrix addition kernel
130 if(beta != 0 && c != nullptr)
131 {
132 _ma_kernel.configure(c, d, beta);
133 _run_addition = true;
134 }
135}
136
137void NEGEMM::run()
138{
139 if(!_run_vector_matrix_multiplication)
140 {
141 // Run interleave kernel
142 NEScheduler::get().schedule(&_interleave_kernel, Window::DimY);
143
144 // Run transpose kernel
145 NEScheduler::get().schedule(&_transpose_kernel, Window::DimY);
146 }
147
148 // Run matrix multiply kernel
149 NEScheduler::get().schedule(&_mm_kernel, _run_vector_matrix_multiplication ? Window::DimX : Window::DimY);
150
151 // Run matrix addition kernel
152 if(_run_addition)
153 {
154 NEScheduler::get().schedule(&_ma_kernel, Window::DimY);
155 }
156}