blob: fa1d6e37a9fd499b454461eed251ec6f56702207 [file] [log] [blame]
Moritz Pflanzerbeabe3b2017-08-31 14:56:32 +01001/*
2 * Copyright (c) 2017 ARM Limited.
3 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#pragma once
25
26#ifdef __aarch64__
27// Macro to use in assembler to get a preload. Needed because of various
28// workarounds needed to get working preload behaviour.
29//
30// Code using these macros needs to clobber x20 and x21 as they might be
31// used by the workaround.
32
33#define ASM_PREFETCH(address) "PRFM PLDL1KEEP, " address "\n"
34#define ASM_PREFETCHL2(address) "PRFM PLDL2KEEP, " address "\n"
35#define ASM_PREFETCHW(address) "PRFM PSTL1KEEP, " address "\n"
36#define ASM_PREFETCHWL2(address) "PRFM PSTL2KEEP, " address "\n"
37
38#else
39
40#define ASM_PREFETCH(address) "PLD " address "\n"
41#define ASM_PREFETCHW(address) "PLDW " address "\n"
42
43#endif
44
45/*
46 * Do some prefetches.
47 */
48template <typename T>
49static inline void prefetch_6x(const T *pfp) {
50 __asm __volatile (
51 ASM_PREFETCH("[%[pfp]]")
52 ASM_PREFETCH("[%[pfp], #64]")
53 ASM_PREFETCH("[%[pfp], #128]")
54 ASM_PREFETCH("[%[pfp], #192]")
55 ASM_PREFETCH("[%[pfp], #256]")
56 ASM_PREFETCH("[%[pfp], #320]")
57 :
58 : [pfp] "r" (pfp)
59 : "memory"
60 );
61}
62
63template <typename T>
64static inline void prefetch_5x(const T *pfp) {
65 __asm __volatile (
66 ASM_PREFETCH("[%[pfp]]")
67 ASM_PREFETCH("[%[pfp], #64]")
68 ASM_PREFETCH("[%[pfp], #128]")
69 ASM_PREFETCH("[%[pfp], #192]")
70 ASM_PREFETCH("[%[pfp], #256]")
71 :
72 : [pfp] "r" (pfp)
73 : "memory"
74 );
75}
76
77template <typename T>
78static inline void prefetch_4x(const T *pfp) {
79 __asm __volatile (
80 ASM_PREFETCH("[%[pfp]]")
81 ASM_PREFETCH("[%[pfp], #64]")
82 ASM_PREFETCH("[%[pfp], #128]")
83 ASM_PREFETCH("[%[pfp], #192]")
84 :
85 : [pfp] "r" (pfp)
86 : "memory"
87 );
88}
89
90template <typename T>
91static inline void prefetch_3x(const T *pfp) {
92 __asm __volatile (
93 ASM_PREFETCH("[%[pfp]]")
94 ASM_PREFETCH("[%[pfp], #64]")
95 ASM_PREFETCH("[%[pfp], #128]")
96 :
97 : [pfp] "r" (pfp)
98 : "memory"
99 );
100}
101
102template <typename T>
103static inline void prefetch_2x(const T *pfp) {
104 __asm __volatile (
105 ASM_PREFETCH("[%[pfp]]")
106 ASM_PREFETCH("[%[pfp], #64]")
107 :
108 : [pfp] "r" (pfp)
109 : "memory"
110 );
111}
112
113template <typename T>
114static inline void prefetch_1x(const T *pfp) {
115 __asm __volatile (
116 ASM_PREFETCH("[%[pfp]]")
117 :
118 : [pfp] "r" (pfp)
119 : "memory"
120 );
121}