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Chunosovd621bca2017-11-03 17:33:15 +07001/*
Michele Di Giorgio4aff98f2019-08-28 16:27:26 +01002 * Copyright (c) 2017-2019 ARM Limited.
Chunosovd621bca2017-11-03 17:33:15 +07003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
24#ifndef ARM_COMPUTE_HELPERS_ASYMM_H
25#define ARM_COMPUTE_HELPERS_ASYMM_H
26
27#include "helpers.h"
28
Michele Di Giorgio4aff98f2019-08-28 16:27:26 +010029#define CONVERT_DOWN_RTE_STR(x, type) (convert_##type##_rte((x)))
30#define CONVERT_DOWN_RTE(x, type) CONVERT_DOWN_RTE_STR(x, type)
31
32/** Quantize a floating-point scalar value to 8-bit asymmetric
33 *
34 * @param[in] input Input value to quantize
35 * @param[in] offset Quantization offset
36 * @param[in] scale Quantization scale
37 *
38 * @return quantized value
39 */
40inline uchar quantize_qasymm8(float input, float offset, float scale)
41{
42 float out_f32 = input / scale + offset;
43 uchar res_u8 = CONVERT_SAT(CONVERT_DOWN_RTE(out_f32, int), uchar);
44 return res_u8;
45}
46
47/** Dequantize a scalar value from 8-bit asymmetric to floating-point
48 *
49 * @param[in] input Input value to quantize
50 * @param[in] offset Quantization offset
51 * @param[in] scale Quantization scale
52 *
53 * @return quantized value
54 */
55inline float dequantize_qasymm8(uchar input, float offset, float scale)
56{
57 return ((float)input - offset) * scale;
58}
59
60/** Quantize a vector of values from floating-point
61 *
62 * @param[in] type Output data type.
63 * @param[in] size Size of vector.
64 *
65 * @return quantized values
66 */
67#define QUANTIZE_IMPL(type, size) \
68 inline VEC_DATA_TYPE(type, size) quantize_##type##size(VEC_DATA_TYPE(float, size) input, float offset, float scale) \
69 { \
70 VEC_DATA_TYPE(float, size) \
71 out_f32 = input / (VEC_DATA_TYPE(float, size))(scale) + (VEC_DATA_TYPE(float, size))(offset); \
72 VEC_DATA_TYPE(type, size) \
73 res = CONVERT_SAT(CONVERT_DOWN_RTE(out_f32, VEC_DATA_TYPE(int, size)), VEC_DATA_TYPE(type, size)); \
74 return res; \
75 }
76
77/** Dequantize a vector of values to floating-point
78 *
79 * @param[in] type Input data type.
80 * @param[in] size Size of vector.
81 *
82 * @return dequantized values in floating point
83 */
84#define DEQUANTIZE_IMPL(type, size) \
85 inline VEC_DATA_TYPE(float, size) dequantize_##type##size(VEC_DATA_TYPE(type, size) input, float offset, float scale) \
86 { \
87 return (CONVERT(input, VEC_DATA_TYPE(float, 4)) - offset) * scale; \
88 }
89
Chunosovd621bca2017-11-03 17:33:15 +070090/** Correctly-rounded-to-nearest division by a power-of-two.
91 *
92 * @param[in] size Size of vector.
93 *
94 * @return Correctly-rounded-to-nearest division by a power-of-two.
95 */
Michele Di Giorgiodf4cf572019-10-09 15:32:39 +010096#define ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(size) \
97 inline VEC_DATA_TYPE(int, size) asymm_rounding_divide_by_POW2_##size(VEC_DATA_TYPE(int, size) x, VEC_DATA_TYPE(int, size) exponent) \
98 { \
99 const VEC_DATA_TYPE(int, size) \
100 zero = (VEC_DATA_TYPE(int, size))0; \
101 const VEC_DATA_TYPE(int, size) \
102 one = (VEC_DATA_TYPE(int, size))1; \
103 VEC_DATA_TYPE(int, size) \
104 mask = (one << exponent) - one; \
105 VEC_DATA_TYPE(int, size) \
106 threshold = (mask >> 1) + select(zero, one, x < 0); \
107 return (x >> exponent) + select(zero, one, (x & mask) > threshold); \
Chunosovd621bca2017-11-03 17:33:15 +0700108 }
109
Chunosovd621bca2017-11-03 17:33:15 +0700110/** Product of two numbers, interpreting them as fixed-point values in the interval [-1, 1),
111 * rounding to the nearest value, and saturating -1 * -1 to the maximum value.
112 *
113 * @param[in] size Size of vector.
114 *
115 * @return Product of two fixed-point numbers.
116 */
Giorgio Arenab99f00d2018-02-14 10:40:16 +0000117#define ASYMM_MULT_IMPL(size) \
Chunosovd621bca2017-11-03 17:33:15 +0700118 inline VEC_DATA_TYPE(int, size) asymm_mult##size(VEC_DATA_TYPE(int, size) a, VEC_DATA_TYPE(int, size) b) \
119 { \
120 VEC_DATA_TYPE(int, size) \
121 overflow = a == b && a == INT_MIN; \
122 VEC_DATA_TYPE(long, size) \
123 a_64 = convert_long##size(a); \
124 VEC_DATA_TYPE(long, size) \
125 b_64 = convert_long##size(b); \
126 VEC_DATA_TYPE(long, size) \
127 ab_64 = a_64 * b_64; \
Giorgio Arena6232d042018-02-12 14:46:00 +0000128 /* COMPMID-907 */ \
Giorgio Arenab99f00d2018-02-14 10:40:16 +0000129 VEC_DATA_TYPE(int, size) \
Giorgio Arena6232d042018-02-12 14:46:00 +0000130 ab_x2_high32 = convert_int##size(((ab_64 + (1 << 30)) >> 31)); \
Chunosovd621bca2017-11-03 17:33:15 +0700131 return select(ab_x2_high32, INT_MAX, overflow); \
132 }
133
Giorgio Arenab99f00d2018-02-14 10:40:16 +0000134/** Calculates \f$ exp(x) \f$ for x in [-1/4, 0).
135 *
136 * @param[in] size Size of vector.
137 *
138 * @return Result in fixed-point format Q0.
139 */
140#define ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(size) \
141 inline VEC_DATA_TYPE(int, size) asymm_exp_on_interval_between_negative_one_quarter_and_0_excl##size(VEC_DATA_TYPE(int, size) a) \
142 { \
143 const VEC_DATA_TYPE(int, size) constant_term = 1895147668; \
144 const VEC_DATA_TYPE(int, size) constant_1_over_3 = 715827883; \
145 const int k_fractional_bits = 31; \
146 VEC_DATA_TYPE(int, size) \
147 x = a + (1 << (k_fractional_bits - 3)); \
148 VEC_DATA_TYPE(int, size) \
149 x2 = ASYMM_MULT(x, x, size); \
150 VEC_DATA_TYPE(int, size) \
151 x3 = ASYMM_MULT(x2, x, size); \
152 VEC_DATA_TYPE(int, size) \
153 x4 = ASYMM_MULT(x2, x2, size); \
154 VEC_DATA_TYPE(int, size) \
155 x4_over_4 = ASYMM_ROUNDING_DIVIDE_BY_POW2(x4, 2, size); \
156 VEC_DATA_TYPE(int, size) \
157 x4_over_24_plus_x3_over_6_plus_x2 = ASYMM_MULT((x4_over_4 + x3), constant_1_over_3, size) + x2; \
158 VEC_DATA_TYPE(int, size) \
159 x4_over_24_plus_x3_over_6_plus_x2_over_2 = ASYMM_ROUNDING_DIVIDE_BY_POW2(x4_over_24_plus_x3_over_6_plus_x2, 1, size); \
160 return constant_term + ASYMM_MULT(constant_term, x + x4_over_24_plus_x3_over_6_plus_x2_over_2, size); \
161 }
Chunosovd621bca2017-11-03 17:33:15 +0700162
Giorgio Arenab99f00d2018-02-14 10:40:16 +0000163/** Each bit of the result is set to the corresponding bit of either then_val or
164 * else_val depending on whether the corresponding bit of if_mask is set.
165 * Equivalent to the VBSL instruction in ARM NEON.
166 *
167 * @param[in] size Size of vector.
168 *
169 * @returns Result contaning bits from @p then_val or from @p else_val depending on corresponding bit in @p if_mask is set or not.
170 */
171#define ASYMM_SELECT_USING_MASK_IMPL(size) \
172 inline VEC_DATA_TYPE(int, size) asymm_select_using_mask##size(VEC_DATA_TYPE(int, size) if_mask, VEC_DATA_TYPE(int, size) then_val, VEC_DATA_TYPE(int, size) else_val) \
173 { \
174 return (if_mask & then_val) ^ (~if_mask & else_val); \
175 }
176
177/** For each element of input vector, the corresponding bits of the result item are set
178 * if the input item is zero.
179 *
180 * @param[in] size Size of vector.
181 *
182 * @returns Output vector with bits set when corresponding bit in @p a is zero.
183 */
184#define ASYMM_MASK_IF_ZERO_IMPL(size) \
185 inline VEC_DATA_TYPE(int, size) asymm_mask_if_zero##size(VEC_DATA_TYPE(int, size) a) \
186 { \
187 const VEC_DATA_TYPE(int, size) all_zeros = 0; \
188 const VEC_DATA_TYPE(int, size) all_ones = ~0; \
189 return select(all_zeros, all_ones, a == 0); \
190 }
191
192/** For each element of input vector, the corresponding bits of the result item are set
193 * if the input item is non-zero.
194 *
195 * @param[in] size Size of vector.
196 *
197 * @returns Output vector with bits set when corresponding bit in @p a is non zero.
198 */
199#define ASYMM_MASK_IF_NON_ZERO_IMPL(size) \
200 inline VEC_DATA_TYPE(int, size) asymm_mask_if_non_zero##size(VEC_DATA_TYPE(int, size) a) \
201 { \
202 const VEC_DATA_TYPE(int, size) all_zeros = 0; \
203 const VEC_DATA_TYPE(int, size) all_ones = ~0; \
204 return select(all_zeros, all_ones, a != 0); \
205 }
206
207#define EXP_BARREL_SHIFTER_IMPL(size) \
208 inline VEC_DATA_TYPE(int, size) exp_barrel_shifter##size(VEC_DATA_TYPE(int, size) result, int exponent, int fp_multiplier, int k_integer_bits, int k_fractional_bits, VEC_DATA_TYPE(int, size) remainder) \
209 { \
210 if(k_integer_bits > exponent) \
211 { \
212 const int k_shift_amount = k_integer_bits > exponent ? k_fractional_bits + exponent : 0; \
213 return ASYMM_SELECT_USING_MASK( \
214 ASYMM_MASK_IF_NON_ZERO(remainder & (1 << k_shift_amount), size), \
215 ASYMM_MULT(result, fp_multiplier, size), result, size); \
216 } \
217 \
218 return result; \
219 }
220
221/** Calculates \f$ exp(x) \f$ for x < 0.
222 *
223 * @param[in] size Size of vector.
224 *
225 * @return Result in fixed-point format Q0.
226 */
227#define ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(size) \
228 inline VEC_DATA_TYPE(int, size) asymm_exp_on_negative_values##size(VEC_DATA_TYPE(int, size) a, int k_integer_bits) \
229 { \
230 const int k_fractional_bits = 31 - k_integer_bits; \
231 VEC_DATA_TYPE(int, size) \
232 k_one_quarter = 1 << (k_fractional_bits - 2); \
233 VEC_DATA_TYPE(int, size) \
234 mask = k_one_quarter - 1; \
235 VEC_DATA_TYPE(int, size) \
236 a_mod_quarter_minus_one_quarter = (a & mask) - k_one_quarter; \
237 VEC_DATA_TYPE(int, size) \
238 a_mod_quarter_minus_one_quarter_scaled = a_mod_quarter_minus_one_quarter << k_integer_bits; \
239 VEC_DATA_TYPE(int, size) \
240 result = ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL(a_mod_quarter_minus_one_quarter_scaled, size); \
241 VEC_DATA_TYPE(int, size) \
242 remainder = a_mod_quarter_minus_one_quarter - a; \
243 \
244 result = EXP_BARREL_SHIFTER(result, -2, 1672461947, k_integer_bits, k_fractional_bits, remainder, size); \
245 result = EXP_BARREL_SHIFTER(result, -1, 1302514674, k_integer_bits, k_fractional_bits, remainder, size); \
246 result = EXP_BARREL_SHIFTER(result, +0, 790015084, k_integer_bits, k_fractional_bits, remainder, size); \
247 result = EXP_BARREL_SHIFTER(result, +1, 290630308, k_integer_bits, k_fractional_bits, remainder, size); \
248 result = EXP_BARREL_SHIFTER(result, +2, 39332535, k_integer_bits, k_fractional_bits, remainder, size); \
249 result = EXP_BARREL_SHIFTER(result, +3, 720401, k_integer_bits, k_fractional_bits, remainder, size); \
250 result = EXP_BARREL_SHIFTER(result, +4, 242, k_integer_bits, k_fractional_bits, remainder, size); \
251 \
252 if(k_integer_bits > 5) \
253 { \
254 const VEC_DATA_TYPE(int, size) clamp = -(1 << (k_fractional_bits + 5)); \
255 result = ASYMM_SELECT_USING_MASK(ASYMM_MASK_IF_NON_ZERO(a < clamp, size), 0, result, size); \
256 } \
257 \
258 const VEC_DATA_TYPE(int, size) Q0_one = INT_MAX; \
259 return ASYMM_SELECT_USING_MASK(ASYMM_MASK_IF_ZERO(a, size), Q0_one, result, size); \
260 }
261
262/** Calculates the product of a integer value by a power of two, with either a positive exponent
263 * (equivalent to an arithmetic left shift, saturating) or a negative exponent
264 * (equivalent to an arithmetic right shift, rounding to nearest).
265 *
266 * @param[in] size Size of vector.
267 *
268 * @return Arithmetic left or right shift.
269 */
270#define ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(size) \
271 inline VEC_DATA_TYPE(int, size) asymm_saturating_rounding_mult_by_pow2##size(VEC_DATA_TYPE(int, size) x, int exponent) \
272 { \
273 if(exponent < 0) \
274 { \
275 return ASYMM_ROUNDING_DIVIDE_BY_POW2(x, -exponent, size); \
276 } \
277 \
278 const VEC_DATA_TYPE(int, size) min = INT_MIN; \
279 const VEC_DATA_TYPE(int, size) max = INT_MAX; \
280 int threshold = ((1 << (31 - exponent)) - 1); \
281 VEC_DATA_TYPE(int, size) \
282 positive_mask = ASYMM_MASK_IF_NON_ZERO(x > threshold, size); \
283 VEC_DATA_TYPE(int, size) \
284 negative_mask = ASYMM_MASK_IF_NON_ZERO(x < -threshold, size); \
285 VEC_DATA_TYPE(int, size) \
286 result = x << exponent; \
287 result = ASYMM_SELECT_USING_MASK(positive_mask, max, result, size); \
288 result = ASYMM_SELECT_USING_MASK(negative_mask, min, result, size); \
289 return result; \
290 }
291
292/** Calculates (a+b)/2, rounded to the nearest integer.
293 * Equivalent to VRHADD in the ARM NEON instruction set.
294 *
295 * @param[in] size Size of vector.
296 *
297 * @return (a+b)/2, rounded to the nearest integer.
298 */
299#define ASYMM_ROUNDING_HALF_SUM_IMPL(size) \
300 inline VEC_DATA_TYPE(int, size) asymm_rounding_half_sum##size(VEC_DATA_TYPE(int, size) a, VEC_DATA_TYPE(int, size) b) \
301 { \
302 VEC_DATA_TYPE(long, size) \
303 a64 = convert_long##size(a); \
304 VEC_DATA_TYPE(long, size) \
305 b64 = convert_long##size(b); \
306 VEC_DATA_TYPE(long, size) \
307 sum = a64 + b64; \
308 const VEC_DATA_TYPE(long, size) one = 1; \
309 const VEC_DATA_TYPE(long, size) minus_one = -1; \
310 VEC_DATA_TYPE(long, size) \
311 sign = select(minus_one, one, sum >= 0); \
312 return convert_int##size((sum + sign) / 2); \
313 }
314
315/** Calculates \f$ 1 / (1 + x) \f$ for x in (0, 1).
316 *
317 * @param[in] size Size of vector.
318 *
319 * @return Result in fixed-point format Q0.
320 */
321#define ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(size) \
322 inline VEC_DATA_TYPE(int, size) asymm_one_over_one_plus_x_for_x_in_0_1##size(VEC_DATA_TYPE(int, size) a) \
323 { \
324 const VEC_DATA_TYPE(int, size) Q0_one = INT_MAX; \
325 const VEC_DATA_TYPE(int, size) Q2_one = 1 << (31 - 2); \
326 VEC_DATA_TYPE(int, size) \
327 half_denominator = ASYMM_ROUNDING_HALF_SUM(a, Q0_one, size); \
328 const VEC_DATA_TYPE(int, size) Q2_48_over_17 = 1515870810; \
329 const VEC_DATA_TYPE(int, size) Q2_neg_32_over_17 = -1010580540; \
330 VEC_DATA_TYPE(int, size) \
331 x = Q2_48_over_17 + ASYMM_MULT(half_denominator, Q2_neg_32_over_17, size); \
332 for(int i = 0; i < 3; i++) \
333 { \
334 VEC_DATA_TYPE(int, size) \
335 half_denominator_times_x = ASYMM_MULT(half_denominator, x, size); \
336 VEC_DATA_TYPE(int, size) \
337 one_minus_half_denominator_times_x = Q2_one - half_denominator_times_x; \
338 VEC_DATA_TYPE(int, size) \
339 tmp = ASYMM_MULT(x, one_minus_half_denominator_times_x, size); \
340 x = x + ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(tmp, 2, size); \
341 } \
342 return ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(x, 1, size); \
343 }
344
345/** Considering the integer value as fixed-point, change the number of integer bits and update value accordingly.
346 *
347 * @param[in] size Size of vector.
348 *
349 * @return Rescaled value.
350 */
351#define ASYMM_RESCALE_IMPL(size) \
352 inline VEC_DATA_TYPE(int, size) asymm_rescale##size(VEC_DATA_TYPE(int, size) value, int src_integer_bits, int dst_integer_bits) \
353 { \
354 int exponent = src_integer_bits - dst_integer_bits; \
355 return ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(value, exponent, size); \
356 }
357
Michele Di Giorgio4aff98f2019-08-28 16:27:26 +0100358#define QUANTIZE_STR(input, offset, scale, type, size) quantize_##type##size(input, offset, scale)
359#define QUANTIZE(input, offset, scale, type, size) QUANTIZE_STR(input, offset, scale, type, size)
360#define DEQUANTIZE_STR(input, offset, scale, type, size) dequantize_##type##size(input, offset, scale)
361#define DEQUANTIZE(input, offset, scale, type, size) DEQUANTIZE_STR(input, offset, scale, type, size)
362
Giorgio Arenab99f00d2018-02-14 10:40:16 +0000363#define ASYMM_ROUNDING_DIVIDE_BY_POW2(x, exponent, size) asymm_rounding_divide_by_POW2_##size(x, exponent)
Chunosovd621bca2017-11-03 17:33:15 +0700364#define ASYMM_MULT(a, b, size) asymm_mult##size(a, b)
Chunosovd621bca2017-11-03 17:33:15 +0700365#define ASYMM_MULT_BY_QUANT_MULTIPLIER_LESS_THAN_ONE(x, quantized_multiplier, right_shift, size) \
366 ASYMM_ROUNDING_DIVIDE_BY_POW2(ASYMM_MULT(x, quantized_multiplier, size), right_shift, size)
Giorgio Arenab99f00d2018-02-14 10:40:16 +0000367#define ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL(a, size) asymm_exp_on_interval_between_negative_one_quarter_and_0_excl##size(a)
368#define ASYMM_SELECT_USING_MASK(if_mask, then_val, else_val, size) asymm_select_using_mask##size(if_mask, then_val, else_val)
369#define ASYMM_MASK_IF_ZERO(a, size) asymm_mask_if_zero##size(a)
370#define ASYMM_MASK_IF_NON_ZERO(a, size) asymm_mask_if_non_zero##size(a)
371#define EXP_BARREL_SHIFTER(result, exponent, fp_multiplier, k_integer_bits, k_fractional_bits, remainder, size) exp_barrel_shifter##size(result, exponent, fp_multiplier, k_integer_bits, k_fractional_bits, remainder)
372#define ASYMM_EXP_ON_NEGATIVE_VALUES(a, k_integer_bits, size) asymm_exp_on_negative_values##size(a, k_integer_bits)
373#define ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1(a, size) asymm_one_over_one_plus_x_for_x_in_0_1##size(a)
374#define ASYMM_SATURATING_ROUNDING_MULT_BY_POW2(x, exponent, size) asymm_saturating_rounding_mult_by_pow2##size(x, exponent)
375#define ASYMM_ROUNDING_HALF_SUM(a, b, size) asymm_rounding_half_sum##size(a, b)
376#define ASYMM_RESCALE(value, src_integer_bits, dst_integer_bits, size) asymm_rescale##size(value, src_integer_bits, dst_integer_bits)
Chunosovd621bca2017-11-03 17:33:15 +0700377
Michele Di Giorgio4aff98f2019-08-28 16:27:26 +0100378QUANTIZE_IMPL(uchar, 4)
379QUANTIZE_IMPL(ushort, 4)
Michele Di Giorgio6b612f52019-09-05 12:30:22 +0100380QUANTIZE_IMPL(short, 4)
Michele Di Giorgio4aff98f2019-08-28 16:27:26 +0100381
382DEQUANTIZE_IMPL(uchar, 4)
383DEQUANTIZE_IMPL(ushort, 4)
Michele Di Giorgio6b612f52019-09-05 12:30:22 +0100384DEQUANTIZE_IMPL(short, 4)
Michele Di Giorgio4aff98f2019-08-28 16:27:26 +0100385
Michele Di Giorgioa046e162019-10-08 09:36:26 +0100386ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(1)
Giorgio Arenab99f00d2018-02-14 10:40:16 +0000387ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(2)
388ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(4)
389ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(8)
390ASYMM_ROUNDING_DIVIDE_BY_POW2_IMPL(16)
391
Michele Di Giorgioa046e162019-10-08 09:36:26 +0100392ASYMM_MULT_IMPL(1)
Giorgio Arenab99f00d2018-02-14 10:40:16 +0000393ASYMM_MULT_IMPL(2)
394ASYMM_MULT_IMPL(4)
395ASYMM_MULT_IMPL(8)
396ASYMM_MULT_IMPL(16)
397
398ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(2)
399ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(4)
400ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(8)
401ASYMM_EXP_ON_INTERVAL_BETWEEN_NEGATIVE_ONE_QUARTER_AND_0_EXCL_IMPL(16)
402
403ASYMM_SELECT_USING_MASK_IMPL(2)
404ASYMM_SELECT_USING_MASK_IMPL(4)
405ASYMM_SELECT_USING_MASK_IMPL(8)
406ASYMM_SELECT_USING_MASK_IMPL(16)
407
408ASYMM_MASK_IF_ZERO_IMPL(2)
409ASYMM_MASK_IF_ZERO_IMPL(4)
410ASYMM_MASK_IF_ZERO_IMPL(8)
411ASYMM_MASK_IF_ZERO_IMPL(16)
412
413ASYMM_MASK_IF_NON_ZERO_IMPL(2)
414ASYMM_MASK_IF_NON_ZERO_IMPL(4)
415ASYMM_MASK_IF_NON_ZERO_IMPL(8)
416ASYMM_MASK_IF_NON_ZERO_IMPL(16)
417
418EXP_BARREL_SHIFTER_IMPL(2)
419EXP_BARREL_SHIFTER_IMPL(4)
420EXP_BARREL_SHIFTER_IMPL(8)
421EXP_BARREL_SHIFTER_IMPL(16)
422
423ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(2)
424ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(4)
425ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(8)
426ASYMM_EXP_ON_NEGATIVE_VALUES_IMPL(16)
427
428ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(2)
429ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(4)
430ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(8)
431ASYMM_SATURATING_ROUNDING_MULT_BY_POW2_IMPL(16)
432
433ASYMM_ROUNDING_HALF_SUM_IMPL(2)
434ASYMM_ROUNDING_HALF_SUM_IMPL(4)
435ASYMM_ROUNDING_HALF_SUM_IMPL(8)
436ASYMM_ROUNDING_HALF_SUM_IMPL(16)
437
438ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(2)
439ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(4)
440ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(8)
441ASYMM_ONE_OVER_ONE_PLUS_X_FOR_X_IN_0_1_IMPL(16)
442
443ASYMM_RESCALE_IMPL(2)
444ASYMM_RESCALE_IMPL(4)
445ASYMM_RESCALE_IMPL(8)
446ASYMM_RESCALE_IMPL(16)
447
Michele Di Giorgio4aff98f2019-08-28 16:27:26 +0100448#endif // ARM_COMPUTE_HELPERS_ASYMM_H