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steniu0127b386c2017-07-18 17:37:43 +01001/*
Matthew Benthamf1aeab92023-05-30 13:35:34 +00002 * Copyright (c) 2017-2021, 2023 Arm Limited.
steniu0127b386c2017-07-18 17:37:43 +01003 *
4 * SPDX-License-Identifier: MIT
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to
8 * deal in the Software without restriction, including without limitation the
9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
10 * sell copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in all
14 * copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 */
Michalis Spyrouf4643372019-11-29 16:17:13 +000024#ifndef ARM_COMPUTE_CLDIRECTCONVOLUTIONLAYER_H
25#define ARM_COMPUTE_CLDIRECTCONVOLUTIONLAYER_H
steniu0127b386c2017-07-18 17:37:43 +010026
Matthew Benthamf1aeab92023-05-30 13:35:34 +000027#include "arm_compute/core/ActivationLayerInfo.h"
steniu0127b386c2017-07-18 17:37:43 +010028#include "arm_compute/core/Types.h"
Isabella Gottardi3f217ec2018-02-12 14:59:19 +000029#include "arm_compute/runtime/CL/functions/CLActivationLayer.h"
steniu0127b386c2017-07-18 17:37:43 +010030#include "arm_compute/runtime/IFunction.h"
31
32#include <memory>
33
34namespace arm_compute
35{
Sang-Hoon Parkbef7fa22020-10-21 15:58:54 +010036class CLCompileContext;
steniu0127b386c2017-07-18 17:37:43 +010037class ICLTensor;
Sang-Hoon Parkbef7fa22020-10-21 15:58:54 +010038class ITensorInfo;
steniu0127b386c2017-07-18 17:37:43 +010039
40/** Basic function to execute direct convolution function:
41 */
42class CLDirectConvolutionLayer : public IFunction
43{
44public:
Sheri Zhang1efed922021-03-10 22:43:38 +000045 /** Constructor */
steniu0127b386c2017-07-18 17:37:43 +010046 CLDirectConvolutionLayer();
Sheri Zhang1efed922021-03-10 22:43:38 +000047 /** Destructor */
Sang-Hoon Parkbef7fa22020-10-21 15:58:54 +010048 ~CLDirectConvolutionLayer();
Sheri Zhang1efed922021-03-10 22:43:38 +000049 /** Prevent instances of this class from being copied (As this class contains pointers) */
50 CLDirectConvolutionLayer(const CLDirectConvolutionLayer &) = delete;
51 /** Default move constructor */
52 CLDirectConvolutionLayer(CLDirectConvolutionLayer &&);
53 /** Prevent instances of this class from being copied (As this class contains pointers) */
54 CLDirectConvolutionLayer &operator=(const CLDirectConvolutionLayer &) = delete;
55 /** Default move assignment operator */
56 CLDirectConvolutionLayer &operator=(CLDirectConvolutionLayer &&);
steniu0127b386c2017-07-18 17:37:43 +010057 /** Set the input and output tensors.
58 *
Sheri Zhanga47dcc22021-04-22 14:41:12 +010059 * Valid data layouts:
60 * - NHWC
61 * - NCHW
62 *
63 * Valid data type configurations:
64 * |src0 |src1 |src2 |dst |
65 * |:--------------|:--------------|:------|:--------------|
66 * |F16 |F16 |F16 |F16 |
67 * |F32 |F32 |F32 |F32 |
68 * |QASYMM8 |QASYMM8 |S32 |QASYMM8 |
69 * |QASYMM8_SIGNED |QASYMM8_SIGNED |S32 |QASYMM8_SIGNED |
70 *
steniu0127b386c2017-07-18 17:37:43 +010071 * @param[in] input Source tensor. 3 lower dimensions represent a single input [width, height, IFM],
72 * while every optional dimension from 4 and above represent a batch of inputs.
Sheri Zhang681f2d42020-02-20 11:23:08 +000073 * Data types supported: QASYMM8_SIGNED/QASYMM8/F16/F32.
steniu0127b386c2017-07-18 17:37:43 +010074 * @param[in] weights Weights tensor. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. Data type supported:Same as @p input.
Georgios Pinitas540d0082017-11-17 10:55:00 +000075 * @param[in] biases Biases tensor. Shared biases supported. Biases are 1D tensor with dimensions [OFM].
Sheri Zhang681f2d42020-02-20 11:23:08 +000076 * Data type supported: Should match @p input data type, except for input of QASYMM8 and QASYMM8_SIGNED type where biases should be of S32 type.
steniu0127b386c2017-07-18 17:37:43 +010077 * @param[out] output Destination tensor. 3 lower dimensions represent a single output [width, height, OFM], while the rest represent batch of outputs.
78 * Data types supported: Same as @p input.
79 * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo.
Isabella Gottardi3f217ec2018-02-12 14:59:19 +000080 * @param[in] act_info (Optional) Activation layer information in case of a fused activation.
steniu0127b386c2017-07-18 17:37:43 +010081 */
Isabella Gottardi3f217ec2018-02-12 14:59:19 +000082 void configure(ICLTensor *input, const ICLTensor *weights, const ICLTensor *biases, ICLTensor *output, const PadStrideInfo &conv_info, const ActivationLayerInfo &act_info = ActivationLayerInfo());
Manuel Bottini2b84be52020-04-08 10:15:51 +010083 /** Set the input and output tensors.
84 *
85 * @param[in] compile_context The compile context to be used.
86 * @param[in] input Source tensor. 3 lower dimensions represent a single input [width, height, IFM],
87 * while every optional dimension from 4 and above represent a batch of inputs.
88 * Data types supported: QASYMM8_SIGNED/QASYMM8/F16/F32.
89 * @param[in] weights Weights tensor. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. Data type supported:Same as @p input.
90 * @param[in] biases Biases tensor. Shared biases supported. Biases are 1D tensor with dimensions [OFM].
91 * Data type supported: Should match @p input data type, except for input of QASYMM8 and QASYMM8_SIGNED type where biases should be of S32 type.
92 * @param[out] output Destination tensor. 3 lower dimensions represent a single output [width, height, OFM], while the rest represent batch of outputs.
93 * Data types supported: Same as @p input.
94 * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo.
95 * @param[in] act_info (Optional) Activation layer information in case of a fused activation.
96 */
97 void configure(const CLCompileContext &compile_context, ICLTensor *input, const ICLTensor *weights, const ICLTensor *biases, ICLTensor *output, const PadStrideInfo &conv_info,
98 const ActivationLayerInfo &act_info = ActivationLayerInfo());
Georgios Pinitas30902ed2017-11-14 15:32:57 +000099 /** Static function to check if given info will lead to a valid configuration of @ref CLDirectConvolutionLayer
100 *
101 * @param[in] input Source tensor. 3 lower dimensions represent a single input [width, height, IFM],
102 * while every optional dimension from 4 and above represent a batch of inputs.
Sheri Zhang681f2d42020-02-20 11:23:08 +0000103 * Data types supported: QASYMM8_SIGNED/QASYMM8/F16/F32.
Georgios Pinitas30902ed2017-11-14 15:32:57 +0000104 * @param[in] weights Weights tensor. Weights are 4D tensor with dimensions [kernel_x, kernel_y, IFM, OFM]. Data type supported:Same as @p input.
Sheri Zhang681f2d42020-02-20 11:23:08 +0000105 * @param[in] biases Biases tensor. Shared biases supported. Biases are 1D tensor with dimensions [OFM].
106 * Data type supported: Should match @p input data type, except for input of QASYMM8 and QASYMM8_SIGNED type where biases should be of S32 type.
Georgios Pinitas30902ed2017-11-14 15:32:57 +0000107 * @param[in] output Destination tensor. 3 lower dimensions represent a single output [width, height, OFM], while the rest represent batch of outputs.
108 * Data types supported: Same as @p input.
109 * @param[in] conv_info Contains padding and stride information described in @ref PadStrideInfo.
Isabella Gottardi3f217ec2018-02-12 14:59:19 +0000110 * @param[in] act_info (Optional) Activation layer information in case of a fused activation.
Georgios Pinitas30902ed2017-11-14 15:32:57 +0000111 *
Georgios Pinitas631c41a2017-12-06 11:53:03 +0000112 * @return a status
Georgios Pinitas30902ed2017-11-14 15:32:57 +0000113 */
Isabella Gottardi3f217ec2018-02-12 14:59:19 +0000114 static Status validate(const ITensorInfo *input, const ITensorInfo *weights, const ITensorInfo *biases, const ITensorInfo *output, const PadStrideInfo &conv_info,
115 const ActivationLayerInfo &act_info = ActivationLayerInfo());
steniu0127b386c2017-07-18 17:37:43 +0100116
117 // Inherited methods overridden:
118 void run() override;
119
120private:
Sheri Zhang1efed922021-03-10 22:43:38 +0000121 struct Impl;
122 std::unique_ptr<Impl> _impl;
steniu0127b386c2017-07-18 17:37:43 +0100123};
124}
Michalis Spyrouf4643372019-11-29 16:17:13 +0000125#endif /* ARM_COMPUTE_CLDIRECTCONVOLUTIONLAYER_H */