SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 1 | /* |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 2 | * Copyright (c) 2022-2023 Arm Limited. |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 3 | * |
| 4 | * SPDX-License-Identifier: MIT |
| 5 | * |
| 6 | * Permission is hereby granted, free of charge, to any person obtaining a copy |
| 7 | * of this software and associated documentation files (the "Software"), to |
| 8 | * deal in the Software without restriction, including without limitation the |
| 9 | * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or |
| 10 | * sell copies of the Software, and to permit persons to whom the Software is |
| 11 | * furnished to do so, subject to the following conditions: |
| 12 | * |
| 13 | * The above copyright notice and this permission notice shall be included in all |
| 14 | * copies or substantial portions of the Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE |
| 19 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
| 21 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
| 22 | * SOFTWARE. |
| 23 | */ |
| 24 | #include "arm_compute/dynamic_fusion/sketch/gpu/operators/GpuConv2d.h" |
| 25 | |
Ramy Elgammal | df6a3b0 | 2022-11-30 16:23:10 +0000 | [diff] [blame] | 26 | #include "arm_compute/core/KernelDescriptors.h" |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 27 | #include "arm_compute/core/utils/misc/ShapeCalculator.h" |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 28 | #include "arm_compute/core/Validate.h" |
Ramy Elgammal | df6a3b0 | 2022-11-30 16:23:10 +0000 | [diff] [blame] | 29 | #include "arm_compute/runtime/CL/CLScheduler.h" |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 30 | |
Ramy Elgammal | df6a3b0 | 2022-11-30 16:23:10 +0000 | [diff] [blame] | 31 | #include "src/common/utils/Log.h" |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 32 | #include "src/core/helpers/AutoConfiguration.h" |
| 33 | #include "src/dynamic_fusion/sketch/ArgumentPack.h" |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 34 | #include "src/dynamic_fusion/sketch/gpu/components/cl/ClComponentDirectConv2d.h" |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 35 | #include "src/dynamic_fusion/sketch/gpu/GpuWorkloadSketchImpl.h" |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 36 | #include "src/gpu/cl/kernels/gemm/ClGemmHelpers.h" |
Ramy Elgammal | df6a3b0 | 2022-11-30 16:23:10 +0000 | [diff] [blame] | 37 | #include "src/runtime/heuristics/direct_conv/ClDirectConvKernelConfig.h" |
| 38 | #include "src/runtime/heuristics/direct_conv/IClDirectConvKernelConfig.h" |
Ramy Elgammal | 404462a | 2022-11-08 02:14:46 +0000 | [diff] [blame] | 39 | |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 40 | namespace arm_compute |
| 41 | { |
| 42 | namespace experimental |
| 43 | { |
| 44 | namespace dynamic_fusion |
| 45 | { |
| 46 | namespace |
| 47 | { |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 48 | DirectConvComputeKernelInfo |
| 49 | config_direct_convolution_nhwc(const ITensorInfo *src, const ITensorInfo *weights, const PadStrideInfo &conv_info) |
Ramy Elgammal | df6a3b0 | 2022-11-30 16:23:10 +0000 | [diff] [blame] | 50 | { |
| 51 | // Get GPU target |
| 52 | GPUTarget gpu_target = CLScheduler::get().target(); |
| 53 | |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 54 | std::unique_ptr<arm_compute::cl_direct_conv::IClDirectConvKernelConfig> t = |
| 55 | arm_compute::cl_direct_conv::ClDirectConvKernelConfigurationFactory::create(gpu_target); |
Ramy Elgammal | df6a3b0 | 2022-11-30 16:23:10 +0000 | [diff] [blame] | 56 | |
| 57 | return t->configure(src, weights, conv_info); |
| 58 | } |
| 59 | |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 60 | void calculate_and_init_dst_if_empty(ITensorInfo *dst, |
| 61 | const ITensorInfo *src, |
| 62 | const ITensorInfo *wei, |
| 63 | const Conv2dAttributes &attributes) |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 64 | { |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 65 | if (dst->total_size() == 0U) |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 66 | { |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 67 | const auto shape = misc::shape_calculator::compute_deep_convolution_shape( |
| 68 | src->tensor_shape(), src->data_layout(), wei->tensor_shape(), |
| 69 | PadStrideInfo(attributes.stride().x(), attributes.stride().y(), attributes.pad().left, |
| 70 | attributes.pad().right, attributes.pad().top, attributes.pad().bottom, |
| 71 | DimensionRoundingType::FLOOR)); // use the default DimensionRoundingType |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 72 | |
| 73 | auto_init_if_empty(*dst, src->clone()->set_tensor_shape(shape)); |
| 74 | } |
| 75 | } |
| 76 | |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 77 | /* A helper method to reduce the duplication in dst tensor initialization |
| 78 | * when calling validate() |
| 79 | */ |
| 80 | Status is_supported_op_helper(const GpuWorkloadContext &context, |
| 81 | const ITensorInfo *src, |
| 82 | const ITensorInfo *wei, |
| 83 | const ITensorInfo *bia, |
| 84 | const ITensorInfo *dst, |
| 85 | const Conv2dAttributes &attributes) |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 86 | { |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 87 | ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, wei); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 88 | |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 89 | TensorInfo dst_info_to_validate; |
| 90 | const ITensorInfo *dst_info_to_validate_ptr = &dst_info_to_validate; |
| 91 | |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 92 | if (dst != nullptr) |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 93 | { |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 94 | dst_info_to_validate_ptr = dst; |
| 95 | } |
Gunes Bayir | cc28773 | 2023-01-19 15:56:00 +0000 | [diff] [blame] | 96 | |
| 97 | calculate_and_init_dst_if_empty(&dst_info_to_validate, src, wei, attributes); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 98 | |
| 99 | // Check support level |
| 100 | // Data type |
| 101 | ARM_COMPUTE_RETURN_ERROR_ON_DATA_TYPE_CHANNEL_NOT_IN(src, 1, DataType::F16, DataType::F32); |
| 102 | // Data layout |
| 103 | ARM_COMPUTE_RETURN_ERROR_ON_DATA_LAYOUT_NOT_IN(src, DataLayout::NHWC); |
| 104 | |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 105 | // Check components |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 106 | const auto gpu_target = context.gpu_target(); |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 107 | if (context.gpu_language() == GpuLanguage::OpenCL) |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 108 | { |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 109 | const auto cl_compile_ctx = context.cl_compile_context(); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 110 | ARM_COMPUTE_RETURN_ERROR_ON(cl_compile_ctx == nullptr); |
| 111 | // Validate Direct Conv2d Component |
| 112 | { |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 113 | const auto properties = |
| 114 | IGpuKernelComponent::Properties().stage(UnitWorkloadStage{UnitWorkloadStage::Stage::Run}); |
| 115 | auto settings = ClComponentDirectConv2d::Settings(); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 116 | |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 117 | settings.fast_relaxed_math( |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 118 | (gpu_target != GPUTarget::G71 && (gpu_target & GPUTarget::GPU_ARCH_MASK) == GPUTarget::BIFROST) && |
| 119 | (dst_info_to_validate_ptr->data_type() == DataType::F32 || |
| 120 | dst_info_to_validate_ptr->data_type() == DataType::F16)); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 121 | |
| 122 | ArgumentPack<ITensorInfo> arguments; |
| 123 | arguments.add_const_tensor(ACL_SRC_0, src); |
| 124 | arguments.add_const_tensor(ACL_SRC_1, wei); |
| 125 | arguments.add_const_tensor(ACL_SRC_2, bia); |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 126 | arguments.add_const_tensor(ACL_DST_0, dst_info_to_validate_ptr); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 127 | ARM_COMPUTE_RETURN_ON_ERROR(ClComponentDirectConv2d::validate(properties, arguments, attributes, settings)); |
| 128 | } |
| 129 | } |
| 130 | else |
| 131 | { |
| 132 | ARM_COMPUTE_RETURN_ERROR_MSG("Unimplemented Gpu language"); |
| 133 | } |
| 134 | return Status{}; |
| 135 | } |
| 136 | |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 137 | constexpr GpuOperatorType operator_type = GpuOperatorType::Complex; |
| 138 | } // namespace |
| 139 | |
| 140 | Status GpuConv2d::is_supported_op(const GpuWorkloadContext &context, |
| 141 | const ITensorInfo *src, |
| 142 | const ITensorInfo *wei, |
| 143 | const ITensorInfo *bia, |
| 144 | const Conv2dAttributes &attributes) |
| 145 | { |
| 146 | return is_supported_op_helper(context, src, wei, bia, nullptr, attributes); |
| 147 | } |
| 148 | |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 149 | Status GpuConv2d::validate_op(const GpuWorkloadSketch &sketch, |
| 150 | const ITensorInfo *src, |
| 151 | const ITensorInfo *wei, |
| 152 | const ITensorInfo *bia, |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 153 | const Conv2dAttributes &attributes) |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 154 | { |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 155 | ARM_COMPUTE_RETURN_ERROR_ON_NULLPTR(src, wei); |
Viet-Hoa Do | edafe7f | 2023-05-04 17:39:30 +0100 | [diff] [blame] | 156 | ARM_COMPUTE_RETURN_ERROR_ON_MSG(!wei->are_values_constant(), "Dynamic weights are not supported"); |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 157 | |
| 158 | // Check if tensors have valid id. I.e. they are created from a sketch |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 159 | ARM_COMPUTE_RETURN_ERROR_ON(!src->has_valid_id() || !wei->has_valid_id()); |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 160 | if (bia != nullptr) |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 161 | { |
| 162 | ARM_COMPUTE_RETURN_ERROR_ON(!bia->has_valid_id()); |
| 163 | } |
| 164 | |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 165 | // This tensor info will have invalid id but because all the existing tensors in the |
| 166 | // sketch have valid ids and the DependencyGraph implementation has no notion of validness |
| 167 | // regarding tensor ids, it'll be just another tensor id and will validate |
| 168 | // Additionally, a new dst id is added every time in create_op, thus there's no need to validate it |
| 169 | TensorInfo dst_info_to_validate; |
| 170 | |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 171 | // Auto initialize dst tensor info |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 172 | calculate_and_init_dst_if_empty(&dst_info_to_validate, src, wei, attributes); |
| 173 | |
| 174 | // Perform fusion test |
| 175 | // Check if operator meets fusion constraints |
| 176 | ArgumentPack<ITensorInfo> tensors; |
| 177 | tensors.add_const_tensor(ACL_SRC_0, src); |
| 178 | tensors.add_const_tensor(ACL_SRC_1, wei); |
| 179 | tensors.add_const_tensor(ACL_SRC_2, bia); |
| 180 | tensors.add_const_tensor(ACL_DST_0, &dst_info_to_validate); |
| 181 | const auto op = sketch.implementation().operator_group().new_operator(operator_type, tensors); |
| 182 | ARM_COMPUTE_RETURN_ERROR_ON_MSG(!sketch.implementation().operator_group().try_add_operator(op), |
| 183 | "Operator fusion test failed. This operator cannot be fused into the workload"); |
| 184 | |
| 185 | // Check if configuration is supported |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 186 | return is_supported_op_helper(*sketch.gpu_context(), src, wei, bia, &dst_info_to_validate, attributes); |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 187 | } |
| 188 | |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 189 | ITensorInfo *GpuConv2d::create_op( |
| 190 | GpuWorkloadSketch &sketch, ITensorInfo *src, ITensorInfo *wei, ITensorInfo *bia, const Conv2dAttributes &attributes) |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 191 | { |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 192 | ARM_COMPUTE_LOG_PARAMS(src, wei, bia, attributes); |
Ramy Elgammal | df6a3b0 | 2022-11-30 16:23:10 +0000 | [diff] [blame] | 193 | PadStrideInfo conv_info(attributes.stride().x(), attributes.stride().y(), attributes.pad().left, |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 194 | attributes.pad().right, attributes.pad().top, attributes.pad().bottom, |
| 195 | DimensionRoundingType::FLOOR); |
Ramy Elgammal | df6a3b0 | 2022-11-30 16:23:10 +0000 | [diff] [blame] | 196 | // Initialize the direct convolution descriptor |
| 197 | const DirectConvComputeKernelInfo desc = config_direct_convolution_nhwc(src, wei, conv_info); |
| 198 | |
SiCong Li | 5a2bc01 | 2023-01-12 12:54:49 +0000 | [diff] [blame] | 199 | ITensorInfo *dst = sketch.implementation().create_virtual_tensor(); |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 200 | |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 201 | // Assert validation |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 202 | ARM_COMPUTE_ERROR_THROW_ON(GpuConv2d::validate_op(sketch, src, wei, bia, attributes)); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 203 | ARM_COMPUTE_ERROR_ON_NULLPTR(src, wei, dst); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 204 | |
| 205 | // Auto initialize dst tensor |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 206 | calculate_and_init_dst_if_empty(dst, src, wei, attributes); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 207 | |
| 208 | // Translate into components and add to component graph |
| 209 | auto &comp_graph = sketch.implementation().component_graph(); |
| 210 | |
| 211 | const auto sketch_ctx = sketch.implementation().context(); |
| 212 | |
Omar Al Khatib | 3c7c1fa | 2023-03-07 09:57:49 +0000 | [diff] [blame] | 213 | const auto gpu_target = sketch_ctx->gpu_target(); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 214 | |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 215 | if (sketch_ctx->gpu_language() == GpuLanguage::OpenCL) |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 216 | { |
| 217 | const auto cl_compile_ctx = sketch_ctx->cl_compile_context(); |
| 218 | ARM_COMPUTE_ERROR_ON(cl_compile_ctx == nullptr); |
Omar Al Khatib | 3c7c1fa | 2023-03-07 09:57:49 +0000 | [diff] [blame] | 219 | ARM_COMPUTE_UNUSED(cl_compile_ctx); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 220 | |
| 221 | // Add Direct Conv2d Component |
| 222 | { |
| 223 | auto properties = IGpuKernelComponent::Properties(); |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 224 | properties.stage(UnitWorkloadStage{UnitWorkloadStage::Stage::Run}); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 225 | |
| 226 | auto settings = ClComponentDirectConv2d::Settings(); |
| 227 | |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 228 | settings.fast_relaxed_math( |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 229 | (gpu_target != GPUTarget::G71 && (gpu_target & GPUTarget::GPU_ARCH_MASK) == GPUTarget::BIFROST) && |
| 230 | (dst->data_type() == DataType::F32 || dst->data_type() == DataType::F16)); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 231 | |
Viet-Hoa Do | e2e6d74 | 2023-03-01 15:46:10 +0000 | [diff] [blame] | 232 | settings.direct_conv_descriptor(desc); |
| 233 | |
Felix Thomasmathibalan | afd38f0 | 2023-09-27 17:46:17 +0100 | [diff] [blame] | 234 | if (settings.export_to_cl_image()) |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 235 | { |
| 236 | arm_compute::opencl::kernels::gemm::update_padding_for_cl_image(wei); |
| 237 | } |
| 238 | |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 239 | ArgumentPack<ITensorInfo> arguments; |
| 240 | arguments.add_const_tensor(ACL_SRC_0, src); |
| 241 | arguments.add_const_tensor(ACL_SRC_1, wei); |
| 242 | arguments.add_const_tensor(ACL_SRC_2, bia); |
| 243 | arguments.add_const_tensor(ACL_DST_0, dst); |
| 244 | comp_graph.add_new_component<ClComponentDirectConv2d>(properties, arguments, attributes, settings); |
| 245 | } |
| 246 | } |
| 247 | else |
| 248 | { |
| 249 | ARM_COMPUTE_ERROR("Unimplemented Gpu language"); |
| 250 | } |
| 251 | |
| 252 | // Set up fusion test by adding to the Operator Group |
| 253 | // Note this has to be performed after all the components have been successfully added to the component graph |
| 254 | |
| 255 | // Pack tensor infos |
| 256 | ArgumentPack<ITensorInfo> tensors; |
| 257 | tensors.add_const_tensor(ACL_SRC_0, src); |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 258 | tensors.add_const_tensor(ACL_SRC_1, wei); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 259 | tensors.add_const_tensor(ACL_SRC_2, bia); |
SiCong Li | 81fdadd | 2022-11-23 09:58:18 +0000 | [diff] [blame] | 260 | tensors.add_const_tensor(ACL_DST_0, dst); |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 261 | |
| 262 | const auto op = sketch.implementation().operator_group().new_operator(operator_type, tensors); |
| 263 | sketch.implementation().operator_group().add_operator(op); |
Gunes Bayir | 3a1e125 | 2023-01-03 21:26:09 +0000 | [diff] [blame] | 264 | |
| 265 | return dst; |
SiCong Li | f44bbc5 | 2022-08-29 18:25:51 +0100 | [diff] [blame] | 266 | } |
| 267 | |
| 268 | } // namespace dynamic_fusion |
| 269 | } // namespace experimental |
| 270 | } // namespace arm_compute |