blob: 47eba452e7bc876e9675777b265aefd3702095cc [file] [log] [blame]
Matthew Sloyana35b40b2021-02-05 17:22:28 +00001//
2// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
3// SPDX-License-Identifier: MIT
4//
5
6#include "BatchSpaceTestHelper.hpp"
7
8#include <armnn_delegate.hpp>
9
10#include <flatbuffers/flatbuffers.h>
11#include <tensorflow/lite/schema/schema_generated.h>
12
13#include <doctest/doctest.h>
14
15namespace armnnDelegate
16{
17
18// BatchToSpaceND Operator
19void BatchToSpaceNDFp32Test(std::vector<armnn::BackendId>& backends)
20{
21 std::vector<int32_t> inputShape { 4, 1, 1, 1 };
22 std::vector<int32_t> expectedOutputShape { 1, 2, 2, 1 };
23
24 std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f };
25 std::vector<float> expectedOutputValues { 1.0f, 2.0f, 3.0f, 4.0f };
26
27 std::vector<unsigned int> blockShape({2, 2});
28 std::vector<std::pair<unsigned int, unsigned int>> crops = {{0, 0}, {0, 0}};
29
30 BatchSpaceTest<float>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND,
31 ::tflite::TensorType_FLOAT32,
32 backends,
33 inputShape,
34 expectedOutputShape,
35 inputValues,
36 blockShape,
37 crops,
38 expectedOutputValues);
39}
40
41void BatchToSpaceNDFp32BatchOneTest(std::vector<armnn::BackendId>& backends)
42{
43 std::vector<int32_t> inputShape { 1, 2, 2, 1 };
44 std::vector<int32_t> expectedOutputShape { 1, 2, 2, 1 };
45
46 std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f };
47 std::vector<float> expectedOutputValues { 1.0f, 2.0f, 3.0f, 4.0f };
48
49 std::vector<unsigned int> blockShape({1, 1});
50 std::vector<std::pair<unsigned int, unsigned int>> crops = {{0, 0}, {0, 0}};
51
52 BatchSpaceTest<float>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND,
53 ::tflite::TensorType_FLOAT32,
54 backends,
55 inputShape,
56 expectedOutputShape,
57 inputValues,
58 blockShape,
59 crops,
60 expectedOutputValues);
61}
62
63void BatchToSpaceNDUint8Test(std::vector<armnn::BackendId>& backends)
64{
65 std::vector<int32_t> inputShape { 4, 1, 1, 3 };
66 std::vector<int32_t> expectedOutputShape { 1, 2, 2, 3 };
67
68 std::vector<uint8_t> inputValues { 1, 2, 3, 4, 5, 6, 7 };
69 std::vector<uint8_t> expectedOutputValues { 1, 2, 3, 4, 5, 6, 7 };
70
71 std::vector<unsigned int> blockShape({2, 2});
72 std::vector<std::pair<unsigned int, unsigned int>> crops = {{0, 0}, {0, 0}};
73
74 BatchSpaceTest<uint8_t>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND,
75 ::tflite::TensorType_UINT8,
76 backends,
77 inputShape,
78 expectedOutputShape,
79 inputValues,
80 blockShape,
81 crops,
82 expectedOutputValues);
83}
84
85// SpaceToBatchND Operator
86void SpaceToBatchNDFp32Test(std::vector<armnn::BackendId>& backends)
87{
88 std::vector<int32_t> inputShape { 1, 2, 2, 1 };
89 std::vector<int32_t> expectedOutputShape { 4, 1, 1, 1 };
90
91 std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f };
92 std::vector<float> expectedOutputValues { 1.0f, 2.0f, 3.0f, 4.0f };
93
94 std::vector<unsigned int> blockShape({2, 2});
95 std::vector<std::pair<unsigned int, unsigned int>> padding = {{0, 0}, {0, 0}};
96
97 BatchSpaceTest<float>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND,
98 ::tflite::TensorType_FLOAT32,
99 backends,
100 inputShape,
101 expectedOutputShape,
102 inputValues,
103 blockShape,
104 padding,
105 expectedOutputValues);
106}
107
108void SpaceToBatchNDFp32PaddingTest(std::vector<armnn::BackendId>& backends)
109{
110 std::vector<int32_t> inputShape { 2, 2, 4, 1 };
111 std::vector<int32_t> expectedOutputShape { 8, 1, 3, 1 };
112
113 std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f,
114 5.0f, 6.0f, 7.0f, 8.0f,
115 9.0f, 10.0f, 11.0f, 12.0f,
116 13.0f, 14.0f, 15.0f, 16.0f };
117
118 std::vector<float> expectedOutputValues { 0.0f, 1.0f, 3.0f, 0.0f, 9.0f, 11.0f,
119 0.0f, 2.0f, 4.0f, 0.0f, 10.0f, 12.0f,
120 0.0f, 5.0f, 7.0f, 0.0f, 13.0f, 15.0f,
121 0.0f, 6.0f, 8.0f, 0.0f, 14.0f, 16.0f };
122
123 std::vector<unsigned int> blockShape({2, 2});
124 std::vector<std::pair<unsigned int, unsigned int>> padding = {{0, 0}, {2, 0}};
125
126 BatchSpaceTest<float>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND,
127 ::tflite::TensorType_FLOAT32,
128 backends,
129 inputShape,
130 expectedOutputShape,
131 inputValues,
132 blockShape,
133 padding,
134 expectedOutputValues);
135}
136
137void SpaceToBatchNDUint8Test(std::vector<armnn::BackendId>& backends)
138{
139 std::vector<int32_t> inputShape { 1, 2, 2, 3 };
140 std::vector<int32_t> expectedOutputShape { 4, 1, 1, 3 };
141
142 std::vector<uint8_t> inputValues { 1, 2, 3, 4, 5, 6, 7 };
143 std::vector<uint8_t> expectedOutputValues { 1, 2, 3, 4, 5, 6, 7 };
144
145 std::vector<unsigned int> blockShape({2, 2});
146 std::vector<std::pair<unsigned int, unsigned int>> padding = {{0, 0}, {0, 0}};
147
148 BatchSpaceTest<uint8_t>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND,
149 ::tflite::TensorType_UINT8,
150 backends,
151 inputShape,
152 expectedOutputShape,
153 inputValues,
154 blockShape,
155 padding,
156 expectedOutputValues);
157}
158
159// BatchToSpaceND Tests
160TEST_SUITE("BatchToSpaceND_CpuAccTests")
161{
162
163TEST_CASE ("BatchToSpaceND_Fp32_CpuAcc_Test")
164{
165 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
166 BatchToSpaceNDFp32Test(backends);
167}
168
169TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_CpuAcc_Test")
170{
171 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
172 BatchToSpaceNDFp32BatchOneTest(backends);
173}
174
175TEST_CASE ("BatchToSpaceND_Uint8_CpuAcc_Test")
176{
177 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
178 BatchToSpaceNDUint8Test(backends);
179}
180
181}
182
183TEST_SUITE("BatchToSpaceND_GpuAccTests")
184{
185
186TEST_CASE ("BatchToSpaceND_Fp32_GpuAcc_Test")
187{
188 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
189 BatchToSpaceNDFp32Test(backends);
190}
191
192TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_GpuAcc_Test")
193{
194 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
195 BatchToSpaceNDFp32BatchOneTest(backends);
196}
197
198TEST_CASE ("BatchToSpaceND_Uint8_GpuAcc_Test")
199{
200 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
201 BatchToSpaceNDUint8Test(backends);
202}
203
204}
205
206TEST_SUITE("BatchToSpaceND_CpuRefTests")
207{
208
209TEST_CASE ("BatchToSpaceND_Fp32_CpuRef_Test")
210{
211 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
212 BatchToSpaceNDFp32Test(backends);
213}
214
215TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_CpuRef_Test")
216{
217 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
218 BatchToSpaceNDFp32BatchOneTest(backends);
219}
220
221TEST_CASE ("BatchToSpaceND_Uint8_CpuRef_Test")
222{
223 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
224 BatchToSpaceNDUint8Test(backends);
225}
226
227}
228
229// SpaceToBatchND Tests
230TEST_SUITE("SpaceToBatchND_CpuAccTests")
231{
232
233TEST_CASE ("SpaceToBatchND_Fp32_CpuAcc_Test")
234{
235 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
236 SpaceToBatchNDFp32Test(backends);
237}
238
239TEST_CASE ("SpaceToBatchND_Fp32_Padding_CpuAcc_Test")
240{
241 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
242 SpaceToBatchNDFp32PaddingTest(backends);
243}
244
245TEST_CASE ("SpaceToBatchND_Uint8_CpuAcc_Test")
246{
247 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
248 SpaceToBatchNDUint8Test(backends);
249}
250
251}
252
253TEST_SUITE("SpaceToBatchND_GpuAccTests")
254{
255
256TEST_CASE ("SpaceToBatchND_Fp32_GpuAcc_Test")
257{
258 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
259 SpaceToBatchNDFp32Test(backends);
260}
261
262TEST_CASE ("SpaceToBatchND_Fp32_Padding_GpuAcc_Test")
263{
264 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
265 SpaceToBatchNDFp32PaddingTest(backends);
266}
267
268TEST_CASE ("SpaceToBatchND_Uint8_GpuAcc_Test")
269{
270 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
271 SpaceToBatchNDUint8Test(backends);
272}
273
274}
275
276TEST_SUITE("SpaceToBatchND_CpuRefTests")
277{
278
279TEST_CASE ("SpaceToBatchND_Fp32_CpuRef_Test")
280{
281 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
282 SpaceToBatchNDFp32Test(backends);
283}
284
285TEST_CASE ("SpaceToBatchND_Fp32_Padding_CpuRef_Test")
286{
287 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
288 SpaceToBatchNDFp32PaddingTest(backends);
289}
290
291TEST_CASE ("SpaceToBatchND_Uint8_CpuRef_Test")
292{
293 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
294 SpaceToBatchNDUint8Test(backends);
295}
296
297}
298
299} // namespace armnnDelegate