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review.mlplatform.org / ml / armnn / 03bf98a8bc51ad20eef4b9ca5fbf6ce15e063721 / . / delegate / src / test / PackTest.cpp
blob: aea903bcd0a153c9f333fa4d6b3fef7881e86649 [file] [log] [blame]
Matthew Sloyana7a12f52021-05-06 10:05:28 +0100[diff] [blame]1//
2// Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
3// SPDX-License-Identifier: MIT
4//
5
6#include "PackTestHelper.hpp"
7
8#include <armnn_delegate.hpp>
9
10#include <flatbuffers/flatbuffers.h>
11#include <tensorflow/lite/schema/schema_generated.h>
12
13#include <doctest/doctest.h>
14
15namespace armnnDelegate
16{
17
18template <typename T>
19void PackFp32Axis0Test(tflite::TensorType tensorType, std::vector<armnn::BackendId>& backends)
20{
21 std::vector<int32_t> inputShape { 3, 2, 3 };
22 std::vector<int32_t> expectedOutputShape { 2, 3, 2, 3 };
23
24 std::vector<std::vector<T>> inputValues;
25 inputValues.push_back(
26 {
27 1, 2, 3,
28 4, 5, 6,
29
30 7, 8, 9,
31 10, 11, 12,
32
33 13, 14, 15,
34 16, 17, 18
35 });
36
37 inputValues.push_back(
38 {
39 19, 20, 21,
40 22, 23, 24,
41
42 25, 26, 27,
43 28, 29, 30,
44
45 31, 32, 33,
46 34, 35, 36
47 });
48
49 std::vector<T> expectedOutputValues =
50 {
51 1, 2, 3,
52 4, 5, 6,
53
54 7, 8, 9,
55 10, 11, 12,
56
57 13, 14, 15,
58 16, 17, 18,
59
60
61 19, 20, 21,
62 22, 23, 24,
63
64 25, 26, 27,
65 28, 29, 30,
66
67 31, 32, 33,
68 34, 35, 36
69 };
70
71 PackTest<T>(tflite::BuiltinOperator_PACK,
72 tensorType,
73 backends,
74 inputShape,
75 expectedOutputShape,
76 inputValues,
77 expectedOutputValues,
78 0);
79}
80
81template <typename T>
82void PackFp32Axis1Test(tflite::TensorType tensorType, std::vector<armnn::BackendId>& backends)
83{
84 std::vector<int32_t> inputShape { 3, 2, 3 };
85 std::vector<int32_t> expectedOutputShape { 3, 2, 2, 3 };
86
87 std::vector<std::vector<T>> inputValues;
88 inputValues.push_back(
89 {
90 1, 2, 3,
91 4, 5, 6,
92
93 7, 8, 9,
94 10, 11, 12,
95
96 13, 14, 15,
97 16, 17, 18
98 });
99
100 inputValues.push_back(
101 {
102 19, 20, 21,
103 22, 23, 24,
104
105 25, 26, 27,
106 28, 29, 30,
107
108 31, 32, 33,
109 34, 35, 36
110 });
111
112 std::vector<T> expectedOutputValues =
113 {
114 1, 2, 3,
115 4, 5, 6,
116
117 19, 20, 21,
118 22, 23, 24,
119
120
121 7, 8, 9,
122 10, 11, 12,
123
124 25, 26, 27,
125 28, 29, 30,
126
127
128 13, 14, 15,
129 16, 17, 18,
130
131 31, 32, 33,
132 34, 35, 36
133 };
134
135 PackTest<T>(tflite::BuiltinOperator_PACK,
136 tensorType,
137 backends,
138 inputShape,
139 expectedOutputShape,
140 inputValues,
141 expectedOutputValues,
142 1);
143}
144
145template <typename T>
146void PackFp32Axis2Test(tflite::TensorType tensorType, std::vector<armnn::BackendId>& backends)
147{
148 std::vector<int32_t> inputShape { 3, 2, 3 };
149 std::vector<int32_t> expectedOutputShape { 3, 2, 2, 3 };
150
151 std::vector<std::vector<T>> inputValues;
152 inputValues.push_back(
153 {
154 1, 2, 3,
155 4, 5, 6,
156
157 7, 8, 9,
158 10, 11, 12,
159
160 13, 14, 15,
161 16, 17, 18
162 });
163
164 inputValues.push_back(
165 {
166 19, 20, 21,
167 22, 23, 24,
168
169 25, 26, 27,
170 28, 29, 30,
171
172 31, 32, 33,
173 34, 35, 36
174 });
175
176 std::vector<float> expectedOutputValues =
177 {
178 1, 2, 3,
179 19, 20, 21,
180
181 4, 5, 6,
182 22, 23, 24,
183
184 7, 8, 9,
185 25, 26, 27,
186
187 10, 11, 12,
188 28, 29, 30,
189
190 13, 14, 15,
191 31, 32, 33,
192
193 16, 17, 18,
194 34, 35, 36
195 };
196
197 PackTest<T>(tflite::BuiltinOperator_PACK,
198 tensorType,
199 backends,
200 inputShape,
201 expectedOutputShape,
202 inputValues,
203 expectedOutputValues,
204 2);
205}
206
207template <typename T>
208void PackFp32Axis3Test(tflite::TensorType tensorType, std::vector<armnn::BackendId>& backends)
209{
210 std::vector<int32_t> inputShape { 3, 2, 3 };
211 std::vector<int32_t> expectedOutputShape { 3, 2, 3, 2 };
212
213 std::vector<std::vector<T>> inputValues;
214 inputValues.push_back(
215 {
216 1, 2, 3,
217 4, 5, 6,
218
219 7, 8, 9,
220 10, 11, 12,
221
222 13, 14, 15,
223 16, 17, 18
224 });
225
226 inputValues.push_back(
227 {
228 19, 20, 21,
229 22, 23, 24,
230
231 25, 26, 27,
232 28, 29, 30,
233
234 31, 32, 33,
235 34, 35, 36
236 });
237
238 std::vector<T> expectedOutputValues =
239 {
240 1, 19,
241 2, 20,
242 3, 21,
243
244 4, 22,
245 5, 23,
246 6, 24,
247
248
249 7, 25,
250 8, 26,
251 9, 27,
252
253 10, 28,
254 11, 29,
255 12, 30,
256
257
258 13, 31,
259 14, 32,
260 15, 33,
261
262 16, 34,
263 17, 35,
264 18, 36
265 };
266
267 PackTest<T>(tflite::BuiltinOperator_PACK,
268 tflite::TensorType_FLOAT32,
269 backends,
270 inputShape,
271 expectedOutputShape,
272 inputValues,
273 expectedOutputValues,
274 3);
275}
276
277template <typename T>
278void PackFp32Inputs3Test(tflite::TensorType tensorType, std::vector<armnn::BackendId>& backends)
279{
280 std::vector<int32_t> inputShape { 3, 3 };
281 std::vector<int32_t> expectedOutputShape { 3, 3, 3 };
282
283 std::vector<std::vector<T>> inputValues;
284 inputValues.push_back(
285 {
286 1, 2, 3,
287 4, 5, 6,
288 7, 8, 9
289 });
290
291 inputValues.push_back(
292 {
293 10, 11, 12,
294 13, 14, 15,
295 16, 17, 18
296 });
297
298 inputValues.push_back(
299 {
300 19, 20, 21,
301 22, 23, 24,
302 25, 26, 27
303 });
304
305 std::vector<T> expectedOutputValues =
306 {
307 1, 2, 3,
308 10, 11, 12,
309 19, 20, 21,
310
311 4, 5, 6,
312 13, 14, 15,
313 22, 23, 24,
314
315 7, 8, 9,
316 16, 17, 18,
317 25, 26, 27
318 };
319
320 PackTest<T>(tflite::BuiltinOperator_PACK,
321 tensorType,
322 backends,
323 inputShape,
324 expectedOutputShape,
325 inputValues,
326 expectedOutputValues,
327 1);
328}
329
330TEST_SUITE("Pack_CpuAccTests")
331{
332
333// Fp32
334TEST_CASE ("Pack_Fp32_Axis0_CpuAcc_Test")
335{
336 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
337 PackFp32Axis0Test<float>(tflite::TensorType_FLOAT32, backends);
338}
339
340TEST_CASE ("Pack_Fp32_Axis1_CpuAcc_Test")
341{
342 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
343 PackFp32Axis1Test<float>(tflite::TensorType_FLOAT32, backends);
344}
345
346TEST_CASE ("Pack_Fp32_Axis2_CpuAcc_Test")
347{
348 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
349 PackFp32Axis2Test<float>(tflite::TensorType_FLOAT32, backends);
350}
351
352TEST_CASE ("Pack_Fp32_Axis3_CpuAcc_Test")
353{
354 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
355 PackFp32Axis3Test<float>(tflite::TensorType_FLOAT32, backends);
356}
357
358TEST_CASE ("Pack_Fp32_Inputs3_CpuAcc_Test")
359{
360 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
361 PackFp32Inputs3Test<float>(tflite::TensorType_FLOAT32, backends);
362}
363
364// Uint8
365TEST_CASE ("Pack_Uint8_Axis0_CpuAcc_Test")
366{
367 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
368 PackFp32Axis0Test<uint8_t>(tflite::TensorType_UINT8, backends);
369}
370
371TEST_CASE ("Pack_Uint8_Inputs3_CpuAcc_Test")
372{
373 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
374 PackFp32Inputs3Test<uint8_t>(tflite::TensorType_UINT8, backends);
375}
376
377// Uint8
378TEST_CASE ("Pack_Int8_Axis0_CpuAcc_Test")
379{
380 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
381 PackFp32Axis0Test<int8_t>(tflite::TensorType_INT8, backends);
382}
383
384TEST_CASE ("Pack_Int8_Inputs3_CpuAcc_Test")
385{
386 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc};
387 PackFp32Inputs3Test<int8_t>(tflite::TensorType_INT8, backends);
388}
389
390}
391
392TEST_SUITE("Pack_GpuAccTests")
393{
394
395// Fp32
396TEST_CASE ("Pack_Fp32_Axis0_GpuAcc_Test")
397{
398 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
399 PackFp32Axis0Test<float>(tflite::TensorType_FLOAT32, backends);
400}
401
402TEST_CASE ("Pack_Fp32_Axis1_GpuAcc_Test")
403{
404 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
405 PackFp32Axis1Test<float>(tflite::TensorType_FLOAT32, backends);
406}
407
408TEST_CASE ("Pack_Fp32_Axis2_GpuAcc_Test")
409{
410 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
411 PackFp32Axis2Test<float>(tflite::TensorType_FLOAT32, backends);
412}
413
414TEST_CASE ("Pack_Fp32_Axis3_GpuAcc_Test")
415{
416 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
417 PackFp32Axis3Test<float>(tflite::TensorType_FLOAT32, backends);
418}
419
420TEST_CASE ("Pack_Fp32_Inputs3_GpuAcc_Test")
421{
422 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
423 PackFp32Inputs3Test<float>(tflite::TensorType_FLOAT32, backends);
424}
425
426// Uint8
427TEST_CASE ("Pack_Uint8_Axis0_GpuAcc_Test")
428{
429 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
430 PackFp32Axis0Test<uint8_t>(tflite::TensorType_UINT8, backends);
431}
432
433TEST_CASE ("Pack_Uint8_Inputs3_GpuAcc_Test")
434{
435 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
436 PackFp32Inputs3Test<uint8_t>(tflite::TensorType_UINT8, backends);
437}
438
439// Int8
440TEST_CASE ("Pack_Int8_Axis0_GpuAcc_Test")
441{
442 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
443 PackFp32Axis0Test<int8_t>(tflite::TensorType_INT8, backends);
444}
445
446TEST_CASE ("Pack_Int8_Inputs3_GpuAcc_Test")
447{
448 std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc};
449 PackFp32Inputs3Test<int8_t>(tflite::TensorType_INT8, backends);
450}
451
452}
453
454TEST_SUITE("Pack_CpuRefTests")
455{
456
457// Fp32
458TEST_CASE ("Pack_Fp32_Axis0_CpuRef_Test")
459{
460 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
461 PackFp32Axis0Test<float>(tflite::TensorType_FLOAT32, backends);
462}
463
464TEST_CASE ("Pack_Fp32_Axis1_CpuRef_Test")
465{
466 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
467 PackFp32Axis1Test<float>(tflite::TensorType_FLOAT32, backends);
468}
469
470TEST_CASE ("Pack_Fp32_Axis2_CpuRef_Test")
471{
472 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
473 PackFp32Axis2Test<float>(tflite::TensorType_FLOAT32, backends);
474}
475
476TEST_CASE ("Pack_Fp32_Axis3_CpuRef_Test")
477{
478 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
479 PackFp32Axis3Test<float>(tflite::TensorType_FLOAT32, backends);
480}
481
482TEST_CASE ("Pack_Fp32_Inputs3_CpuRef_Test")
483{
484 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
485 PackFp32Inputs3Test<float>(tflite::TensorType_FLOAT32, backends);
486}
487
488// Uint8
489TEST_CASE ("Pack_Uint8_Axis0_CpuRef_Test")
490{
491 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
492 PackFp32Axis0Test<uint8_t>(tflite::TensorType_UINT8, backends);
493}
494
495TEST_CASE ("Pack_Uint8_Inputs3_CpuRef_Test")
496{
497 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
498 PackFp32Inputs3Test<uint8_t>(tflite::TensorType_UINT8, backends);
499}
500
501// Int8
502TEST_CASE ("Pack_Int8_Axis0_CpuRef_Test")
503{
504 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
505 PackFp32Axis0Test<int8_t>(tflite::TensorType_INT8, backends);
506}
507
508TEST_CASE ("Pack_Int8_Inputs3_CpuRef_Test")
509{
510 std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef};
511 PackFp32Inputs3Test<int8_t>(tflite::TensorType_INT8, backends);
512}
513
514}
515
516} // namespace armnnDelegate