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telsoa014fcda012018-03-09 14:13:49 +00001//
Tianle Cheng21a9f332023-11-09 13:56:53 +00002// Copyright © 2017-2023 Arm Ltd. All rights reserved.
David Beckecb56cd2018-09-05 12:52:57 +01003// SPDX-License-Identifier: MIT
telsoa014fcda012018-03-09 14:13:49 +00004//
5#pragma once
6
telsoa014fcda012018-03-09 14:13:49 +00007#include <armnn/Descriptors.hpp>
Aron Virginas-Tar5c3e9232018-11-16 11:00:48 +00008#include <armnn/Tensor.hpp>
Narumol Prangnawaratac2770a2020-04-01 16:51:23 +01009#include <armnn/utility/Assert.hpp>
Matthew Sloyan5fc0fd62021-05-03 12:22:03 +010010#include <armnn/utility/NumericCast.hpp>
Colm Donelan0c479742021-12-10 12:43:54 +000011#include <armnn/backends/WorkloadData.hpp>
Mike Kelly363b5722023-10-11 14:25:50 +010012#include <armnnUtils/TensorUtils.hpp>
telsoa014fcda012018-03-09 14:13:49 +000013
Teresa Charlinec5f7d12021-10-22 17:15:00 +010014#include <arm_compute/runtime/FunctionDescriptors.h>
Nikhil Raj038f52b2023-07-31 10:06:32 +010015#include <arm_compute/function_info/FullyConnectedLayerInfo.h>
telsoa014fcda012018-03-09 14:13:49 +000016
Matthew Sloyan5fc0fd62021-05-03 12:22:03 +010017#if defined(ARMCOMPUTENEON_ENABLED)
18#include "neon/workloads/NeonReduceWorkload.hpp"
19#endif
20
21#if defined(ARMCOMPUTECL_ENABLED)
22#include "cl/workloads/ClReduceWorkload.hpp"
23#endif
24
telsoa014fcda012018-03-09 14:13:49 +000025namespace armnn
26{
27
28inline arm_compute::NormalizationLayerInfo
Matteo Martincigh539b44d2018-10-01 09:26:39 +010029CreateAclNormalizationLayerInfoForL2Normalization(const armnn::TensorInfo& tensorInfo,
30 armnn::DataLayout dataLayout)
telsoa014fcda012018-03-09 14:13:49 +000031{
Matteo Martincigh539b44d2018-10-01 09:26:39 +010032 unsigned int depthDimension = dataLayout == armnn::DataLayout::NCHW ? 1 : 3;
33 const unsigned int depth = tensorInfo.GetShape()[depthDimension];
telsoa014fcda012018-03-09 14:13:49 +000034
35 // At the time of writing, {CL|Neon}L2Normalization performs the reduction only along dimension 0. This version of
36 // L2 Normalization always performs the reduction along the depth axis, though. Thus, we repurpose
37 // {CL|Neon}NormalizationLayers to act as depthwise L2 normalizations by carefully chosing the normalization
38 // parameters.
39 //
40 // Please refer to both the reference implementation of the normalization layer and the implementation of
41 // {CL|Neon}NormalizationLayer when checking the derivations for the parameter values below.
42
43 // Make sure normalization covers the entire depth range. ACL requires the normalization size to be odd.
44 // CL: This does not result in extra kernel threads not doing any work: See usage of the RADIUS parameter in
45 // ACL's normalization_layer_cross_map() CL function.
46 const uint32_t normSize = depth * 2u + 1u;
47
48 // See ACL's NormalizationLayerInfo::scale_coeff() definition.
49 // For the reference implementation, to make alpha_ become 1, we'd have to use alpha = normSize instead.
50 const float alpha = 1.0f;
51
telsoa01c577f2c2018-08-31 09:22:23 +010052 // Don't offset the reduction.
telsoa014fcda012018-03-09 14:13:49 +000053 const float kappa = 0.0f;
54
55 // pow(reduction, -0.5) = 1 / sqrt(reduction)
56 const float beta = 0.5f;
57
58 return arm_compute::NormalizationLayerInfo(arm_compute::NormType::CROSS_MAP, normSize, alpha, beta, kappa, false);
59}
60
61inline arm_compute::ActivationLayerInfo::ActivationFunction
62ConvertActivationFunctionToAclActivationFunction(ActivationFunction armnnFunction)
63{
64 using AclActivationFunction = arm_compute::ActivationLayerInfo::ActivationFunction;
65
66 switch (armnnFunction)
67 {
68 case ActivationFunction::Linear: return AclActivationFunction::LINEAR;
telsoa01c577f2c2018-08-31 09:22:23 +010069 // Arm compute's 'logistic' function is non-parameterized, so it is exactly a sigmoid function.
telsoa014fcda012018-03-09 14:13:49 +000070 case ActivationFunction::Sigmoid: return AclActivationFunction::LOGISTIC;
71 case ActivationFunction::ReLu: return AclActivationFunction::RELU;
72 case ActivationFunction::BoundedReLu: return AclActivationFunction::LU_BOUNDED_RELU;
73 case ActivationFunction::SoftReLu: return AclActivationFunction::SOFT_RELU;
74 case ActivationFunction::LeakyReLu: return AclActivationFunction::LEAKY_RELU;
75 case ActivationFunction::Abs: return AclActivationFunction::ABS;
76 case ActivationFunction::Sqrt: return AclActivationFunction::SQRT;
77 case ActivationFunction::Square: return AclActivationFunction::SQUARE;
78 case ActivationFunction::TanH: return AclActivationFunction::TANH;
David Monahan3b3c3812020-02-25 09:03:29 +000079 case ActivationFunction::Elu: return AclActivationFunction::ELU;
Jan Eilersa83af7b2020-03-18 15:58:11 +000080 case ActivationFunction::HardSwish: return AclActivationFunction::HARD_SWISH;
Teresa Charlin077cddb2023-09-15 15:19:21 +010081 case ActivationFunction::Gelu: return AclActivationFunction::GELU;
telsoa014fcda012018-03-09 14:13:49 +000082 default: throw InvalidArgumentException("Unsupported activation function");
83 }
84}
85
86inline arm_compute::ActivationLayerInfo
87ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor& actDesc)
88{
89 return arm_compute::ActivationLayerInfo(ConvertActivationFunctionToAclActivationFunction(actDesc.m_Function),
90 actDesc.m_A, actDesc.m_B);
91}
92
Mike Kelly07810fc2020-11-12 10:58:48 +000093inline arm_compute::ActivationLayerInfo
94ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor* activationDescPtr)
95{
96 if (activationDescPtr != nullptr)
97 {
98 return ConvertActivationDescriptorToAclActivationLayerInfo(static_cast<ActivationDescriptor>(
99 *activationDescPtr));
100 }
101 return arm_compute::ActivationLayerInfo();
102}
103
104inline arm_compute::ActivationLayerInfo
105ConvertAdditionalInfoToAclActivationLayerInfo(const QueueDescriptor& queueDescriptor)
106{
107 const ActivationDescriptor* activationDescPtr = queueDescriptor.GetAdditionalInformation<ActivationDescriptor>();
108
109 if (activationDescPtr != nullptr)
110 {
111 return ConvertActivationDescriptorToAclActivationLayerInfo(static_cast<ActivationDescriptor>(
112 *activationDescPtr));
113 }
114 return arm_compute::ActivationLayerInfo();
115}
116
Cathal Corbettfd5bec42022-03-03 15:13:23 +0000117inline arm_compute::ActivationLayerInfo
118ConvertLstmActivationFuncToAclLayerInfo(uint32_t activationFunction)
119{
120 // For preparing the object for the class ActivationLayerInfo, we need to consider 5 situations.
121 switch (activationFunction)
122 {
123 case 0:
124 return arm_compute::ActivationLayerInfo(); // no activation, do nothing
125 case 1:
126 return arm_compute::ActivationLayerInfo(arm_compute::ActivationLayerInfo::ActivationFunction::RELU);
127 case 3:
128 return arm_compute::ActivationLayerInfo(
129 arm_compute::ActivationLayerInfo::ActivationFunction::BOUNDED_RELU, 6.0);
130 case 4:
131 return arm_compute::ActivationLayerInfo(
132 arm_compute::ActivationLayerInfo::ActivationFunction::TANH, 1.0, 1.0);
133 case 6:
134 return arm_compute::ActivationLayerInfo(
135 arm_compute::ActivationLayerInfo::ActivationFunction::LOGISTIC);
136 default:
137 throw armnn::Exception("Wrong Type of Activation Function!");
138 }
139}
140
Teresa Charlin2b030d92020-03-27 16:40:56 +0000141inline arm_compute::ComparisonOperation ConvertComparisonOperationToAcl(const ComparisonDescriptor& descriptor)
142{
143 switch (descriptor.m_Operation)
144 {
145 case ComparisonOperation::Greater: return arm_compute::ComparisonOperation::Greater;
146 case ComparisonOperation::GreaterOrEqual: return arm_compute::ComparisonOperation::GreaterEqual;
147 case ComparisonOperation::Less: return arm_compute::ComparisonOperation::Less;
148 case ComparisonOperation::LessOrEqual: return arm_compute::ComparisonOperation::LessEqual;
149 case ComparisonOperation::Equal: return arm_compute::ComparisonOperation::Equal;
150 case ComparisonOperation::NotEqual: return arm_compute::ComparisonOperation::NotEqual;
151 default: throw InvalidArgumentException("Unsupported comparison function");
152 }
153}
154
telsoa014fcda012018-03-09 14:13:49 +0000155inline arm_compute::PoolingType ConvertPoolingAlgorithmToAclPoolingType(PoolingAlgorithm poolingAlgorithm)
156{
157 using arm_compute::PoolingType;
158
159 switch (poolingAlgorithm)
160 {
161 case PoolingAlgorithm::Max: return PoolingType::MAX;
162 case PoolingAlgorithm::Average: return PoolingType::AVG;
163 case PoolingAlgorithm::L2: return PoolingType::L2;
164 default: throw InvalidArgumentException("Unsupported pooling algorithm");
165 }
166}
167
168inline arm_compute::DimensionRoundingType ConvertOutputShapeRoundingToAclDimensionRoundingType(OutputShapeRounding
169 rounding)
170{
171 using arm_compute::DimensionRoundingType;
172
173 switch (rounding)
174 {
175 case OutputShapeRounding::Ceiling: return DimensionRoundingType::CEIL;
176 case OutputShapeRounding::Floor: return DimensionRoundingType::FLOOR;
177 default: throw InvalidArgumentException("Unsupported Output Shape Rounding type");
178 }
179}
180
181inline arm_compute::NormType
182ConvertNormalizationAlgorithmChannelToAclNormType(NormalizationAlgorithmChannel channelType)
183{
184 using arm_compute::NormType;
185 switch (channelType)
186 {
187 case NormalizationAlgorithmChannel::Across: return NormType::CROSS_MAP;
188 case NormalizationAlgorithmChannel::Within: return NormType::IN_MAP_2D;
189 default: throw InvalidArgumentException("Unsupported normalization algorithm channel type");
190 }
191}
192
telsoa01c577f2c2018-08-31 09:22:23 +0100193inline arm_compute::FullyConnectedLayerInfo
Mike Kelly07810fc2020-11-12 10:58:48 +0000194ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo(const FullyConnectedDescriptor& fullyConnectedDesc,
195 const ActivationDescriptor* activationDesc)
telsoa01c577f2c2018-08-31 09:22:23 +0100196{
197 arm_compute::FullyConnectedLayerInfo fc_info;
198 fc_info.transpose_weights = fullyConnectedDesc.m_TransposeWeightMatrix;
Mike Kelly07810fc2020-11-12 10:58:48 +0000199 fc_info.activation_info = ConvertActivationDescriptorToAclActivationLayerInfo(activationDesc);
200 return fc_info;
201}
202
203inline arm_compute::FullyConnectedLayerInfo
204ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo(const FullyConnectedDescriptor& fullyConnectedDesc,
205 arm_compute::ActivationLayerInfo activationLayerInfo)
206{
207 arm_compute::FullyConnectedLayerInfo fc_info;
208 fc_info.transpose_weights = fullyConnectedDesc.m_TransposeWeightMatrix;
209 fc_info.activation_info = activationLayerInfo;
telsoa01c577f2c2018-08-31 09:22:23 +0100210 return fc_info;
211}
212
Aron Virginas-Tarcc0cefb2019-07-02 17:25:47 +0100213inline arm_compute::InterpolationPolicy ConvertResizeMethodToAclInterpolationPolicy(ResizeMethod resizeMethod)
214{
215 switch (resizeMethod)
216 {
217 case ResizeMethod::Bilinear:
218 return arm_compute::InterpolationPolicy::BILINEAR;
219 case ResizeMethod::NearestNeighbor:
220 return arm_compute::InterpolationPolicy::NEAREST_NEIGHBOR;
221 default:
222 throw InvalidArgumentException("Unsupported resize method");
223 }
224}
225
Teresa Charlinc1f6b092020-05-11 16:10:38 +0100226template<typename T>
227inline T ComputeSoftmaxAclAxis(const SoftmaxDescriptor& softmaxDesc, const armnn::TensorInfo& tensor)
Narumol Prangnawarat65d30962019-03-14 11:55:03 +0000228{
David Monahan9b14bfc2020-06-30 15:57:56 +0100229 // Detect the Android default value of -1 and return the ACL default value of 0.
Colm Donelanc3c5fc22019-08-15 16:03:17 +0100230 if (softmaxDesc.m_Axis == -1)
231 {
David Monahan9b14bfc2020-06-30 15:57:56 +0100232 return 0;
Colm Donelanc3c5fc22019-08-15 16:03:17 +0100233 }
234
David Monahan9b14bfc2020-06-30 15:57:56 +0100235 unsigned int dim = tensor.GetNumDimensions();
Narumol Prangnawarat65d30962019-03-14 11:55:03 +0000236
Narumol Prangnawaratac2770a2020-04-01 16:51:23 +0100237 ARMNN_ASSERT(dim != 0);
Narumol Prangnawarat65d30962019-03-14 11:55:03 +0000238
239 // Currently ArmNN support axis 1.
David Monahan9b14bfc2020-06-30 15:57:56 +0100240 auto aclAxis = (static_cast<T>(dim) - 1);
241 aclAxis = aclAxis > 0 ? aclAxis -1 : aclAxis;
242
243 return aclAxis;
Narumol Prangnawarat65d30962019-03-14 11:55:03 +0000244}
245
Narumol Prangnawarat15eb5832019-05-20 15:31:05 +0100246inline std::set<unsigned int> ComputeSplitAxis(const armnn::SplitterDescriptor& desc, const TensorShape& input)
247{
248 unsigned int numSplit = desc.GetNumViews();
249 unsigned int numDimensions = desc.GetNumDimensions();
250 std::set<unsigned int> splitAxis;
251
Mike Kelly363b5722023-10-11 14:25:50 +0100252 if (desc.HasAxis())
Narumol Prangnawarat15eb5832019-05-20 15:31:05 +0100253 {
Mike Kelly363b5722023-10-11 14:25:50 +0100254 splitAxis.insert(armnnUtils::GetUnsignedAxis(desc.GetNumDimensions(), desc.GetAxis()));
255 }
256 else
257 {
258 for (unsigned int i = 0; i < numSplit; ++i)
Narumol Prangnawarat15eb5832019-05-20 15:31:05 +0100259 {
Mike Kelly363b5722023-10-11 14:25:50 +0100260 for (unsigned int dimIdx = 0; dimIdx < numDimensions; ++dimIdx)
Narumol Prangnawarat15eb5832019-05-20 15:31:05 +0100261 {
Mike Kelly363b5722023-10-11 14:25:50 +0100262 if (desc.GetViewSizes(i)[dimIdx] != input[dimIdx])
263 {
264 splitAxis.insert(dimIdx);
265 }
Narumol Prangnawarat15eb5832019-05-20 15:31:05 +0100266 }
267 }
268 }
269 return splitAxis;
270}
271
Teresa Charlin7ac3ca62020-07-28 15:17:12 +0100272/// Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank, rank)
Teresa Charlinf540eb82020-04-10 19:24:55 +0100273inline int ComputeAclAxis(const int& armnnAxis, const armnn::TensorInfo& tensor)
274{
Teresa Charlin7ac3ca62020-07-28 15:17:12 +0100275 int rank = static_cast<int>(tensor.GetNumDimensions());
Teresa Charlinf540eb82020-04-10 19:24:55 +0100276
Teresa Charlin7ac3ca62020-07-28 15:17:12 +0100277 ARMNN_ASSERT(rank != 0);
278 ARMNN_ASSERT((-1 * rank) <= armnnAxis);
279 ARMNN_ASSERT(armnnAxis < rank);
Teresa Charlinf540eb82020-04-10 19:24:55 +0100280
281 int sign = (armnnAxis < 0) ? -1 : 1;
Teresa Charlin7ac3ca62020-07-28 15:17:12 +0100282 int aclAxis = sign * rank - 1 - armnnAxis;
Teresa Charlinf540eb82020-04-10 19:24:55 +0100283
284 return aclAxis;
285}
286
Teresa Charlinec5f7d12021-10-22 17:15:00 +0100287/// Utility function used to setup an arm_compute::Conv3dInfo object from convolution3d descriptor.
288inline arm_compute::Conv3dInfo ComputeConv3DInfo(const armnn::Convolution3dDescriptor descriptor,
289 bool isFastMathEnabled,
290 const ActivationDescriptor* activationDescriptor)
291{
292 const arm_compute::Size3D stride{descriptor.m_StrideX, descriptor.m_StrideY, descriptor.m_StrideZ};
293 const arm_compute::Padding3D padding{descriptor.m_PadLeft, descriptor.m_PadRight,
294 descriptor.m_PadTop, descriptor.m_PadBottom,
295 descriptor.m_PadFront, descriptor.m_PadBack};
296 const arm_compute::Size3D dilation{descriptor.m_DilationX, descriptor.m_DilationY, descriptor.m_DilationZ};
297
298 const arm_compute::ActivationLayerInfo activationInfo =
299 ConvertActivationDescriptorToAclActivationLayerInfo(activationDescriptor);
300 const auto roundType = arm_compute::DimensionRoundingType::FLOOR;
301
302 return arm_compute::Conv3dInfo{stride, padding, activationInfo, dilation, roundType, isFastMathEnabled};
303}
304
305inline arm_compute::Conv3dInfo ComputeConv3DInfo(const armnn::Convolution3dQueueDescriptor queueDescriptor,
306 bool isFastMathEnabled)
307{
308 auto descriptor = queueDescriptor.m_Parameters;
309 const arm_compute::Size3D stride{descriptor.m_StrideX, descriptor.m_StrideY, descriptor.m_StrideZ};
310 const arm_compute::Padding3D padding{descriptor.m_PadLeft, descriptor.m_PadRight,
311 descriptor.m_PadTop, descriptor.m_PadBottom,
312 descriptor.m_PadFront, descriptor.m_PadBack};
313 const arm_compute::Size3D dilation{descriptor.m_DilationX, descriptor.m_DilationY, descriptor.m_DilationZ};
314
315 const arm_compute::ActivationLayerInfo activationInfo =
316 ConvertAdditionalInfoToAclActivationLayerInfo(queueDescriptor);
317 const auto roundType = arm_compute::DimensionRoundingType::FLOOR;
318
319 return arm_compute::Conv3dInfo{stride, padding, activationInfo, dilation, roundType, isFastMathEnabled};
320}
321
Matthew Sloyan2e5d0b22021-10-21 14:05:31 +0100322inline arm_compute::PaddingMode ConvertPaddingModeToAcl(const PaddingMode& paddingMode)
323{
324 switch (paddingMode)
325 {
326 case PaddingMode::Constant: return arm_compute::PaddingMode::CONSTANT;
327 case PaddingMode::Reflect: return arm_compute::PaddingMode::REFLECT;
328 case PaddingMode::Symmetric: return arm_compute::PaddingMode::SYMMETRIC;
329 default: throw InvalidArgumentException("Unsupported Padding Mode");
330 }
331}
332
Sadik Armagana2747482021-02-09 10:28:54 +0000333inline arm_compute::ReductionOperation ConvertReductionOperationToAcl(const ReduceDescriptor& descriptor)
334{
335 switch (descriptor.m_ReduceOperation)
336 {
337 case ReduceOperation::Sum: return arm_compute::ReductionOperation::SUM;
338 case ReduceOperation::Mean: return arm_compute::ReductionOperation::MEAN_SUM;
339 case ReduceOperation::Max: return arm_compute::ReductionOperation::MAX;
340 case ReduceOperation::Min: return arm_compute::ReductionOperation::MIN;
Teresa Charlin4e3e8312021-08-05 12:34:37 +0100341 case ReduceOperation::Prod: return arm_compute::ReductionOperation::PROD;
342 default: throw InvalidArgumentException("Unsupported Reduction operation");
Sadik Armagana2747482021-02-09 10:28:54 +0000343 }
344}
345
Matthew Sloyan5fc0fd62021-05-03 12:22:03 +0100346/// Function to compute the output tensor shape based on the axes and if keepDims is set.
347inline const TensorInfo ComputeReductionTensorShape(const armnn::TensorInfo& input,
348 const std::vector<uint32_t>& vAxis,
349 const bool keepDims)
350{
351 auto reducedTensorInfo = input;
352 unsigned int rank = reducedTensorInfo.GetNumDimensions();
353 unsigned int outputRank = 0;
354 // Calculate output dimension
355 if (keepDims)
356 {
357 outputRank = rank;
358 }
359 else if (vAxis.empty())
360 {
361 outputRank = 1;
362 }
363 else if (vAxis.size() > reducedTensorInfo.GetNumDimensions())
364 {
365 throw LayerValidationException("ReduceLayer: Dimensions to reduce can not be bigger than input dimensions");
366 }
367 else
368 {
369 outputRank = reducedTensorInfo.GetNumDimensions() - armnn::numeric_cast<unsigned int>(vAxis.size());
370 if (outputRank == 0)
371 {
372 outputRank = 1;
373 }
374 }
375 std::vector<unsigned int> dimSizes(outputRank, 1);
376 if (!vAxis.empty())
377 {
378 // Skip the dimension that has been reduced unless keepDims is true.
379 unsigned int outputIndex = 0;
380 for (unsigned int i = 0; i < reducedTensorInfo.GetNumDimensions(); ++i)
381 {
382 if (std::find(vAxis.begin(), vAxis.end(), i) == vAxis.end())
383 {
384 dimSizes[outputIndex] = armnn::numeric_cast<unsigned int>(reducedTensorInfo.GetShape()[i]);
385 ++outputIndex;
386 }
387 else if (keepDims)
388 {
389 dimSizes[outputIndex] = 1;
390 ++outputIndex;
391 }
392 }
393 }
394 const TensorShape inferredShape = TensorShape(outputRank, dimSizes.data());
395 reducedTensorInfo.SetShape(inferredShape);
396 return reducedTensorInfo;
397}
398
399/// Macro function check if layer with multiple axes is supported on each backend
400#define IS_MULTI_AXES_REDUCE_SUPPORTED(func, input, desc, status) \
401 armnn::TensorInfo inputTensorInfo = input; \
402 unsigned int recalulatedAxis = 0; \
403 std::vector<uint32_t> axes; \
404 \
405 for (unsigned int i = 0; i != desc.m_vAxis.size(); ++i) \
406 { \
407 axes.emplace_back(desc.m_vAxis[i]); \
408 \
409 const armnn::TensorInfo& reducedTensorInfo = \
410 ComputeReductionTensorShape(input, axes, desc.m_KeepDims); \
411 \
412 std::vector<uint32_t> singleAxis(1, desc.m_vAxis[i] - recalulatedAxis); \
413 \
414 armnn::ReduceDescriptor newReduceDescriptor = desc; \
415 newReduceDescriptor.m_vAxis.assign(singleAxis.begin(), singleAxis.end()); \
416 \
417 status = func(inputTensorInfo, reducedTensorInfo, newReduceDescriptor); \
418 if (!status) \
419 { \
420 break; \
421 } \
422 \
423 if (!desc.m_KeepDims) \
424 { \
425 recalulatedAxis++; \
426 } \
427 \
428 inputTensorInfo = reducedTensorInfo; \
429 }
430
Aron Virginas-Tar5c3e9232018-11-16 11:00:48 +0000431} // namespace armnn