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Mike Kelly9b398322019-05-22 17:21:49 +01001//
2// Copyright © 2017 Arm Ltd. All rights reserved.
3// SPDX-License-Identifier: MIT
4//
5
6#pragma once
7
Finn Williams73c547d2022-02-15 20:47:34 +00008#include "RefBaseWorkload.hpp"
Colm Donelan0c479742021-12-10 12:43:54 +00009#include <armnn/backends/WorkloadData.hpp>
Mike Kelly9b398322019-05-22 17:21:49 +010010#include "Decoders.hpp"
11#include "Encoders.hpp"
12
13namespace armnn
14{
15
Finn Williams73c547d2022-02-15 20:47:34 +000016class RefConvolution2dWorkload : public RefBaseWorkload<Convolution2dQueueDescriptor>
Mike Kelly9b398322019-05-22 17:21:49 +010017{
18public:
19 explicit RefConvolution2dWorkload(const Convolution2dQueueDescriptor& descriptor,
20 const WorkloadInfo& info);
21
Keith Davis2cddc722022-04-07 11:32:00 +010022 void PostAllocationConfigure() override;
Mike Kelly9b398322019-05-22 17:21:49 +010023
Finn Williamsb8181f72021-04-07 10:23:21 +010024 void Execute() const override;
25 void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override;
Mike Kelly9b398322019-05-22 17:21:49 +010026
27private:
Keith Davis2cddc722022-04-07 11:32:00 +010028 void PostAllocationConfigure(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs);
Finn Williamsb8181f72021-04-07 10:23:21 +010029 void Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const;
Mike Kelly9b398322019-05-22 17:21:49 +010030
Mike Kelly9b398322019-05-22 17:21:49 +010031 std::unique_ptr<Decoder<float>> m_FilterDecoder;
32 std::unique_ptr<Decoder<float>> m_BiasDecoder;
33
Keith Davis2cddc722022-04-07 11:32:00 +010034 TensorShape m_InputShape;
35 TensorShape m_OutputShape;
Mike Kelly9b398322019-05-22 17:21:49 +010036 TensorShape m_FilterShape;
37};
38
Keith Davis2cddc722022-04-07 11:32:00 +010039} //namespace armnn