| Nattapat Chaimanowong | 4e6597a | 2018-12-20 14:14:06 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "NeonMaximumWorkload.hpp" |
| 7 | #include <aclCommon/ArmComputeTensorUtils.hpp> |
| 8 | #include <backendsCommon/CpuTensorHandle.hpp> |
| 9 | |
| 10 | namespace armnn |
| 11 | { |
| 12 | |
| 13 | arm_compute::Status NeonMaximumWorkloadValidate(const TensorInfo& input0, |
| 14 | const TensorInfo& input1, |
| 15 | const TensorInfo& output) |
| 16 | { |
| 17 | const arm_compute::TensorInfo aclInput0 = armcomputetensorutils::BuildArmComputeTensorInfo(input0); |
| 18 | const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input1); |
| 19 | const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output); |
| 20 | |
| 21 | return arm_compute::NEElementwiseMax::validate(&aclInput0, |
| 22 | &aclInput1, |
| 23 | &aclOutput); |
| 24 | } |
| 25 | |
| 26 | NeonMaximumWorkload::NeonMaximumWorkload(const MaximumQueueDescriptor& descriptor, |
| 27 | const WorkloadInfo& info) |
| 28 | : BaseWorkload<MaximumQueueDescriptor>(descriptor, info) |
| 29 | { |
| 30 | m_Data.ValidateInputsOutputs("NeonMaximumWorkload", 2, 1); |
| 31 | |
| 32 | arm_compute::ITensor& input0 = boost::polymorphic_downcast<INeonTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); |
| 33 | arm_compute::ITensor& input1 = boost::polymorphic_downcast<INeonTensorHandle*>(m_Data.m_Inputs[1])->GetTensor(); |
| 34 | arm_compute::ITensor& output = boost::polymorphic_downcast<INeonTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); |
| 35 | |
| 36 | m_MaxLayer.configure(&input0, &input1, &output); |
| 37 | } |
| 38 | |
| 39 | void NeonMaximumWorkload::Execute() const |
| 40 | { |
| 41 | ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonMaximumWorkload_Execute"); |
| 42 | m_MaxLayer.run(); |
| 43 | } |
| 44 | |
| 45 | } //namespace armnn |