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telsoa014fcda012018-03-09 14:13:49 +00001//
2// Copyright © 2017 Arm Ltd. All rights reserved.
David Beckecb56cd2018-09-05 12:52:57 +01003// SPDX-License-Identifier: MIT
telsoa014fcda012018-03-09 14:13:49 +00004//
5#pragma once
6
Aron Virginas-Tarc9cc8042018-11-01 16:15:57 +00007#include "CpuTensorHandleFwd.hpp"
telsoa014fcda012018-03-09 14:13:49 +00008#include "WorkloadDataFwd.hpp"
9
Aron Virginas-Tarc9cc8042018-11-01 16:15:57 +000010#include <InternalTypes.hpp>
11
David Beck0dbe0ee2018-09-24 15:59:27 +010012#include <armnn/Descriptors.hpp>
13#include <armnn/Exceptions.hpp>
Aron Virginas-Tarc9cc8042018-11-01 16:15:57 +000014#include <armnn/Types.hpp>
15#include <armnn/Tensor.hpp>
David Beck0dbe0ee2018-09-24 15:59:27 +010016
Aron Virginas-Tarc9cc8042018-11-01 16:15:57 +000017#include <backendsCommon/OutputHandler.hpp>
18#include <backendsCommon/WorkloadInfo.hpp>
telsoa014fcda012018-03-09 14:13:49 +000019
20namespace armnn
21{
22
telsoa01c577f2c2018-08-31 09:22:23 +010023//A helper function that returns the bias data type required for given input data type.
telsoa014fcda012018-03-09 14:13:49 +000024DataType GetBiasDataType(DataType inputDataType);
25
26struct WorkloadInfo;
27
28struct QueueDescriptor
29{
30 std::vector<ITensorHandle*> m_Inputs;
31 std::vector<ITensorHandle*> m_Outputs;
32
33 void ValidateInputsOutputs(const std::string& descName,
34 unsigned int numExpectedIn, unsigned int numExpectedOut) const;
35
36
37protected:
38 ~QueueDescriptor() = default;
39 QueueDescriptor() = default;
40 QueueDescriptor(QueueDescriptor const&) = default;
41 QueueDescriptor& operator=(QueueDescriptor const&) = default;
42};
43
telsoa01c577f2c2018-08-31 09:22:23 +010044// Base class for queue descriptors which contain parameters.
telsoa014fcda012018-03-09 14:13:49 +000045template <typename LayerDescriptor>
46struct QueueDescriptorWithParameters : public QueueDescriptor
47{
48 LayerDescriptor m_Parameters;
49
50protected:
51 ~QueueDescriptorWithParameters() = default;
52 QueueDescriptorWithParameters() = default;
53 QueueDescriptorWithParameters(QueueDescriptorWithParameters const&) = default;
54 QueueDescriptorWithParameters& operator=(QueueDescriptorWithParameters const&) = default;
55};
56
57struct MemCopyQueueDescriptor : QueueDescriptor
58{
59 void Validate(const WorkloadInfo& workloadInfo) const;
60};
61
62using InputQueueDescriptor = MemCopyQueueDescriptor;
63using OutputQueueDescriptor = MemCopyQueueDescriptor;
64
telsoa01c577f2c2018-08-31 09:22:23 +010065// Softmax layer workload data.
telsoa014fcda012018-03-09 14:13:49 +000066struct SoftmaxQueueDescriptor : QueueDescriptorWithParameters<SoftmaxDescriptor>
67{
68 void Validate(const WorkloadInfo& workloadInfo) const;
69};
70
telsoa01c577f2c2018-08-31 09:22:23 +010071// Splitter layer workload data.
telsoa014fcda012018-03-09 14:13:49 +000072struct SplitterQueueDescriptor : QueueDescriptorWithParameters<ViewsDescriptor>
73{
74 struct ViewOrigin
75 {
76 ViewOrigin() {}
77 ViewOrigin(std::vector<unsigned int> const& origin) : m_Origin(origin) {}
78
telsoa01c577f2c2018-08-31 09:22:23 +010079 //View origin (size of the vector is the same as number of dimensions of the view).
telsoa014fcda012018-03-09 14:13:49 +000080 std::vector<unsigned int> m_Origin;
81 };
82
telsoa01c577f2c2018-08-31 09:22:23 +010083 //View defines a tensor that will be carved from the input tensor.
84 //View origins are stored here, the extents are defined by sizes of the output tensors.
telsoa014fcda012018-03-09 14:13:49 +000085 std::vector<ViewOrigin> m_ViewOrigins;
86
87 void Validate(const WorkloadInfo& workloadInfo) const;
88};
89
telsoa01c577f2c2018-08-31 09:22:23 +010090// Merger layer workload data.
telsoa014fcda012018-03-09 14:13:49 +000091struct MergerQueueDescriptor : QueueDescriptorWithParameters<OriginsDescriptor>
92{
93 struct ViewOrigin
94 {
95 ViewOrigin() {}
96 ViewOrigin(const std::vector<unsigned int>& origin) : m_Origin(origin) {}
97
telsoa01c577f2c2018-08-31 09:22:23 +010098 //View origin (size of the vector is the same as number of dimensions of the view).
telsoa014fcda012018-03-09 14:13:49 +000099 std::vector<unsigned int> m_Origin;
100 };
101
telsoa01c577f2c2018-08-31 09:22:23 +0100102 //View defines a sub-area of the output tensor that will be filled with the corresponding input tensor.
103 //View origins are stored here, the extents are defined by sizes of the input tensors.
telsoa014fcda012018-03-09 14:13:49 +0000104 std::vector<ViewOrigin> m_ViewOrigins;
105
106 void Validate(const WorkloadInfo& workloadInfo) const;
107};
108
telsoa01c577f2c2018-08-31 09:22:23 +0100109// Activation layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000110struct ActivationQueueDescriptor : QueueDescriptorWithParameters<ActivationDescriptor>
111{
112 void Validate(const WorkloadInfo& workloadInfo) const;
113};
114
telsoa01c577f2c2018-08-31 09:22:23 +0100115// Fully connected layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000116struct FullyConnectedQueueDescriptor : QueueDescriptorWithParameters<FullyConnectedDescriptor>
117{
118 FullyConnectedQueueDescriptor()
119 : m_Weight(nullptr)
120 , m_Bias(nullptr)
121 {
122 }
123
124 const ConstCpuTensorHandle* m_Weight;
125 const ConstCpuTensorHandle* m_Bias;
126
127 void Validate(const WorkloadInfo& workloadInfo) const;
128};
129
telsoa01c577f2c2018-08-31 09:22:23 +0100130// Permute layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000131struct PermuteQueueDescriptor : QueueDescriptorWithParameters<PermuteDescriptor>
132{
133 void Validate(const WorkloadInfo& workloadInfo) const;
134};
135
telsoa01c577f2c2018-08-31 09:22:23 +0100136// Pooling 2D layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000137struct Pooling2dQueueDescriptor : QueueDescriptorWithParameters<Pooling2dDescriptor>
138{
139 void Validate(const WorkloadInfo& workloadInfo) const;
140};
141
telsoa01c577f2c2018-08-31 09:22:23 +0100142// Convolution 2D layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000143struct Convolution2dQueueDescriptor : QueueDescriptorWithParameters<Convolution2dDescriptor>
144{
145 Convolution2dQueueDescriptor()
146 : m_Weight(nullptr)
147 , m_Bias(nullptr)
148 {
149 }
150
151 const ConstCpuTensorHandle* m_Weight;
152 const ConstCpuTensorHandle* m_Bias;
153
154 void Validate(const WorkloadInfo& workloadInfo) const;
155};
156
telsoa01c577f2c2018-08-31 09:22:23 +0100157// Depthwise Convolution 2D layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000158struct DepthwiseConvolution2dQueueDescriptor : QueueDescriptorWithParameters<DepthwiseConvolution2dDescriptor>
159{
160 DepthwiseConvolution2dQueueDescriptor()
161 : m_Weight(nullptr)
162 , m_Bias(nullptr)
163 {
164 }
165
166 const ConstCpuTensorHandle* m_Weight;
167 const ConstCpuTensorHandle* m_Bias;
168
169 void Validate(const WorkloadInfo& workloadInfo) const;
170};
171
telsoa01c577f2c2018-08-31 09:22:23 +0100172// Normalization layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000173struct NormalizationQueueDescriptor : QueueDescriptorWithParameters<NormalizationDescriptor>
174{
175 void Validate(const WorkloadInfo& workloadInfo) const;
176};
177
telsoa01c577f2c2018-08-31 09:22:23 +0100178// Add layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000179struct AdditionQueueDescriptor : QueueDescriptor
180{
181 void Validate(const WorkloadInfo& workloadInfo) const;
182};
183
telsoa01c577f2c2018-08-31 09:22:23 +0100184// Multiplication layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000185struct MultiplicationQueueDescriptor : QueueDescriptor
186{
187 void Validate(const WorkloadInfo& workloadInfo) const;
188};
189
Francis Murtaghe7a86a42018-08-29 12:42:10 +0100190// Division layer workload data.
191struct DivisionQueueDescriptor : QueueDescriptor
192{
193 void Validate(const WorkloadInfo& workloadInfo) const;
194};
195
David Beckc2044fe2018-09-05 15:00:38 +0100196// Subtraction layer workload data.
197struct SubtractionQueueDescriptor : QueueDescriptor
198{
199 void Validate(const WorkloadInfo& workloadInfo) const;
200};
201
narpra01a6bf9122018-09-10 09:50:09 +0100202// Mean layer workload data.
narpra0132b90462018-09-13 11:07:48 +0100203struct MeanQueueDescriptor : QueueDescriptorWithParameters<MeanDescriptor>
narpra01a6bf9122018-09-10 09:50:09 +0100204{
205 void Validate(const WorkloadInfo& workloadInfo) const;
206};
207
jimfly012c9322a2018-09-19 10:59:49 +0100208// Pad layer workload data
209struct PadQueueDescriptor : QueueDescriptorWithParameters<PadDescriptor>
210{
211 void Validate(const WorkloadInfo& workloadInfo) const;
212};
213
telsoa01c577f2c2018-08-31 09:22:23 +0100214// Batch norm layer workload data.
telsoa014fcda012018-03-09 14:13:49 +0000215struct BatchNormalizationQueueDescriptor : QueueDescriptorWithParameters<BatchNormalizationDescriptor>
216{
217 BatchNormalizationQueueDescriptor()
218 : m_Mean(nullptr)
219 , m_Variance(nullptr)
220 , m_Beta(nullptr)
221 , m_Gamma(nullptr)
222 {
223 }
224
225 const ConstCpuTensorHandle* m_Mean;
226 const ConstCpuTensorHandle* m_Variance;
227 const ConstCpuTensorHandle* m_Beta;
228 const ConstCpuTensorHandle* m_Gamma;
229
230 void Validate(const WorkloadInfo& workloadInfo) const;
231};
232
233struct ResizeBilinearQueueDescriptor : QueueDescriptorWithParameters<ResizeBilinearDescriptor>
234{
235 void Validate(const WorkloadInfo& workloadInfo) const;
236};
237
238struct FakeQuantizationQueueDescriptor : QueueDescriptorWithParameters<FakeQuantizationDescriptor>
239{
240 FakeQuantizationQueueDescriptor()
241 : m_Min(nullptr)
242 , m_Max(nullptr)
243 {
244 }
245
246 const ConstCpuTensorHandle* m_Min;
247 const ConstCpuTensorHandle* m_Max;
248
249 void Validate(const WorkloadInfo& workloadInfo) const;
250};
251
Matteo Martincighbcd3c852018-09-28 14:14:12 +0100252struct L2NormalizationQueueDescriptor : QueueDescriptorWithParameters<L2NormalizationDescriptor>
telsoa014fcda012018-03-09 14:13:49 +0000253{
254 void Validate(const WorkloadInfo& workloadInfo) const;
255};
256
257struct ConstantQueueDescriptor : QueueDescriptor
258{
259 ConstantQueueDescriptor()
260 : m_LayerOutput(nullptr)
261 {
262 }
263
264 const ConstCpuTensorHandle* m_LayerOutput;
265
266 void Validate(const WorkloadInfo& workloadInfo) const;
267};
268
269struct ReshapeQueueDescriptor : QueueDescriptorWithParameters<ReshapeDescriptor>
270{
271 void Validate(const WorkloadInfo& workloadInfo) const;
272};
273
Nattapat Chaimanowong207ef9a2018-11-02 10:57:25 +0000274struct SpaceToBatchNdQueueDescriptor : QueueDescriptorWithParameters<SpaceToBatchNdDescriptor>
275{
276 void Validate(const WorkloadInfo& workloadInfo) const;
277};
278
telsoa014fcda012018-03-09 14:13:49 +0000279struct FloorQueueDescriptor : QueueDescriptor
280{
281 void Validate(const WorkloadInfo& workloadInfo) const;
282};
283
telsoa01c577f2c2018-08-31 09:22:23 +0100284struct LstmQueueDescriptor : QueueDescriptorWithParameters<LstmDescriptor>
285{
286 LstmQueueDescriptor()
287 : m_InputToInputWeights(nullptr)
288 , m_InputToForgetWeights(nullptr)
289 , m_InputToCellWeights(nullptr)
290 , m_InputToOutputWeights(nullptr)
291 , m_RecurrentToInputWeights(nullptr)
292 , m_RecurrentToForgetWeights(nullptr)
293 , m_RecurrentToCellWeights(nullptr)
294 , m_RecurrentToOutputWeights(nullptr)
295 , m_CellToInputWeights(nullptr)
296 , m_CellToForgetWeights(nullptr)
297 , m_CellToOutputWeights(nullptr)
298 , m_InputGateBias(nullptr)
299 , m_ForgetGateBias(nullptr)
300 , m_CellBias(nullptr)
301 , m_OutputGateBias(nullptr)
302 , m_ProjectionWeights(nullptr)
303 , m_ProjectionBias(nullptr)
304 {
305 }
306
307 const ConstCpuTensorHandle* m_InputToInputWeights;
308 const ConstCpuTensorHandle* m_InputToForgetWeights;
309 const ConstCpuTensorHandle* m_InputToCellWeights;
310 const ConstCpuTensorHandle* m_InputToOutputWeights;
311 const ConstCpuTensorHandle* m_RecurrentToInputWeights;
312 const ConstCpuTensorHandle* m_RecurrentToForgetWeights;
313 const ConstCpuTensorHandle* m_RecurrentToCellWeights;
314 const ConstCpuTensorHandle* m_RecurrentToOutputWeights;
315 const ConstCpuTensorHandle* m_CellToInputWeights;
316 const ConstCpuTensorHandle* m_CellToForgetWeights;
317 const ConstCpuTensorHandle* m_CellToOutputWeights;
318 const ConstCpuTensorHandle* m_InputGateBias;
319 const ConstCpuTensorHandle* m_ForgetGateBias;
320 const ConstCpuTensorHandle* m_CellBias;
321 const ConstCpuTensorHandle* m_OutputGateBias;
322 const ConstCpuTensorHandle* m_ProjectionWeights;
323 const ConstCpuTensorHandle* m_ProjectionBias;
324
325 void Validate(const WorkloadInfo& workloadInfo) const;
326};
327
328struct ConvertFp16ToFp32QueueDescriptor : QueueDescriptor
329{
330 void Validate(const WorkloadInfo& workloadInfo) const;
331};
332
333struct ConvertFp32ToFp16QueueDescriptor : QueueDescriptor
334{
335 void Validate(const WorkloadInfo& workloadInfo) const;
336};
337
Éanna Ó Catháin4e1e1362018-11-12 11:36:34 +0000338struct BatchToSpaceNdQueueDescriptor : QueueDescriptorWithParameters<BatchToSpaceNdDescriptor>
339{
340 void Validate(const WorkloadInfo& workloadInfo) const;
341};
telsoa014fcda012018-03-09 14:13:49 +0000342} //namespace armnn