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Narumol Prangnawarat867eba52020-02-03 12:29:56 +00001//
Mike Kelly386ff1a2021-03-29 15:04:50 +01002// Copyright © 2020 Arm Ltd and Contributors. All rights reserved.
Narumol Prangnawarat867eba52020-02-03 12:29:56 +00003// SPDX-License-Identifier: MIT
4//
5#pragma once
6
7#include <armnn/Types.hpp>
8
9namespace armnn
10{
11
Mike Kelly386ff1a2021-03-29 15:04:50 +010012namespace experimental
13{
14
15struct WorkingMemDescriptor;
16
17} // end experimental namespace
18
19using namespace armnn::experimental;
20
Narumol Prangnawarat867eba52020-02-03 12:29:56 +000021/// Workload interface to enqueue a layer computation.
22class IWorkload {
23public:
24 virtual ~IWorkload() {}
25
26 virtual void PostAllocationConfigure() = 0;
27
28 virtual void Execute() const = 0;
29
Mike Kelly386ff1a2021-03-29 15:04:50 +010030 virtual void ExecuteAsync(WorkingMemDescriptor& desc) = 0;
31
Cathal Corbett5aa9fd72022-02-25 15:33:28 +000032 virtual arm::pipe::ProfilingGuid GetGuid() const = 0;
Narumol Prangnawarat867eba52020-02-03 12:29:56 +000033
Finn Williams73c547d2022-02-15 20:47:34 +000034 // SupportsTensorHandleReplacement signals that a given workload is capable of
35 // replacing any of its I/O tensors via ReplaceInput/OutputTensorHandle
36 virtual bool SupportsTensorHandleReplacement() const = 0;
37
Teresa Charlin788e2a62022-01-17 21:19:52 +000038 // Replace input tensor handle with the given TensorHandle
39 virtual void ReplaceInputTensorHandle(ITensorHandle* /*input*/, unsigned int /*slot*/) = 0;
40
41 // Replace output tensor handle with the given TensorHandle
42 virtual void ReplaceOutputTensorHandle(ITensorHandle* /*output*/, unsigned int /*slot*/) = 0;
43
Mike Kelly386ff1a2021-03-29 15:04:50 +010044 virtual void RegisterDebugCallback(const DebugCallbackFunction& /*func*/) {}
Narumol Prangnawarat867eba52020-02-03 12:29:56 +000045};
46
47} //namespace armnn