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Narumol Prangnawarat50c87d32020-11-09 18:42:11 +00001//
Teresa Charlinad1b3d72023-03-14 12:10:28 +00002// Copyright © 2020, 2023 Arm Ltd and Contributors. All rights reserved.
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +00003// SPDX-License-Identifier: MIT
4//
5
6#include "Pooling2dTestHelper.hpp"
7
8#include <armnn_delegate.hpp>
9
10#include <flatbuffers/flatbuffers.h>
11#include <tensorflow/lite/interpreter.h>
12#include <tensorflow/lite/kernels/register.h>
13#include <tensorflow/lite/model.h>
Teresa Charlinad1b3d72023-03-14 12:10:28 +000014#include <schema_generated.h>
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +000015#include <tensorflow/lite/version.h>
16
17#include <doctest/doctest.h>
18
19namespace armnnDelegate
20{
21
22void MaxPool2dFP32PaddingValidTest(std::vector<armnn::BackendId>& backends)
23{
24 // Set input data
25 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
26 std::vector<int32_t> outputShape { 1, 1, 2, 1 };
27
28 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
29 8.0f, 12.0f, -15.0f, 2.0f,
30 3.0f, -4.0f, -1.0f, -11.0f };
31
32 std::vector<float> expectedOutputValues = { 12.0f, 7.0f };
33
34 Pooling2dTest<float>(tflite::BuiltinOperator_MAX_POOL_2D,
35 ::tflite::TensorType_FLOAT32,
36 backends,
37 inputShape,
38 outputShape,
39 inputValues,
40 expectedOutputValues,
41 ::tflite::Padding_VALID,
42 2,
43 2,
44 2,
45 2);
46}
47
48void MaxPool2dInt8PaddingValidTest(std::vector<armnn::BackendId>& backends)
49{
50 // Set input data
51 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
52 std::vector<int32_t> outputShape { 1, 1, 2, 1 };
53
54 std::vector<int8_t > inputValues = { -5, 8, -10, 7,
55 8, 12, -15, 2,
56 3, -4, -1, -11 };
57
58 std::vector<int8_t> expectedOutputValues = { 12, 7 };
59
60 Pooling2dTest<int8_t>(tflite::BuiltinOperator_MAX_POOL_2D,
61 ::tflite::TensorType_INT8,
62 backends,
63 inputShape,
64 outputShape,
65 inputValues,
66 expectedOutputValues,
67 ::tflite::Padding_VALID,
68 2,
69 2,
70 2,
71 2,
72 tflite::ActivationFunctionType_NONE,
73 2.5f,
74 1);
75}
76
77void MaxPool2dFP32PaddingSameTest(std::vector<armnn::BackendId>& backends)
78{
79 // Set input data
80 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
81 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
82
83 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
84 8.0f, 12.0f, -15.0f, 2.0f,
85 3.0f, -4.0f, -1.0f, -11.0f };
86
87 std::vector<float> expectedOutputValues = { 12.0f, 7.0f, 3.0f, -1.0f };
88
89 Pooling2dTest<float>(tflite::BuiltinOperator_MAX_POOL_2D,
90 ::tflite::TensorType_FLOAT32,
91 backends,
92 inputShape,
93 outputShape,
94 inputValues,
95 expectedOutputValues,
96 ::tflite::Padding_SAME,
97 2,
98 2,
99 2,
100 2);
101}
102
103void MaxPool2dInt8PaddingSameTest(std::vector<armnn::BackendId>& backends)
104{
105 // Set input data
106 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
107 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
108
109 std::vector<int8_t> inputValues = { -5, 8, -10, 7,
110 8, 12, -15, 2,
111 3, -4, -1, -11 };
112
113 std::vector<int8_t> expectedOutputValues = { 12, 7, 3, -1 };
114
115 Pooling2dTest<int8_t>(tflite::BuiltinOperator_MAX_POOL_2D,
116 ::tflite::TensorType_INT8,
117 backends,
118 inputShape,
119 outputShape,
120 inputValues,
121 expectedOutputValues,
122 ::tflite::Padding_SAME,
123 2,
124 2,
125 2,
126 2,
127 tflite::ActivationFunctionType_NONE,
128 2.5f,
129 1);
130}
131
132void MaxPool2dFP32ReluTest(std::vector<armnn::BackendId>& backends)
133{
134 // Set input data
135 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
136 std::vector<int32_t> outputShape { 1, 2, 3, 1 };
137
138 std::vector<float> inputValues = { -5.0f, -8.0f, -10.0f, 7.0f,
139 -8.0f, -12.0f, -15.0f, 2.0f,
140 3.0f, -4.0f, -1.0f, -11.0f };
141
142 std::vector<float> expectedOutputValues = { 0.0f, 0.0f, 7.0f, 3.0f, 0.0f, 2.0f };
143
144 Pooling2dTest<float>(tflite::BuiltinOperator_MAX_POOL_2D,
145 ::tflite::TensorType_FLOAT32,
146 backends,
147 inputShape,
148 outputShape,
149 inputValues,
150 expectedOutputValues,
151 ::tflite::Padding_VALID,
152 1,
153 1,
154 2,
155 2,
156 ::tflite::ActivationFunctionType_RELU);
157}
158
159void MaxPool2dInt8ReluTest(std::vector<armnn::BackendId>& backends)
160{
161 // Set input data
162 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
163 std::vector<int32_t> outputShape { 1, 2, 3, 1 };
164
165 std::vector<int8_t> inputValues = { -5, -8, -10, 7,
166 -8, -12, -15, 2,
167 3, -4, -1, -11 };
168
169 std::vector<int8_t> expectedOutputValues = { 1, 1, 7, 3, 1, 2 };
170
171 Pooling2dTest<int8_t>(tflite::BuiltinOperator_MAX_POOL_2D,
172 ::tflite::TensorType_INT8,
173 backends,
174 inputShape,
175 outputShape,
176 inputValues,
177 expectedOutputValues,
178 ::tflite::Padding_VALID,
179 1,
180 1,
181 2,
182 2,
183 ::tflite::ActivationFunctionType_RELU,
184 2.0f,
185 1);
186}
187
188void MaxPool2dFP32Relu6Test(std::vector<armnn::BackendId>& backends)
189{
190 // Set input data
191 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
192 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
193
194 std::vector<float> inputValues = { -5.0f, -8.0f, -10.0f, 7.0f,
195 -8.0f, -12.0f, -15.0f, 2.0f,
196 3.0f, -4.0f, -1.0f, -11.0f };
197
198 std::vector<float> expectedOutputValues = { 0.0f, 0.0f, 3.0f, 0.0f };
199
200 Pooling2dTest<float>(tflite::BuiltinOperator_MAX_POOL_2D,
201 ::tflite::TensorType_FLOAT32,
202 backends,
203 inputShape,
204 outputShape,
205 inputValues,
206 expectedOutputValues,
207 ::tflite::Padding_SAME,
208 2,
209 2,
210 1,
211 1,
212 ::tflite::ActivationFunctionType_RELU6);
213}
214
215void MaxPool2dInt8Relu6Test(std::vector<armnn::BackendId>& backends)
216{
217 // Set input data
218 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
219 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
220
221 std::vector<int8_t> inputValues = { -5, -8, -10, 7,
222 -8, -12, -15, 2,
223 3, -4, -1, -11 };
224
225 std::vector<int8_t> expectedOutputValues = { 1, 1, 3, 1 };
226
227 Pooling2dTest<int8_t>(tflite::BuiltinOperator_MAX_POOL_2D,
228 ::tflite::TensorType_INT8,
229 backends,
230 inputShape,
231 outputShape,
232 inputValues,
233 expectedOutputValues,
234 ::tflite::Padding_SAME,
235 2,
236 2,
237 1,
238 1,
239 ::tflite::ActivationFunctionType_RELU6,
240 2.0f,
241 1);
242}
243
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000244void MaxPool2dUint8PaddingSameTest(std::vector<armnn::BackendId>& backends)
245{
246 // Set input data
247 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
248 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
249
250 std::vector<uint8_t> inputValues = { 5, 8, 10, 7,
251 8, 12, 15, 2,
252 3, 4, 1, 11 };
253
254 std::vector<uint8_t> expectedOutputValues = { 12, 15, 4, 11 };
255
256 Pooling2dTest<uint8_t>(tflite::BuiltinOperator_MAX_POOL_2D,
257 ::tflite::TensorType_UINT8,
258 backends,
259 inputShape,
260 outputShape,
261 inputValues,
262 expectedOutputValues,
263 ::tflite::Padding_SAME,
264 2,
265 2,
266 2,
267 2,
268 tflite::ActivationFunctionType_NONE,
269 2.5f,
270 1);
271}
272
273void MaxPool2dUint8ReluTest(std::vector<armnn::BackendId>& backends)
274{
275 // Set input data
276 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
277 std::vector<int32_t> outputShape { 1, 2, 3, 1 };
278
279 std::vector<uint8_t> inputValues = { 12, 8, 10, 15,
280 8, 5, 7, 2,
281 3, 4, 1, 11 };
282
283 std::vector<uint8_t> expectedOutputValues = { 12, 10, 15, 8, 7, 11 };
284
285 Pooling2dTest<uint8_t>(tflite::BuiltinOperator_MAX_POOL_2D,
286 ::tflite::TensorType_UINT8,
287 backends,
288 inputShape,
289 outputShape,
290 inputValues,
291 expectedOutputValues,
292 ::tflite::Padding_VALID,
293 1,
294 1,
295 2,
296 2,
297 ::tflite::ActivationFunctionType_RELU,
298 2.0f,
299 1);
300}
301
302void MaxPool2dInt16PaddingSameTest(std::vector<armnn::BackendId>& backends)
303{
304 // Set input data
305 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
306 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
307
308 std::vector<int16_t> inputValues = { -5, 8, -10, 7,
309 8, 12, -15, 2,
310 3, -4, -1, -11 };
311
312 std::vector<int16_t> expectedOutputValues = { 12, 7, 3, -1 };
313
314 Pooling2dTest<int16_t>(tflite::BuiltinOperator_MAX_POOL_2D,
315 ::tflite::TensorType_INT16,
316 backends,
317 inputShape,
318 outputShape,
319 inputValues,
320 expectedOutputValues,
321 ::tflite::Padding_SAME,
322 2,
323 2,
324 2,
325 2,
326 tflite::ActivationFunctionType_NONE,
327 2.5f,
328 0);
329}
330
331void MaxPool2dInt16ReluTest(std::vector<armnn::BackendId>& backends)
332{
333 // Set input data
334 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
335 std::vector<int32_t> outputShape { 1, 2, 3, 1 };
336
337 std::vector<int16_t> inputValues = { -5, -8, -10, 7,
338 -8, -12, -15, 2,
339 3, -4, -1, -11 };
340
341 std::vector<int16_t> expectedOutputValues = { 0, 0, 7, 3, 0, 2 };
342
343 Pooling2dTest<int16_t>(tflite::BuiltinOperator_MAX_POOL_2D,
344 ::tflite::TensorType_INT16,
345 backends,
346 inputShape,
347 outputShape,
348 inputValues,
349 expectedOutputValues,
350 ::tflite::Padding_VALID,
351 1,
352 1,
353 2,
354 2,
355 ::tflite::ActivationFunctionType_RELU,
356 2.0f,
357 0);
358}
359
360void AveragePool2dFP32PaddingValidTest(std::vector<armnn::BackendId>& backends)
361{
362 // Set input data
363 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
364 std::vector<int32_t> outputShape { 1, 1, 2, 1 };
365
366 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
367 8.0f, 12.0f, -15.0f, 2.0f,
368 3.0f, -4.0f, -1.0f, -11.0f };
369
370 std::vector<float> expectedOutputValues = { 5.75f, -4.0f };
371
372 Pooling2dTest<float>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
373 ::tflite::TensorType_FLOAT32,
374 backends,
375 inputShape,
376 outputShape,
377 inputValues,
378 expectedOutputValues,
379 ::tflite::Padding_VALID,
380 2,
381 2,
382 2,
383 2);
384}
385
386void AveragePool2dInt8PaddingValidTest(std::vector<armnn::BackendId>& backends)
387{
388 // Set input data
389 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
390 std::vector<int32_t> outputShape { 1, 1, 2, 1 };
391
392 std::vector<int8_t > inputValues = { -5, 8, -10, 7,
393 8, 12, -15, 2,
394 3, -4, -1, -11 };
395
396 std::vector<int8_t> expectedOutputValues = { 6, -4 };
397
398 Pooling2dTest<int8_t>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
399 ::tflite::TensorType_INT8,
400 backends,
401 inputShape,
402 outputShape,
403 inputValues,
404 expectedOutputValues,
405 ::tflite::Padding_VALID,
406 2,
407 2,
408 2,
409 2,
410 tflite::ActivationFunctionType_NONE,
411 2.5f,
412 1);
413}
414
415void AveragePool2dFP32PaddingSameTest(std::vector<armnn::BackendId>& backends)
416{
417 // Set input data
418 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
419 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
420
421 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
422 8.0f, 12.0f, -15.0f, 2.0f,
423 3.0f, -4.0f, -1.0f, -11.0f };
424
425 std::vector<float> expectedOutputValues = { 5.75f, -4.0f, -0.5f, -6.0f };
426
427 Pooling2dTest<float>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
428 ::tflite::TensorType_FLOAT32,
429 backends,
430 inputShape,
431 outputShape,
432 inputValues,
433 expectedOutputValues,
434 ::tflite::Padding_SAME,
435 2,
436 2,
437 2,
438 2);
439}
440
441void AveragePool2dInt8PaddingSameTest(std::vector<armnn::BackendId>& backends)
442{
443 // Set input data
444 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
445 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
446
447 std::vector<int8_t > inputValues = { -5, 8, -10, 7,
448 8, 12, -15, 2,
449 3, -4, -1, -11 };
450
451 std::vector<int8_t> expectedOutputValues = { 6, -4, -1, -6 };
452
453 Pooling2dTest<int8_t>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
454 ::tflite::TensorType_INT8,
455 backends,
456 inputShape,
457 outputShape,
458 inputValues,
459 expectedOutputValues,
460 ::tflite::Padding_SAME,
461 2,
462 2,
463 2,
464 2,
465 tflite::ActivationFunctionType_NONE,
466 2.5f,
467 1);
468}
469
470void AveragePool2dFP32ReluTest(std::vector<armnn::BackendId>& backends)
471{
472 // Set input data
473 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
474 std::vector<int32_t> outputShape { 1, 2, 3, 1 };
475
476 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
477 -8.0f, 12.0f, -15.0f, 2.0f,
478 3.0f, -4.0f, -1.0f, 11.0f };
479
480 std::vector<float> expectedOutputValues = { 1.75f, 0.0f, 0.0f, 0.75f, 0.0f, 0.0f };
481
482 Pooling2dTest<float>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
483 ::tflite::TensorType_FLOAT32,
484 backends,
485 inputShape,
486 outputShape,
487 inputValues,
488 expectedOutputValues,
489 ::tflite::Padding_VALID,
490 1,
491 1,
492 2,
493 2,
494 ::tflite::ActivationFunctionType_RELU);
495}
496
497void AveragePool2dInt8ReluTest(std::vector<armnn::BackendId>& backends)
498{
499 // Set input data
500 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
501 std::vector<int32_t> outputShape { 1, 2, 3, 1 };
502
503 std::vector<int8_t> inputValues = { -5, 8, -10, 7,
504 -8, 12, -15, 2,
505 3, -4, -1, 11 };
506
507 std::vector<int8_t> expectedOutputValues = { 2, 1, 1, 1, 1, 1 };
508
509 Pooling2dTest<int8_t>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
510 ::tflite::TensorType_INT8,
511 backends,
512 inputShape,
513 outputShape,
514 inputValues,
515 expectedOutputValues,
516 ::tflite::Padding_VALID,
517 1,
518 1,
519 2,
520 2,
521 ::tflite::ActivationFunctionType_RELU,
522 2.5f,
523 1);
524}
525
526void AveragePool2dFP32Relu6Test(std::vector<armnn::BackendId>& backends)
527{
528 // Set input data
529 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
530 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
531
532 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
533 -8.0f, 12.0f, -15.0f, 2.0f,
534 3.0f, -4.0f, -1.0f, 11.0f };
535
536 std::vector<float> expectedOutputValues = { 0.0f, 0.0f, 3.0f, 0.0f };
537
538 Pooling2dTest<float>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
539 ::tflite::TensorType_FLOAT32,
540 backends,
541 inputShape,
542 outputShape,
543 inputValues,
544 expectedOutputValues,
545 ::tflite::Padding_SAME,
546 2,
547 2,
548 1,
549 1,
550 ::tflite::ActivationFunctionType_RELU6);
551}
552
553void AveragePool2dInt8Relu6Test(std::vector<armnn::BackendId>& backends)
554{
555 // Set input data
556 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
557 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
558
559 std::vector<int8_t> inputValues = { -5, 8, -10, 7,
560 -8, 12, -15, 2,
561 3, -4, -1, 11 };
562
563 std::vector<int8_t> expectedOutputValues = { 1, 1, 3, 1 };
564
565 Pooling2dTest<int8_t>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
566 ::tflite::TensorType_INT8,
567 backends,
568 inputShape,
569 outputShape,
570 inputValues,
571 expectedOutputValues,
572 ::tflite::Padding_SAME,
573 2,
574 2,
575 1,
576 1,
577 ::tflite::ActivationFunctionType_RELU6,
578 2.5f,
579 1);
580}
581
582void AveragePool2dUint8PaddingSameTest(std::vector<armnn::BackendId>& backends)
583{
584 // Set input data
585 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
586 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
587
588 std::vector<uint8_t> inputValues = { 5, 8, 10, 7,
589 8, 12, 15, 2,
590 3, 4, 1, 11 };
591
592 std::vector<uint8_t> expectedOutputValues = { 8, 9, 4, 6 };
593
594 Pooling2dTest<uint8_t>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
595 ::tflite::TensorType_UINT8,
596 backends,
597 inputShape,
598 outputShape,
599 inputValues,
600 expectedOutputValues,
601 ::tflite::Padding_SAME,
602 2,
603 2,
604 2,
605 2,
606 tflite::ActivationFunctionType_NONE,
607 2.5f,
608 1);
609}
610
611void AveragePool2dUint8ReluTest(std::vector<armnn::BackendId>& backends)
612{
613 // Set input data
614 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
615 std::vector<int32_t> outputShape { 1, 2, 3, 1 };
616
617 std::vector<uint8_t> inputValues = { 12, 8, 10, 15,
618 8, 5, 7, 2,
619 3, 4, 1, 11 };
620
621 std::vector<uint8_t> expectedOutputValues = { 8, 8, 9, 5, 4, 5 };
622
623 Pooling2dTest<uint8_t>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
624 ::tflite::TensorType_UINT8,
625 backends,
626 inputShape,
627 outputShape,
628 inputValues,
629 expectedOutputValues,
630 ::tflite::Padding_VALID,
631 1,
632 1,
633 2,
634 2,
635 ::tflite::ActivationFunctionType_RELU,
636 2.0f,
637 1);
638}
639
640void AveragePool2dInt16PaddingSameTest(std::vector<armnn::BackendId>& backends)
641{
642 // Set input data
643 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
644 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
645
646 std::vector<int16_t > inputValues = { -5, 8, -10, 7,
647 8, 12, -15, 2,
648 3, -4, -1, -11 };
649
650 std::vector<int16_t> expectedOutputValues = { 6, -4, -1, -6 };
651
652 Pooling2dTest<int16_t>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
653 ::tflite::TensorType_INT16,
654 backends,
655 inputShape,
656 outputShape,
657 inputValues,
658 expectedOutputValues,
659 ::tflite::Padding_SAME,
660 2,
661 2,
662 2,
663 2,
664 tflite::ActivationFunctionType_NONE,
665 2.5f,
666 0);
667}
668
669void AveragePool2dInt16ReluTest(std::vector<armnn::BackendId>& backends)
670{
671 // Set input data
672 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
673 std::vector<int32_t> outputShape { 1, 2, 3, 1 };
674
675 std::vector<int16_t> inputValues = { -5, 8, -10, 7,
676 -8, 12, -15, 2,
677 3, -4, -1, 11 };
678
679 std::vector<int16_t> expectedOutputValues = { 2, 0, 0, 1, 0, 0 };
680
681 Pooling2dTest<int16_t>(tflite::BuiltinOperator_AVERAGE_POOL_2D,
682 ::tflite::TensorType_INT16,
683 backends,
684 inputShape,
685 outputShape,
686 inputValues,
687 expectedOutputValues,
688 ::tflite::Padding_VALID,
689 1,
690 1,
691 2,
692 2,
693 ::tflite::ActivationFunctionType_RELU,
694 2.5f,
695 0);
696}
697
698void L2Pool2dFP32PaddingValidTest(std::vector<armnn::BackendId>& backends)
699{
700 // Set input data
701 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
702 std::vector<int32_t> outputShape { 1, 1, 2, 1 };
703
704 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
705 8.0f, 12.0f, -15.0f, 2.0f,
706 3.0f, -4.0f, -1.0f, -11.0f };
707
708 std::vector<float> expectedOutputValues = { 8.616844f, 9.721111f };
709
710 Pooling2dTest<float>(tflite::BuiltinOperator_L2_POOL_2D,
711 ::tflite::TensorType_FLOAT32,
712 backends,
713 inputShape,
714 outputShape,
715 inputValues,
716 expectedOutputValues,
717 ::tflite::Padding_VALID,
718 2,
719 2,
720 2,
721 2);
722}
723
724void L2Pool2dFP32PaddingSameTest(std::vector<armnn::BackendId>& backends)
725{
726 // Set input data
727 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
728 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
729
730 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
731 8.0f, 12.0f, -15.0f, 2.0f,
732 3.0f, -4.0f, -1.0f, -11.0f };
733
734 std::vector<float> expectedOutputValues = { 8.616844f, 9.721111f, 3.535534f, 7.81025f };
735
736 Pooling2dTest<float>(tflite::BuiltinOperator_L2_POOL_2D,
737 ::tflite::TensorType_FLOAT32,
738 backends,
739 inputShape,
740 outputShape,
741 inputValues,
742 expectedOutputValues,
743 ::tflite::Padding_SAME,
744 2,
745 2,
746 2,
747 2);
748}
749
750void L2Pool2dFP32ReluTest(std::vector<armnn::BackendId>& backends)
751{
752 // Set input data
753 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
754 std::vector<int32_t> outputShape { 1, 2, 3, 1 };
755
756 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
757 -8.0f, 12.0f, -15.0f, 2.0f,
758 3.0f, -4.0f, -1.0f, 11.0f };
759
760 std::vector<float> expectedOutputValues = { 8.616844f, 11.543396f, 9.721111f, 7.632169f, 9.8234415f, 9.367497f };
761
762 Pooling2dTest<float>(tflite::BuiltinOperator_L2_POOL_2D,
763 ::tflite::TensorType_FLOAT32,
764 backends,
765 inputShape,
766 outputShape,
767 inputValues,
768 expectedOutputValues,
769 ::tflite::Padding_VALID,
770 1,
771 1,
772 2,
773 2,
774 ::tflite::ActivationFunctionType_RELU);
775}
776
777void L2Pool2dFP32Relu6Test(std::vector<armnn::BackendId>& backends)
778{
779 // Set input data
780 std::vector<int32_t> inputShape { 1, 3, 4, 1 };
781 std::vector<int32_t> outputShape { 1, 2, 2, 1 };
782
783 std::vector<float> inputValues = { -5.0f, 8.0f, -10.0f, 7.0f,
784 -8.0f, 12.0f, -15.0f, 2.0f,
785 3.0f, -4.0f, -1.0f, 11.0f };
786
787 std::vector<float> expectedOutputValues = { 5.0f, 6.0f, 3.0f, 1.0f };
788
789 Pooling2dTest<float>(tflite::BuiltinOperator_L2_POOL_2D,
790 ::tflite::TensorType_FLOAT32,
791 backends,
792 inputShape,
793 outputShape,
794 inputValues,
795 expectedOutputValues,
796 ::tflite::Padding_SAME,
797 2,
798 2,
799 1,
800 1,
801 ::tflite::ActivationFunctionType_RELU6);
802}
803
804TEST_SUITE("Pooling2d_GpuAccTests")
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000805{
806
807TEST_CASE ("MaxPooling2d_FP32_PaddingValid_GpuAcc_Test")
808{
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000809 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000810 MaxPool2dFP32PaddingValidTest(backends);
811}
812
813TEST_CASE ("MaxPooling2d_Int8_PaddingValid_GpuAcc_Test")
814{
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000815 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000816 MaxPool2dInt8PaddingValidTest(backends);
817}
818
819TEST_CASE ("MaxPooling2d_FP32_PaddingSame_GpuAcc_Test")
820{
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000821 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000822 MaxPool2dFP32PaddingSameTest(backends);
823}
824
825TEST_CASE ("MaxPooling2d_Int8_PaddingSame_GpuAcc_Test")
826{
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000827 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000828 MaxPool2dInt8PaddingSameTest(backends);
829}
830
831TEST_CASE ("MaxPooling2d_FP32_Relu_GpuAcc_Test")
832{
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000833 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000834 MaxPool2dFP32ReluTest(backends);
835}
836
837TEST_CASE ("MaxPooling2d_Int8_Relu_GpuAcc_Test")
838{
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000839 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000840 MaxPool2dInt8ReluTest(backends);
841}
842
843TEST_CASE ("MaxPooling2d_FP32_Relu6_GpuAcc_Test")
844{
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000845 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000846 MaxPool2dFP32Relu6Test(backends);
847}
848
849TEST_CASE ("MaxPooling2d_Int8_Relu6_GpuAcc_Test")
850{
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000851 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000852 MaxPool2dInt8Relu6Test(backends);
853}
854
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000855TEST_CASE ("MaxPooling2d_Uint8_PaddingSame_GpuAcc_Test")
856{
857 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
858 MaxPool2dUint8PaddingSameTest(backends);
859}
860
861TEST_CASE ("MaxPooling2d_Uint8_Relu_GpuAcc_Test")
862{
863 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
864 MaxPool2dUint8ReluTest(backends);
865}
866
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000867TEST_CASE ("AveragePooling2d_FP32_PaddingValid_GpuAcc_Test")
868{
869 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
870 AveragePool2dFP32PaddingValidTest(backends);
871}
872
873TEST_CASE ("AveragePooling2d_Int8_PaddingValid_GpuAcc_Test")
874{
875 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
876 AveragePool2dInt8PaddingValidTest(backends);
877}
878
879TEST_CASE ("AveragePooling2d_FP32_PaddingSame_GpuAcc_Test")
880{
881 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
882 AveragePool2dFP32PaddingSameTest(backends);
883}
884
885TEST_CASE ("AveragePooling2d_Int8_PaddingSame_GpuAcc_Test")
886{
887 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
888 AveragePool2dInt8PaddingSameTest(backends);
889}
890
891TEST_CASE ("AveragePooling2d_FP32_Relu_GpuAcc_Test")
892{
893 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
894 AveragePool2dFP32ReluTest(backends);
895}
896
897TEST_CASE ("AveragePooling2d_FP32_Relu6_GpuAcc_Test")
898{
899 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
900 AveragePool2dFP32Relu6Test(backends);
901}
902
903TEST_CASE ("AveragePooling2d_Int8_Relu_GpuAcc_Test")
904{
905 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
906 AveragePool2dInt8ReluTest(backends);
907}
908
909TEST_CASE ("AveragePooling2d_Int8_Relu6_GpuAcc_Test")
910{
911 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
912 AveragePool2dInt8Relu6Test(backends);
913}
914
915TEST_CASE ("AveragePooling2d_Uint8_PaddingSame_GpuAcc_Test")
916{
917 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
918 AveragePool2dUint8PaddingSameTest(backends);
919}
920
921TEST_CASE ("AveragePooling2d_Uint8_Relu_GpuAcc_Test")
922{
923 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
924 AveragePool2dUint8ReluTest(backends);
925}
926
Narumol Prangnawarat80815362020-11-11 11:33:03 +0000927TEST_CASE ("L2Pooling2d_FP32_PaddingValid_GpuAcc_Test")
928{
929 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
930 L2Pool2dFP32PaddingValidTest(backends);
931}
932
933TEST_CASE ("L2Pooling2d_FP32_PaddingSame_GpuAcc_Test")
934{
935 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
936 L2Pool2dFP32PaddingSameTest(backends);
937}
938
939TEST_CASE ("L2Pooling2d_FP32_Relu_GpuAcc_Test")
940{
941 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
942 L2Pool2dFP32ReluTest(backends);
943}
944
945TEST_CASE ("L2Pooling2d_FP32_Relu6_GpuAcc_Test")
946{
947 std::vector<armnn::BackendId> backends = { armnn::Compute::GpuAcc };
948 L2Pool2dFP32Relu6Test(backends);
949}
950
951} // TEST_SUITE("Pooling2d_GpuAccTests")
952
953TEST_SUITE("Pooling2d_CpuAccTests")
954{
955
956TEST_CASE ("MaxPooling2d_FP32_PaddingValid_CpuAcc_Test")
957{
958 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
959 MaxPool2dFP32PaddingValidTest(backends);
960}
961
962TEST_CASE ("MaxPooling2d_Int8_PaddingValid_CpuAcc_Test")
963{
964 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
965 MaxPool2dInt8PaddingValidTest(backends);
966}
967
968TEST_CASE ("MaxPooling2d_FP32_PaddingSame_CpuAcc_Test")
969{
970 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
971 MaxPool2dFP32PaddingSameTest(backends);
972}
973
974TEST_CASE ("MaxPooling2d_Int8_PaddingSame_CpuAcc_Test")
975{
976 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
977 MaxPool2dInt8PaddingSameTest(backends);
978}
979
980TEST_CASE ("MaxPooling2d_FP32_Relu_CpuAcc_Test")
981{
982 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
983 MaxPool2dFP32ReluTest(backends);
984}
985
986TEST_CASE ("MaxPooling2d_Int8_Relu_CpuAcc_Test")
987{
988 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
989 MaxPool2dInt8ReluTest(backends);
990}
991
992TEST_CASE ("MaxPooling2d_FP32_Relu6_CpuAcc_Test")
993{
994 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
995 MaxPool2dFP32Relu6Test(backends);
996}
997
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +0000998TEST_CASE ("MaxPooling2d_Int8_Relu6_CpuAcc_Test")
999{
Narumol Prangnawarat80815362020-11-11 11:33:03 +00001000 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +00001001 MaxPool2dInt8Relu6Test(backends);
1002}
1003
Narumol Prangnawarat80815362020-11-11 11:33:03 +00001004TEST_CASE ("MaxPooling2d_Uint8_PaddingSame_CpuAcc_Test")
1005{
1006 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1007 MaxPool2dUint8PaddingSameTest(backends);
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +00001008}
1009
Narumol Prangnawarat80815362020-11-11 11:33:03 +00001010TEST_CASE ("MaxPooling2d_Uint8_Relu_CpuAcc_Test")
1011{
1012 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1013 MaxPool2dUint8ReluTest(backends);
1014}
1015
Narumol Prangnawarat80815362020-11-11 11:33:03 +00001016TEST_CASE ("AveragePooling2d_FP32_PaddingValid_CpuAcc_Test")
1017{
1018 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1019 AveragePool2dFP32PaddingValidTest(backends);
1020}
1021
1022TEST_CASE ("AveragePooling2d_Int8_PaddingValid_CpuAcc_Test")
1023{
1024 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1025 AveragePool2dInt8PaddingValidTest(backends);
1026}
1027
1028TEST_CASE ("AveragePooling2d_FP32_PaddingSame_CpuAcc_Test")
1029{
1030 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1031 AveragePool2dFP32PaddingSameTest(backends);
1032}
1033
1034TEST_CASE ("AveragePooling2d_Int8_PaddingSame_CpuAcc_Test")
1035{
1036 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1037 AveragePool2dInt8PaddingSameTest(backends);
1038}
1039
1040TEST_CASE ("AveragePooling2d_FP32_Relu_CpuAcc_Test")
1041{
1042 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1043 AveragePool2dFP32ReluTest(backends);
1044}
1045
1046TEST_CASE ("AveragePooling2d_FP32_Relu6_CpuAcc_Test")
1047{
1048 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1049 AveragePool2dFP32Relu6Test(backends);
1050}
1051
1052TEST_CASE ("AveragePooling2d_Int8_Relu_CpuAcc_Test")
1053{
1054 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1055 AveragePool2dInt8ReluTest(backends);
1056}
1057
1058TEST_CASE ("AveragePooling2d_Int8_Relu6_CpuAcc_Test")
1059{
1060 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1061 AveragePool2dInt8Relu6Test(backends);
1062}
1063
1064TEST_CASE ("AveragePooling2d_Uint8_PaddingSame_CpuAcc_Test")
1065{
1066 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1067 AveragePool2dUint8PaddingSameTest(backends);
1068}
1069
1070TEST_CASE ("AveragePooling2d_Uint8_Relu_CpuAcc_Test")
1071{
1072 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1073 AveragePool2dUint8ReluTest(backends);
1074}
1075
Narumol Prangnawarat80815362020-11-11 11:33:03 +00001076TEST_CASE ("L2Pooling2d_FP32_PaddingValid_CpuAcc_Test")
1077{
1078 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1079 L2Pool2dFP32PaddingValidTest(backends);
1080}
1081
1082TEST_CASE ("L2Pooling2d_FP32_PaddingSame_CpuAcc_Test")
1083{
1084 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1085 L2Pool2dFP32PaddingSameTest(backends);
1086}
1087
1088TEST_CASE ("L2Pooling2d_FP32_Relu_CpuAcc_Test")
1089{
1090 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1091 L2Pool2dFP32ReluTest(backends);
1092}
1093
1094TEST_CASE ("L2Pooling2d_FP32_Relu6_CpuAcc_Test")
1095{
1096 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuAcc };
1097 L2Pool2dFP32Relu6Test(backends);
1098}
1099
1100} // TEST_SUITE("Pooling2d_CpuAccTests")
1101
1102TEST_SUITE("Pooling2d_CpuRefTests")
1103{
1104
1105TEST_CASE ("MaxPooling2d_FP32_PaddingValid_CpuRef_Test")
1106{
1107 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1108 MaxPool2dFP32PaddingValidTest(backends);
1109}
1110
1111TEST_CASE ("MaxPooling2d_Int8_PaddingValid_CpuRef_Test")
1112{
1113 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1114 MaxPool2dInt8PaddingValidTest(backends);
1115}
1116
1117TEST_CASE ("MaxPooling2d_FP32_PaddingSame_CpuRef_Test")
1118{
1119 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1120 MaxPool2dFP32PaddingSameTest(backends);
1121}
1122
1123TEST_CASE ("MaxPooling2d_Int8_PaddingSame_CpuRef_Test")
1124{
1125 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1126 MaxPool2dInt8PaddingSameTest(backends);
1127}
1128
1129TEST_CASE ("MaxPooling2d_FP32_Relu_CpuRef_Test")
1130{
1131 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1132 MaxPool2dFP32ReluTest(backends);
1133}
1134
1135TEST_CASE ("MaxPooling2d_Int8_Relu_CpuRef_Test")
1136{
1137 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1138 MaxPool2dInt8ReluTest(backends);
1139}
1140
1141TEST_CASE ("MaxPooling2d_FP32_Relu6_CpuRef_Test")
1142{
1143 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1144 MaxPool2dFP32Relu6Test(backends);
1145}
1146
1147TEST_CASE ("MaxPooling2d_Int8_Relu6_CpuRef_Test")
1148{
1149 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1150 MaxPool2dInt8Relu6Test(backends);
1151}
1152
1153TEST_CASE ("MaxPooling2d_Uint8_PaddingSame_CpuRef_Test")
1154{
1155 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1156 MaxPool2dUint8PaddingSameTest(backends);
1157}
1158
1159TEST_CASE ("MaxPooling2d_Uint8_Relu_CpuRef_Test")
1160{
1161 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1162 MaxPool2dUint8ReluTest(backends);
1163}
1164
1165TEST_CASE ("MaxPooling2d_Int16_PaddingSame_CpuRef_Test")
1166{
1167 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1168 MaxPool2dInt16PaddingSameTest(backends);
1169}
1170
1171TEST_CASE ("MaxPooling2d_Int16_Relu_CpuRef_Test")
1172{
1173 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1174 MaxPool2dInt16ReluTest(backends);
1175}
1176
1177TEST_CASE ("AveragePooling2d_FP32_PaddingValid_CpuRef_Test")
1178{
1179 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1180 AveragePool2dFP32PaddingValidTest(backends);
1181}
1182
1183TEST_CASE ("AveragePooling2d_Int8_PaddingValid_CpuRef_Test")
1184{
1185 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1186 AveragePool2dInt8PaddingValidTest(backends);
1187}
1188
1189TEST_CASE ("AveragePooling2d_FP32_PaddingSame_CpuRef_Test")
1190{
1191 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1192 AveragePool2dFP32PaddingSameTest(backends);
1193}
1194
1195TEST_CASE ("AveragePooling2d_Int8_PaddingSame_CpuRef_Test")
1196{
1197 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1198 AveragePool2dInt8PaddingSameTest(backends);
1199}
1200
1201TEST_CASE ("AveragePooling2d_FP32_Relu_CpuRef_Test")
1202{
1203 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1204 AveragePool2dFP32ReluTest(backends);
1205}
1206
1207TEST_CASE ("AveragePooling2d_FP32_Relu6_CpuRef_Test")
1208{
1209 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1210 AveragePool2dFP32Relu6Test(backends);
1211}
1212
1213TEST_CASE ("AveragePooling2d_Int8_Relu_CpuRef_Test")
1214{
1215 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1216 AveragePool2dInt8ReluTest(backends);
1217}
1218
1219TEST_CASE ("AveragePooling2d_Int8_Relu6_CpuRef_Test")
1220{
1221 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1222 AveragePool2dInt8Relu6Test(backends);
1223}
1224
1225TEST_CASE ("AveragePooling2d_Uint8_PaddingSame_CpuRef_Test")
1226{
1227 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1228 AveragePool2dUint8PaddingSameTest(backends);
1229}
1230
1231TEST_CASE ("AveragePooling2d_Uint8_Relu_CpuRef_Test")
1232{
1233 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1234 AveragePool2dUint8ReluTest(backends);
1235}
1236
1237TEST_CASE ("AveragePooling2d_Int16_PaddingSame_CpuRef_Test")
1238{
1239 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1240 AveragePool2dInt16PaddingSameTest(backends);
1241}
1242
1243TEST_CASE ("AveragePooling2d_Int16_Relu_CpuRef_Test")
1244{
1245 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1246 AveragePool2dInt16ReluTest(backends);
1247}
1248
1249TEST_CASE ("L2Pooling2d_FP32_PaddingValid_CpuRef_Test")
1250{
1251 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1252 L2Pool2dFP32PaddingValidTest(backends);
1253}
1254
1255TEST_CASE ("L2Pooling2d_FP32_PaddingSame_CpuRef_Test")
1256{
1257 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1258 L2Pool2dFP32PaddingSameTest(backends);
1259}
1260
1261TEST_CASE ("L2Pooling2d_FP32_Relu_CpuRef_Test")
1262{
1263 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1264 L2Pool2dFP32ReluTest(backends);
1265}
1266
1267TEST_CASE ("L2Pooling2d_FP32_Relu6_CpuRef_Test")
1268{
1269 std::vector<armnn::BackendId> backends = { armnn::Compute::CpuRef };
1270 L2Pool2dFP32Relu6Test(backends);
1271}
1272
1273} // TEST_SUITE("Pooling2d_CpuRefTests")
1274
Narumol Prangnawarat50c87d32020-11-09 18:42:11 +00001275} // namespace armnnDelegate