Matthew Sloyan | a35b40b | 2021-02-05 17:22:28 +0000 | [diff] [blame] | 1 | // |
Teresa Charlin | ad1b3d7 | 2023-03-14 12:10:28 +0000 | [diff] [blame] | 2 | // Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved. |
Matthew Sloyan | a35b40b | 2021-02-05 17:22:28 +0000 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "BatchSpaceTestHelper.hpp" |
| 7 | |
| 8 | #include <armnn_delegate.hpp> |
| 9 | |
| 10 | #include <flatbuffers/flatbuffers.h> |
Matthew Sloyan | a35b40b | 2021-02-05 17:22:28 +0000 | [diff] [blame] | 11 | |
| 12 | #include <doctest/doctest.h> |
| 13 | |
| 14 | namespace armnnDelegate |
| 15 | { |
| 16 | |
| 17 | // BatchToSpaceND Operator |
| 18 | void BatchToSpaceNDFp32Test(std::vector<armnn::BackendId>& backends) |
| 19 | { |
| 20 | std::vector<int32_t> inputShape { 4, 1, 1, 1 }; |
| 21 | std::vector<int32_t> expectedOutputShape { 1, 2, 2, 1 }; |
| 22 | |
| 23 | std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f }; |
| 24 | std::vector<float> expectedOutputValues { 1.0f, 2.0f, 3.0f, 4.0f }; |
| 25 | |
| 26 | std::vector<unsigned int> blockShape({2, 2}); |
| 27 | std::vector<std::pair<unsigned int, unsigned int>> crops = {{0, 0}, {0, 0}}; |
| 28 | |
| 29 | BatchSpaceTest<float>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND, |
| 30 | ::tflite::TensorType_FLOAT32, |
| 31 | backends, |
| 32 | inputShape, |
| 33 | expectedOutputShape, |
| 34 | inputValues, |
| 35 | blockShape, |
| 36 | crops, |
| 37 | expectedOutputValues); |
| 38 | } |
| 39 | |
| 40 | void BatchToSpaceNDFp32BatchOneTest(std::vector<armnn::BackendId>& backends) |
| 41 | { |
| 42 | std::vector<int32_t> inputShape { 1, 2, 2, 1 }; |
| 43 | std::vector<int32_t> expectedOutputShape { 1, 2, 2, 1 }; |
| 44 | |
| 45 | std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f }; |
| 46 | std::vector<float> expectedOutputValues { 1.0f, 2.0f, 3.0f, 4.0f }; |
| 47 | |
| 48 | std::vector<unsigned int> blockShape({1, 1}); |
| 49 | std::vector<std::pair<unsigned int, unsigned int>> crops = {{0, 0}, {0, 0}}; |
| 50 | |
| 51 | BatchSpaceTest<float>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND, |
| 52 | ::tflite::TensorType_FLOAT32, |
| 53 | backends, |
| 54 | inputShape, |
| 55 | expectedOutputShape, |
| 56 | inputValues, |
| 57 | blockShape, |
| 58 | crops, |
| 59 | expectedOutputValues); |
| 60 | } |
| 61 | |
| 62 | void BatchToSpaceNDUint8Test(std::vector<armnn::BackendId>& backends) |
| 63 | { |
| 64 | std::vector<int32_t> inputShape { 4, 1, 1, 3 }; |
| 65 | std::vector<int32_t> expectedOutputShape { 1, 2, 2, 3 }; |
| 66 | |
| 67 | std::vector<uint8_t> inputValues { 1, 2, 3, 4, 5, 6, 7 }; |
| 68 | std::vector<uint8_t> expectedOutputValues { 1, 2, 3, 4, 5, 6, 7 }; |
| 69 | |
| 70 | std::vector<unsigned int> blockShape({2, 2}); |
| 71 | std::vector<std::pair<unsigned int, unsigned int>> crops = {{0, 0}, {0, 0}}; |
| 72 | |
| 73 | BatchSpaceTest<uint8_t>(tflite::BuiltinOperator_BATCH_TO_SPACE_ND, |
| 74 | ::tflite::TensorType_UINT8, |
| 75 | backends, |
| 76 | inputShape, |
| 77 | expectedOutputShape, |
| 78 | inputValues, |
| 79 | blockShape, |
| 80 | crops, |
| 81 | expectedOutputValues); |
| 82 | } |
| 83 | |
| 84 | // SpaceToBatchND Operator |
| 85 | void SpaceToBatchNDFp32Test(std::vector<armnn::BackendId>& backends) |
| 86 | { |
| 87 | std::vector<int32_t> inputShape { 1, 2, 2, 1 }; |
| 88 | std::vector<int32_t> expectedOutputShape { 4, 1, 1, 1 }; |
| 89 | |
| 90 | std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f }; |
| 91 | std::vector<float> expectedOutputValues { 1.0f, 2.0f, 3.0f, 4.0f }; |
| 92 | |
| 93 | std::vector<unsigned int> blockShape({2, 2}); |
| 94 | std::vector<std::pair<unsigned int, unsigned int>> padding = {{0, 0}, {0, 0}}; |
| 95 | |
| 96 | BatchSpaceTest<float>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND, |
| 97 | ::tflite::TensorType_FLOAT32, |
| 98 | backends, |
| 99 | inputShape, |
| 100 | expectedOutputShape, |
| 101 | inputValues, |
| 102 | blockShape, |
| 103 | padding, |
| 104 | expectedOutputValues); |
| 105 | } |
| 106 | |
| 107 | void SpaceToBatchNDFp32PaddingTest(std::vector<armnn::BackendId>& backends) |
| 108 | { |
| 109 | std::vector<int32_t> inputShape { 2, 2, 4, 1 }; |
| 110 | std::vector<int32_t> expectedOutputShape { 8, 1, 3, 1 }; |
| 111 | |
| 112 | std::vector<float> inputValues { 1.0f, 2.0f, 3.0f, 4.0f, |
| 113 | 5.0f, 6.0f, 7.0f, 8.0f, |
| 114 | 9.0f, 10.0f, 11.0f, 12.0f, |
| 115 | 13.0f, 14.0f, 15.0f, 16.0f }; |
| 116 | |
| 117 | std::vector<float> expectedOutputValues { 0.0f, 1.0f, 3.0f, 0.0f, 9.0f, 11.0f, |
| 118 | 0.0f, 2.0f, 4.0f, 0.0f, 10.0f, 12.0f, |
| 119 | 0.0f, 5.0f, 7.0f, 0.0f, 13.0f, 15.0f, |
| 120 | 0.0f, 6.0f, 8.0f, 0.0f, 14.0f, 16.0f }; |
| 121 | |
| 122 | std::vector<unsigned int> blockShape({2, 2}); |
| 123 | std::vector<std::pair<unsigned int, unsigned int>> padding = {{0, 0}, {2, 0}}; |
| 124 | |
| 125 | BatchSpaceTest<float>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND, |
| 126 | ::tflite::TensorType_FLOAT32, |
| 127 | backends, |
| 128 | inputShape, |
| 129 | expectedOutputShape, |
| 130 | inputValues, |
| 131 | blockShape, |
| 132 | padding, |
| 133 | expectedOutputValues); |
| 134 | } |
| 135 | |
| 136 | void SpaceToBatchNDUint8Test(std::vector<armnn::BackendId>& backends) |
| 137 | { |
| 138 | std::vector<int32_t> inputShape { 1, 2, 2, 3 }; |
| 139 | std::vector<int32_t> expectedOutputShape { 4, 1, 1, 3 }; |
| 140 | |
| 141 | std::vector<uint8_t> inputValues { 1, 2, 3, 4, 5, 6, 7 }; |
| 142 | std::vector<uint8_t> expectedOutputValues { 1, 2, 3, 4, 5, 6, 7 }; |
| 143 | |
| 144 | std::vector<unsigned int> blockShape({2, 2}); |
| 145 | std::vector<std::pair<unsigned int, unsigned int>> padding = {{0, 0}, {0, 0}}; |
| 146 | |
| 147 | BatchSpaceTest<uint8_t>(tflite::BuiltinOperator_SPACE_TO_BATCH_ND, |
| 148 | ::tflite::TensorType_UINT8, |
| 149 | backends, |
| 150 | inputShape, |
| 151 | expectedOutputShape, |
| 152 | inputValues, |
| 153 | blockShape, |
| 154 | padding, |
| 155 | expectedOutputValues); |
| 156 | } |
| 157 | |
| 158 | // BatchToSpaceND Tests |
| 159 | TEST_SUITE("BatchToSpaceND_CpuAccTests") |
| 160 | { |
| 161 | |
| 162 | TEST_CASE ("BatchToSpaceND_Fp32_CpuAcc_Test") |
| 163 | { |
| 164 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 165 | BatchToSpaceNDFp32Test(backends); |
| 166 | } |
| 167 | |
| 168 | TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_CpuAcc_Test") |
| 169 | { |
| 170 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 171 | BatchToSpaceNDFp32BatchOneTest(backends); |
| 172 | } |
| 173 | |
| 174 | TEST_CASE ("BatchToSpaceND_Uint8_CpuAcc_Test") |
| 175 | { |
| 176 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 177 | BatchToSpaceNDUint8Test(backends); |
| 178 | } |
| 179 | |
| 180 | } |
| 181 | |
| 182 | TEST_SUITE("BatchToSpaceND_GpuAccTests") |
| 183 | { |
| 184 | |
| 185 | TEST_CASE ("BatchToSpaceND_Fp32_GpuAcc_Test") |
| 186 | { |
| 187 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 188 | BatchToSpaceNDFp32Test(backends); |
| 189 | } |
| 190 | |
| 191 | TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_GpuAcc_Test") |
| 192 | { |
| 193 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 194 | BatchToSpaceNDFp32BatchOneTest(backends); |
| 195 | } |
| 196 | |
| 197 | TEST_CASE ("BatchToSpaceND_Uint8_GpuAcc_Test") |
| 198 | { |
| 199 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 200 | BatchToSpaceNDUint8Test(backends); |
| 201 | } |
| 202 | |
| 203 | } |
| 204 | |
| 205 | TEST_SUITE("BatchToSpaceND_CpuRefTests") |
| 206 | { |
| 207 | |
| 208 | TEST_CASE ("BatchToSpaceND_Fp32_CpuRef_Test") |
| 209 | { |
| 210 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 211 | BatchToSpaceNDFp32Test(backends); |
| 212 | } |
| 213 | |
| 214 | TEST_CASE ("BatchToSpaceND_Fp32_BatchOne_CpuRef_Test") |
| 215 | { |
| 216 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 217 | BatchToSpaceNDFp32BatchOneTest(backends); |
| 218 | } |
| 219 | |
| 220 | TEST_CASE ("BatchToSpaceND_Uint8_CpuRef_Test") |
| 221 | { |
| 222 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 223 | BatchToSpaceNDUint8Test(backends); |
| 224 | } |
| 225 | |
| 226 | } |
| 227 | |
| 228 | // SpaceToBatchND Tests |
| 229 | TEST_SUITE("SpaceToBatchND_CpuAccTests") |
| 230 | { |
| 231 | |
| 232 | TEST_CASE ("SpaceToBatchND_Fp32_CpuAcc_Test") |
| 233 | { |
| 234 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 235 | SpaceToBatchNDFp32Test(backends); |
| 236 | } |
| 237 | |
| 238 | TEST_CASE ("SpaceToBatchND_Fp32_Padding_CpuAcc_Test") |
| 239 | { |
| 240 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 241 | SpaceToBatchNDFp32PaddingTest(backends); |
| 242 | } |
| 243 | |
| 244 | TEST_CASE ("SpaceToBatchND_Uint8_CpuAcc_Test") |
| 245 | { |
| 246 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuAcc}; |
| 247 | SpaceToBatchNDUint8Test(backends); |
| 248 | } |
| 249 | |
| 250 | } |
| 251 | |
| 252 | TEST_SUITE("SpaceToBatchND_GpuAccTests") |
| 253 | { |
| 254 | |
| 255 | TEST_CASE ("SpaceToBatchND_Fp32_GpuAcc_Test") |
| 256 | { |
| 257 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 258 | SpaceToBatchNDFp32Test(backends); |
| 259 | } |
| 260 | |
| 261 | TEST_CASE ("SpaceToBatchND_Fp32_Padding_GpuAcc_Test") |
| 262 | { |
| 263 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 264 | SpaceToBatchNDFp32PaddingTest(backends); |
| 265 | } |
| 266 | |
| 267 | TEST_CASE ("SpaceToBatchND_Uint8_GpuAcc_Test") |
| 268 | { |
| 269 | std::vector<armnn::BackendId> backends = {armnn::Compute::GpuAcc}; |
| 270 | SpaceToBatchNDUint8Test(backends); |
| 271 | } |
| 272 | |
| 273 | } |
| 274 | |
| 275 | TEST_SUITE("SpaceToBatchND_CpuRefTests") |
| 276 | { |
| 277 | |
| 278 | TEST_CASE ("SpaceToBatchND_Fp32_CpuRef_Test") |
| 279 | { |
| 280 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 281 | SpaceToBatchNDFp32Test(backends); |
| 282 | } |
| 283 | |
| 284 | TEST_CASE ("SpaceToBatchND_Fp32_Padding_CpuRef_Test") |
| 285 | { |
| 286 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 287 | SpaceToBatchNDFp32PaddingTest(backends); |
| 288 | } |
| 289 | |
| 290 | TEST_CASE ("SpaceToBatchND_Uint8_CpuRef_Test") |
| 291 | { |
| 292 | std::vector<armnn::BackendId> backends = {armnn::Compute::CpuRef}; |
| 293 | SpaceToBatchNDUint8Test(backends); |
| 294 | } |
| 295 | |
| 296 | } |
| 297 | |
| 298 | } // namespace armnnDelegate |