Teresa Charlin | 79a06a5 | 2023-07-13 17:16:45 +0100 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2023 Arm Ltd and Contributors. All rights reserved. |
| 3 | // SPDX-License-Identifier: MIT |
| 4 | // |
| 5 | |
| 6 | #include "RefTileWorkload.hpp" |
| 7 | #include "RefWorkloadUtils.hpp" |
| 8 | #include "Tile.hpp" |
| 9 | #include "Profiling.hpp" |
| 10 | |
| 11 | namespace armnn |
| 12 | { |
| 13 | |
| 14 | RefTileWorkload::RefTileWorkload(const TileQueueDescriptor& descriptor, const WorkloadInfo& info) |
| 15 | : RefBaseWorkload(descriptor, info) |
| 16 | {} |
| 17 | |
| 18 | void RefTileWorkload::Execute() const |
| 19 | { |
| 20 | Execute(m_Data.m_Inputs, m_Data.m_Outputs); |
| 21 | } |
| 22 | |
| 23 | void RefTileWorkload::ExecuteAsync(ExecutionData& executionData) |
| 24 | { |
| 25 | WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data); |
| 26 | Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs); |
| 27 | } |
| 28 | |
| 29 | void RefTileWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const |
| 30 | { |
Mike Kelly | 7cbe781 | 2023-07-25 17:37:33 +0100 | [diff] [blame] | 31 | ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID("RefTileWorkload_Execute"); |
Teresa Charlin | 79a06a5 | 2023-07-13 17:16:45 +0100 | [diff] [blame] | 32 | |
| 33 | const TensorInfo& inputInfo = GetTensorInfo(inputs[0]); |
| 34 | |
| 35 | std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(GetTensorInfo(inputs[0]), |
| 36 | inputs[0]->Map()); |
| 37 | |
| 38 | std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(GetTensorInfo(outputs[0]), |
| 39 | outputs[0]->Map()); |
| 40 | |
| 41 | Tile(m_Data.m_Parameters, |
| 42 | inputInfo, |
| 43 | *inputDecoder, |
| 44 | *outputEncoder); |
| 45 | } |
| 46 | |
| 47 | } // namespace armnn |