Laurent Carlier | 749294b | 2020-06-01 09:03:17 +0100 | [diff] [blame] | 1 | // |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
Matteo Martincigh | e5b8eb9 | 2019-11-28 15:45:42 +0000 | [diff] [blame] | 5 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 6 | #pragma once |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 7 | |
Matteo Martincigh | e5b8eb9 | 2019-11-28 15:45:42 +0000 | [diff] [blame] | 8 | #include <armnn/backends/CpuTensorHandleFwd.hpp> |
| 9 | #include <armnn/backends/ITensorHandle.hpp> |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 10 | |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 11 | #include <armnn/TypesUtils.hpp> |
Aron Virginas-Tar | c9cc804 | 2018-11-01 16:15:57 +0000 | [diff] [blame] | 12 | |
Matteo Martincigh | e5b8eb9 | 2019-11-28 15:45:42 +0000 | [diff] [blame] | 13 | #include <CompatibleTypes.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 14 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 15 | #include <algorithm> |
| 16 | |
Narumol Prangnawarat | ac2770a | 2020-04-01 16:51:23 +0100 | [diff] [blame] | 17 | #include <armnn/utility/Assert.hpp> |
Matteo Martincigh | e5b8eb9 | 2019-11-28 15:45:42 +0000 | [diff] [blame] | 18 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 19 | namespace armnn |
| 20 | { |
| 21 | |
Matthew Bentham | 4cefc41 | 2019-06-18 16:14:34 +0100 | [diff] [blame] | 22 | // Get a TensorShape representing the strides (in bytes) for each dimension |
| 23 | // of a tensor, assuming fully packed data with no padding |
| 24 | TensorShape GetUnpaddedTensorStrides(const TensorInfo& tensorInfo); |
| 25 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 26 | // Abstract tensor handles wrapping a CPU-readable region of memory, interpreting it as tensor data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 27 | class ConstCpuTensorHandle : public ITensorHandle |
| 28 | { |
| 29 | public: |
| 30 | template <typename T> |
| 31 | const T* GetConstTensor() const |
| 32 | { |
Narumol Prangnawarat | ac2770a | 2020-04-01 16:51:23 +0100 | [diff] [blame] | 33 | ARMNN_ASSERT(CompatibleTypes<T>(GetTensorInfo().GetDataType())); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 34 | return reinterpret_cast<const T*>(m_Memory); |
| 35 | } |
| 36 | |
| 37 | const TensorInfo& GetTensorInfo() const |
| 38 | { |
| 39 | return m_TensorInfo; |
| 40 | } |
| 41 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 42 | virtual void Manage() override {} |
| 43 | |
| 44 | virtual ITensorHandle* GetParent() const override { return nullptr; } |
| 45 | |
| 46 | virtual const void* Map(bool /* blocking = true */) const override { return m_Memory; } |
| 47 | virtual void Unmap() const override {} |
| 48 | |
| 49 | TensorShape GetStrides() const override |
| 50 | { |
Matthew Bentham | 4cefc41 | 2019-06-18 16:14:34 +0100 | [diff] [blame] | 51 | return GetUnpaddedTensorStrides(m_TensorInfo); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 52 | } |
| 53 | TensorShape GetShape() const override { return m_TensorInfo.GetShape(); } |
| 54 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 55 | protected: |
| 56 | ConstCpuTensorHandle(const TensorInfo& tensorInfo); |
| 57 | |
| 58 | void SetConstMemory(const void* mem) { m_Memory = mem; } |
| 59 | |
| 60 | private: |
David Beck | 09e2f27 | 2018-10-30 11:38:41 +0000 | [diff] [blame] | 61 | // Only used for testing |
Narumol Prangnawarat | ac2770a | 2020-04-01 16:51:23 +0100 | [diff] [blame] | 62 | void CopyOutTo(void *) const override { ARMNN_ASSERT_MSG(false, "Unimplemented"); } |
| 63 | void CopyInFrom(const void*) override { ARMNN_ASSERT_MSG(false, "Unimplemented"); } |
David Beck | 09e2f27 | 2018-10-30 11:38:41 +0000 | [diff] [blame] | 64 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 65 | ConstCpuTensorHandle(const ConstCpuTensorHandle& other) = delete; |
| 66 | ConstCpuTensorHandle& operator=(const ConstCpuTensorHandle& other) = delete; |
| 67 | |
| 68 | TensorInfo m_TensorInfo; |
| 69 | const void* m_Memory; |
| 70 | }; |
| 71 | |
Matteo Martincigh | 747ef82 | 2018-12-18 09:26:39 +0000 | [diff] [blame] | 72 | template<> |
| 73 | const void* ConstCpuTensorHandle::GetConstTensor<void>() const; |
| 74 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 75 | // Abstract specialization of ConstCpuTensorHandle that allows write access to the same data. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 76 | class CpuTensorHandle : public ConstCpuTensorHandle |
| 77 | { |
| 78 | public: |
| 79 | template <typename T> |
| 80 | T* GetTensor() const |
| 81 | { |
Narumol Prangnawarat | ac2770a | 2020-04-01 16:51:23 +0100 | [diff] [blame] | 82 | ARMNN_ASSERT(CompatibleTypes<T>(GetTensorInfo().GetDataType())); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 83 | return reinterpret_cast<T*>(m_MutableMemory); |
| 84 | } |
| 85 | |
| 86 | protected: |
| 87 | CpuTensorHandle(const TensorInfo& tensorInfo); |
| 88 | |
| 89 | void SetMemory(void* mem) |
| 90 | { |
| 91 | m_MutableMemory = mem; |
| 92 | SetConstMemory(m_MutableMemory); |
| 93 | } |
| 94 | |
| 95 | private: |
| 96 | |
| 97 | CpuTensorHandle(const CpuTensorHandle& other) = delete; |
| 98 | CpuTensorHandle& operator=(const CpuTensorHandle& other) = delete; |
| 99 | void* m_MutableMemory; |
| 100 | }; |
| 101 | |
Matteo Martincigh | 747ef82 | 2018-12-18 09:26:39 +0000 | [diff] [blame] | 102 | template <> |
| 103 | void* CpuTensorHandle::GetTensor<void>() const; |
| 104 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 105 | // A CpuTensorHandle that owns the wrapped memory region. |
| 106 | class ScopedCpuTensorHandle : public CpuTensorHandle |
| 107 | { |
| 108 | public: |
| 109 | explicit ScopedCpuTensorHandle(const TensorInfo& tensorInfo); |
| 110 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 111 | // Copies contents from Tensor. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 112 | explicit ScopedCpuTensorHandle(const ConstTensor& tensor); |
| 113 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 114 | // Copies contents from ConstCpuTensorHandle |
| 115 | explicit ScopedCpuTensorHandle(const ConstCpuTensorHandle& tensorHandle); |
| 116 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 117 | ScopedCpuTensorHandle(const ScopedCpuTensorHandle& other); |
| 118 | ScopedCpuTensorHandle& operator=(const ScopedCpuTensorHandle& other); |
| 119 | ~ScopedCpuTensorHandle(); |
| 120 | |
| 121 | virtual void Allocate() override; |
| 122 | |
| 123 | private: |
David Beck | 09e2f27 | 2018-10-30 11:38:41 +0000 | [diff] [blame] | 124 | // Only used for testing |
| 125 | void CopyOutTo(void* memory) const override; |
| 126 | void CopyInFrom(const void* memory) override; |
| 127 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 128 | void CopyFrom(const ScopedCpuTensorHandle& other); |
| 129 | void CopyFrom(const void* srcMemory, unsigned int numBytes); |
| 130 | }; |
| 131 | |
| 132 | // A CpuTensorHandle that wraps an already allocated memory region. |
| 133 | // |
| 134 | // Clients must make sure the passed in memory region stays alive for the lifetime of |
| 135 | // the PassthroughCpuTensorHandle instance. |
| 136 | // |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 137 | // Note there is no polymorphism to/from ConstPassthroughCpuTensorHandle. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 138 | class PassthroughCpuTensorHandle : public CpuTensorHandle |
| 139 | { |
| 140 | public: |
| 141 | PassthroughCpuTensorHandle(const TensorInfo& tensorInfo, void* mem) |
| 142 | : CpuTensorHandle(tensorInfo) |
| 143 | { |
| 144 | SetMemory(mem); |
| 145 | } |
| 146 | |
| 147 | virtual void Allocate() override; |
| 148 | }; |
| 149 | |
| 150 | // A ConstCpuTensorHandle that wraps an already allocated memory region. |
| 151 | // |
| 152 | // This allows users to pass in const memory to a network. |
| 153 | // Clients must make sure the passed in memory region stays alive for the lifetime of |
| 154 | // the PassthroughCpuTensorHandle instance. |
| 155 | // |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 156 | // Note there is no polymorphism to/from PassthroughCpuTensorHandle. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 157 | class ConstPassthroughCpuTensorHandle : public ConstCpuTensorHandle |
| 158 | { |
| 159 | public: |
| 160 | ConstPassthroughCpuTensorHandle(const TensorInfo& tensorInfo, const void* mem) |
| 161 | : ConstCpuTensorHandle(tensorInfo) |
| 162 | { |
| 163 | SetConstMemory(mem); |
| 164 | } |
| 165 | |
| 166 | virtual void Allocate() override; |
| 167 | }; |
| 168 | |
| 169 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 170 | // Template specializations. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 171 | |
| 172 | template <> |
| 173 | const void* ConstCpuTensorHandle::GetConstTensor() const; |
| 174 | |
| 175 | template <> |
| 176 | void* CpuTensorHandle::GetTensor() const; |
| 177 | |
| 178 | } // namespace armnn |