telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 1 | // |
| 2 | // Copyright © 2017 Arm Ltd. All rights reserved. |
David Beck | ecb56cd | 2018-09-05 12:52:57 +0100 | [diff] [blame] | 3 | // SPDX-License-Identifier: MIT |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 4 | // |
| 5 | |
arovir01 | 9e53a35 | 2018-08-31 15:26:35 +0100 | [diff] [blame] | 6 | #include "NeonNormalizationFloatWorkload.hpp" |
David Beck | 0dbe0ee | 2018-09-24 15:59:27 +0100 | [diff] [blame] | 7 | #include <backends/neon/NeonLayerSupport.hpp> |
David Beck | 711fa31 | 2018-09-24 10:46:38 +0100 | [diff] [blame] | 8 | #include <backends/aclCommon/ArmComputeUtils.hpp> |
| 9 | #include <backends/aclCommon/ArmComputeTensorUtils.hpp> |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 10 | |
narpra01 | 33cea4d | 2018-09-27 16:46:14 +0100 | [diff] [blame] | 11 | using namespace armnn::armcomputetensorutils; |
| 12 | |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 13 | namespace armnn |
| 14 | { |
| 15 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 16 | arm_compute::Status NeonNormalizationWorkloadValidate(const TensorInfo& input, |
| 17 | const TensorInfo& output, |
| 18 | const NormalizationDescriptor& descriptor) |
| 19 | { |
narpra01 | 33cea4d | 2018-09-27 16:46:14 +0100 | [diff] [blame] | 20 | const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout); |
| 21 | const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 22 | |
narpra01 | 33cea4d | 2018-09-27 16:46:14 +0100 | [diff] [blame] | 23 | arm_compute::NormalizationLayerInfo normalizationInfo = BuildArmComputeNormalizationLayerInfo(descriptor); |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 24 | |
| 25 | return arm_compute::NENormalizationLayer::validate(&aclInput, &aclOutput, normalizationInfo); |
| 26 | } |
| 27 | |
arovir01 | 9e53a35 | 2018-08-31 15:26:35 +0100 | [diff] [blame] | 28 | NeonNormalizationFloatWorkload::NeonNormalizationFloatWorkload(const NormalizationQueueDescriptor& descriptor, |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 29 | const WorkloadInfo& info, |
| 30 | std::shared_ptr<arm_compute::MemoryManagerOnDemand>& memoryManager) |
| 31 | : FloatWorkload<NormalizationQueueDescriptor>(descriptor, info) |
surmeh01 | 3537c2c | 2018-05-18 16:31:43 +0100 | [diff] [blame] | 32 | , m_NormalizationLayer(memoryManager) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 33 | { |
arovir01 | 9e53a35 | 2018-08-31 15:26:35 +0100 | [diff] [blame] | 34 | m_Data.ValidateInputsOutputs("NeonNormalizationFloatWorkload", 1, 1); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 35 | std::string reasonIfUnsupported; |
arovir01 | 085f0a4 | 2018-10-08 14:48:19 +0100 | [diff] [blame] | 36 | if (!IsNeonNormalizationDescParamsSupported(Optional<std::string&>(reasonIfUnsupported), m_Data.m_Parameters)) |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 37 | { |
| 38 | throw UnimplementedException(reasonIfUnsupported); |
| 39 | } |
| 40 | |
telsoa01 | c577f2c | 2018-08-31 09:22:23 +0100 | [diff] [blame] | 41 | // Input and output tensors have to have the same dimensionality. |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 42 | if (info.m_InputTensorInfos[0].GetShape()[1] != info.m_OutputTensorInfos[0].GetShape()[1] |
| 43 | || info.m_InputTensorInfos[0].GetShape()[0] != info.m_OutputTensorInfos[0].GetShape()[0] |
| 44 | || info.m_InputTensorInfos[0].GetShape()[3] != info.m_OutputTensorInfos[0].GetShape()[3] |
| 45 | || info.m_InputTensorInfos[0].GetShape()[2] != info.m_OutputTensorInfos[0].GetShape()[2]) |
| 46 | { |
| 47 | throw InvalidArgumentException("Normalization requires input and output tensors to have equal dimensionality."); |
| 48 | } |
| 49 | |
| 50 | arm_compute::ITensor& input = boost::polymorphic_downcast<INeonTensorHandle*>(m_Data.m_Inputs[0])->GetTensor(); |
| 51 | arm_compute::ITensor& output = boost::polymorphic_downcast<INeonTensorHandle*>(m_Data.m_Outputs[0])->GetTensor(); |
narpra01 | 55a97bc | 2018-10-02 14:35:53 +0100 | [diff] [blame] | 52 | arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); |
| 53 | input.info()->set_data_layout(aclDataLayout); |
| 54 | output.info()->set_data_layout(aclDataLayout); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 55 | |
| 56 | const arm_compute::NormType normType = |
| 57 | ConvertNormalizationAlgorithmChannelToAclNormType(m_Data.m_Parameters.m_NormChannelType); |
| 58 | arm_compute::NormalizationLayerInfo normalizationInfo(normType, |
| 59 | m_Data.m_Parameters.m_NormSize, |
| 60 | m_Data.m_Parameters.m_Alpha, |
| 61 | m_Data.m_Parameters.m_Beta, |
| 62 | m_Data.m_Parameters.m_K, |
| 63 | false); |
| 64 | |
| 65 | m_NormalizationLayer.configure(&input, &output, normalizationInfo); |
| 66 | } |
| 67 | |
arovir01 | 9e53a35 | 2018-08-31 15:26:35 +0100 | [diff] [blame] | 68 | void NeonNormalizationFloatWorkload::Execute() const |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 69 | { |
arovir01 | 9e53a35 | 2018-08-31 15:26:35 +0100 | [diff] [blame] | 70 | ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonNormalizationFloatWorkload_Execute"); |
telsoa01 | 4fcda01 | 2018-03-09 14:13:49 +0000 | [diff] [blame] | 71 | m_NormalizationLayer.run(); |
| 72 | } |
| 73 | |
| 74 | } //namespace armnn |