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Nikhil Raj1dc83fe2024-05-16 09:47:51 +0100[diff] [blame]39 &#160;<span id="projectnumber">24.05</span>
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96<div class="title">RefSplitterWorkload.cpp</div> </div>
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98<div class="contents">
99<a href="_ref_splitter_workload_8cpp.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a name="l00001"></a><span class="lineno"> 1</span>&#160;<span class="comment">//</span></div>
100<div class="line"><a name="l00002"></a><span class="lineno"> 2</span>&#160;<span class="comment">// Copyright © 2019-2023 Arm Ltd and Contributors. All rights reserved.</span></div>
101<div class="line"><a name="l00003"></a><span class="lineno"> 3</span>&#160;<span class="comment">// SPDX-License-Identifier: MIT</span></div>
102<div class="line"><a name="l00004"></a><span class="lineno"> 4</span>&#160;<span class="comment">//</span></div>
103<div class="line"><a name="l00005"></a><span class="lineno"> 5</span>&#160; </div>
104<div class="line"><a name="l00006"></a><span class="lineno"> 6</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_ref_splitter_workload_8hpp.html">RefSplitterWorkload.hpp</a>&quot;</span></div>
105<div class="line"><a name="l00007"></a><span class="lineno"> 7</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_splitter_8hpp.html">Splitter.hpp</a>&quot;</span></div>
106<div class="line"><a name="l00008"></a><span class="lineno"> 8</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_ref_workload_utils_8hpp.html">RefWorkloadUtils.hpp</a>&quot;</span></div>
107<div class="line"><a name="l00009"></a><span class="lineno"> 9</span>&#160;<span class="preprocessor">#include &quot;<a class="code" href="_profiling_8hpp.html">Profiling.hpp</a>&quot;</span></div>
108<div class="line"><a name="l00010"></a><span class="lineno"> 10</span>&#160; </div>
109<div class="line"><a name="l00011"></a><span class="lineno"> 11</span>&#160;<span class="keyword">namespace </span><a class="code" href="namespacearmnn.html">armnn</a></div>
110<div class="line"><a name="l00012"></a><span class="lineno"> 12</span>&#160;{</div>
111<div class="line"><a name="l00013"></a><span class="lineno"> 13</span>&#160; </div>
112<div class="line"><a name="l00014"></a><span class="lineno"><a class="line" href="classarmnn_1_1_ref_splitter_workload.html#ae071e8822437c78baea75c3aef3a263a"> 14</a></span>&#160;<span class="keywordtype">void</span> <a class="code" href="classarmnn_1_1_ref_splitter_workload.html#ae071e8822437c78baea75c3aef3a263a">RefSplitterWorkload::Execute</a>()<span class="keyword"> const</span></div>
113<div class="line"><a name="l00015"></a><span class="lineno"> 15</span>&#160;<span class="keyword"></span>{</div>
114<div class="line"><a name="l00016"></a><span class="lineno"> 16</span>&#160; <a class="code" href="classarmnn_1_1_ref_splitter_workload.html#ae071e8822437c78baea75c3aef3a263a">Execute</a>(<a class="code" href="classarmnn_1_1_base_workload.html#afb8d2c8817c75de9d01a4c0e0d5c160b">m_Data</a>.<a class="code" href="structarmnn_1_1_queue_descriptor.html#a4b50e46a6810018f3edecfb68b2a76b3">m_Inputs</a>, <a class="code" href="classarmnn_1_1_base_workload.html#afb8d2c8817c75de9d01a4c0e0d5c160b">m_Data</a>.<a class="code" href="structarmnn_1_1_queue_descriptor.html#a6abd491bb99ffe88bd472c1ae5a1ed1a">m_Outputs</a>);</div>
115<div class="line"><a name="l00017"></a><span class="lineno"> 17</span>&#160;}</div>
116<div class="line"><a name="l00018"></a><span class="lineno"> 18</span>&#160; </div>
117<div class="line"><a name="l00019"></a><span class="lineno"><a class="line" href="classarmnn_1_1_ref_splitter_workload.html#ae1c43d025fc90382d7aff7a500937e2c"> 19</a></span>&#160;<span class="keywordtype">void</span> <a class="code" href="classarmnn_1_1_ref_splitter_workload.html#ae1c43d025fc90382d7aff7a500937e2c">RefSplitterWorkload::ExecuteAsync</a>(<a class="code" href="structarmnn_1_1experimental_1_1_execution_data.html">ExecutionData</a>&amp; executionData)</div>
118<div class="line"><a name="l00020"></a><span class="lineno"> 20</span>&#160;{</div>
119<div class="line"><a name="l00021"></a><span class="lineno"> 21</span>&#160; <a class="code" href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html">WorkingMemDescriptor</a>* workingMemDescriptor = <span class="keyword">static_cast&lt;</span><a class="code" href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html">WorkingMemDescriptor</a>*<span class="keyword">&gt;</span>(executionData.<a class="code" href="structarmnn_1_1experimental_1_1_execution_data.html#ad2b382076f26f48cd44783cfca2e3642">m_Data</a>);</div>
120<div class="line"><a name="l00022"></a><span class="lineno"> 22</span>&#160; <a class="code" href="classarmnn_1_1_ref_splitter_workload.html#ae071e8822437c78baea75c3aef3a263a">Execute</a>(workingMemDescriptor-&gt;<a class="code" href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html#a4b50e46a6810018f3edecfb68b2a76b3">m_Inputs</a>, workingMemDescriptor-&gt;<a class="code" href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html#a6abd491bb99ffe88bd472c1ae5a1ed1a">m_Outputs</a>);</div>
121<div class="line"><a name="l00023"></a><span class="lineno"> 23</span>&#160;}</div>
122<div class="line"><a name="l00024"></a><span class="lineno"> 24</span>&#160; </div>
123<div class="line"><a name="l00025"></a><span class="lineno"> 25</span>&#160;<span class="keywordtype">void</span> <a class="code" href="classarmnn_1_1_ref_splitter_workload.html#ae071e8822437c78baea75c3aef3a263a">RefSplitterWorkload::Execute</a>(std::vector&lt;ITensorHandle*&gt; inputs, std::vector&lt;ITensorHandle*&gt; outputs)<span class="keyword"> const</span></div>
124<div class="line"><a name="l00026"></a><span class="lineno"> 26</span>&#160;<span class="keyword"></span>{</div>
125<div class="line"><a name="l00027"></a><span class="lineno"> 27</span>&#160; <a class="code" href="_ref_workload_utils_8hpp.html#a06acca4fd832e0fb179604112c0505af">ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID</a>(<span class="stringliteral">&quot;RefSplitterWorkload_Execute&quot;</span>);</div>
126<div class="line"><a name="l00028"></a><span class="lineno"> 28</span>&#160; </div>
127<div class="line"><a name="l00029"></a><span class="lineno"> 29</span>&#160; <a class="code" href="namespacearmnn.html#a3e6cbdbfb81dbcea27d219a6553838dc">Split</a>(<a class="code" href="classarmnn_1_1_base_workload.html#afb8d2c8817c75de9d01a4c0e0d5c160b">m_Data</a>, inputs, outputs);</div>
128<div class="line"><a name="l00030"></a><span class="lineno"> 30</span>&#160;}</div>
129<div class="line"><a name="l00031"></a><span class="lineno"> 31</span>&#160; </div>
130<div class="line"><a name="l00032"></a><span class="lineno"> 32</span>&#160;} <span class="comment">//namespace armnn</span></div>
131</div><!-- fragment --></div><!-- contents -->
132</div><!-- doc-content -->
133<div class="ttc" id="astructarmnn_1_1experimental_1_1_execution_data_html_ad2b382076f26f48cd44783cfca2e3642"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_execution_data.html#ad2b382076f26f48cd44783cfca2e3642">armnn::experimental::ExecutionData::m_Data</a></div><div class="ttdeci">void * m_Data</div><div class="ttdef"><b>Definition:</b> <a href="_execution_data_8hpp_source.html#l00016">ExecutionData.hpp:16</a></div></div>
134<div class="ttc" id="a_splitter_8hpp_html"><div class="ttname"><a href="_splitter_8hpp.html">Splitter.hpp</a></div></div>
Nikhil Raj1dc83fe2024-05-16 09:47:51 +0100[diff] [blame]135<div class="ttc" id="anamespacearmnn_html_a3e6cbdbfb81dbcea27d219a6553838dc"><div class="ttname"><a href="namespacearmnn.html#a3e6cbdbfb81dbcea27d219a6553838dc">armnn::Split</a></div><div class="ttdeci">void Split(const SplitterQueueDescriptor &amp;data, std::vector&lt; ITensorHandle * &gt; inputs, std::vector&lt; ITensorHandle * &gt; outputs)</div><div class="ttdef"><b>Definition:</b> <a href="_splitter_8cpp_source.html#l00020">Splitter.cpp:20</a></div></div>
Nikhil Raj03c7ff32023-08-22 12:00:04 +0100[diff] [blame]136<div class="ttc" id="a_profiling_8hpp_html"><div class="ttname"><a href="_profiling_8hpp.html">Profiling.hpp</a></div></div>
137<div class="ttc" id="a_ref_workload_utils_8hpp_html_a06acca4fd832e0fb179604112c0505af"><div class="ttname"><a href="_ref_workload_utils_8hpp.html#a06acca4fd832e0fb179604112c0505af">ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID</a></div><div class="ttdeci">#define ARMNN_SCOPED_PROFILING_EVENT_REF_NAME_GUID(label)</div><div class="ttdoc">Creates a profiling event that uses GetGuid() and GetName() from the calling class.</div><div class="ttdef"><b>Definition:</b> <a href="_ref_workload_utils_8hpp_source.html#l00022">RefWorkloadUtils.hpp:22</a></div></div>
138<div class="ttc" id="a_ref_splitter_workload_8hpp_html"><div class="ttname"><a href="_ref_splitter_workload_8hpp.html">RefSplitterWorkload.hpp</a></div></div>
139<div class="ttc" id="aclassarmnn_1_1_ref_splitter_workload_html_ae071e8822437c78baea75c3aef3a263a"><div class="ttname"><a href="classarmnn_1_1_ref_splitter_workload.html#ae071e8822437c78baea75c3aef3a263a">armnn::RefSplitterWorkload::Execute</a></div><div class="ttdeci">void Execute() const override</div><div class="ttdef"><b>Definition:</b> <a href="_ref_splitter_workload_8cpp_source.html#l00014">RefSplitterWorkload.cpp:14</a></div></div>
140<div class="ttc" id="astructarmnn_1_1_queue_descriptor_html_a6abd491bb99ffe88bd472c1ae5a1ed1a"><div class="ttname"><a href="structarmnn_1_1_queue_descriptor.html#a6abd491bb99ffe88bd472c1ae5a1ed1a">armnn::QueueDescriptor::m_Outputs</a></div><div class="ttdeci">std::vector&lt; ITensorHandle * &gt; m_Outputs</div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.html#l00027">WorkloadData.hpp:27</a></div></div>
141<div class="ttc" id="a_ref_workload_utils_8hpp_html"><div class="ttname"><a href="_ref_workload_utils_8hpp.html">RefWorkloadUtils.hpp</a></div></div>
142<div class="ttc" id="aclassarmnn_1_1_base_workload_html_afb8d2c8817c75de9d01a4c0e0d5c160b"><div class="ttname"><a href="classarmnn_1_1_base_workload.html#afb8d2c8817c75de9d01a4c0e0d5c160b">armnn::BaseWorkload&lt; SplitterQueueDescriptor &gt;::m_Data</a></div><div class="ttdeci">SplitterQueueDescriptor m_Data</div><div class="ttdef"><b>Definition:</b> <a href="_workload_8hpp_source.html#l00089">Workload.hpp:89</a></div></div>
143<div class="ttc" id="astructarmnn_1_1experimental_1_1_working_mem_descriptor_html_a4b50e46a6810018f3edecfb68b2a76b3"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html#a4b50e46a6810018f3edecfb68b2a76b3">armnn::experimental::WorkingMemDescriptor::m_Inputs</a></div><div class="ttdeci">std::vector&lt; ITensorHandle * &gt; m_Inputs</div><div class="ttdef"><b>Definition:</b> <a href="_working_mem_descriptor_8hpp_source.html#l00020">WorkingMemDescriptor.hpp:20</a></div></div>
144<div class="ttc" id="anamespacearmnn_html"><div class="ttname"><a href="namespacearmnn.html">armnn</a></div><div class="ttdoc">Copyright (c) 2021 ARM Limited and Contributors.</div><div class="ttdef"><b>Definition:</b> <a href="01__00__quick__start_8dox_source.html#l00006">01_00_quick_start.dox:6</a></div></div>
145<div class="ttc" id="astructarmnn_1_1experimental_1_1_working_mem_descriptor_html"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html">armnn::experimental::WorkingMemDescriptor</a></div><div class="ttdef"><b>Definition:</b> <a href="_working_mem_descriptor_8hpp_source.html#l00018">WorkingMemDescriptor.hpp:18</a></div></div>
146<div class="ttc" id="aclassarmnn_1_1_ref_splitter_workload_html_ae1c43d025fc90382d7aff7a500937e2c"><div class="ttname"><a href="classarmnn_1_1_ref_splitter_workload.html#ae1c43d025fc90382d7aff7a500937e2c">armnn::RefSplitterWorkload::ExecuteAsync</a></div><div class="ttdeci">void ExecuteAsync(ExecutionData &amp;executionData) override</div><div class="ttdef"><b>Definition:</b> <a href="_ref_splitter_workload_8cpp_source.html#l00019">RefSplitterWorkload.cpp:19</a></div></div>
147<div class="ttc" id="astructarmnn_1_1experimental_1_1_working_mem_descriptor_html_a6abd491bb99ffe88bd472c1ae5a1ed1a"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_working_mem_descriptor.html#a6abd491bb99ffe88bd472c1ae5a1ed1a">armnn::experimental::WorkingMemDescriptor::m_Outputs</a></div><div class="ttdeci">std::vector&lt; ITensorHandle * &gt; m_Outputs</div><div class="ttdef"><b>Definition:</b> <a href="_working_mem_descriptor_8hpp_source.html#l00021">WorkingMemDescriptor.hpp:21</a></div></div>
148<div class="ttc" id="astructarmnn_1_1_queue_descriptor_html_a4b50e46a6810018f3edecfb68b2a76b3"><div class="ttname"><a href="structarmnn_1_1_queue_descriptor.html#a4b50e46a6810018f3edecfb68b2a76b3">armnn::QueueDescriptor::m_Inputs</a></div><div class="ttdeci">std::vector&lt; ITensorHandle * &gt; m_Inputs</div><div class="ttdef"><b>Definition:</b> <a href="_workload_data_8hpp_source.html#l00026">WorkloadData.hpp:26</a></div></div>
149<div class="ttc" id="astructarmnn_1_1experimental_1_1_execution_data_html"><div class="ttname"><a href="structarmnn_1_1experimental_1_1_execution_data.html">armnn::experimental::ExecutionData</a></div><div class="ttdef"><b>Definition:</b> <a href="_execution_data_8hpp_source.html#l00014">ExecutionData.hpp:14</a></div></div>
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