Fix (part of) SEI CERT coding standard warning
Change-Id: Ic370f071eb4f3ed83cd9e5a6b587d7d527c37825
diff --git a/include/ethosu_driver.h b/include/ethosu_driver.h
index 77a015c..9c9f173 100644
--- a/include/ethosu_driver.h
+++ b/include/ethosu_driver.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2022 Arm Limited. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright 2019-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -215,7 +215,7 @@
* @return 0 on success, else negative error code
*/
int ethosu_init(struct ethosu_driver *drv,
- const void *base_address,
+ void *const base_address,
const void *fast_memory,
const size_t fast_memory_size,
uint32_t secure_enable,
@@ -285,7 +285,7 @@
int ethosu_invoke_v3(struct ethosu_driver *drv,
const void *custom_data_ptr,
const int custom_data_size,
- const uint64_t *base_addr,
+ uint64_t *const base_addr,
const size_t *base_addr_size,
const int num_base_addr,
void *user_arg);
@@ -302,7 +302,7 @@
int ethosu_invoke_async(struct ethosu_driver *drv,
const void *custom_data_ptr,
const int custom_data_size,
- const uint64_t *base_addr,
+ uint64_t *const base_addr,
const size_t *base_addr_size,
const int num_base_addr,
void *user_arg);
@@ -340,11 +340,15 @@
*/
static inline int ethosu_invoke_v2(const void *custom_data_ptr,
const int custom_data_size,
- const uint64_t *base_addr,
+ uint64_t *const base_addr,
const size_t *base_addr_size,
const int num_base_addr)
{
struct ethosu_driver *drv = ethosu_reserve_driver();
+ if (!drv)
+ {
+ return -1;
+ }
int result = ethosu_invoke_v3(drv, custom_data_ptr, custom_data_size, base_addr, base_addr_size, num_base_addr, 0);
ethosu_release_driver(drv);
return result;
diff --git a/src/ethosu_device.h b/src/ethosu_device.h
index 0b45fd6..02942b1 100644
--- a/src/ethosu_device.h
+++ b/src/ethosu_device.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2022 Arm Limited. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright 2019-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -59,7 +59,7 @@
/**
* Initialize the device.
*/
-struct ethosu_device *ethosu_dev_init(const void *base_address, uint32_t secure_enable, uint32_t privilege_enable);
+struct ethosu_device *ethosu_dev_init(void *const base_address, uint32_t secure_enable, uint32_t privilege_enable);
/**
* Deinitialize the device.
diff --git a/src/ethosu_device_u55_u65.c b/src/ethosu_device_u55_u65.c
index aec2027..50b78af 100644
--- a/src/ethosu_device_u55_u65.c
+++ b/src/ethosu_device_u55_u65.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2022 Arm Limited. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright 2019-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -67,7 +67,7 @@
return address;
}
-struct ethosu_device *ethosu_dev_init(const void *base_address, uint32_t secure_enable, uint32_t privilege_enable)
+struct ethosu_device *ethosu_dev_init(void *const base_address, uint32_t secure_enable, uint32_t privilege_enable)
{
struct ethosu_device *dev = malloc(sizeof(struct ethosu_device));
if (!dev)
@@ -167,7 +167,7 @@
struct cmd_r cmd;
uint64_t qbase = ethosu_address_remap((uintptr_t)cmd_stream_ptr, -1);
assert(qbase <= ADDRESS_MASK);
- LOG_DEBUG("QBASE=0x%016llx, QSIZE=%u, cmd_stream_ptr=%p", qbase, cms_length, cmd_stream_ptr);
+ LOG_DEBUG("QBASE=0x%016llx, QSIZE=%" PRIu32 ", cmd_stream_ptr=%p", qbase, cms_length, cmd_stream_ptr);
dev->reg->QBASE.word[0] = qbase & 0xffffffff;
#ifdef ETHOSU65
@@ -190,12 +190,12 @@
cmd.transition_to_running_state = 1;
dev->reg->CMD.word = cmd.word;
- LOG_DEBUG("CMD=0x%08x", cmd.word);
+ LOG_DEBUG("CMD=0x%08" PRIx32, cmd.word);
}
void ethosu_dev_print_err_status(struct ethosu_device *dev)
{
- LOG_ERR("NPU status=0x%08" PRIx32 ", qread=%" PRIu32 ", cmd_end_reached=%d",
+ LOG_ERR("NPU status=0x%08" PRIx32 ", qread=%" PRIu32 ", cmd_end_reached=%u",
dev->reg->STATUS.word,
dev->reg->QREAD.word,
dev->reg->STATUS.cmd_end_reached);
@@ -307,7 +307,7 @@
}
dev->reg->CMD.word = cmd.word;
- LOG_DEBUG("CMD=0x%08x", cmd.word);
+ LOG_DEBUG("CMD=0x%08" PRIx32, cmd.word);
return ETHOSU_SUCCESS;
}
@@ -323,35 +323,35 @@
hw_cfg.word = dev->reg->CONFIG.word;
hw_id.word = dev->reg->ID.word;
- LOG_INFO("Optimizer config. product=%d, cmd_stream_version=%d, macs_per_cc=%d, shram_size=%d, custom_dma=%d",
+ LOG_INFO("Optimizer config. product=%u, cmd_stream_version=%u, macs_per_cc=%u, shram_size=%u, custom_dma=%u",
opt_cfg->product,
opt_cfg->cmd_stream_version,
opt_cfg->macs_per_cc,
opt_cfg->shram_size,
opt_cfg->custom_dma);
- LOG_INFO("Optimizer config. arch version: %d.%d.%d",
+ LOG_INFO("Optimizer config. arch version: %u.%u.%u",
opt_id->arch_major_rev,
opt_id->arch_minor_rev,
opt_id->arch_patch_rev);
- LOG_INFO("Ethos-U config. product=%d, cmd_stream_version=%d, macs_per_cc=%d, shram_size=%d, custom_dma=%d",
+ LOG_INFO("Ethos-U config. product=%u, cmd_stream_version=%u, macs_per_cc=%u, shram_size=%u, custom_dma=%u",
hw_cfg.product,
hw_cfg.cmd_stream_version,
hw_cfg.macs_per_cc,
hw_cfg.shram_size,
hw_cfg.custom_dma);
- LOG_INFO("Ethos-U. arch version=%d.%d.%d", hw_id.arch_major_rev, hw_id.arch_minor_rev, hw_id.arch_patch_rev);
+ LOG_INFO("Ethos-U. arch version=%u.%u.%u", hw_id.arch_major_rev, hw_id.arch_minor_rev, hw_id.arch_patch_rev);
if (opt_cfg->word != hw_cfg.word)
{
if (hw_cfg.product != opt_cfg->product)
{
- LOG_ERR("NPU config mismatch. npu.product=%d, optimizer.product=%d", hw_cfg.product, opt_cfg->product);
+ LOG_ERR("NPU config mismatch. npu.product=%u, optimizer.product=%u", hw_cfg.product, opt_cfg->product);
ret = false;
}
if (hw_cfg.macs_per_cc != opt_cfg->macs_per_cc)
{
- LOG_ERR("NPU config mismatch. npu.macs_per_cc=%d, optimizer.macs_per_cc=%d",
+ LOG_ERR("NPU config mismatch. npu.macs_per_cc=%u, optimizer.macs_per_cc=%u",
hw_cfg.macs_per_cc,
opt_cfg->macs_per_cc);
ret = false;
@@ -359,7 +359,7 @@
if (hw_cfg.cmd_stream_version != opt_cfg->cmd_stream_version)
{
- LOG_ERR("NPU config mismatch. npu.cmd_stream_version=%d, optimizer.cmd_stream_version=%d",
+ LOG_ERR("NPU config mismatch. npu.cmd_stream_version=%u, optimizer.cmd_stream_version=%u",
hw_cfg.cmd_stream_version,
opt_cfg->cmd_stream_version);
ret = false;
@@ -367,7 +367,7 @@
if (!hw_cfg.custom_dma && opt_cfg->custom_dma)
{
- LOG_ERR("NPU config mismatch. npu.custom_dma=%d, optimizer.custom_dma=%d",
+ LOG_ERR("NPU config mismatch. npu.custom_dma=%u, optimizer.custom_dma=%u",
hw_cfg.custom_dma,
opt_cfg->custom_dma);
ret = false;
@@ -376,7 +376,7 @@
if ((hw_id.arch_major_rev != opt_id->arch_major_rev) || (hw_id.arch_minor_rev < opt_id->arch_minor_rev))
{
- LOG_ERR("NPU arch mismatch. npu.arch=%d.%d.%d, optimizer.arch=%d.%d.%d",
+ LOG_ERR("NPU arch mismatch. npu.arch=%u.%u.%u, optimizer.arch=%u.%u.%u",
hw_id.arch_major_rev,
hw_id.arch_minor_rev,
hw_id.arch_patch_rev,
diff --git a/src/ethosu_driver.c b/src/ethosu_driver.c
index 2a28988..8fac936 100644
--- a/src/ethosu_driver.c
+++ b/src/ethosu_driver.c
@@ -184,7 +184,10 @@
void *__attribute__((weak)) ethosu_semaphore_create(void)
{
struct ethosu_semaphore_t *sem = malloc(sizeof(*sem));
- sem->count = 0;
+ if (sem != NULL)
+ {
+ sem->count = 0;
+ }
return sem;
}
@@ -284,9 +287,9 @@
memset(&drv->job, 0, sizeof(struct ethosu_job));
}
-static int handle_optimizer_config(struct ethosu_driver *drv, struct opt_cfg_s *opt_cfg_p)
+static int handle_optimizer_config(struct ethosu_driver *drv, struct opt_cfg_s const *opt_cfg_p)
{
- LOG_INFO("Optimizer release nbr: %d patch: %d", opt_cfg_p->da_data.rel_nbr, opt_cfg_p->da_data.patch_nbr);
+ LOG_INFO("Optimizer release nbr: %u patch: %u", opt_cfg_p->da_data.rel_nbr, opt_cfg_p->da_data.patch_nbr);
if (ethosu_dev_verify_optimizer_config(drv->dev, opt_cfg_p->cfg, opt_cfg_p->id) != true)
{
@@ -375,7 +378,7 @@
******************************************************************************/
int ethosu_init(struct ethosu_driver *drv,
- const void *base_address,
+ void *const base_address,
const void *fast_memory,
const size_t fast_memory_size,
uint32_t secure_enable,
@@ -585,7 +588,7 @@
int ethosu_invoke_async(struct ethosu_driver *drv,
const void *custom_data_ptr,
const int custom_data_size,
- const uint64_t *base_addr,
+ uint64_t *const base_addr,
const size_t *base_addr_size,
const int num_base_addr,
void *user_arg)
@@ -619,7 +622,7 @@
// Custom data length must be a multiple of 32 bits
if ((custom_data_size % BYTES_IN_32_BITS) != 0)
{
- LOG_ERR("custom_data_size=0x%x not a multiple of 4", custom_data_size);
+ LOG_ERR("custom_data_size=0x%x not a multiple of 4", (unsigned)custom_data_size);
goto err;
}
@@ -628,7 +631,6 @@
// Adjust base address to fast memory area
if (drv->fast_memory != 0 && num_base_addr >= FAST_MEMORY_BASE_ADDR_INDEX)
{
- uint64_t *fast_memory = (uint64_t *)&base_addr[FAST_MEMORY_BASE_ADDR_INDEX];
if (base_addr_size != NULL && base_addr_size[FAST_MEMORY_BASE_ADDR_INDEX] > drv->fast_memory_size)
{
@@ -638,7 +640,7 @@
goto err;
}
- *fast_memory = drv->fast_memory;
+ base_addr[FAST_MEMORY_BASE_ADDR_INDEX] = drv->fast_memory;
}
drv->status_error = false;
@@ -650,7 +652,7 @@
{
case OPTIMIZER_CONFIG:
LOG_DEBUG("OPTIMIZER_CONFIG");
- struct opt_cfg_s *opt_cfg_p = (struct opt_cfg_s *)data_ptr;
+ struct opt_cfg_s const *opt_cfg_p = (const struct opt_cfg_s *)data_ptr;
if (handle_optimizer_config(drv, opt_cfg_p) < 0)
{
@@ -661,8 +663,8 @@
case COMMAND_STREAM:
// Vela only supports putting one COMMAND_STREAM per op
LOG_DEBUG("COMMAND_STREAM");
- void *command_stream = (uint8_t *)(data_ptr) + sizeof(struct cop_data_s);
- int cms_length = (data_ptr->reserved << 16) | data_ptr->length;
+ const uint8_t *command_stream = (const uint8_t *)(data_ptr + 1);
+ int cms_length = (data_ptr->reserved << 16) | data_ptr->length;
if (handle_command_stream(drv, command_stream, cms_length) < 0)
{
@@ -675,7 +677,7 @@
data_ptr += DRIVER_ACTION_LENGTH_32_BIT_WORD;
break;
default:
- LOG_ERR("UNSUPPORTED driver_action_command: %d", data_ptr->driver_action_command);
+ LOG_ERR("UNSUPPORTED driver_action_command: %u", data_ptr->driver_action_command);
goto err;
break;
}
@@ -691,7 +693,7 @@
int ethosu_invoke_v3(struct ethosu_driver *drv,
const void *custom_data_ptr,
const int custom_data_size,
- const uint64_t *base_addr,
+ uint64_t *const base_addr,
const size_t *base_addr_size,
const int num_base_addr,
void *user_arg)
diff --git a/src/ethosu_log.h b/src/ethosu_log.h
index 76fe292..582b91d 100644
--- a/src/ethosu_log.h
+++ b/src/ethosu_log.h
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2021 Arm Limited. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright 2021-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -42,29 +42,29 @@
#endif
// Log formatting
-
-#define LOG(f, ...) fprintf(stdout, f, ##__VA_ARGS__)
+#define LOG(f, ...) (void)fprintf(stdout, f, ##__VA_ARGS__)
#if ETHOSU_LOG_SEVERITY >= ETHOSU_LOG_ERR
-#define LOG_ERR(f, ...) fprintf(stderr, "E: " f " (%s:%d)\n", ##__VA_ARGS__, strrchr("/" __FILE__, '/') + 1, __LINE__)
+#define LOG_ERR(f, ...) \
+ (void)fprintf(stderr, "E: " f " (%s:%d)\n", ##__VA_ARGS__, strrchr("/" __FILE__, '/') + 1, __LINE__)
#else
#define LOG_ERR(f, ...)
#endif
#if ETHOSU_LOG_SEVERITY >= ETHOSU_LOG_WARN
-#define LOG_WARN(f, ...) fprintf(stdout, "W: " f "\n", ##__VA_ARGS__)
+#define LOG_WARN(f, ...) (void)fprintf(stdout, "W: " f "\n", ##__VA_ARGS__)
#else
#define LOG_WARN(f, ...)
#endif
#if ETHOSU_LOG_SEVERITY >= ETHOSU_LOG_INFO
-#define LOG_INFO(f, ...) fprintf(stdout, "I: " f "\n", ##__VA_ARGS__)
+#define LOG_INFO(f, ...) (void)fprintf(stdout, "I: " f "\n", ##__VA_ARGS__)
#else
#define LOG_INFO(f, ...)
#endif
#if ETHOSU_LOG_SEVERITY >= ETHOSU_LOG_DEBUG
-#define LOG_DEBUG(f, ...) fprintf(stdout, "D: %s(): " f "\n", __FUNCTION__, ##__VA_ARGS__)
+#define LOG_DEBUG(f, ...) (void)fprintf(stdout, "D: %s(): " f "\n", __FUNCTION__, ##__VA_ARGS__)
#else
#define LOG_DEBUG(f, ...)
#endif
diff --git a/src/ethosu_pmu.c b/src/ethosu_pmu.c
index af4e503..b5925c4 100644
--- a/src/ethosu_pmu.c
+++ b/src/ethosu_pmu.c
@@ -1,5 +1,5 @@
/*
- * Copyright (c) 2019-2022 Arm Limited.
+ * SPDX-FileCopyrightText: Copyright 2019-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
*
* SPDX-License-Identifier: Apache-2.0
*
@@ -110,7 +110,7 @@
{
assert(num < ETHOSU_PMU_NCOUNTERS);
uint32_t val = pmu_event_value(type);
- LOG_DEBUG("num=%u, type=%d, val=%u", num, type, val);
+ LOG_DEBUG("num=%" PRIu32 ", type=%d, val=%" PRIu32, num, type, val);
drv->dev->reg->PMEVTYPER[num].word = val;
}
@@ -119,7 +119,7 @@
assert(num < ETHOSU_PMU_NCOUNTERS);
uint32_t val = drv->dev->reg->PMEVTYPER[num].word;
enum ethosu_pmu_event_type type = pmu_event_type(val);
- LOG_DEBUG("num=%u, type=%d, val=%u", num, type, val);
+ LOG_DEBUG("num=%" PRIu32 ", type=%d, val=%" PRIu32, num, type, val);
return type;
}
@@ -143,20 +143,20 @@
void ETHOSU_PMU_CNTR_Enable(struct ethosu_driver *drv, uint32_t mask)
{
- LOG_DEBUG("mask=0x%08x", mask);
+ LOG_DEBUG("mask=0x%08" PRIx32, mask);
drv->dev->reg->PMCNTENSET.word = mask;
}
void ETHOSU_PMU_CNTR_Disable(struct ethosu_driver *drv, uint32_t mask)
{
- LOG_DEBUG("mask=0x%08x", mask);
+ LOG_DEBUG("mask=0x%08" PRIx32, mask);
drv->dev->reg->PMCNTENCLR.word = mask;
}
uint32_t ETHOSU_PMU_CNTR_Status(struct ethosu_driver *drv)
{
uint32_t pmcntenset = drv->dev->reg->PMCNTENSET.word;
- LOG_DEBUG("mask=0x%08x", pmcntenset);
+ LOG_DEBUG("mask=0x%08" PRIx32, pmcntenset);
return pmcntenset;
}
@@ -194,7 +194,7 @@
{
assert(num < ETHOSU_PMU_NCOUNTERS);
uint32_t val = drv->dev->reg->PMEVCNTR[num].word;
- LOG_DEBUG("num=%u, val=%u", num, val);
+ LOG_DEBUG("num=%" PRIu32 ", val=%" PRIu32, num, val);
return val;
}
@@ -202,7 +202,7 @@
void ETHOSU_PMU_Set_EVCNTR(struct ethosu_driver *drv, uint32_t num, uint32_t val)
{
assert(num < ETHOSU_PMU_NCOUNTERS);
- LOG_DEBUG("num=%u, val=%u", num, val);
+ LOG_DEBUG("num=%" PRIu32 ", val=%" PRIu32, num, val);
drv->dev->reg->PMEVCNTR[num].word = val;
}
@@ -220,20 +220,20 @@
void ETHOSU_PMU_Set_CNTR_IRQ_Enable(struct ethosu_driver *drv, uint32_t mask)
{
- LOG_DEBUG("mask=0x%08x", mask);
+ LOG_DEBUG("mask=0x%08" PRIx32, mask);
drv->dev->reg->PMINTSET.word = mask;
}
void ETHOSU_PMU_Set_CNTR_IRQ_Disable(struct ethosu_driver *drv, uint32_t mask)
{
- LOG_DEBUG("mask=0x%08x", mask);
+ LOG_DEBUG("mask=0x%08" PRIx32, mask);
drv->dev->reg->PMINTCLR.word = mask;
}
uint32_t ETHOSU_PMU_Get_IRQ_Enable(struct ethosu_driver *drv)
{
uint32_t pmint = drv->dev->reg->PMINTSET.word;
- LOG_DEBUG("mask=0x%08x", pmint);
+ LOG_DEBUG("mask=0x%08" PRIx32, pmint);
return pmint;
}
@@ -255,7 +255,7 @@
for (int i = 0; i < ETHOSU_PMU_NCOUNTERS; i++)
{
- if (mask & (1 << i))
+ if (mask & (1u << i))
{
uint32_t val = ETHOSU_PMU_Get_EVCNTR(drv, i);
drv->dev->reg->PMEVCNTR[i].word = val + 1;
@@ -289,13 +289,13 @@
uint32_t ETHOSU_PMU_Get_QREAD(struct ethosu_driver *drv)
{
uint32_t val = drv->dev->reg->QREAD.word;
- LOG_DEBUG("qread=%u", val);
+ LOG_DEBUG("qread=%" PRIu32, val);
return val;
}
uint32_t ETHOSU_PMU_Get_STATUS(struct ethosu_driver *drv)
{
uint32_t val = drv->dev->reg->STATUS.word;
- LOG_DEBUG("status=0x%x", val);
+ LOG_DEBUG("status=0x%" PRIx32, val);
return val;
}