commit 2407e9646fe50709e36440d04d3f35367ea5bf81
author Douglas Troha <douglas.troha@arm.com> Mon Jun 15 14:31:45 2020 +0200
committer Douglas Troha <douglas.troha@arm.com> Mon Jun 22 13:27:50 2020 +0200
tree 40e92dce3aace28ac3c6a24f3eb44d87edb40119
parent 4e8dbf5da9c357a8d6903bfdd0ef475f2144575b

Update arch to 1.0.1

* Includes npu_active event

Signed-off-by: Douglas Troha <douglas.troha@arm.com>
Change-Id: I2346707c26b7c3709bb844c7b21365d714e9a089

include/pmu_ethosu.h

diff --git a/include/pmu_ethosu.h b/include/pmu_ethosu.h
index e0af980..300a44a 100644
--- a/include/pmu_ethosu.h
+++ b/include/pmu_ethosu.h
@@ -55,6 +55,7 @@
     ETHOSU_PMU_NPU_IDLE,
     ETHOSU_PMU_CC_STALLED_ON_BLOCKDEP,
     ETHOSU_PMU_CC_STALLED_ON_SHRAM_RECONFIG,
+    ETHOSU_PMU_NPU_ACTIVE,
     ETHOSU_PMU_MAC_ACTIVE,
     ETHOSU_PMU_MAC_ACTIVE_8BIT,
     ETHOSU_PMU_MAC_ACTIVE_16BIT,

src/ethosu55_interface.h

diff --git a/src/ethosu55_interface.h b/src/ethosu55_interface.h
index a399c3b..155b69a 100644
--- a/src/ethosu55_interface.h
+++ b/src/ethosu55_interface.h
@@ -40,7 +40,7 @@
 
 #define NNX_ARCH_VERSION_MAJOR 1
 #define NNX_ARCH_VERSION_MINOR 0
-#define NNX_ARCH_VERSION_PATCH 0
+#define NNX_ARCH_VERSION_PATCH 1
 
 // Register offsets
 
@@ -769,6 +769,7 @@
     NPU_IDLE                     = 0x20,
     CC_STALLED_ON_BLOCKDEP       = 0x21,
     CC_STALLED_ON_SHRAM_RECONFIG = 0x22,
+    NPU_ACTIVE                   = 0x23,
     MAC_ACTIVE                   = 0x30,
     MAC_ACTIVE_8BIT              = 0x31,
     MAC_ACTIVE_16BIT             = 0x32,
@@ -1088,6 +1089,7 @@
     PMU_EVENT_TYPE_NPU_IDLE                     = 0x20,
     PMU_EVENT_TYPE_CC_STALLED_ON_BLOCKDEP       = 0x21,
     PMU_EVENT_TYPE_CC_STALLED_ON_SHRAM_RECONFIG = 0x22,
+    PMU_EVENT_TYPE_NPU_ACTIVE                   = 0x23,
     PMU_EVENT_TYPE_MAC_ACTIVE                   = 0x30,
     PMU_EVENT_TYPE_MAC_ACTIVE_8BIT              = 0x31,
     PMU_EVENT_TYPE_MAC_ACTIVE_16BIT             = 0x32,
@@ -1237,7 +1239,7 @@
     CONSTEXPR id_r() :
         version_status(static_cast<uint32_t>(1)), version_minor(static_cast<uint32_t>(0x0)),
         version_major(static_cast<uint32_t>(0x0)), product_major(static_cast<uint32_t>(4)),
-        arch_patch_rev(static_cast<uint32_t>(0)), arch_minor_rev(static_cast<uint32_t>(0)),
+        arch_patch_rev(static_cast<uint32_t>(1)), arch_minor_rev(static_cast<uint32_t>(0)),
         arch_major_rev(static_cast<uint32_t>(1))
     {
     }
@@ -8008,7 +8010,7 @@
     }
     void reset()
     {
-        ID                 = 268451841;
+        ID                 = 268517377;
         STATUS             = 8;
         CMD                = 0;
         RESET              = 0;
@@ -13910,7 +13912,9 @@
 #define EXPAND_PMU_EVENT_TYPE(FUNC, SEP)                                                                                          \
     FUNC(pmu_event_type, NO_EVENT)                                                                                                \
     SEP FUNC(pmu_event_type, CYCLE) SEP FUNC(pmu_event_type, NPU_IDLE) SEP FUNC(                                                  \
-        pmu_event_type, CC_STALLED_ON_BLOCKDEP) SEP FUNC(pmu_event_type, CC_STALLED_ON_SHRAM_RECONFIG)                            \
+        pmu_event_type, CC_STALLED_ON_BLOCKDEP) SEP FUNC(pmu_event_type,                                                          \
+                                                         CC_STALLED_ON_SHRAM_RECONFIG) SEP FUNC(pmu_event_type,                   \
+                                                                                                NPU_ACTIVE)                       \
         SEP FUNC(pmu_event_type, MAC_ACTIVE) SEP FUNC(pmu_event_type, MAC_ACTIVE_8BIT) SEP FUNC(                                  \
             pmu_event_type, MAC_ACTIVE_16BIT) SEP FUNC(pmu_event_type, MAC_DPU_ACTIVE) SEP FUNC(pmu_event_type,                   \
                                                                                                 MAC_STALLED_BY_WD_ACC)            \