commit e6498f0aa2e51b652a40b5f27e5991bd65422326
author Per Åstrand <per.astrand@arm.com> Mon Nov 09 15:33:12 2020 +0100
committer Per Åstrand <per.astrand@arm.com> Fri Nov 20 15:09:28 2020 +0100
tree 471367c8676eee387a1651ad9990cd91b8388548
parent 3c8afccabc4622a5e16a2a75474c8c9bb82f248c

Add API to set secure and privilege level of NPU

Change-Id: I8ca309ea4e5885865d5c9cf848500f45f83e08a2

include/ethosu_device.h

diff --git a/include/ethosu_device.h b/include/ethosu_device.h
index 91aa877..dd34201 100644
--- a/include/ethosu_device.h
+++ b/include/ethosu_device.h
@@ -63,6 +63,8 @@
     uint32_t pmccntr_cfg;
     uint32_t pmu_evcntr[ETHOSU_PMU_NCOUNTERS];
     uint32_t pmu_evtypr[ETHOSU_PMU_NCOUNTERS];
+    uint32_t secure;
+    uint32_t privileged;
 };
 
 struct ethosu_id
@@ -143,7 +145,10 @@
 /**
  * Initialize the device.
  */
-enum ethosu_error_codes ethosu_dev_init(struct ethosu_device *dev, const void *base_address);
+enum ethosu_error_codes ethosu_dev_init(struct ethosu_device *dev,
+                                        const void *base_address,
+                                        uint32_t secure_enable,
+                                        uint32_t privilege_enable);
 
 /**
  * Get device id.

include/ethosu_driver.h

diff --git a/include/ethosu_driver.h b/include/ethosu_driver.h
index 433ad06..345f82f 100644
--- a/include/ethosu_driver.h
+++ b/include/ethosu_driver.h
@@ -89,9 +89,15 @@
 /**
  * Initialize the Ethos-U driver.
  */
-int ethosu_init_v2(const void *base_address, const void *fast_memory, const size_t fast_memory_size);
+int ethosu_init_v3(const void *base_address,
+                   const void *fast_memory,
+                   const size_t fast_memory_size,
+                   uint32_t secure_enable,
+                   uint32_t privilege_enable);
 
-#define ethosu_init(base_address) ethosu_init_v2(base_address, NULL, 0)
+#define ethosu_init(base_address) ethosu_init_v3(base_address, NULL, 0, 1, 1)
+#define ethosu_init_v2(base_address, fast_memory, fast_memory_size)                                                    \
+    ethosu_init_v3(base_address, fast_memory, fast_memory_size, 1, 1)
 
 /**
  * Get Ethos-U version.

src/ethosu_device.c

diff --git a/src/ethosu_device.c b/src/ethosu_device.c
index 8fee3f4..adfdbb1 100644
--- a/src/ethosu_device.c
+++ b/src/ethosu_device.c
@@ -34,10 +34,16 @@
 static uint32_t stream_length = 0;
 #endif
 
-enum ethosu_error_codes ethosu_dev_init(struct ethosu_device *dev, const void *base_address)
+enum ethosu_error_codes ethosu_dev_init(struct ethosu_device *dev,
+                                        const void *base_address,
+                                        uint32_t secure_enable,
+                                        uint32_t privilege_enable)
 {
 #if !defined(ARM_NPU_STUB)
     dev->base_address = (volatile uint32_t *)base_address;
+    dev->secure       = secure_enable;
+    dev->privileged   = privilege_enable;
+
     ethosu_save_pmu_config(dev);
 #else
     UNUSED(dev);
@@ -170,7 +176,6 @@
     return ETHOSU_SUCCESS;
 }
 
-// TODO Understand settings of privilege/security level and update API.
 enum ethosu_error_codes ethosu_soft_reset(struct ethosu_device *dev)
 {
     enum ethosu_error_codes return_code = ETHOSU_SUCCESS;
@@ -179,13 +184,14 @@
     struct prot_r prot;
 
     reset.word        = 0;
-    reset.pending_CPL = PRIVILEGE_LEVEL_USER;      // TODO, how to get the host privilege level
-    reset.pending_CSL = SECURITY_LEVEL_NON_SECURE; // TODO, how to get Security level
+    reset.pending_CPL = dev->privileged ? PRIVILEGE_LEVEL_PRIVILEGED : PRIVILEGE_LEVEL_USER;
+    reset.pending_CSL = dev->secure ? SECURITY_LEVEL_SECURE : SECURITY_LEVEL_NON_SECURE;
 
     prot.word = ethosu_read_reg(dev, NPU_REG_PROT);
 
     if (prot.active_CPL < reset.pending_CPL && prot.active_CSL > reset.pending_CSL)
     {
+        LOG_ERR("Failed to reset NPU\n");
         // Register access not permitted
         return ETHOSU_GENERIC_FAILURE;
     }
@@ -196,7 +202,7 @@
     // Wait for reset to complete
     return_code = ethosu_wait_for_reset(dev);
 
-    // Save the proto register
+    // Save the prot register
     dev->reset = ethosu_read_reg(dev, NPU_REG_PROT);
 
     // Soft reset will clear the PMU configuration and counters. The shadow PMU counters

src/ethosu_driver.c

diff --git a/src/ethosu_driver.c b/src/ethosu_driver.c
index 014fb54..fcb3fbb 100644
--- a/src/ethosu_driver.c
+++ b/src/ethosu_driver.c
@@ -233,20 +233,26 @@
 static void dump_command_stream(const uint32_t *cmd_stream, const int cms_length, int qread);
 static void npu_axi_init(struct ethosu_driver *drv);
 
-int ethosu_init_v2(const void *base_address, const void *fast_memory, const size_t fast_memory_size)
+int ethosu_init_v3(const void *base_address,
+                   const void *fast_memory,
+                   const size_t fast_memory_size,
+                   uint32_t secure_enable,
+                   uint32_t privilege_enable)
 {
     int return_code = 0;
 
-    LOG_INFO("%s. base_address=%p, fast_memory=%p, fast_memory_size=%zu\n",
+    LOG_INFO("%s. base_address=%p, fast_memory=%p, fast_memory_size=%zu, secure=%u, privileged=%u\n",
              __FUNCTION__,
              base_address,
              fast_memory,
-             fast_memory_size);
+             fast_memory_size,
+             secure_enable,
+             privilege_enable);
 
     ethosu_drv.fast_memory      = (uint32_t)fast_memory;
     ethosu_drv.fast_memory_size = fast_memory_size;
 
-    if (ETHOSU_SUCCESS != ethosu_dev_init(&ethosu_drv.dev, base_address))
+    if (ETHOSU_SUCCESS != ethosu_dev_init(&ethosu_drv.dev, base_address, secure_enable, privilege_enable))
     {
         LOG_ERR("Failed in ethosu_dev_init");
         return -1;