commit 4e53fee2700effd1510cb929e04865c454e9678d
author Kristofer Jonsson <kristofer.jonsson@arm.com> Thu Sep 29 12:03:36 2022 +0200
committer Kristofer Jonsson <kristofer.jonsson@arm.com> Mon Oct 03 13:44:55 2022 +0200
tree 373bbb962bd6efe90039ca98d972b79a2c1da992
parent 90ada2ea5681b2a2722a10d2898eac34c2510791

Reading QREAD and STATUS register

Allow the QREAD and STATUS registers to be read using the PMU
interface.

Change-Id: I7e349a0938404011588c1d5eb82b4a5dbc7c27e4

include/pmu_ethosu.h

diff --git a/include/pmu_ethosu.h b/include/pmu_ethosu.h
index 1a9bfd8..b717130 100644
--- a/include/pmu_ethosu.h
+++ b/include/pmu_ethosu.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright 2019-2022 Arm Limited and/or its affiliates <open-source-office@arm.com>
  *
  * SPDX-License-Identifier: Apache-2.0
  *
@@ -309,6 +309,16 @@
  */
 void ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event(struct ethosu_driver *drv, enum ethosu_pmu_event_type stop_event);
 
+/**
+ * \brief   Read qread register
+ */
+uint32_t ETHOSU_PMU_Get_QREAD(struct ethosu_driver *drv);
+
+/**
+ * \brief   Read status register
+ */
+uint32_t ETHOSU_PMU_Get_STATUS(struct ethosu_driver *drv);
+
 #ifdef __cplusplus
 }
 #endif

src/ethosu_pmu.c

diff --git a/src/ethosu_pmu.c b/src/ethosu_pmu.c
index df69026..af4e503 100644
--- a/src/ethosu_pmu.c
+++ b/src/ethosu_pmu.c
@@ -285,3 +285,17 @@
     cfg.CYCLE_CNT_CFG_STOP          = val;
     drv->dev->reg->PMCCNTR_CFG.word = cfg.word;
 }
+
+uint32_t ETHOSU_PMU_Get_QREAD(struct ethosu_driver *drv)
+{
+    uint32_t val = drv->dev->reg->QREAD.word;
+    LOG_DEBUG("qread=%u", val);
+    return val;
+}
+
+uint32_t ETHOSU_PMU_Get_STATUS(struct ethosu_driver *drv)
+{
+    uint32_t val = drv->dev->reg->STATUS.word;
+    LOG_DEBUG("status=0x%x", val);
+    return val;
+}