Jonny Svärd | 136810f | 2021-10-13 16:04:26 +0200 | [diff] [blame^] | 1 | /* |
| 2 | * Copyright (c) 2020-2021 Arm Limited. All rights reserved. |
| 3 | * |
| 4 | * SPDX-License-Identifier: Apache-2.0 |
| 5 | * |
| 6 | * Licensed under the Apache License, Version 2.0 (the License); you may |
| 7 | * not use this file except in compliance with the License. |
| 8 | * You may obtain a copy of the License at |
| 9 | * |
| 10 | * www.apache.org/licenses/LICENSE-2.0 |
| 11 | * |
| 12 | * Unless required by applicable law or agreed to in writing, software |
| 13 | * distributed under the License is distributed on an AS IS BASIS, WITHOUT |
| 14 | * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
| 15 | * See the License for the specific language governing permissions and |
| 16 | * limitations under the License. |
| 17 | */ |
| 18 | |
| 19 | #ifndef ETHOSU65_INTERFACE_H |
| 20 | #define ETHOSU65_INTERFACE_H |
| 21 | |
| 22 | #ifdef __KERNEL__ |
| 23 | #include <linux/types.h> |
| 24 | #else |
| 25 | #include <stdint.h> |
| 26 | #endif |
| 27 | |
| 28 | #if !defined(__cplusplus) || __cplusplus < 201402L |
| 29 | #define CONSTEXPR |
| 30 | #else |
| 31 | #define CONSTEXPR constexpr |
| 32 | #endif |
| 33 | |
| 34 | #ifndef __cplusplus |
| 35 | #define STRUCT struct |
| 36 | #else |
| 37 | #define STRUCT |
| 38 | #endif |
| 39 | |
| 40 | #if defined(__cplusplus) && defined(NPU_DISASSEMBLE) |
| 41 | #include <iomanip> |
| 42 | #include <sstream> |
| 43 | #include <vector> |
| 44 | #endif |
| 45 | |
| 46 | #if defined(__cplusplus) && !defined(NPU_NAMESPACE) |
| 47 | #define NPU_NAMESPACE npu |
| 48 | #endif |
| 49 | |
| 50 | #ifdef __cplusplus |
| 51 | #include <cstring> |
| 52 | #include <limits> |
| 53 | #endif |
| 54 | |
| 55 | #ifdef __cplusplus |
| 56 | namespace NPU_NAMESPACE |
| 57 | { |
| 58 | #endif |
| 59 | #define NNX_ARCH_VERSION_MAJOR 1 |
| 60 | #define NNX_ARCH_VERSION_MINOR 0 |
| 61 | #define NNX_ARCH_VERSION_PATCH 6 |
| 62 | |
| 63 | // Register offsets |
| 64 | // |
| 65 | // Register subpage BASE |
| 66 | // |
| 67 | #define NPU_REG_ID 0x0000 |
| 68 | #define NPU_REG_STATUS 0x0004 |
| 69 | #define NPU_REG_CMD 0x0008 |
| 70 | #define NPU_REG_RESET 0x000C |
| 71 | #define NPU_REG_QBASE 0x0010 |
| 72 | #define NPU_REG_QBASE_HI 0x0014 |
| 73 | #define NPU_REG_QREAD 0x0018 |
| 74 | #define NPU_REG_QCONFIG 0x001C |
| 75 | #define NPU_REG_QSIZE 0x0020 |
| 76 | #define NPU_REG_PROT 0x0024 |
| 77 | #define NPU_REG_CONFIG 0x0028 |
| 78 | #define NPU_REG_LOCK 0x002C |
| 79 | #define NPU_REG_REGIONCFG 0x003C |
| 80 | #define NPU_REG_AXI_LIMIT0 0x0040 |
| 81 | #define NPU_REG_AXI_LIMIT1 0x0044 |
| 82 | #define NPU_REG_AXI_LIMIT2 0x0048 |
| 83 | #define NPU_REG_AXI_LIMIT3 0x004C |
| 84 | #define BASE_REGISTERS_SIZE 0x0080 |
| 85 | |
| 86 | // |
| 87 | // Register subpage BASE_POINTERS |
| 88 | // |
| 89 | #define NPU_REG_BASEP_BASE 0x0080 |
| 90 | #define NPU_REG_BASEP_ARRLEN 0x0008 |
| 91 | #define BASE_POINTERS_REGISTERS_SIZE 0x0100 |
| 92 | |
| 93 | // |
| 94 | // Register subpage DEBUG |
| 95 | // |
| 96 | #define NPU_REG_WD_STATUS 0x0100 |
| 97 | #define NPU_REG_MAC_STATUS 0x0104 |
| 98 | #define NPU_REG_AO_STATUS 0x0108 |
| 99 | #define NPU_REG_DMA_STATUS0 0x0110 |
| 100 | #define NPU_REG_DMA_STATUS1 0x0114 |
| 101 | #define NPU_REG_CLKFORCE 0x0140 |
| 102 | #define NPU_REG_DEBUG_ADDRESS 0x0144 |
| 103 | #define NPU_REG_DEBUG_MISC 0x0148 |
| 104 | #define NPU_REG_DEBUGCORE 0x014C |
| 105 | #define NPU_REG_DEBUG_BLOCK 0x0150 |
| 106 | #define DEBUG_REGISTERS_SIZE 0x0180 |
| 107 | |
| 108 | // |
| 109 | // Register subpage PMU |
| 110 | // |
| 111 | #define NPU_REG_PMCR 0x0180 |
| 112 | #define NPU_REG_PMCNTENSET 0x0184 |
| 113 | #define NPU_REG_PMCNTENCLR 0x0188 |
| 114 | #define NPU_REG_PMOVSSET 0x018C |
| 115 | #define NPU_REG_PMOVSCLR 0x0190 |
| 116 | #define NPU_REG_PMINTSET 0x0194 |
| 117 | #define NPU_REG_PMINTCLR 0x0198 |
| 118 | #define NPU_REG_PMCCNTR 0x01A0 |
| 119 | #define NPU_REG_PMCCNTR_HI 0x01A4 |
| 120 | #define NPU_REG_PMCCNTR_CFG 0x01A8 |
| 121 | #define NPU_REG_PMCAXI_CHAN 0x01AC |
| 122 | #define PMU_REGISTERS_SIZE 0x0200 |
| 123 | |
| 124 | // |
| 125 | // Register subpage TSU_DEBUG |
| 126 | // |
| 127 | #define NPU_REG_KERNEL_X 0x0200 |
| 128 | #define NPU_REG_KERNEL_Y 0x0204 |
| 129 | #define NPU_REG_KERNEL_W_M1 0x0208 |
| 130 | #define NPU_REG_KERNEL_H_M1 0x020C |
| 131 | #define NPU_REG_OFM_CBLK_WIDTH_M1 0x0210 |
| 132 | #define NPU_REG_OFM_CBLK_HEIGHT_M1 0x0214 |
| 133 | #define NPU_REG_OFM_CBLK_DEPTH_M1 0x0218 |
| 134 | #define NPU_REG_IFM_CBLK_DEPTH_M1 0x021C |
| 135 | #define NPU_REG_OFM_X 0x0220 |
| 136 | #define NPU_REG_OFM_Y 0x0224 |
| 137 | #define NPU_REG_OFM_Z 0x0228 |
| 138 | #define NPU_REG_IFM_Z 0x022C |
| 139 | #define NPU_REG_PAD_TOP 0x0230 |
| 140 | #define NPU_REG_PAD_LEFT 0x0234 |
| 141 | #define NPU_REG_IFM_CBLK_WIDTH 0x0238 |
| 142 | #define NPU_REG_IFM_CBLK_HEIGHT 0x023C |
| 143 | #define NPU_REG_DMA_IFM_SRC 0x0240 |
| 144 | #define NPU_REG_DMA_IFM_SRC_HI 0x0244 |
| 145 | #define NPU_REG_DMA_IFM_DST 0x0248 |
| 146 | #define NPU_REG_DMA_OFM_SRC 0x024C |
| 147 | #define NPU_REG_DMA_OFM_DST 0x0250 |
| 148 | #define NPU_REG_DMA_OFM_DST_HI 0x0254 |
| 149 | #define NPU_REG_DMA_WEIGHT_SRC 0x0258 |
| 150 | #define NPU_REG_DMA_WEIGHT_SRC_HI 0x025C |
| 151 | #define NPU_REG_DMA_CMD_SRC 0x0260 |
| 152 | #define NPU_REG_DMA_CMD_SRC_HI 0x0264 |
| 153 | #define NPU_REG_DMA_CMD_SIZE 0x0268 |
| 154 | #define NPU_REG_DMA_M2M_SRC 0x026C |
| 155 | #define NPU_REG_DMA_M2M_SRC_HI 0x0270 |
| 156 | #define NPU_REG_DMA_M2M_DST 0x0274 |
| 157 | #define NPU_REG_DMA_M2M_DST_HI 0x0278 |
| 158 | #define NPU_REG_CURRENT_QREAD 0x027C |
| 159 | #define NPU_REG_DMA_SCALE_SRC 0x0280 |
| 160 | #define NPU_REG_DMA_SCALE_SRC_HI 0x0284 |
| 161 | #define NPU_REG_CURRENT_BLOCK 0x02B4 |
| 162 | #define NPU_REG_CURRENT_OP 0x02B8 |
| 163 | #define NPU_REG_CURRENT_CMD 0x02BC |
| 164 | #define TSU_DEBUG_REGISTERS_SIZE 0x02C0 |
| 165 | |
| 166 | // |
| 167 | // Register subpage PMU_COUNTERS |
| 168 | // |
| 169 | #define NPU_REG_PMEVCNTR_BASE 0x0300 |
| 170 | #define NPU_REG_PMEVCNTR_ARRLEN 0x0004 |
| 171 | #define NPU_REG_PMEVTYPER_BASE 0x0380 |
| 172 | #define NPU_REG_PMEVTYPER_ARRLEN 0x0004 |
| 173 | #define PMU_COUNTERS_REGISTERS_SIZE 0x0400 |
| 174 | |
| 175 | // |
| 176 | // Register subpage SHARED_BUFFER |
| 177 | // |
| 178 | #define NPU_REG_SHARED_BUFFER_BASE 0x0400 |
| 179 | #define NPU_REG_SHARED_BUFFER_ARRLEN 0x0100 |
| 180 | #define SHARED_BUFFER_REGISTERS_SIZE 0x0800 |
| 181 | |
| 182 | // |
| 183 | // Register subpage TSU_IFM |
| 184 | // |
| 185 | #define NPU_REG_IFM_PAD_TOP 0x0800 |
| 186 | #define NPU_REG_IFM_PAD_LEFT 0x0804 |
| 187 | #define NPU_REG_IFM_PAD_RIGHT 0x0808 |
| 188 | #define NPU_REG_IFM_PAD_BOTTOM 0x080C |
| 189 | #define NPU_REG_IFM_DEPTH_M1 0x0810 |
| 190 | #define NPU_REG_IFM_PRECISION 0x0814 |
| 191 | #define NPU_REG_IFM_UPSCALE 0x081C |
| 192 | #define NPU_REG_IFM_ZERO_POINT 0x0824 |
| 193 | #define NPU_REG_IFM_WIDTH0_M1 0x0828 |
| 194 | #define NPU_REG_IFM_HEIGHT0_M1 0x082C |
| 195 | #define NPU_REG_IFM_HEIGHT1_M1 0x0830 |
| 196 | #define NPU_REG_IFM_IB_END 0x0834 |
| 197 | #define NPU_REG_IFM_REGION 0x083C |
| 198 | #define TSU_IFM_REGISTERS_SIZE 0x0840 |
| 199 | |
| 200 | // |
| 201 | // Register subpage TSU_OFM |
| 202 | // |
| 203 | #define NPU_REG_OFM_WIDTH_M1 0x0844 |
| 204 | #define NPU_REG_OFM_HEIGHT_M1 0x0848 |
| 205 | #define NPU_REG_OFM_DEPTH_M1 0x084C |
| 206 | #define NPU_REG_OFM_PRECISION 0x0850 |
| 207 | #define NPU_REG_OFM_BLK_WIDTH_M1 0x0854 |
| 208 | #define NPU_REG_OFM_BLK_HEIGHT_M1 0x0858 |
| 209 | #define NPU_REG_OFM_BLK_DEPTH_M1 0x085C |
| 210 | #define NPU_REG_OFM_ZERO_POINT 0x0860 |
| 211 | #define NPU_REG_OFM_WIDTH0_M1 0x0868 |
| 212 | #define NPU_REG_OFM_HEIGHT0_M1 0x086C |
| 213 | #define NPU_REG_OFM_HEIGHT1_M1 0x0870 |
| 214 | #define NPU_REG_OFM_REGION 0x087C |
| 215 | #define TSU_OFM_REGISTERS_SIZE 0x0880 |
| 216 | |
| 217 | // |
| 218 | // Register subpage TSU_KERNEL |
| 219 | // |
| 220 | #define NPU_REG_KERNEL_WIDTH_M1 0x0880 |
| 221 | #define NPU_REG_KERNEL_HEIGHT_M1 0x0884 |
| 222 | #define NPU_REG_KERNEL_STRIDE 0x0888 |
| 223 | #define NPU_REG_PARALLEL_MODE 0x088C |
| 224 | #define NPU_REG_ACC_FORMAT 0x0890 |
| 225 | #define NPU_REG_ACTIVATION 0x0894 |
| 226 | #define NPU_REG_ACTIVATION_MIN 0x0898 |
| 227 | #define NPU_REG_ACTIVATION_MAX 0x089C |
| 228 | #define NPU_REG_WEIGHT_REGION 0x08A0 |
| 229 | #define NPU_REG_SCALE_REGION 0x08A4 |
| 230 | #define NPU_REG_AB_START 0x08B4 |
| 231 | #define NPU_REG_BLOCKDEP 0x08BC |
| 232 | #define TSU_KERNEL_REGISTERS_SIZE 0x08C0 |
| 233 | |
| 234 | // |
| 235 | // Register subpage TSU_DMA |
| 236 | // |
| 237 | #define NPU_REG_DMA0_SRC_REGION 0x08C0 |
| 238 | #define NPU_REG_DMA0_DST_REGION 0x08C4 |
| 239 | #define NPU_REG_DMA0_SIZE0 0x08C8 |
| 240 | #define NPU_REG_DMA0_SIZE1 0x08CC |
| 241 | #define TSU_DMA_REGISTERS_SIZE 0x0900 |
| 242 | |
| 243 | // |
| 244 | // Register subpage TSU_IFM2 |
| 245 | // |
| 246 | #define NPU_REG_IFM2_BROADCAST 0x0900 |
| 247 | #define NPU_REG_IFM2_SCALAR 0x0904 |
| 248 | #define NPU_REG_IFM2_PRECISION 0x0914 |
| 249 | #define NPU_REG_IFM2_ZERO_POINT 0x0924 |
| 250 | #define NPU_REG_IFM2_WIDTH0_M1 0x0928 |
| 251 | #define NPU_REG_IFM2_HEIGHT0_M1 0x092C |
| 252 | #define NPU_REG_IFM2_HEIGHT1_M1 0x0930 |
| 253 | #define NPU_REG_IFM2_IB_START 0x0934 |
| 254 | #define NPU_REG_IFM2_REGION 0x093C |
| 255 | #define TSU_IFM2_REGISTERS_SIZE 0x0940 |
| 256 | |
| 257 | // |
| 258 | // Register subpage TSU_IFM_BASE |
| 259 | // |
| 260 | #define NPU_REG_IFM_BASE0 0x0A00 |
| 261 | #define NPU_REG_IFM_BASE0_HI 0x0A04 |
| 262 | #define NPU_REG_IFM_BASE1 0x0A08 |
| 263 | #define NPU_REG_IFM_BASE1_HI 0x0A0C |
| 264 | #define NPU_REG_IFM_BASE2 0x0A10 |
| 265 | #define NPU_REG_IFM_BASE2_HI 0x0A14 |
| 266 | #define NPU_REG_IFM_BASE3 0x0A18 |
| 267 | #define NPU_REG_IFM_BASE3_HI 0x0A1C |
| 268 | #define NPU_REG_IFM_STRIDE_X 0x0A20 |
| 269 | #define NPU_REG_IFM_STRIDE_X_HI 0x0A24 |
| 270 | #define NPU_REG_IFM_STRIDE_Y 0x0A28 |
| 271 | #define NPU_REG_IFM_STRIDE_Y_HI 0x0A2C |
| 272 | #define NPU_REG_IFM_STRIDE_C 0x0A30 |
| 273 | #define NPU_REG_IFM_STRIDE_C_HI 0x0A34 |
| 274 | #define TSU_IFM_BASE_REGISTERS_SIZE 0x0A40 |
| 275 | |
| 276 | // |
| 277 | // Register subpage TSU_OFM_BASE |
| 278 | // |
| 279 | #define NPU_REG_OFM_BASE0 0x0A40 |
| 280 | #define NPU_REG_OFM_BASE0_HI 0x0A44 |
| 281 | #define NPU_REG_OFM_BASE1 0x0A48 |
| 282 | #define NPU_REG_OFM_BASE1_HI 0x0A4C |
| 283 | #define NPU_REG_OFM_BASE2 0x0A50 |
| 284 | #define NPU_REG_OFM_BASE2_HI 0x0A54 |
| 285 | #define NPU_REG_OFM_BASE3 0x0A58 |
| 286 | #define NPU_REG_OFM_BASE3_HI 0x0A5C |
| 287 | #define NPU_REG_OFM_STRIDE_X 0x0A60 |
| 288 | #define NPU_REG_OFM_STRIDE_X_HI 0x0A64 |
| 289 | #define NPU_REG_OFM_STRIDE_Y 0x0A68 |
| 290 | #define NPU_REG_OFM_STRIDE_Y_HI 0x0A6C |
| 291 | #define NPU_REG_OFM_STRIDE_C 0x0A70 |
| 292 | #define NPU_REG_OFM_STRIDE_C_HI 0x0A74 |
| 293 | #define TSU_OFM_BASE_REGISTERS_SIZE 0x0A80 |
| 294 | |
| 295 | // |
| 296 | // Register subpage TSU_WS_BASE |
| 297 | // |
| 298 | #define NPU_REG_WEIGHT_BASE 0x0A80 |
| 299 | #define NPU_REG_WEIGHT_BASE_HI 0x0A84 |
| 300 | #define NPU_REG_WEIGHT_LENGTH 0x0A88 |
| 301 | #define NPU_REG_SCALE_BASE 0x0A90 |
| 302 | #define NPU_REG_SCALE_BASE_HI 0x0A94 |
| 303 | #define NPU_REG_SCALE_LENGTH 0x0A98 |
| 304 | #define NPU_REG_OFM_SCALE 0x0AA0 |
| 305 | #define NPU_REG_OFM_SCALE_SHIFT 0x0AA4 |
| 306 | #define NPU_REG_OPA_SCALE 0x0AA8 |
| 307 | #define NPU_REG_OPA_SCALE_SHIFT 0x0AAC |
| 308 | #define NPU_REG_OPB_SCALE 0x0AB0 |
| 309 | #define TSU_WS_BASE_REGISTERS_SIZE 0x0AC0 |
| 310 | |
| 311 | // |
| 312 | // Register subpage TSU_DMA_BASE |
| 313 | // |
| 314 | #define NPU_REG_DMA0_SRC 0x0AC0 |
| 315 | #define NPU_REG_DMA0_SRC_HI 0x0AC4 |
| 316 | #define NPU_REG_DMA0_DST 0x0AC8 |
| 317 | #define NPU_REG_DMA0_DST_HI 0x0ACC |
| 318 | #define NPU_REG_DMA0_LEN 0x0AD0 |
| 319 | #define NPU_REG_DMA0_LEN_HI 0x0AD4 |
| 320 | #define NPU_REG_DMA0_SKIP0 0x0AD8 |
| 321 | #define NPU_REG_DMA0_SKIP0_HI 0x0ADC |
| 322 | #define NPU_REG_DMA0_SKIP1 0x0AE0 |
| 323 | #define NPU_REG_DMA0_SKIP1_HI 0x0AE4 |
| 324 | #define TSU_DMA_BASE_REGISTERS_SIZE 0x0B00 |
| 325 | |
| 326 | // |
| 327 | // Register subpage TSU_IFM2_BASE |
| 328 | // |
| 329 | #define NPU_REG_IFM2_BASE0 0x0B00 |
| 330 | #define NPU_REG_IFM2_BASE0_HI 0x0B04 |
| 331 | #define NPU_REG_IFM2_BASE1 0x0B08 |
| 332 | #define NPU_REG_IFM2_BASE1_HI 0x0B0C |
| 333 | #define NPU_REG_IFM2_BASE2 0x0B10 |
| 334 | #define NPU_REG_IFM2_BASE2_HI 0x0B14 |
| 335 | #define NPU_REG_IFM2_BASE3 0x0B18 |
| 336 | #define NPU_REG_IFM2_BASE3_HI 0x0B1C |
| 337 | #define NPU_REG_IFM2_STRIDE_X 0x0B20 |
| 338 | #define NPU_REG_IFM2_STRIDE_X_HI 0x0B24 |
| 339 | #define NPU_REG_IFM2_STRIDE_Y 0x0B28 |
| 340 | #define NPU_REG_IFM2_STRIDE_Y_HI 0x0B2C |
| 341 | #define NPU_REG_IFM2_STRIDE_C 0x0B30 |
| 342 | #define NPU_REG_IFM2_STRIDE_C_HI 0x0B34 |
| 343 | #define TSU_IFM2_BASE_REGISTERS_SIZE 0x0B40 |
| 344 | |
| 345 | // |
| 346 | // Register subpage TSU_WS1_BASE |
| 347 | // |
| 348 | #define NPU_REG_WEIGHT1_BASE 0x0B40 |
| 349 | #define NPU_REG_WEIGHT1_BASE_HI 0x0B44 |
| 350 | #define NPU_REG_WEIGHT1_LENGTH 0x0B48 |
| 351 | #define NPU_REG_SCALE1_BASE 0x0B50 |
| 352 | #define NPU_REG_SCALE1_BASE_HI 0x0B54 |
| 353 | #define NPU_REG_SCALE1_LENGTH 0x0B58 |
| 354 | #define TSU_WS1_BASE_REGISTERS_SIZE 0x0B80 |
| 355 | |
| 356 | // |
| 357 | // Register subpage TSU_USER_BASE |
| 358 | // |
| 359 | #define TSU_USER_BASE_REGISTERS_SIZE 0x0BC0 |
| 360 | |
| 361 | // |
| 362 | // Register subpage TSU_DMA_EBASE |
| 363 | // |
| 364 | #define TSU_DMA_EBASE_REGISTERS_SIZE 0x0C00 |
| 365 | |
| 366 | // |
| 367 | // Register subpage ID |
| 368 | // |
| 369 | #define NPU_REG_REVISION 0x0FC0 |
| 370 | #define NPU_REG_PID4 0x0FD0 |
| 371 | #define NPU_REG_PID5 0x0FD4 |
| 372 | #define NPU_REG_PID6 0x0FD8 |
| 373 | #define NPU_REG_PID7 0x0FDC |
| 374 | #define NPU_REG_PID0 0x0FE0 |
| 375 | #define NPU_REG_PID1 0x0FE4 |
| 376 | #define NPU_REG_PID2 0x0FE8 |
| 377 | #define NPU_REG_PID3 0x0FEC |
| 378 | #define NPU_REG_CID0 0x0FF0 |
| 379 | #define NPU_REG_CID1 0x0FF4 |
| 380 | #define NPU_REG_CID2 0x0FF8 |
| 381 | #define NPU_REG_CID3 0x0FFC |
| 382 | #define ID_REGISTERS_SIZE 0x1000 |
| 383 | |
| 384 | #ifdef __cplusplus |
| 385 | // Enum types |
| 386 | enum class acc_format : uint8_t |
| 387 | { |
| 388 | I32 = 0, |
| 389 | I40 = 1, |
| 390 | F16 = 2, |
| 391 | }; |
| 392 | |
| 393 | enum class activation_clip_range : uint8_t |
| 394 | { |
| 395 | OFM_PRECISION = 0, |
| 396 | FORCE_UINT8 = 2, |
| 397 | FORCE_INT8 = 3, |
| 398 | FORCE_INT16 = 5, |
| 399 | }; |
| 400 | |
| 401 | enum class activation_format : uint8_t |
| 402 | { |
| 403 | NHWC = 0, |
| 404 | NHCWB16 = 1, |
| 405 | }; |
| 406 | |
| 407 | enum class activation_function : uint8_t |
| 408 | { |
| 409 | RELU = 0, |
| 410 | TANH = 3, |
| 411 | SIGMOID = 4, |
| 412 | TABLE_0 = 16, |
| 413 | TABLE_1 = 17, |
| 414 | TABLE_2 = 18, |
| 415 | TABLE_3 = 19, |
| 416 | TABLE_4 = 20, |
| 417 | TABLE_5 = 21, |
| 418 | TABLE_6 = 22, |
| 419 | TABLE_7 = 23, |
| 420 | }; |
| 421 | |
| 422 | enum class activation_precision : uint8_t |
| 423 | { |
| 424 | B8 = 0, |
| 425 | B16 = 1, |
| 426 | B32 = 2, |
| 427 | B64 = 3, |
| 428 | }; |
| 429 | |
| 430 | enum class activation_type : uint8_t |
| 431 | { |
| 432 | UNSIGNED = 0, |
| 433 | SIGNED = 1, |
| 434 | }; |
| 435 | |
| 436 | enum class axi_mem_encoding : uint8_t |
| 437 | { |
| 438 | DEVICE_NON_BUFFERABLE = 0, |
| 439 | DEVICE_BUFFERABLE = 1, |
| 440 | NORMAL_NON_CACHEABLE_NON_BUFFERABLE = 2, |
| 441 | NORMAL_NON_CACHEABLE_BUFFERABLE = 3, |
| 442 | WRITE_THROUGH_NO_ALLOCATE = 4, |
| 443 | WRITE_THROUGH_READ_ALLOCATE = 5, |
| 444 | WRITE_THROUGH_WRITE_ALLOCATE = 6, |
| 445 | WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 7, |
| 446 | WRITE_BACK_NO_ALLOCATE = 8, |
| 447 | WRITE_BACK_READ_ALLOCATE = 9, |
| 448 | WRITE_BACK_WRITE_ALLOCATE = 10, |
| 449 | WRITE_BACK_READ_AND_WRITE_ALLOCATE = 11, |
| 450 | }; |
| 451 | |
| 452 | enum class broadcast_mode : uint8_t |
| 453 | { |
| 454 | DISABLE = 0, |
| 455 | ENABLE = 1, |
| 456 | }; |
| 457 | |
| 458 | enum class cmd0_opcode : uint16_t |
| 459 | { |
| 460 | NPU_OP_STOP = 0, |
| 461 | NPU_OP_IRQ = 1, |
| 462 | NPU_OP_CONV = 2, |
| 463 | NPU_OP_DEPTHWISE = 3, |
| 464 | NPU_OP_POOL = 5, |
| 465 | NPU_OP_ELEMENTWISE = 6, |
| 466 | NPU_OP_DMA_START = 16, |
| 467 | NPU_OP_DMA_WAIT = 17, |
| 468 | NPU_OP_KERNEL_WAIT = 18, |
| 469 | NPU_OP_PMU_MASK = 19, |
| 470 | NPU_SET_IFM_PAD_TOP = 256, |
| 471 | NPU_SET_IFM_PAD_LEFT = 257, |
| 472 | NPU_SET_IFM_PAD_RIGHT = 258, |
| 473 | NPU_SET_IFM_PAD_BOTTOM = 259, |
| 474 | NPU_SET_IFM_DEPTH_M1 = 260, |
| 475 | NPU_SET_IFM_PRECISION = 261, |
| 476 | NPU_SET_IFM_UPSCALE = 263, |
| 477 | NPU_SET_IFM_ZERO_POINT = 265, |
| 478 | NPU_SET_IFM_WIDTH0_M1 = 266, |
| 479 | NPU_SET_IFM_HEIGHT0_M1 = 267, |
| 480 | NPU_SET_IFM_HEIGHT1_M1 = 268, |
| 481 | NPU_SET_IFM_IB_END = 269, |
| 482 | NPU_SET_IFM_REGION = 271, |
| 483 | NPU_SET_OFM_WIDTH_M1 = 273, |
| 484 | NPU_SET_OFM_HEIGHT_M1 = 274, |
| 485 | NPU_SET_OFM_DEPTH_M1 = 275, |
| 486 | NPU_SET_OFM_PRECISION = 276, |
| 487 | NPU_SET_OFM_BLK_WIDTH_M1 = 277, |
| 488 | NPU_SET_OFM_BLK_HEIGHT_M1 = 278, |
| 489 | NPU_SET_OFM_BLK_DEPTH_M1 = 279, |
| 490 | NPU_SET_OFM_ZERO_POINT = 280, |
| 491 | NPU_SET_OFM_WIDTH0_M1 = 282, |
| 492 | NPU_SET_OFM_HEIGHT0_M1 = 283, |
| 493 | NPU_SET_OFM_HEIGHT1_M1 = 284, |
| 494 | NPU_SET_OFM_REGION = 287, |
| 495 | NPU_SET_KERNEL_WIDTH_M1 = 288, |
| 496 | NPU_SET_KERNEL_HEIGHT_M1 = 289, |
| 497 | NPU_SET_KERNEL_STRIDE = 290, |
| 498 | NPU_SET_PARALLEL_MODE = 291, |
| 499 | NPU_SET_ACC_FORMAT = 292, |
| 500 | NPU_SET_ACTIVATION = 293, |
| 501 | NPU_SET_ACTIVATION_MIN = 294, |
| 502 | NPU_SET_ACTIVATION_MAX = 295, |
| 503 | NPU_SET_WEIGHT_REGION = 296, |
| 504 | NPU_SET_SCALE_REGION = 297, |
| 505 | NPU_SET_AB_START = 301, |
| 506 | NPU_SET_BLOCKDEP = 303, |
| 507 | NPU_SET_DMA0_SRC_REGION = 304, |
| 508 | NPU_SET_DMA0_DST_REGION = 305, |
| 509 | NPU_SET_DMA0_SIZE0 = 306, |
| 510 | NPU_SET_DMA0_SIZE1 = 307, |
| 511 | NPU_SET_IFM2_BROADCAST = 384, |
| 512 | NPU_SET_IFM2_SCALAR = 385, |
| 513 | NPU_SET_IFM2_PRECISION = 389, |
| 514 | NPU_SET_IFM2_ZERO_POINT = 393, |
| 515 | NPU_SET_IFM2_WIDTH0_M1 = 394, |
| 516 | NPU_SET_IFM2_HEIGHT0_M1 = 395, |
| 517 | NPU_SET_IFM2_HEIGHT1_M1 = 396, |
| 518 | NPU_SET_IFM2_IB_START = 397, |
| 519 | NPU_SET_IFM2_REGION = 399, |
| 520 | }; |
| 521 | |
| 522 | enum class cmd1_opcode : uint16_t |
| 523 | { |
| 524 | NPU_SET_IFM_BASE0 = 0, |
| 525 | NPU_SET_IFM_BASE1 = 1, |
| 526 | NPU_SET_IFM_BASE2 = 2, |
| 527 | NPU_SET_IFM_BASE3 = 3, |
| 528 | NPU_SET_IFM_STRIDE_X = 4, |
| 529 | NPU_SET_IFM_STRIDE_Y = 5, |
| 530 | NPU_SET_IFM_STRIDE_C = 6, |
| 531 | NPU_SET_OFM_BASE0 = 16, |
| 532 | NPU_SET_OFM_BASE1 = 17, |
| 533 | NPU_SET_OFM_BASE2 = 18, |
| 534 | NPU_SET_OFM_BASE3 = 19, |
| 535 | NPU_SET_OFM_STRIDE_X = 20, |
| 536 | NPU_SET_OFM_STRIDE_Y = 21, |
| 537 | NPU_SET_OFM_STRIDE_C = 22, |
| 538 | NPU_SET_WEIGHT_BASE = 32, |
| 539 | NPU_SET_WEIGHT_LENGTH = 33, |
| 540 | NPU_SET_SCALE_BASE = 34, |
| 541 | NPU_SET_SCALE_LENGTH = 35, |
| 542 | NPU_SET_OFM_SCALE = 36, |
| 543 | NPU_SET_OPA_SCALE = 37, |
| 544 | NPU_SET_OPB_SCALE = 38, |
| 545 | NPU_SET_DMA0_SRC = 48, |
| 546 | NPU_SET_DMA0_DST = 49, |
| 547 | NPU_SET_DMA0_LEN = 50, |
| 548 | NPU_SET_DMA0_SKIP0 = 51, |
| 549 | NPU_SET_DMA0_SKIP1 = 52, |
| 550 | NPU_SET_IFM2_BASE0 = 128, |
| 551 | NPU_SET_IFM2_BASE1 = 129, |
| 552 | NPU_SET_IFM2_BASE2 = 130, |
| 553 | NPU_SET_IFM2_BASE3 = 131, |
| 554 | NPU_SET_IFM2_STRIDE_X = 132, |
| 555 | NPU_SET_IFM2_STRIDE_Y = 133, |
| 556 | NPU_SET_IFM2_STRIDE_C = 134, |
| 557 | NPU_SET_WEIGHT1_BASE = 144, |
| 558 | NPU_SET_WEIGHT1_LENGTH = 145, |
| 559 | NPU_SET_SCALE1_BASE = 146, |
| 560 | NPU_SET_SCALE1_LENGTH = 147, |
| 561 | }; |
| 562 | |
| 563 | enum class cmd_ctrl : uint8_t |
| 564 | { |
| 565 | CMD0_CTRL = 0, |
| 566 | CMD1_CTRL = 1, |
| 567 | }; |
| 568 | |
| 569 | enum class custom_dma : uint8_t |
| 570 | { |
| 571 | NOT_IMPLEMENTED = 0, |
| 572 | IMPLEMENTED = 1, |
| 573 | }; |
| 574 | |
| 575 | enum class dma_fault_src : uint8_t |
| 576 | { |
| 577 | AXI_M0 = 0, |
| 578 | AXI_M1 = 1, |
| 579 | }; |
| 580 | |
| 581 | enum class dma_region_mode : uint8_t |
| 582 | { |
| 583 | EXTERNAL = 0, |
| 584 | INTERNAL = 1, |
| 585 | }; |
| 586 | |
| 587 | enum class dma_stride_mode : uint8_t |
| 588 | { |
| 589 | D1 = 0, |
| 590 | D2 = 1, |
| 591 | D3 = 2, |
| 592 | }; |
| 593 | |
| 594 | enum class elementwise_mode : uint8_t |
| 595 | { |
| 596 | MUL = 0, |
| 597 | ADD = 1, |
| 598 | SUB = 2, |
| 599 | MIN = 3, |
| 600 | MAX = 4, |
| 601 | LRELU = 5, |
| 602 | ABS = 6, |
| 603 | CLZ = 7, |
| 604 | SHR = 8, |
| 605 | SHL = 9, |
| 606 | }; |
| 607 | |
| 608 | enum class functional_safety : uint8_t |
| 609 | { |
| 610 | NOT_IMPLEMENTED = 0, |
| 611 | IMPLEMENTED = 1, |
| 612 | }; |
| 613 | |
| 614 | enum class ifm2_operand_order : uint8_t |
| 615 | { |
| 616 | ORDER_B = 0, |
| 617 | ORDER_A = 1, |
| 618 | }; |
| 619 | |
| 620 | enum class ifm_scale_mode : uint8_t |
| 621 | { |
| 622 | OPA_OPB_16 = 0, |
| 623 | OPA_32 = 1, |
| 624 | OPB_32 = 2, |
| 625 | }; |
| 626 | |
| 627 | enum class ifm_upscale_mode : uint8_t |
| 628 | { |
| 629 | NONE = 0, |
| 630 | NEAREST = 1, |
| 631 | ZEROS = 2, |
| 632 | }; |
| 633 | |
| 634 | enum class kernel_decomposition : uint8_t |
| 635 | { |
| 636 | D8X8 = 0, |
| 637 | D4X4 = 1, |
| 638 | }; |
| 639 | |
| 640 | enum class kernel_dilation : uint8_t |
| 641 | { |
| 642 | NONE = 0, |
| 643 | X2 = 1, |
| 644 | }; |
| 645 | |
| 646 | enum class max_beats : uint8_t |
| 647 | { |
| 648 | B64 = 0, |
| 649 | B128 = 1, |
| 650 | B256 = 2, |
| 651 | }; |
| 652 | |
| 653 | enum class mem_attr : uint8_t |
| 654 | { |
| 655 | AXI0_OUTSTANDING_COUNTER0 = 0, |
| 656 | AXI0_OUTSTANDING_COUNTER1 = 1, |
| 657 | AXI1_OUTSTANDING_COUNTER2 = 2, |
| 658 | AXI1_OUTSTANDING_COUNTER3 = 3, |
| 659 | }; |
| 660 | |
| 661 | enum class ofm_scale_mode : uint8_t |
| 662 | { |
| 663 | PER_CHANNEL = 0, |
| 664 | GLOBAL = 1, |
| 665 | }; |
| 666 | |
| 667 | enum class parallel_mode : uint8_t |
| 668 | { |
| 669 | SINGLE_CORE = 0, |
| 670 | DUAL_CORE_DEPTH = 1, |
| 671 | }; |
| 672 | |
| 673 | enum class pmu_axi_channel : uint8_t |
| 674 | { |
| 675 | RD_CMD = 0, |
| 676 | RD_IFM = 1, |
| 677 | RD_WEIGHTS = 2, |
| 678 | RD_SCALE_BIAS = 3, |
| 679 | RD_MEM2MEM = 4, |
| 680 | WR_OFM = 8, |
| 681 | WR_MEM2MEM = 9, |
| 682 | }; |
| 683 | |
| 684 | enum class pmu_event : uint16_t |
| 685 | { |
| 686 | NO_EVENT = 0, |
| 687 | CYCLE = 17, |
| 688 | NPU_IDLE = 32, |
| 689 | CC_STALLED_ON_BLOCKDEP = 33, |
| 690 | CC_STALLED_ON_SHRAM_RECONFIG = 34, |
| 691 | NPU_ACTIVE = 35, |
| 692 | MAC_ACTIVE = 48, |
| 693 | MAC_ACTIVE_8BIT = 49, |
| 694 | MAC_ACTIVE_16BIT = 50, |
| 695 | MAC_DPU_ACTIVE = 51, |
| 696 | MAC_STALLED_BY_WD_ACC = 52, |
| 697 | MAC_STALLED_BY_WD = 53, |
| 698 | MAC_STALLED_BY_ACC = 54, |
| 699 | MAC_STALLED_BY_IB = 55, |
| 700 | MAC_ACTIVE_32BIT = 56, |
| 701 | MAC_STALLED_BY_INT_W = 57, |
| 702 | MAC_STALLED_BY_INT_ACC = 58, |
| 703 | AO_ACTIVE = 64, |
| 704 | AO_ACTIVE_8BIT = 65, |
| 705 | AO_ACTIVE_16BIT = 66, |
| 706 | AO_STALLED_BY_OFMP_OB = 67, |
| 707 | AO_STALLED_BY_OFMP = 68, |
| 708 | AO_STALLED_BY_OB = 69, |
| 709 | AO_STALLED_BY_ACC_IB = 70, |
| 710 | AO_STALLED_BY_ACC = 71, |
| 711 | AO_STALLED_BY_IB = 72, |
| 712 | WD_ACTIVE = 80, |
| 713 | WD_STALLED = 81, |
| 714 | WD_STALLED_BY_WS = 82, |
| 715 | WD_STALLED_BY_WD_BUF = 83, |
| 716 | WD_PARSE_ACTIVE = 84, |
| 717 | WD_PARSE_STALLED = 85, |
| 718 | WD_PARSE_STALLED_IN = 86, |
| 719 | WD_PARSE_STALLED_OUT = 87, |
| 720 | WD_TRANS_WS = 88, |
| 721 | WD_TRANS_WB = 89, |
| 722 | WD_TRANS_DW0 = 90, |
| 723 | WD_TRANS_DW1 = 91, |
| 724 | AXI0_RD_TRANS_ACCEPTED = 128, |
| 725 | AXI0_RD_TRANS_COMPLETED = 129, |
| 726 | AXI0_RD_DATA_BEAT_RECEIVED = 130, |
| 727 | AXI0_RD_TRAN_REQ_STALLED = 131, |
| 728 | AXI0_WR_TRANS_ACCEPTED = 132, |
| 729 | AXI0_WR_TRANS_COMPLETED_M = 133, |
| 730 | AXI0_WR_TRANS_COMPLETED_S = 134, |
| 731 | AXI0_WR_DATA_BEAT_WRITTEN = 135, |
| 732 | AXI0_WR_TRAN_REQ_STALLED = 136, |
| 733 | AXI0_WR_DATA_BEAT_STALLED = 137, |
| 734 | AXI0_ENABLED_CYCLES = 140, |
| 735 | AXI0_RD_STALL_LIMIT = 142, |
| 736 | AXI0_WR_STALL_LIMIT = 143, |
| 737 | AXI_LATENCY_ANY = 160, |
| 738 | AXI_LATENCY_32 = 161, |
| 739 | AXI_LATENCY_64 = 162, |
| 740 | AXI_LATENCY_128 = 163, |
| 741 | AXI_LATENCY_256 = 164, |
| 742 | AXI_LATENCY_512 = 165, |
| 743 | AXI_LATENCY_1024 = 166, |
| 744 | ECC_DMA = 176, |
| 745 | ECC_SB0 = 177, |
| 746 | AXI1_RD_TRANS_ACCEPTED = 384, |
| 747 | AXI1_RD_TRANS_COMPLETED = 385, |
| 748 | AXI1_RD_DATA_BEAT_RECEIVED = 386, |
| 749 | AXI1_RD_TRAN_REQ_STALLED = 387, |
| 750 | AXI1_WR_TRANS_ACCEPTED = 388, |
| 751 | AXI1_WR_TRANS_COMPLETED_M = 389, |
| 752 | AXI1_WR_TRANS_COMPLETED_S = 390, |
| 753 | AXI1_WR_DATA_BEAT_WRITTEN = 391, |
| 754 | AXI1_WR_TRAN_REQ_STALLED = 392, |
| 755 | AXI1_WR_DATA_BEAT_STALLED = 393, |
| 756 | AXI1_ENABLED_CYCLES = 396, |
| 757 | AXI1_RD_STALL_LIMIT = 398, |
| 758 | AXI1_WR_STALL_LIMIT = 399, |
| 759 | ECC_SB1 = 433, |
| 760 | }; |
| 761 | |
| 762 | enum class pooling_mode : uint8_t |
| 763 | { |
| 764 | MAX = 0, |
| 765 | AVERAGE = 1, |
| 766 | REDUCE_SUM = 2, |
| 767 | }; |
| 768 | |
| 769 | enum class privilege_level : uint8_t |
| 770 | { |
| 771 | USER = 0, |
| 772 | PRIVILEGED = 1, |
| 773 | }; |
| 774 | |
| 775 | enum class round_mode : uint8_t |
| 776 | { |
| 777 | DBL = 0, |
| 778 | TRUNCATE = 1, |
| 779 | NATURAL = 2, |
| 780 | }; |
| 781 | |
| 782 | enum class security_level : uint8_t |
| 783 | { |
| 784 | SECURE = 0, |
| 785 | NON_SECURE = 1, |
| 786 | }; |
| 787 | |
| 788 | enum class state : uint8_t |
| 789 | { |
| 790 | STOPPED = 0, |
| 791 | RUNNING = 1, |
| 792 | }; |
| 793 | |
| 794 | enum class wd_core_slice_state : uint8_t |
| 795 | { |
| 796 | HEADER = 0, |
| 797 | PALETTE = 1, |
| 798 | WEIGHTS = 2, |
| 799 | }; |
| 800 | |
| 801 | enum class wd_ctrl_state : uint8_t |
| 802 | { |
| 803 | IDLE = 0, |
| 804 | DRAIN = 1, |
| 805 | OFD_INIT = 2, |
| 806 | OFD_RUN = 3, |
| 807 | }; |
| 808 | |
| 809 | enum class weight_order : uint8_t |
| 810 | { |
| 811 | DEPTH_FIRST = 0, |
| 812 | PART_KERNEL_FIRST = 1, |
| 813 | }; |
| 814 | |
| 815 | #else |
| 816 | |
| 817 | enum acc_format |
| 818 | { |
| 819 | ACC_FORMAT_I32 = 0, |
| 820 | ACC_FORMAT_I40 = 1, |
| 821 | ACC_FORMAT_F16 = 2, |
| 822 | }; |
| 823 | |
| 824 | enum activation_clip_range |
| 825 | { |
| 826 | ACTIVATION_CLIP_RANGE_OFM_PRECISION = 0, |
| 827 | ACTIVATION_CLIP_RANGE_FORCE_UINT8 = 2, |
| 828 | ACTIVATION_CLIP_RANGE_FORCE_INT8 = 3, |
| 829 | ACTIVATION_CLIP_RANGE_FORCE_INT16 = 5, |
| 830 | }; |
| 831 | |
| 832 | enum activation_format |
| 833 | { |
| 834 | ACTIVATION_FORMAT_NHWC = 0, |
| 835 | ACTIVATION_FORMAT_NHCWB16 = 1, |
| 836 | }; |
| 837 | |
| 838 | enum activation_function |
| 839 | { |
| 840 | ACTIVATION_FUNCTION_RELU = 0, |
| 841 | ACTIVATION_FUNCTION_TANH = 3, |
| 842 | ACTIVATION_FUNCTION_SIGMOID = 4, |
| 843 | ACTIVATION_FUNCTION_TABLE_0 = 16, |
| 844 | ACTIVATION_FUNCTION_TABLE_1 = 17, |
| 845 | ACTIVATION_FUNCTION_TABLE_2 = 18, |
| 846 | ACTIVATION_FUNCTION_TABLE_3 = 19, |
| 847 | ACTIVATION_FUNCTION_TABLE_4 = 20, |
| 848 | ACTIVATION_FUNCTION_TABLE_5 = 21, |
| 849 | ACTIVATION_FUNCTION_TABLE_6 = 22, |
| 850 | ACTIVATION_FUNCTION_TABLE_7 = 23, |
| 851 | }; |
| 852 | |
| 853 | enum activation_precision |
| 854 | { |
| 855 | ACTIVATION_PRECISION_B8 = 0, |
| 856 | ACTIVATION_PRECISION_B16 = 1, |
| 857 | ACTIVATION_PRECISION_B32 = 2, |
| 858 | ACTIVATION_PRECISION_B64 = 3, |
| 859 | }; |
| 860 | |
| 861 | enum activation_type |
| 862 | { |
| 863 | ACTIVATION_TYPE_UNSIGNED = 0, |
| 864 | ACTIVATION_TYPE_SIGNED = 1, |
| 865 | }; |
| 866 | |
| 867 | enum axi_mem_encoding |
| 868 | { |
| 869 | AXI_MEM_ENCODING_DEVICE_NON_BUFFERABLE = 0, |
| 870 | AXI_MEM_ENCODING_DEVICE_BUFFERABLE = 1, |
| 871 | AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_NON_BUFFERABLE = 2, |
| 872 | AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_BUFFERABLE = 3, |
| 873 | AXI_MEM_ENCODING_WRITE_THROUGH_NO_ALLOCATE = 4, |
| 874 | AXI_MEM_ENCODING_WRITE_THROUGH_READ_ALLOCATE = 5, |
| 875 | AXI_MEM_ENCODING_WRITE_THROUGH_WRITE_ALLOCATE = 6, |
| 876 | AXI_MEM_ENCODING_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE = 7, |
| 877 | AXI_MEM_ENCODING_WRITE_BACK_NO_ALLOCATE = 8, |
| 878 | AXI_MEM_ENCODING_WRITE_BACK_READ_ALLOCATE = 9, |
| 879 | AXI_MEM_ENCODING_WRITE_BACK_WRITE_ALLOCATE = 10, |
| 880 | AXI_MEM_ENCODING_WRITE_BACK_READ_AND_WRITE_ALLOCATE = 11, |
| 881 | }; |
| 882 | |
| 883 | enum broadcast_mode |
| 884 | { |
| 885 | BROADCAST_MODE_DISABLE = 0, |
| 886 | BROADCAST_MODE_ENABLE = 1, |
| 887 | }; |
| 888 | |
| 889 | enum cmd0_opcode |
| 890 | { |
| 891 | CMD0_OPCODE_NPU_OP_STOP = 0, |
| 892 | CMD0_OPCODE_NPU_OP_IRQ = 1, |
| 893 | CMD0_OPCODE_NPU_OP_CONV = 2, |
| 894 | CMD0_OPCODE_NPU_OP_DEPTHWISE = 3, |
| 895 | CMD0_OPCODE_NPU_OP_POOL = 5, |
| 896 | CMD0_OPCODE_NPU_OP_ELEMENTWISE = 6, |
| 897 | CMD0_OPCODE_NPU_OP_DMA_START = 16, |
| 898 | CMD0_OPCODE_NPU_OP_DMA_WAIT = 17, |
| 899 | CMD0_OPCODE_NPU_OP_KERNEL_WAIT = 18, |
| 900 | CMD0_OPCODE_NPU_OP_PMU_MASK = 19, |
| 901 | CMD0_OPCODE_NPU_SET_IFM_PAD_TOP = 256, |
| 902 | CMD0_OPCODE_NPU_SET_IFM_PAD_LEFT = 257, |
| 903 | CMD0_OPCODE_NPU_SET_IFM_PAD_RIGHT = 258, |
| 904 | CMD0_OPCODE_NPU_SET_IFM_PAD_BOTTOM = 259, |
| 905 | CMD0_OPCODE_NPU_SET_IFM_DEPTH_M1 = 260, |
| 906 | CMD0_OPCODE_NPU_SET_IFM_PRECISION = 261, |
| 907 | CMD0_OPCODE_NPU_SET_IFM_UPSCALE = 263, |
| 908 | CMD0_OPCODE_NPU_SET_IFM_ZERO_POINT = 265, |
| 909 | CMD0_OPCODE_NPU_SET_IFM_WIDTH0_M1 = 266, |
| 910 | CMD0_OPCODE_NPU_SET_IFM_HEIGHT0_M1 = 267, |
| 911 | CMD0_OPCODE_NPU_SET_IFM_HEIGHT1_M1 = 268, |
| 912 | CMD0_OPCODE_NPU_SET_IFM_IB_END = 269, |
| 913 | CMD0_OPCODE_NPU_SET_IFM_REGION = 271, |
| 914 | CMD0_OPCODE_NPU_SET_OFM_WIDTH_M1 = 273, |
| 915 | CMD0_OPCODE_NPU_SET_OFM_HEIGHT_M1 = 274, |
| 916 | CMD0_OPCODE_NPU_SET_OFM_DEPTH_M1 = 275, |
| 917 | CMD0_OPCODE_NPU_SET_OFM_PRECISION = 276, |
| 918 | CMD0_OPCODE_NPU_SET_OFM_BLK_WIDTH_M1 = 277, |
| 919 | CMD0_OPCODE_NPU_SET_OFM_BLK_HEIGHT_M1 = 278, |
| 920 | CMD0_OPCODE_NPU_SET_OFM_BLK_DEPTH_M1 = 279, |
| 921 | CMD0_OPCODE_NPU_SET_OFM_ZERO_POINT = 280, |
| 922 | CMD0_OPCODE_NPU_SET_OFM_WIDTH0_M1 = 282, |
| 923 | CMD0_OPCODE_NPU_SET_OFM_HEIGHT0_M1 = 283, |
| 924 | CMD0_OPCODE_NPU_SET_OFM_HEIGHT1_M1 = 284, |
| 925 | CMD0_OPCODE_NPU_SET_OFM_REGION = 287, |
| 926 | CMD0_OPCODE_NPU_SET_KERNEL_WIDTH_M1 = 288, |
| 927 | CMD0_OPCODE_NPU_SET_KERNEL_HEIGHT_M1 = 289, |
| 928 | CMD0_OPCODE_NPU_SET_KERNEL_STRIDE = 290, |
| 929 | CMD0_OPCODE_NPU_SET_PARALLEL_MODE = 291, |
| 930 | CMD0_OPCODE_NPU_SET_ACC_FORMAT = 292, |
| 931 | CMD0_OPCODE_NPU_SET_ACTIVATION = 293, |
| 932 | CMD0_OPCODE_NPU_SET_ACTIVATION_MIN = 294, |
| 933 | CMD0_OPCODE_NPU_SET_ACTIVATION_MAX = 295, |
| 934 | CMD0_OPCODE_NPU_SET_WEIGHT_REGION = 296, |
| 935 | CMD0_OPCODE_NPU_SET_SCALE_REGION = 297, |
| 936 | CMD0_OPCODE_NPU_SET_AB_START = 301, |
| 937 | CMD0_OPCODE_NPU_SET_BLOCKDEP = 303, |
| 938 | CMD0_OPCODE_NPU_SET_DMA0_SRC_REGION = 304, |
| 939 | CMD0_OPCODE_NPU_SET_DMA0_DST_REGION = 305, |
| 940 | CMD0_OPCODE_NPU_SET_DMA0_SIZE0 = 306, |
| 941 | CMD0_OPCODE_NPU_SET_DMA0_SIZE1 = 307, |
| 942 | CMD0_OPCODE_NPU_SET_IFM2_BROADCAST = 384, |
| 943 | CMD0_OPCODE_NPU_SET_IFM2_SCALAR = 385, |
| 944 | CMD0_OPCODE_NPU_SET_IFM2_PRECISION = 389, |
| 945 | CMD0_OPCODE_NPU_SET_IFM2_ZERO_POINT = 393, |
| 946 | CMD0_OPCODE_NPU_SET_IFM2_WIDTH0_M1 = 394, |
| 947 | CMD0_OPCODE_NPU_SET_IFM2_HEIGHT0_M1 = 395, |
| 948 | CMD0_OPCODE_NPU_SET_IFM2_HEIGHT1_M1 = 396, |
| 949 | CMD0_OPCODE_NPU_SET_IFM2_IB_START = 397, |
| 950 | CMD0_OPCODE_NPU_SET_IFM2_REGION = 399, |
| 951 | }; |
| 952 | |
| 953 | enum cmd1_opcode |
| 954 | { |
| 955 | CMD1_OPCODE_NPU_SET_IFM_BASE0 = 0, |
| 956 | CMD1_OPCODE_NPU_SET_IFM_BASE1 = 1, |
| 957 | CMD1_OPCODE_NPU_SET_IFM_BASE2 = 2, |
| 958 | CMD1_OPCODE_NPU_SET_IFM_BASE3 = 3, |
| 959 | CMD1_OPCODE_NPU_SET_IFM_STRIDE_X = 4, |
| 960 | CMD1_OPCODE_NPU_SET_IFM_STRIDE_Y = 5, |
| 961 | CMD1_OPCODE_NPU_SET_IFM_STRIDE_C = 6, |
| 962 | CMD1_OPCODE_NPU_SET_OFM_BASE0 = 16, |
| 963 | CMD1_OPCODE_NPU_SET_OFM_BASE1 = 17, |
| 964 | CMD1_OPCODE_NPU_SET_OFM_BASE2 = 18, |
| 965 | CMD1_OPCODE_NPU_SET_OFM_BASE3 = 19, |
| 966 | CMD1_OPCODE_NPU_SET_OFM_STRIDE_X = 20, |
| 967 | CMD1_OPCODE_NPU_SET_OFM_STRIDE_Y = 21, |
| 968 | CMD1_OPCODE_NPU_SET_OFM_STRIDE_C = 22, |
| 969 | CMD1_OPCODE_NPU_SET_WEIGHT_BASE = 32, |
| 970 | CMD1_OPCODE_NPU_SET_WEIGHT_LENGTH = 33, |
| 971 | CMD1_OPCODE_NPU_SET_SCALE_BASE = 34, |
| 972 | CMD1_OPCODE_NPU_SET_SCALE_LENGTH = 35, |
| 973 | CMD1_OPCODE_NPU_SET_OFM_SCALE = 36, |
| 974 | CMD1_OPCODE_NPU_SET_OPA_SCALE = 37, |
| 975 | CMD1_OPCODE_NPU_SET_OPB_SCALE = 38, |
| 976 | CMD1_OPCODE_NPU_SET_DMA0_SRC = 48, |
| 977 | CMD1_OPCODE_NPU_SET_DMA0_DST = 49, |
| 978 | CMD1_OPCODE_NPU_SET_DMA0_LEN = 50, |
| 979 | CMD1_OPCODE_NPU_SET_DMA0_SKIP0 = 51, |
| 980 | CMD1_OPCODE_NPU_SET_DMA0_SKIP1 = 52, |
| 981 | CMD1_OPCODE_NPU_SET_IFM2_BASE0 = 128, |
| 982 | CMD1_OPCODE_NPU_SET_IFM2_BASE1 = 129, |
| 983 | CMD1_OPCODE_NPU_SET_IFM2_BASE2 = 130, |
| 984 | CMD1_OPCODE_NPU_SET_IFM2_BASE3 = 131, |
| 985 | CMD1_OPCODE_NPU_SET_IFM2_STRIDE_X = 132, |
| 986 | CMD1_OPCODE_NPU_SET_IFM2_STRIDE_Y = 133, |
| 987 | CMD1_OPCODE_NPU_SET_IFM2_STRIDE_C = 134, |
| 988 | CMD1_OPCODE_NPU_SET_WEIGHT1_BASE = 144, |
| 989 | CMD1_OPCODE_NPU_SET_WEIGHT1_LENGTH = 145, |
| 990 | CMD1_OPCODE_NPU_SET_SCALE1_BASE = 146, |
| 991 | CMD1_OPCODE_NPU_SET_SCALE1_LENGTH = 147, |
| 992 | }; |
| 993 | |
| 994 | enum cmd_ctrl |
| 995 | { |
| 996 | CMD_CTRL_CMD0_CTRL = 0, |
| 997 | CMD_CTRL_CMD1_CTRL = 1, |
| 998 | }; |
| 999 | |
| 1000 | enum custom_dma |
| 1001 | { |
| 1002 | CUSTOM_DMA_NOT_IMPLEMENTED = 0, |
| 1003 | CUSTOM_DMA_IMPLEMENTED = 1, |
| 1004 | }; |
| 1005 | |
| 1006 | enum dma_fault_src |
| 1007 | { |
| 1008 | DMA_FAULT_SRC_AXI_M0 = 0, |
| 1009 | DMA_FAULT_SRC_AXI_M1 = 1, |
| 1010 | }; |
| 1011 | |
| 1012 | enum dma_region_mode |
| 1013 | { |
| 1014 | DMA_REGION_MODE_EXTERNAL = 0, |
| 1015 | DMA_REGION_MODE_INTERNAL = 1, |
| 1016 | }; |
| 1017 | |
| 1018 | enum dma_stride_mode |
| 1019 | { |
| 1020 | DMA_STRIDE_MODE_D1 = 0, |
| 1021 | DMA_STRIDE_MODE_D2 = 1, |
| 1022 | DMA_STRIDE_MODE_D3 = 2, |
| 1023 | }; |
| 1024 | |
| 1025 | enum elementwise_mode |
| 1026 | { |
| 1027 | ELEMENTWISE_MODE_MUL = 0, |
| 1028 | ELEMENTWISE_MODE_ADD = 1, |
| 1029 | ELEMENTWISE_MODE_SUB = 2, |
| 1030 | ELEMENTWISE_MODE_MIN = 3, |
| 1031 | ELEMENTWISE_MODE_MAX = 4, |
| 1032 | ELEMENTWISE_MODE_LRELU = 5, |
| 1033 | ELEMENTWISE_MODE_ABS = 6, |
| 1034 | ELEMENTWISE_MODE_CLZ = 7, |
| 1035 | ELEMENTWISE_MODE_SHR = 8, |
| 1036 | ELEMENTWISE_MODE_SHL = 9, |
| 1037 | }; |
| 1038 | |
| 1039 | enum functional_safety |
| 1040 | { |
| 1041 | FUNCTIONAL_SAFETY_NOT_IMPLEMENTED = 0, |
| 1042 | FUNCTIONAL_SAFETY_IMPLEMENTED = 1, |
| 1043 | }; |
| 1044 | |
| 1045 | enum ifm2_operand_order |
| 1046 | { |
| 1047 | IFM2_OPERAND_ORDER_ORDER_B = 0, |
| 1048 | IFM2_OPERAND_ORDER_ORDER_A = 1, |
| 1049 | }; |
| 1050 | |
| 1051 | enum ifm_scale_mode |
| 1052 | { |
| 1053 | IFM_SCALE_MODE_OPA_OPB_16 = 0, |
| 1054 | IFM_SCALE_MODE_OPA_32 = 1, |
| 1055 | IFM_SCALE_MODE_OPB_32 = 2, |
| 1056 | }; |
| 1057 | |
| 1058 | enum ifm_upscale_mode |
| 1059 | { |
| 1060 | IFM_UPSCALE_MODE_NONE = 0, |
| 1061 | IFM_UPSCALE_MODE_NEAREST = 1, |
| 1062 | IFM_UPSCALE_MODE_ZEROS = 2, |
| 1063 | }; |
| 1064 | |
| 1065 | enum kernel_decomposition |
| 1066 | { |
| 1067 | KERNEL_DECOMPOSITION_D8X8 = 0, |
| 1068 | KERNEL_DECOMPOSITION_D4X4 = 1, |
| 1069 | }; |
| 1070 | |
| 1071 | enum kernel_dilation |
| 1072 | { |
| 1073 | KERNEL_DILATION_NONE = 0, |
| 1074 | KERNEL_DILATION_X2 = 1, |
| 1075 | }; |
| 1076 | |
| 1077 | enum max_beats |
| 1078 | { |
| 1079 | MAX_BEATS_B64 = 0, |
| 1080 | MAX_BEATS_B128 = 1, |
| 1081 | MAX_BEATS_B256 = 2, |
| 1082 | }; |
| 1083 | |
| 1084 | enum mem_attr |
| 1085 | { |
| 1086 | MEM_ATTR_AXI0_OUTSTANDING_COUNTER0 = 0, |
| 1087 | MEM_ATTR_AXI0_OUTSTANDING_COUNTER1 = 1, |
| 1088 | MEM_ATTR_AXI1_OUTSTANDING_COUNTER2 = 2, |
| 1089 | MEM_ATTR_AXI1_OUTSTANDING_COUNTER3 = 3, |
| 1090 | }; |
| 1091 | |
| 1092 | enum ofm_scale_mode |
| 1093 | { |
| 1094 | OFM_SCALE_MODE_PER_CHANNEL = 0, |
| 1095 | OFM_SCALE_MODE_GLOBAL = 1, |
| 1096 | }; |
| 1097 | |
| 1098 | enum parallel_mode |
| 1099 | { |
| 1100 | PARALLEL_MODE_SINGLE_CORE = 0, |
| 1101 | PARALLEL_MODE_DUAL_CORE_DEPTH = 1, |
| 1102 | }; |
| 1103 | |
| 1104 | enum pmu_axi_channel |
| 1105 | { |
| 1106 | PMU_AXI_CHANNEL_RD_CMD = 0, |
| 1107 | PMU_AXI_CHANNEL_RD_IFM = 1, |
| 1108 | PMU_AXI_CHANNEL_RD_WEIGHTS = 2, |
| 1109 | PMU_AXI_CHANNEL_RD_SCALE_BIAS = 3, |
| 1110 | PMU_AXI_CHANNEL_RD_MEM2MEM = 4, |
| 1111 | PMU_AXI_CHANNEL_WR_OFM = 8, |
| 1112 | PMU_AXI_CHANNEL_WR_MEM2MEM = 9, |
| 1113 | }; |
| 1114 | |
| 1115 | enum pmu_event |
| 1116 | { |
| 1117 | PMU_EVENT_NO_EVENT = 0, |
| 1118 | PMU_EVENT_CYCLE = 17, |
| 1119 | PMU_EVENT_NPU_IDLE = 32, |
| 1120 | PMU_EVENT_CC_STALLED_ON_BLOCKDEP = 33, |
| 1121 | PMU_EVENT_CC_STALLED_ON_SHRAM_RECONFIG = 34, |
| 1122 | PMU_EVENT_NPU_ACTIVE = 35, |
| 1123 | PMU_EVENT_MAC_ACTIVE = 48, |
| 1124 | PMU_EVENT_MAC_ACTIVE_8BIT = 49, |
| 1125 | PMU_EVENT_MAC_ACTIVE_16BIT = 50, |
| 1126 | PMU_EVENT_MAC_DPU_ACTIVE = 51, |
| 1127 | PMU_EVENT_MAC_STALLED_BY_WD_ACC = 52, |
| 1128 | PMU_EVENT_MAC_STALLED_BY_WD = 53, |
| 1129 | PMU_EVENT_MAC_STALLED_BY_ACC = 54, |
| 1130 | PMU_EVENT_MAC_STALLED_BY_IB = 55, |
| 1131 | PMU_EVENT_MAC_ACTIVE_32BIT = 56, |
| 1132 | PMU_EVENT_MAC_STALLED_BY_INT_W = 57, |
| 1133 | PMU_EVENT_MAC_STALLED_BY_INT_ACC = 58, |
| 1134 | PMU_EVENT_AO_ACTIVE = 64, |
| 1135 | PMU_EVENT_AO_ACTIVE_8BIT = 65, |
| 1136 | PMU_EVENT_AO_ACTIVE_16BIT = 66, |
| 1137 | PMU_EVENT_AO_STALLED_BY_OFMP_OB = 67, |
| 1138 | PMU_EVENT_AO_STALLED_BY_OFMP = 68, |
| 1139 | PMU_EVENT_AO_STALLED_BY_OB = 69, |
| 1140 | PMU_EVENT_AO_STALLED_BY_ACC_IB = 70, |
| 1141 | PMU_EVENT_AO_STALLED_BY_ACC = 71, |
| 1142 | PMU_EVENT_AO_STALLED_BY_IB = 72, |
| 1143 | PMU_EVENT_WD_ACTIVE = 80, |
| 1144 | PMU_EVENT_WD_STALLED = 81, |
| 1145 | PMU_EVENT_WD_STALLED_BY_WS = 82, |
| 1146 | PMU_EVENT_WD_STALLED_BY_WD_BUF = 83, |
| 1147 | PMU_EVENT_WD_PARSE_ACTIVE = 84, |
| 1148 | PMU_EVENT_WD_PARSE_STALLED = 85, |
| 1149 | PMU_EVENT_WD_PARSE_STALLED_IN = 86, |
| 1150 | PMU_EVENT_WD_PARSE_STALLED_OUT = 87, |
| 1151 | PMU_EVENT_WD_TRANS_WS = 88, |
| 1152 | PMU_EVENT_WD_TRANS_WB = 89, |
| 1153 | PMU_EVENT_WD_TRANS_DW0 = 90, |
| 1154 | PMU_EVENT_WD_TRANS_DW1 = 91, |
| 1155 | PMU_EVENT_AXI0_RD_TRANS_ACCEPTED = 128, |
| 1156 | PMU_EVENT_AXI0_RD_TRANS_COMPLETED = 129, |
| 1157 | PMU_EVENT_AXI0_RD_DATA_BEAT_RECEIVED = 130, |
| 1158 | PMU_EVENT_AXI0_RD_TRAN_REQ_STALLED = 131, |
| 1159 | PMU_EVENT_AXI0_WR_TRANS_ACCEPTED = 132, |
| 1160 | PMU_EVENT_AXI0_WR_TRANS_COMPLETED_M = 133, |
| 1161 | PMU_EVENT_AXI0_WR_TRANS_COMPLETED_S = 134, |
| 1162 | PMU_EVENT_AXI0_WR_DATA_BEAT_WRITTEN = 135, |
| 1163 | PMU_EVENT_AXI0_WR_TRAN_REQ_STALLED = 136, |
| 1164 | PMU_EVENT_AXI0_WR_DATA_BEAT_STALLED = 137, |
| 1165 | PMU_EVENT_AXI0_ENABLED_CYCLES = 140, |
| 1166 | PMU_EVENT_AXI0_RD_STALL_LIMIT = 142, |
| 1167 | PMU_EVENT_AXI0_WR_STALL_LIMIT = 143, |
| 1168 | PMU_EVENT_AXI_LATENCY_ANY = 160, |
| 1169 | PMU_EVENT_AXI_LATENCY_32 = 161, |
| 1170 | PMU_EVENT_AXI_LATENCY_64 = 162, |
| 1171 | PMU_EVENT_AXI_LATENCY_128 = 163, |
| 1172 | PMU_EVENT_AXI_LATENCY_256 = 164, |
| 1173 | PMU_EVENT_AXI_LATENCY_512 = 165, |
| 1174 | PMU_EVENT_AXI_LATENCY_1024 = 166, |
| 1175 | PMU_EVENT_ECC_DMA = 176, |
| 1176 | PMU_EVENT_ECC_SB0 = 177, |
| 1177 | PMU_EVENT_AXI1_RD_TRANS_ACCEPTED = 384, |
| 1178 | PMU_EVENT_AXI1_RD_TRANS_COMPLETED = 385, |
| 1179 | PMU_EVENT_AXI1_RD_DATA_BEAT_RECEIVED = 386, |
| 1180 | PMU_EVENT_AXI1_RD_TRAN_REQ_STALLED = 387, |
| 1181 | PMU_EVENT_AXI1_WR_TRANS_ACCEPTED = 388, |
| 1182 | PMU_EVENT_AXI1_WR_TRANS_COMPLETED_M = 389, |
| 1183 | PMU_EVENT_AXI1_WR_TRANS_COMPLETED_S = 390, |
| 1184 | PMU_EVENT_AXI1_WR_DATA_BEAT_WRITTEN = 391, |
| 1185 | PMU_EVENT_AXI1_WR_TRAN_REQ_STALLED = 392, |
| 1186 | PMU_EVENT_AXI1_WR_DATA_BEAT_STALLED = 393, |
| 1187 | PMU_EVENT_AXI1_ENABLED_CYCLES = 396, |
| 1188 | PMU_EVENT_AXI1_RD_STALL_LIMIT = 398, |
| 1189 | PMU_EVENT_AXI1_WR_STALL_LIMIT = 399, |
| 1190 | PMU_EVENT_ECC_SB1 = 433, |
| 1191 | }; |
| 1192 | |
| 1193 | enum pooling_mode |
| 1194 | { |
| 1195 | POOLING_MODE_MAX = 0, |
| 1196 | POOLING_MODE_AVERAGE = 1, |
| 1197 | POOLING_MODE_REDUCE_SUM = 2, |
| 1198 | }; |
| 1199 | |
| 1200 | enum privilege_level |
| 1201 | { |
| 1202 | PRIVILEGE_LEVEL_USER = 0, |
| 1203 | PRIVILEGE_LEVEL_PRIVILEGED = 1, |
| 1204 | }; |
| 1205 | |
| 1206 | enum round_mode |
| 1207 | { |
| 1208 | ROUND_MODE_DBL = 0, |
| 1209 | ROUND_MODE_TRUNCATE = 1, |
| 1210 | ROUND_MODE_NATURAL = 2, |
| 1211 | }; |
| 1212 | |
| 1213 | enum security_level |
| 1214 | { |
| 1215 | SECURITY_LEVEL_SECURE = 0, |
| 1216 | SECURITY_LEVEL_NON_SECURE = 1, |
| 1217 | }; |
| 1218 | |
| 1219 | enum state |
| 1220 | { |
| 1221 | STATE_STOPPED = 0, |
| 1222 | STATE_RUNNING = 1, |
| 1223 | }; |
| 1224 | |
| 1225 | enum wd_core_slice_state |
| 1226 | { |
| 1227 | WD_CORE_SLICE_STATE_HEADER = 0, |
| 1228 | WD_CORE_SLICE_STATE_PALETTE = 1, |
| 1229 | WD_CORE_SLICE_STATE_WEIGHTS = 2, |
| 1230 | }; |
| 1231 | |
| 1232 | enum wd_ctrl_state |
| 1233 | { |
| 1234 | WD_CTRL_STATE_IDLE = 0, |
| 1235 | WD_CTRL_STATE_DRAIN = 1, |
| 1236 | WD_CTRL_STATE_OFD_INIT = 2, |
| 1237 | WD_CTRL_STATE_OFD_RUN = 3, |
| 1238 | }; |
| 1239 | |
| 1240 | enum weight_order |
| 1241 | { |
| 1242 | WEIGHT_ORDER_DEPTH_FIRST = 0, |
| 1243 | WEIGHT_ORDER_PART_KERNEL_FIRST = 1, |
| 1244 | }; |
| 1245 | |
| 1246 | #endif |
| 1247 | |
| 1248 | #ifdef NPU_DISASSEMBLE |
| 1249 | |
| 1250 | static const char *acc_format_str[] = { |
| 1251 | "ACC_FORMAT_I32", |
| 1252 | "ACC_FORMAT_I40", |
| 1253 | "ACC_FORMAT_F16", |
| 1254 | }; |
| 1255 | |
| 1256 | static const char *activation_clip_range_str[] = { |
| 1257 | "ACTIVATION_CLIP_RANGE_OFM_PRECISION", |
| 1258 | "ACTIVATION_CLIP_RANGE_FORCE_UINT8", |
| 1259 | "ACTIVATION_CLIP_RANGE_FORCE_INT8", |
| 1260 | "ACTIVATION_CLIP_RANGE_FORCE_INT16", |
| 1261 | }; |
| 1262 | |
| 1263 | static const char *activation_format_str[] = { |
| 1264 | "ACTIVATION_FORMAT_NHWC", |
| 1265 | "ACTIVATION_FORMAT_NHCWB16", |
| 1266 | }; |
| 1267 | |
| 1268 | static const char *activation_function_str[] = { |
| 1269 | "ACTIVATION_FUNCTION_RELU", |
| 1270 | "ACTIVATION_FUNCTION_TANH", |
| 1271 | "ACTIVATION_FUNCTION_SIGMOID", |
| 1272 | "ACTIVATION_FUNCTION_TABLE_0", |
| 1273 | "ACTIVATION_FUNCTION_TABLE_1", |
| 1274 | "ACTIVATION_FUNCTION_TABLE_2", |
| 1275 | "ACTIVATION_FUNCTION_TABLE_3", |
| 1276 | "ACTIVATION_FUNCTION_TABLE_4", |
| 1277 | "ACTIVATION_FUNCTION_TABLE_5", |
| 1278 | "ACTIVATION_FUNCTION_TABLE_6", |
| 1279 | "ACTIVATION_FUNCTION_TABLE_7", |
| 1280 | }; |
| 1281 | |
| 1282 | static const char *activation_precision_str[] = { |
| 1283 | "ACTIVATION_PRECISION_B8", |
| 1284 | "ACTIVATION_PRECISION_B16", |
| 1285 | "ACTIVATION_PRECISION_B32", |
| 1286 | "ACTIVATION_PRECISION_B64", |
| 1287 | }; |
| 1288 | |
| 1289 | static const char *activation_type_str[] = { |
| 1290 | "ACTIVATION_TYPE_UNSIGNED", |
| 1291 | "ACTIVATION_TYPE_SIGNED", |
| 1292 | }; |
| 1293 | |
| 1294 | static const char *axi_mem_encoding_str[] = { |
| 1295 | "AXI_MEM_ENCODING_DEVICE_NON_BUFFERABLE", |
| 1296 | "AXI_MEM_ENCODING_DEVICE_BUFFERABLE", |
| 1297 | "AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_NON_BUFFERABLE", |
| 1298 | "AXI_MEM_ENCODING_NORMAL_NON_CACHEABLE_BUFFERABLE", |
| 1299 | "AXI_MEM_ENCODING_WRITE_THROUGH_NO_ALLOCATE", |
| 1300 | "AXI_MEM_ENCODING_WRITE_THROUGH_READ_ALLOCATE", |
| 1301 | "AXI_MEM_ENCODING_WRITE_THROUGH_WRITE_ALLOCATE", |
| 1302 | "AXI_MEM_ENCODING_WRITE_THROUGH_READ_AND_WRITE_ALLOCATE", |
| 1303 | "AXI_MEM_ENCODING_WRITE_BACK_NO_ALLOCATE", |
| 1304 | "AXI_MEM_ENCODING_WRITE_BACK_READ_ALLOCATE", |
| 1305 | "AXI_MEM_ENCODING_WRITE_BACK_WRITE_ALLOCATE", |
| 1306 | "AXI_MEM_ENCODING_WRITE_BACK_READ_AND_WRITE_ALLOCATE", |
| 1307 | }; |
| 1308 | |
| 1309 | static const char *broadcast_mode_str[] = { |
| 1310 | "BROADCAST_MODE_DISABLE", |
| 1311 | "BROADCAST_MODE_ENABLE", |
| 1312 | }; |
| 1313 | |
| 1314 | static const char *cmd0_opcode_str[] = { |
| 1315 | "CMD0_OPCODE_NPU_OP_STOP", |
| 1316 | "CMD0_OPCODE_NPU_OP_IRQ", |
| 1317 | "CMD0_OPCODE_NPU_OP_CONV", |
| 1318 | "CMD0_OPCODE_NPU_OP_DEPTHWISE", |
| 1319 | "CMD0_OPCODE_NPU_OP_POOL", |
| 1320 | "CMD0_OPCODE_NPU_OP_ELEMENTWISE", |
| 1321 | "CMD0_OPCODE_NPU_OP_DMA_START", |
| 1322 | "CMD0_OPCODE_NPU_OP_DMA_WAIT", |
| 1323 | "CMD0_OPCODE_NPU_OP_KERNEL_WAIT", |
| 1324 | "CMD0_OPCODE_NPU_OP_PMU_MASK", |
| 1325 | "CMD0_OPCODE_NPU_SET_IFM_PAD_TOP", |
| 1326 | "CMD0_OPCODE_NPU_SET_IFM_PAD_LEFT", |
| 1327 | "CMD0_OPCODE_NPU_SET_IFM_PAD_RIGHT", |
| 1328 | "CMD0_OPCODE_NPU_SET_IFM_PAD_BOTTOM", |
| 1329 | "CMD0_OPCODE_NPU_SET_IFM_DEPTH_M1", |
| 1330 | "CMD0_OPCODE_NPU_SET_IFM_PRECISION", |
| 1331 | "CMD0_OPCODE_NPU_SET_IFM_UPSCALE", |
| 1332 | "CMD0_OPCODE_NPU_SET_IFM_ZERO_POINT", |
| 1333 | "CMD0_OPCODE_NPU_SET_IFM_WIDTH0_M1", |
| 1334 | "CMD0_OPCODE_NPU_SET_IFM_HEIGHT0_M1", |
| 1335 | "CMD0_OPCODE_NPU_SET_IFM_HEIGHT1_M1", |
| 1336 | "CMD0_OPCODE_NPU_SET_IFM_IB_END", |
| 1337 | "CMD0_OPCODE_NPU_SET_IFM_REGION", |
| 1338 | "CMD0_OPCODE_NPU_SET_OFM_WIDTH_M1", |
| 1339 | "CMD0_OPCODE_NPU_SET_OFM_HEIGHT_M1", |
| 1340 | "CMD0_OPCODE_NPU_SET_OFM_DEPTH_M1", |
| 1341 | "CMD0_OPCODE_NPU_SET_OFM_PRECISION", |
| 1342 | "CMD0_OPCODE_NPU_SET_OFM_BLK_WIDTH_M1", |
| 1343 | "CMD0_OPCODE_NPU_SET_OFM_BLK_HEIGHT_M1", |
| 1344 | "CMD0_OPCODE_NPU_SET_OFM_BLK_DEPTH_M1", |
| 1345 | "CMD0_OPCODE_NPU_SET_OFM_ZERO_POINT", |
| 1346 | "CMD0_OPCODE_NPU_SET_OFM_WIDTH0_M1", |
| 1347 | "CMD0_OPCODE_NPU_SET_OFM_HEIGHT0_M1", |
| 1348 | "CMD0_OPCODE_NPU_SET_OFM_HEIGHT1_M1", |
| 1349 | "CMD0_OPCODE_NPU_SET_OFM_REGION", |
| 1350 | "CMD0_OPCODE_NPU_SET_KERNEL_WIDTH_M1", |
| 1351 | "CMD0_OPCODE_NPU_SET_KERNEL_HEIGHT_M1", |
| 1352 | "CMD0_OPCODE_NPU_SET_KERNEL_STRIDE", |
| 1353 | "CMD0_OPCODE_NPU_SET_PARALLEL_MODE", |
| 1354 | "CMD0_OPCODE_NPU_SET_ACC_FORMAT", |
| 1355 | "CMD0_OPCODE_NPU_SET_ACTIVATION", |
| 1356 | "CMD0_OPCODE_NPU_SET_ACTIVATION_MIN", |
| 1357 | "CMD0_OPCODE_NPU_SET_ACTIVATION_MAX", |
| 1358 | "CMD0_OPCODE_NPU_SET_WEIGHT_REGION", |
| 1359 | "CMD0_OPCODE_NPU_SET_SCALE_REGION", |
| 1360 | "CMD0_OPCODE_NPU_SET_AB_START", |
| 1361 | "CMD0_OPCODE_NPU_SET_BLOCKDEP", |
| 1362 | "CMD0_OPCODE_NPU_SET_DMA0_SRC_REGION", |
| 1363 | "CMD0_OPCODE_NPU_SET_DMA0_DST_REGION", |
| 1364 | "CMD0_OPCODE_NPU_SET_DMA0_SIZE0", |
| 1365 | "CMD0_OPCODE_NPU_SET_DMA0_SIZE1", |
| 1366 | "CMD0_OPCODE_NPU_SET_IFM2_BROADCAST", |
| 1367 | "CMD0_OPCODE_NPU_SET_IFM2_SCALAR", |
| 1368 | "CMD0_OPCODE_NPU_SET_IFM2_PRECISION", |
| 1369 | "CMD0_OPCODE_NPU_SET_IFM2_ZERO_POINT", |
| 1370 | "CMD0_OPCODE_NPU_SET_IFM2_WIDTH0_M1", |
| 1371 | "CMD0_OPCODE_NPU_SET_IFM2_HEIGHT0_M1", |
| 1372 | "CMD0_OPCODE_NPU_SET_IFM2_HEIGHT1_M1", |
| 1373 | "CMD0_OPCODE_NPU_SET_IFM2_IB_START", |
| 1374 | "CMD0_OPCODE_NPU_SET_IFM2_REGION", |
| 1375 | }; |
| 1376 | |
| 1377 | static const char *cmd1_opcode_str[] = { |
| 1378 | "CMD1_OPCODE_NPU_SET_IFM_BASE0", "CMD1_OPCODE_NPU_SET_IFM_BASE1", "CMD1_OPCODE_NPU_SET_IFM_BASE2", |
| 1379 | "CMD1_OPCODE_NPU_SET_IFM_BASE3", "CMD1_OPCODE_NPU_SET_IFM_STRIDE_X", "CMD1_OPCODE_NPU_SET_IFM_STRIDE_Y", |
| 1380 | "CMD1_OPCODE_NPU_SET_IFM_STRIDE_C", "CMD1_OPCODE_NPU_SET_OFM_BASE0", "CMD1_OPCODE_NPU_SET_OFM_BASE1", |
| 1381 | "CMD1_OPCODE_NPU_SET_OFM_BASE2", "CMD1_OPCODE_NPU_SET_OFM_BASE3", "CMD1_OPCODE_NPU_SET_OFM_STRIDE_X", |
| 1382 | "CMD1_OPCODE_NPU_SET_OFM_STRIDE_Y", "CMD1_OPCODE_NPU_SET_OFM_STRIDE_C", "CMD1_OPCODE_NPU_SET_WEIGHT_BASE", |
| 1383 | "CMD1_OPCODE_NPU_SET_WEIGHT_LENGTH", "CMD1_OPCODE_NPU_SET_SCALE_BASE", "CMD1_OPCODE_NPU_SET_SCALE_LENGTH", |
| 1384 | "CMD1_OPCODE_NPU_SET_OFM_SCALE", "CMD1_OPCODE_NPU_SET_OPA_SCALE", "CMD1_OPCODE_NPU_SET_OPB_SCALE", |
| 1385 | "CMD1_OPCODE_NPU_SET_DMA0_SRC", "CMD1_OPCODE_NPU_SET_DMA0_DST", "CMD1_OPCODE_NPU_SET_DMA0_LEN", |
| 1386 | "CMD1_OPCODE_NPU_SET_DMA0_SKIP0", "CMD1_OPCODE_NPU_SET_DMA0_SKIP1", "CMD1_OPCODE_NPU_SET_IFM2_BASE0", |
| 1387 | "CMD1_OPCODE_NPU_SET_IFM2_BASE1", "CMD1_OPCODE_NPU_SET_IFM2_BASE2", "CMD1_OPCODE_NPU_SET_IFM2_BASE3", |
| 1388 | "CMD1_OPCODE_NPU_SET_IFM2_STRIDE_X", "CMD1_OPCODE_NPU_SET_IFM2_STRIDE_Y", "CMD1_OPCODE_NPU_SET_IFM2_STRIDE_C", |
| 1389 | "CMD1_OPCODE_NPU_SET_WEIGHT1_BASE", "CMD1_OPCODE_NPU_SET_WEIGHT1_LENGTH", "CMD1_OPCODE_NPU_SET_SCALE1_BASE", |
| 1390 | "CMD1_OPCODE_NPU_SET_SCALE1_LENGTH", |
| 1391 | }; |
| 1392 | |
| 1393 | static const char *cmd_ctrl_str[] = { |
| 1394 | "CMD_CTRL_CMD0_CTRL", |
| 1395 | "CMD_CTRL_CMD1_CTRL", |
| 1396 | }; |
| 1397 | |
| 1398 | static const char *custom_dma_str[] = { |
| 1399 | "CUSTOM_DMA_NOT_IMPLEMENTED", |
| 1400 | "CUSTOM_DMA_IMPLEMENTED", |
| 1401 | }; |
| 1402 | |
| 1403 | static const char *dma_fault_src_str[] = { |
| 1404 | "DMA_FAULT_SRC_AXI_M0", |
| 1405 | "DMA_FAULT_SRC_AXI_M1", |
| 1406 | }; |
| 1407 | |
| 1408 | static const char *dma_region_mode_str[] = { |
| 1409 | "DMA_REGION_MODE_EXTERNAL", |
| 1410 | "DMA_REGION_MODE_INTERNAL", |
| 1411 | }; |
| 1412 | |
| 1413 | static const char *dma_stride_mode_str[] = { |
| 1414 | "DMA_STRIDE_MODE_D1", |
| 1415 | "DMA_STRIDE_MODE_D2", |
| 1416 | "DMA_STRIDE_MODE_D3", |
| 1417 | }; |
| 1418 | |
| 1419 | static const char *elementwise_mode_str[] = { |
| 1420 | "ELEMENTWISE_MODE_MUL", |
| 1421 | "ELEMENTWISE_MODE_ADD", |
| 1422 | "ELEMENTWISE_MODE_SUB", |
| 1423 | "ELEMENTWISE_MODE_MIN", |
| 1424 | "ELEMENTWISE_MODE_MAX", |
| 1425 | "ELEMENTWISE_MODE_LRELU", |
| 1426 | "ELEMENTWISE_MODE_ABS", |
| 1427 | "ELEMENTWISE_MODE_CLZ", |
| 1428 | "ELEMENTWISE_MODE_SHR", |
| 1429 | "ELEMENTWISE_MODE_SHL", |
| 1430 | }; |
| 1431 | |
| 1432 | static const char *functional_safety_str[] = { |
| 1433 | "FUNCTIONAL_SAFETY_NOT_IMPLEMENTED", |
| 1434 | "FUNCTIONAL_SAFETY_IMPLEMENTED", |
| 1435 | }; |
| 1436 | |
| 1437 | static const char *ifm2_operand_order_str[] = { |
| 1438 | "IFM2_OPERAND_ORDER_ORDER_B", |
| 1439 | "IFM2_OPERAND_ORDER_ORDER_A", |
| 1440 | }; |
| 1441 | |
| 1442 | static const char *ifm_scale_mode_str[] = { |
| 1443 | "IFM_SCALE_MODE_OPA_OPB_16", |
| 1444 | "IFM_SCALE_MODE_OPA_32", |
| 1445 | "IFM_SCALE_MODE_OPB_32", |
| 1446 | }; |
| 1447 | |
| 1448 | static const char *ifm_upscale_mode_str[] = { |
| 1449 | "IFM_UPSCALE_MODE_NONE", |
| 1450 | "IFM_UPSCALE_MODE_NEAREST", |
| 1451 | "IFM_UPSCALE_MODE_ZEROS", |
| 1452 | }; |
| 1453 | |
| 1454 | static const char *kernel_decomposition_str[] = { |
| 1455 | "KERNEL_DECOMPOSITION_D8X8", |
| 1456 | "KERNEL_DECOMPOSITION_D4X4", |
| 1457 | }; |
| 1458 | |
| 1459 | static const char *kernel_dilation_str[] = { |
| 1460 | "KERNEL_DILATION_NONE", |
| 1461 | "KERNEL_DILATION_X2", |
| 1462 | }; |
| 1463 | |
| 1464 | static const char *max_beats_str[] = { |
| 1465 | "MAX_BEATS_B64", |
| 1466 | "MAX_BEATS_B128", |
| 1467 | "MAX_BEATS_B256", |
| 1468 | }; |
| 1469 | |
| 1470 | static const char *mem_attr_str[] = { |
| 1471 | "MEM_ATTR_AXI0_OUTSTANDING_COUNTER0", |
| 1472 | "MEM_ATTR_AXI0_OUTSTANDING_COUNTER1", |
| 1473 | "MEM_ATTR_AXI1_OUTSTANDING_COUNTER2", |
| 1474 | "MEM_ATTR_AXI1_OUTSTANDING_COUNTER3", |
| 1475 | }; |
| 1476 | |
| 1477 | static const char *ofm_scale_mode_str[] = { |
| 1478 | "OFM_SCALE_MODE_PER_CHANNEL", |
| 1479 | "OFM_SCALE_MODE_GLOBAL", |
| 1480 | }; |
| 1481 | |
| 1482 | static const char *parallel_mode_str[] = { |
| 1483 | "PARALLEL_MODE_SINGLE_CORE", |
| 1484 | "PARALLEL_MODE_DUAL_CORE_DEPTH", |
| 1485 | }; |
| 1486 | |
| 1487 | static const char *pmu_axi_channel_str[] = { |
| 1488 | "PMU_AXI_CHANNEL_RD_CMD", |
| 1489 | "PMU_AXI_CHANNEL_RD_IFM", |
| 1490 | "PMU_AXI_CHANNEL_RD_WEIGHTS", |
| 1491 | "PMU_AXI_CHANNEL_RD_SCALE_BIAS", |
| 1492 | "PMU_AXI_CHANNEL_RD_MEM2MEM", |
| 1493 | "PMU_AXI_CHANNEL_WR_OFM", |
| 1494 | "PMU_AXI_CHANNEL_WR_MEM2MEM", |
| 1495 | }; |
| 1496 | |
| 1497 | static const char *pmu_event_str[] = { |
| 1498 | "PMU_EVENT_NO_EVENT", |
| 1499 | "PMU_EVENT_CYCLE", |
| 1500 | "PMU_EVENT_NPU_IDLE", |
| 1501 | "PMU_EVENT_CC_STALLED_ON_BLOCKDEP", |
| 1502 | "PMU_EVENT_CC_STALLED_ON_SHRAM_RECONFIG", |
| 1503 | "PMU_EVENT_NPU_ACTIVE", |
| 1504 | "PMU_EVENT_MAC_ACTIVE", |
| 1505 | "PMU_EVENT_MAC_ACTIVE_8BIT", |
| 1506 | "PMU_EVENT_MAC_ACTIVE_16BIT", |
| 1507 | "PMU_EVENT_MAC_DPU_ACTIVE", |
| 1508 | "PMU_EVENT_MAC_STALLED_BY_WD_ACC", |
| 1509 | "PMU_EVENT_MAC_STALLED_BY_WD", |
| 1510 | "PMU_EVENT_MAC_STALLED_BY_ACC", |
| 1511 | "PMU_EVENT_MAC_STALLED_BY_IB", |
| 1512 | "PMU_EVENT_MAC_ACTIVE_32BIT", |
| 1513 | "PMU_EVENT_MAC_STALLED_BY_INT_W", |
| 1514 | "PMU_EVENT_MAC_STALLED_BY_INT_ACC", |
| 1515 | "PMU_EVENT_AO_ACTIVE", |
| 1516 | "PMU_EVENT_AO_ACTIVE_8BIT", |
| 1517 | "PMU_EVENT_AO_ACTIVE_16BIT", |
| 1518 | "PMU_EVENT_AO_STALLED_BY_OFMP_OB", |
| 1519 | "PMU_EVENT_AO_STALLED_BY_OFMP", |
| 1520 | "PMU_EVENT_AO_STALLED_BY_OB", |
| 1521 | "PMU_EVENT_AO_STALLED_BY_ACC_IB", |
| 1522 | "PMU_EVENT_AO_STALLED_BY_ACC", |
| 1523 | "PMU_EVENT_AO_STALLED_BY_IB", |
| 1524 | "PMU_EVENT_WD_ACTIVE", |
| 1525 | "PMU_EVENT_WD_STALLED", |
| 1526 | "PMU_EVENT_WD_STALLED_BY_WS", |
| 1527 | "PMU_EVENT_WD_STALLED_BY_WD_BUF", |
| 1528 | "PMU_EVENT_WD_PARSE_ACTIVE", |
| 1529 | "PMU_EVENT_WD_PARSE_STALLED", |
| 1530 | "PMU_EVENT_WD_PARSE_STALLED_IN", |
| 1531 | "PMU_EVENT_WD_PARSE_STALLED_OUT", |
| 1532 | "PMU_EVENT_WD_TRANS_WS", |
| 1533 | "PMU_EVENT_WD_TRANS_WB", |
| 1534 | "PMU_EVENT_WD_TRANS_DW0", |
| 1535 | "PMU_EVENT_WD_TRANS_DW1", |
| 1536 | "PMU_EVENT_AXI0_RD_TRANS_ACCEPTED", |
| 1537 | "PMU_EVENT_AXI0_RD_TRANS_COMPLETED", |
| 1538 | "PMU_EVENT_AXI0_RD_DATA_BEAT_RECEIVED", |
| 1539 | "PMU_EVENT_AXI0_RD_TRAN_REQ_STALLED", |
| 1540 | "PMU_EVENT_AXI0_WR_TRANS_ACCEPTED", |
| 1541 | "PMU_EVENT_AXI0_WR_TRANS_COMPLETED_M", |
| 1542 | "PMU_EVENT_AXI0_WR_TRANS_COMPLETED_S", |
| 1543 | "PMU_EVENT_AXI0_WR_DATA_BEAT_WRITTEN", |
| 1544 | "PMU_EVENT_AXI0_WR_TRAN_REQ_STALLED", |
| 1545 | "PMU_EVENT_AXI0_WR_DATA_BEAT_STALLED", |
| 1546 | "PMU_EVENT_AXI0_ENABLED_CYCLES", |
| 1547 | "PMU_EVENT_AXI0_RD_STALL_LIMIT", |
| 1548 | "PMU_EVENT_AXI0_WR_STALL_LIMIT", |
| 1549 | "PMU_EVENT_AXI_LATENCY_ANY", |
| 1550 | "PMU_EVENT_AXI_LATENCY_32", |
| 1551 | "PMU_EVENT_AXI_LATENCY_64", |
| 1552 | "PMU_EVENT_AXI_LATENCY_128", |
| 1553 | "PMU_EVENT_AXI_LATENCY_256", |
| 1554 | "PMU_EVENT_AXI_LATENCY_512", |
| 1555 | "PMU_EVENT_AXI_LATENCY_1024", |
| 1556 | "PMU_EVENT_ECC_DMA", |
| 1557 | "PMU_EVENT_ECC_SB0", |
| 1558 | "PMU_EVENT_AXI1_RD_TRANS_ACCEPTED", |
| 1559 | "PMU_EVENT_AXI1_RD_TRANS_COMPLETED", |
| 1560 | "PMU_EVENT_AXI1_RD_DATA_BEAT_RECEIVED", |
| 1561 | "PMU_EVENT_AXI1_RD_TRAN_REQ_STALLED", |
| 1562 | "PMU_EVENT_AXI1_WR_TRANS_ACCEPTED", |
| 1563 | "PMU_EVENT_AXI1_WR_TRANS_COMPLETED_M", |
| 1564 | "PMU_EVENT_AXI1_WR_TRANS_COMPLETED_S", |
| 1565 | "PMU_EVENT_AXI1_WR_DATA_BEAT_WRITTEN", |
| 1566 | "PMU_EVENT_AXI1_WR_TRAN_REQ_STALLED", |
| 1567 | "PMU_EVENT_AXI1_WR_DATA_BEAT_STALLED", |
| 1568 | "PMU_EVENT_AXI1_ENABLED_CYCLES", |
| 1569 | "PMU_EVENT_AXI1_RD_STALL_LIMIT", |
| 1570 | "PMU_EVENT_AXI1_WR_STALL_LIMIT", |
| 1571 | "PMU_EVENT_ECC_SB1", |
| 1572 | }; |
| 1573 | |
| 1574 | static const char *pooling_mode_str[] = { |
| 1575 | "POOLING_MODE_MAX", |
| 1576 | "POOLING_MODE_AVERAGE", |
| 1577 | "POOLING_MODE_REDUCE_SUM", |
| 1578 | }; |
| 1579 | |
| 1580 | static const char *privilege_level_str[] = { |
| 1581 | "PRIVILEGE_LEVEL_USER", |
| 1582 | "PRIVILEGE_LEVEL_PRIVILEGED", |
| 1583 | }; |
| 1584 | |
| 1585 | static const char *round_mode_str[] = { |
| 1586 | "ROUND_MODE_DBL", |
| 1587 | "ROUND_MODE_TRUNCATE", |
| 1588 | "ROUND_MODE_NATURAL", |
| 1589 | }; |
| 1590 | |
| 1591 | static const char *security_level_str[] = { |
| 1592 | "SECURITY_LEVEL_SECURE", |
| 1593 | "SECURITY_LEVEL_NON_SECURE", |
| 1594 | }; |
| 1595 | |
| 1596 | static const char *state_str[] = { |
| 1597 | "STATE_STOPPED", |
| 1598 | "STATE_RUNNING", |
| 1599 | }; |
| 1600 | |
| 1601 | static const char *wd_core_slice_state_str[] = { |
| 1602 | "WD_CORE_SLICE_STATE_HEADER", |
| 1603 | "WD_CORE_SLICE_STATE_PALETTE", |
| 1604 | "WD_CORE_SLICE_STATE_WEIGHTS", |
| 1605 | }; |
| 1606 | |
| 1607 | static const char *wd_ctrl_state_str[] = { |
| 1608 | "WD_CTRL_STATE_IDLE", |
| 1609 | "WD_CTRL_STATE_DRAIN", |
| 1610 | "WD_CTRL_STATE_OFD_INIT", |
| 1611 | "WD_CTRL_STATE_OFD_RUN", |
| 1612 | }; |
| 1613 | |
| 1614 | static const char *weight_order_str[] = { |
| 1615 | "WEIGHT_ORDER_DEPTH_FIRST", |
| 1616 | "WEIGHT_ORDER_PART_KERNEL_FIRST", |
| 1617 | }; |
| 1618 | |
| 1619 | #endif |
| 1620 | |
| 1621 | // Register type structs |
| 1622 | // id_r - ID register |
| 1623 | struct id_r |
| 1624 | { |
| 1625 | #ifndef __cplusplus |
| 1626 | union |
| 1627 | { |
| 1628 | struct |
| 1629 | { |
| 1630 | uint32_t version_status : 4; // This is the version of the product |
| 1631 | uint32_t version_minor : 4; // This is the n for the P part of an RnPn release number |
| 1632 | uint32_t version_major : 4; // This is the n for the R part of an RnPn release number |
| 1633 | uint32_t product_major : 4; // Product major ID number (unique per base product) |
| 1634 | uint32_t arch_patch_rev : 4; // This is the patch number of the architecture version a.b |
| 1635 | uint32_t |
| 1636 | arch_minor_rev : 8; // This is the minor architecture version number, b in the architecture version a.b |
| 1637 | uint32_t |
| 1638 | arch_major_rev : 4; // This is the major architecture version number, a in the architecture version a.b |
| 1639 | }; |
| 1640 | uint32_t word; |
| 1641 | }; |
| 1642 | #else |
| 1643 | private: |
| 1644 | uint32_t word0; |
| 1645 | |
| 1646 | public: |
| 1647 | CONSTEXPR id_r() : word0(268853249) {} |
| 1648 | CONSTEXPR id_r(uint32_t init) : word0(init) {} |
| 1649 | CONSTEXPR void operator=(uint32_t value) |
| 1650 | { |
| 1651 | word0 = value; |
| 1652 | } |
| 1653 | void operator=(uint32_t value) volatile |
| 1654 | { |
| 1655 | word0 = value; |
| 1656 | } |
| 1657 | CONSTEXPR operator uint32_t() |
| 1658 | { |
| 1659 | return word0; |
| 1660 | } |
| 1661 | operator uint32_t() volatile |
| 1662 | { |
| 1663 | return word0; |
| 1664 | } |
| 1665 | id_r copy() volatile |
| 1666 | { |
| 1667 | return *this; |
| 1668 | } |
| 1669 | CONSTEXPR uint32_t get_version_status() const |
| 1670 | { |
| 1671 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0)); |
| 1672 | return value; |
| 1673 | } |
| 1674 | uint32_t get_version_status() const volatile |
| 1675 | { |
| 1676 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0)); |
| 1677 | return value; |
| 1678 | } |
| 1679 | CONSTEXPR id_r &set_version_status(uint32_t value) |
| 1680 | { |
| 1681 | word0 = (((~((1U << 4) - 1)) << 0) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 0); |
| 1682 | return *this; |
| 1683 | } |
| 1684 | CONSTEXPR uint32_t get_version_minor() const |
| 1685 | { |
| 1686 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4)); |
| 1687 | return value; |
| 1688 | } |
| 1689 | uint32_t get_version_minor() const volatile |
| 1690 | { |
| 1691 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4)); |
| 1692 | return value; |
| 1693 | } |
| 1694 | CONSTEXPR id_r &set_version_minor(uint32_t value) |
| 1695 | { |
| 1696 | word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4); |
| 1697 | return *this; |
| 1698 | } |
| 1699 | CONSTEXPR uint32_t get_version_major() const |
| 1700 | { |
| 1701 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 8)); |
| 1702 | return value; |
| 1703 | } |
| 1704 | uint32_t get_version_major() const volatile |
| 1705 | { |
| 1706 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 8)); |
| 1707 | return value; |
| 1708 | } |
| 1709 | CONSTEXPR id_r &set_version_major(uint32_t value) |
| 1710 | { |
| 1711 | word0 = (((~((1U << 4) - 1)) << 8) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 8); |
| 1712 | return *this; |
| 1713 | } |
| 1714 | CONSTEXPR uint32_t get_product_major() const |
| 1715 | { |
| 1716 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12)); |
| 1717 | return value; |
| 1718 | } |
| 1719 | uint32_t get_product_major() const volatile |
| 1720 | { |
| 1721 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12)); |
| 1722 | return value; |
| 1723 | } |
| 1724 | CONSTEXPR id_r &set_product_major(uint32_t value) |
| 1725 | { |
| 1726 | word0 = (((~((1U << 4) - 1)) << 12) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 12); |
| 1727 | return *this; |
| 1728 | } |
| 1729 | CONSTEXPR uint32_t get_arch_patch_rev() const |
| 1730 | { |
| 1731 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 16)); |
| 1732 | return value; |
| 1733 | } |
| 1734 | uint32_t get_arch_patch_rev() const volatile |
| 1735 | { |
| 1736 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 16)); |
| 1737 | return value; |
| 1738 | } |
| 1739 | CONSTEXPR id_r &set_arch_patch_rev(uint32_t value) |
| 1740 | { |
| 1741 | word0 = (((~((1U << 4) - 1)) << 16) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 16); |
| 1742 | return *this; |
| 1743 | } |
| 1744 | CONSTEXPR uint32_t get_arch_minor_rev() const |
| 1745 | { |
| 1746 | uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 20)); |
| 1747 | return value; |
| 1748 | } |
| 1749 | uint32_t get_arch_minor_rev() const volatile |
| 1750 | { |
| 1751 | uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 20)); |
| 1752 | return value; |
| 1753 | } |
| 1754 | CONSTEXPR id_r &set_arch_minor_rev(uint32_t value) |
| 1755 | { |
| 1756 | word0 = (((~((1U << 8) - 1)) << 20) & word0) | ((((1U << 8) - 1) & static_cast<uint32_t>(value)) << 20); |
| 1757 | return *this; |
| 1758 | } |
| 1759 | CONSTEXPR uint32_t get_arch_major_rev() const |
| 1760 | { |
| 1761 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28)); |
| 1762 | return value; |
| 1763 | } |
| 1764 | uint32_t get_arch_major_rev() const volatile |
| 1765 | { |
| 1766 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28)); |
| 1767 | return value; |
| 1768 | } |
| 1769 | CONSTEXPR id_r &set_arch_major_rev(uint32_t value) |
| 1770 | { |
| 1771 | word0 = (((~((1U << 4) - 1)) << 28) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 28); |
| 1772 | return *this; |
| 1773 | } |
| 1774 | #endif |
| 1775 | }; |
| 1776 | |
| 1777 | // status_r - Register describes the current operating status of the NPU |
| 1778 | struct status_r |
| 1779 | { |
| 1780 | #ifndef __cplusplus |
| 1781 | union |
| 1782 | { |
| 1783 | struct |
| 1784 | { |
| 1785 | uint32_t state : 1; // NPU state, 0 = Stopped, 1 = Running |
| 1786 | uint32_t irq_raised : 1; // Raw IRQ status, 0 = IRQ not raised, 1 = IRQ raised. IRQ is cleared using command |
| 1787 | // register bit 1 |
| 1788 | uint32_t |
| 1789 | bus_status : 1; // 0=OK, 1=Bus abort detected and processing halted (NPU will reach IDLE state and not |
| 1790 | // to start process any more commands/AXI transactions). Can only be cleared by a reset |
| 1791 | uint32_t reset_status : 1; // Reset is ongoing and only this register can be read (other registers read as 0 |
| 1792 | // and writes are ignored.) A value of 0 means NPU is not being reset and can be |
| 1793 | // accessed as normal |
| 1794 | uint32_t |
| 1795 | cmd_parse_error : 1; // 0=No error 1=Command stream parsing error detected. Can only be cleared by reset |
| 1796 | uint32_t cmd_end_reached : 1; // 0=Not reached, 1=Reached. Cleared by writing QBASE or QSIZE when NPU is in |
| 1797 | // stopped state |
| 1798 | uint32_t pmu_irq_raised : 1; // 0=No PMU IRQ, 1=PMU IRQ raised. Cleared by using command register bit 1 |
| 1799 | uint32_t wd_fault : 1; // Weight decoder state: 0=no fault 1=weight decoder decompression fault. Can only be |
| 1800 | // cleared by reset |
| 1801 | uint32_t ecc_fault : 1; // ECC state for internal RAMs: 0=no fault 1=ECC fault signalled. Can only be |
| 1802 | // cleared by reset |
| 1803 | uint32_t reserved0 : 2; |
| 1804 | uint32_t faulting_interface : 1; // Faulting interface on bus abort |
| 1805 | uint32_t faulting_channel : 4; // Faulting channel on a bus abort. Read: 0=Cmd 1=IFM 2=Weights 3=Scale+Bias |
| 1806 | // 4=Mem2Mem; Write: 8=OFM 9=Mem2Mem |
| 1807 | uint32_t irq_history_mask : 16; // IRQ History mask |
| 1808 | }; |
| 1809 | uint32_t word; |
| 1810 | }; |
| 1811 | #else |
| 1812 | private: |
| 1813 | uint32_t word0; |
| 1814 | |
| 1815 | public: |
| 1816 | CONSTEXPR status_r() : word0(8) {} |
| 1817 | CONSTEXPR status_r(uint32_t init) : word0(init) {} |
| 1818 | CONSTEXPR void operator=(uint32_t value) |
| 1819 | { |
| 1820 | word0 = value; |
| 1821 | } |
| 1822 | void operator=(uint32_t value) volatile |
| 1823 | { |
| 1824 | word0 = value; |
| 1825 | } |
| 1826 | CONSTEXPR operator uint32_t() |
| 1827 | { |
| 1828 | return word0; |
| 1829 | } |
| 1830 | operator uint32_t() volatile |
| 1831 | { |
| 1832 | return word0; |
| 1833 | } |
| 1834 | status_r copy() volatile |
| 1835 | { |
| 1836 | return *this; |
| 1837 | } |
| 1838 | CONSTEXPR NPU_NAMESPACE::state get_state() const |
| 1839 | { |
| 1840 | NPU_NAMESPACE::state value = static_cast<NPU_NAMESPACE::state>(((1U << 1) - 1) & (word0 >> 0)); |
| 1841 | return value; |
| 1842 | } |
| 1843 | NPU_NAMESPACE::state get_state() const volatile |
| 1844 | { |
| 1845 | NPU_NAMESPACE::state value = static_cast<NPU_NAMESPACE::state>(((1U << 1) - 1) & (word0 >> 0)); |
| 1846 | return value; |
| 1847 | } |
| 1848 | CONSTEXPR status_r &set_state(NPU_NAMESPACE::state value) |
| 1849 | { |
| 1850 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 1851 | return *this; |
| 1852 | } |
| 1853 | CONSTEXPR uint32_t get_irq_raised() const |
| 1854 | { |
| 1855 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 1856 | return value; |
| 1857 | } |
| 1858 | uint32_t get_irq_raised() const volatile |
| 1859 | { |
| 1860 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 1861 | return value; |
| 1862 | } |
| 1863 | CONSTEXPR status_r &set_irq_raised(uint32_t value) |
| 1864 | { |
| 1865 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 1866 | return *this; |
| 1867 | } |
| 1868 | CONSTEXPR uint32_t get_bus_status() const |
| 1869 | { |
| 1870 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 1871 | return value; |
| 1872 | } |
| 1873 | uint32_t get_bus_status() const volatile |
| 1874 | { |
| 1875 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 1876 | return value; |
| 1877 | } |
| 1878 | CONSTEXPR status_r &set_bus_status(uint32_t value) |
| 1879 | { |
| 1880 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 1881 | return *this; |
| 1882 | } |
| 1883 | CONSTEXPR uint32_t get_reset_status() const |
| 1884 | { |
| 1885 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 1886 | return value; |
| 1887 | } |
| 1888 | uint32_t get_reset_status() const volatile |
| 1889 | { |
| 1890 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 1891 | return value; |
| 1892 | } |
| 1893 | CONSTEXPR status_r &set_reset_status(uint32_t value) |
| 1894 | { |
| 1895 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 1896 | return *this; |
| 1897 | } |
| 1898 | CONSTEXPR uint32_t get_cmd_parse_error() const |
| 1899 | { |
| 1900 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 1901 | return value; |
| 1902 | } |
| 1903 | uint32_t get_cmd_parse_error() const volatile |
| 1904 | { |
| 1905 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 1906 | return value; |
| 1907 | } |
| 1908 | CONSTEXPR status_r &set_cmd_parse_error(uint32_t value) |
| 1909 | { |
| 1910 | word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4); |
| 1911 | return *this; |
| 1912 | } |
| 1913 | CONSTEXPR uint32_t get_cmd_end_reached() const |
| 1914 | { |
| 1915 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 1916 | return value; |
| 1917 | } |
| 1918 | uint32_t get_cmd_end_reached() const volatile |
| 1919 | { |
| 1920 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 1921 | return value; |
| 1922 | } |
| 1923 | CONSTEXPR status_r &set_cmd_end_reached(uint32_t value) |
| 1924 | { |
| 1925 | word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5); |
| 1926 | return *this; |
| 1927 | } |
| 1928 | CONSTEXPR uint32_t get_pmu_irq_raised() const |
| 1929 | { |
| 1930 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 1931 | return value; |
| 1932 | } |
| 1933 | uint32_t get_pmu_irq_raised() const volatile |
| 1934 | { |
| 1935 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 1936 | return value; |
| 1937 | } |
| 1938 | CONSTEXPR status_r &set_pmu_irq_raised(uint32_t value) |
| 1939 | { |
| 1940 | word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6); |
| 1941 | return *this; |
| 1942 | } |
| 1943 | CONSTEXPR uint32_t get_wd_fault() const |
| 1944 | { |
| 1945 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 1946 | return value; |
| 1947 | } |
| 1948 | uint32_t get_wd_fault() const volatile |
| 1949 | { |
| 1950 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 1951 | return value; |
| 1952 | } |
| 1953 | CONSTEXPR status_r &set_wd_fault(uint32_t value) |
| 1954 | { |
| 1955 | word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7); |
| 1956 | return *this; |
| 1957 | } |
| 1958 | CONSTEXPR uint32_t get_ecc_fault() const |
| 1959 | { |
| 1960 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8)); |
| 1961 | return value; |
| 1962 | } |
| 1963 | uint32_t get_ecc_fault() const volatile |
| 1964 | { |
| 1965 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8)); |
| 1966 | return value; |
| 1967 | } |
| 1968 | CONSTEXPR status_r &set_ecc_fault(uint32_t value) |
| 1969 | { |
| 1970 | word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8); |
| 1971 | return *this; |
| 1972 | } |
| 1973 | CONSTEXPR NPU_NAMESPACE::dma_fault_src get_faulting_interface() const |
| 1974 | { |
| 1975 | NPU_NAMESPACE::dma_fault_src value = static_cast<NPU_NAMESPACE::dma_fault_src>(((1U << 1) - 1) & (word0 >> 11)); |
| 1976 | return value; |
| 1977 | } |
| 1978 | NPU_NAMESPACE::dma_fault_src get_faulting_interface() const volatile |
| 1979 | { |
| 1980 | NPU_NAMESPACE::dma_fault_src value = static_cast<NPU_NAMESPACE::dma_fault_src>(((1U << 1) - 1) & (word0 >> 11)); |
| 1981 | return value; |
| 1982 | } |
| 1983 | CONSTEXPR status_r &set_faulting_interface(NPU_NAMESPACE::dma_fault_src value) |
| 1984 | { |
| 1985 | word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11); |
| 1986 | return *this; |
| 1987 | } |
| 1988 | CONSTEXPR uint32_t get_faulting_channel() const |
| 1989 | { |
| 1990 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12)); |
| 1991 | return value; |
| 1992 | } |
| 1993 | uint32_t get_faulting_channel() const volatile |
| 1994 | { |
| 1995 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 12)); |
| 1996 | return value; |
| 1997 | } |
| 1998 | CONSTEXPR status_r &set_faulting_channel(uint32_t value) |
| 1999 | { |
| 2000 | word0 = (((~((1U << 4) - 1)) << 12) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 12); |
| 2001 | return *this; |
| 2002 | } |
| 2003 | CONSTEXPR uint32_t get_irq_history_mask() const |
| 2004 | { |
| 2005 | uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16)); |
| 2006 | return value; |
| 2007 | } |
| 2008 | uint32_t get_irq_history_mask() const volatile |
| 2009 | { |
| 2010 | uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16)); |
| 2011 | return value; |
| 2012 | } |
| 2013 | CONSTEXPR status_r &set_irq_history_mask(uint32_t value) |
| 2014 | { |
| 2015 | word0 = (((~((1U << 16) - 1)) << 16) & word0) | ((((1U << 16) - 1) & static_cast<uint32_t>(value)) << 16); |
| 2016 | return *this; |
| 2017 | } |
| 2018 | #endif |
| 2019 | }; |
| 2020 | |
| 2021 | // cmd_r - Command register, reads as last written command |
| 2022 | struct cmd_r |
| 2023 | { |
| 2024 | #ifndef __cplusplus |
| 2025 | union |
| 2026 | { |
| 2027 | struct |
| 2028 | { |
| 2029 | uint32_t transition_to_running_state : 1; // Write 1 to transition the NPU to running state. Writing 0 has |
| 2030 | // no effect |
| 2031 | uint32_t clear_irq : 1; // Write 1 to clear the IRQ status in the STATUS register. Writing 0 has no effect |
| 2032 | uint32_t clock_q_enable : 1; // Write 1 to this bit to enable clock off using clock q-interface and enable |
| 2033 | // the requester clock gate |
| 2034 | uint32_t power_q_enable : 1; // Write 1 to this bit to enable power off using power q-interface |
| 2035 | uint32_t |
| 2036 | stop_request : 1; // Write 1 to this bit to request STOP after completing any already-started commands |
| 2037 | uint32_t reserved0 : 11; |
| 2038 | uint32_t clear_irq_history : 16; // Clears the IRQ history mask |
| 2039 | }; |
| 2040 | uint32_t word; |
| 2041 | }; |
| 2042 | #else |
| 2043 | private: |
| 2044 | uint32_t word0; |
| 2045 | |
| 2046 | public: |
| 2047 | CONSTEXPR cmd_r() : word0(12) {} |
| 2048 | CONSTEXPR cmd_r(uint32_t init) : word0(init) {} |
| 2049 | CONSTEXPR void operator=(uint32_t value) |
| 2050 | { |
| 2051 | word0 = value; |
| 2052 | } |
| 2053 | void operator=(uint32_t value) volatile |
| 2054 | { |
| 2055 | word0 = value; |
| 2056 | } |
| 2057 | CONSTEXPR operator uint32_t() |
| 2058 | { |
| 2059 | return word0; |
| 2060 | } |
| 2061 | operator uint32_t() volatile |
| 2062 | { |
| 2063 | return word0; |
| 2064 | } |
| 2065 | cmd_r copy() volatile |
| 2066 | { |
| 2067 | return *this; |
| 2068 | } |
| 2069 | CONSTEXPR uint32_t get_transition_to_running_state() const |
| 2070 | { |
| 2071 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 2072 | return value; |
| 2073 | } |
| 2074 | uint32_t get_transition_to_running_state() const volatile |
| 2075 | { |
| 2076 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 2077 | return value; |
| 2078 | } |
| 2079 | CONSTEXPR cmd_r &set_transition_to_running_state(uint32_t value) |
| 2080 | { |
| 2081 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 2082 | return *this; |
| 2083 | } |
| 2084 | CONSTEXPR uint32_t get_clear_irq() const |
| 2085 | { |
| 2086 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 2087 | return value; |
| 2088 | } |
| 2089 | uint32_t get_clear_irq() const volatile |
| 2090 | { |
| 2091 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 2092 | return value; |
| 2093 | } |
| 2094 | CONSTEXPR cmd_r &set_clear_irq(uint32_t value) |
| 2095 | { |
| 2096 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 2097 | return *this; |
| 2098 | } |
| 2099 | CONSTEXPR uint32_t get_clock_q_enable() const |
| 2100 | { |
| 2101 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 2102 | return value; |
| 2103 | } |
| 2104 | uint32_t get_clock_q_enable() const volatile |
| 2105 | { |
| 2106 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 2107 | return value; |
| 2108 | } |
| 2109 | CONSTEXPR cmd_r &set_clock_q_enable(uint32_t value) |
| 2110 | { |
| 2111 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 2112 | return *this; |
| 2113 | } |
| 2114 | CONSTEXPR uint32_t get_power_q_enable() const |
| 2115 | { |
| 2116 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 2117 | return value; |
| 2118 | } |
| 2119 | uint32_t get_power_q_enable() const volatile |
| 2120 | { |
| 2121 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 2122 | return value; |
| 2123 | } |
| 2124 | CONSTEXPR cmd_r &set_power_q_enable(uint32_t value) |
| 2125 | { |
| 2126 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 2127 | return *this; |
| 2128 | } |
| 2129 | CONSTEXPR uint32_t get_stop_request() const |
| 2130 | { |
| 2131 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 2132 | return value; |
| 2133 | } |
| 2134 | uint32_t get_stop_request() const volatile |
| 2135 | { |
| 2136 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 2137 | return value; |
| 2138 | } |
| 2139 | CONSTEXPR cmd_r &set_stop_request(uint32_t value) |
| 2140 | { |
| 2141 | word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4); |
| 2142 | return *this; |
| 2143 | } |
| 2144 | CONSTEXPR uint32_t get_clear_irq_history() const |
| 2145 | { |
| 2146 | uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16)); |
| 2147 | return value; |
| 2148 | } |
| 2149 | uint32_t get_clear_irq_history() const volatile |
| 2150 | { |
| 2151 | uint32_t value = static_cast<uint32_t>(((1U << 16) - 1) & (word0 >> 16)); |
| 2152 | return value; |
| 2153 | } |
| 2154 | CONSTEXPR cmd_r &set_clear_irq_history(uint32_t value) |
| 2155 | { |
| 2156 | word0 = (((~((1U << 16) - 1)) << 16) & word0) | ((((1U << 16) - 1) & static_cast<uint32_t>(value)) << 16); |
| 2157 | return *this; |
| 2158 | } |
| 2159 | #endif |
| 2160 | }; |
| 2161 | |
| 2162 | // reset_r - Request Reset and new security mode |
| 2163 | struct reset_r |
| 2164 | { |
| 2165 | #ifndef __cplusplus |
| 2166 | union |
| 2167 | { |
| 2168 | struct |
| 2169 | { |
| 2170 | uint32_t pending_CPL : 1; // Current privilege level 0=User 1=Privileged |
| 2171 | uint32_t pending_CSL : 1; // Current security level 0=Secure 1=Non secure |
| 2172 | uint32_t reserved0 : 30; |
| 2173 | }; |
| 2174 | uint32_t word; |
| 2175 | }; |
| 2176 | #else |
| 2177 | private: |
| 2178 | uint32_t word0; |
| 2179 | |
| 2180 | public: |
| 2181 | CONSTEXPR reset_r() : word0(0) {} |
| 2182 | CONSTEXPR reset_r(uint32_t init) : word0(init) {} |
| 2183 | CONSTEXPR void operator=(uint32_t value) |
| 2184 | { |
| 2185 | word0 = value; |
| 2186 | } |
| 2187 | void operator=(uint32_t value) volatile |
| 2188 | { |
| 2189 | word0 = value; |
| 2190 | } |
| 2191 | CONSTEXPR operator uint32_t() |
| 2192 | { |
| 2193 | return word0; |
| 2194 | } |
| 2195 | operator uint32_t() volatile |
| 2196 | { |
| 2197 | return word0; |
| 2198 | } |
| 2199 | reset_r copy() volatile |
| 2200 | { |
| 2201 | return *this; |
| 2202 | } |
| 2203 | CONSTEXPR NPU_NAMESPACE::privilege_level get_pending_CPL() const |
| 2204 | { |
| 2205 | NPU_NAMESPACE::privilege_level value = |
| 2206 | static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0)); |
| 2207 | return value; |
| 2208 | } |
| 2209 | NPU_NAMESPACE::privilege_level get_pending_CPL() const volatile |
| 2210 | { |
| 2211 | NPU_NAMESPACE::privilege_level value = |
| 2212 | static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0)); |
| 2213 | return value; |
| 2214 | } |
| 2215 | CONSTEXPR reset_r &set_pending_CPL(NPU_NAMESPACE::privilege_level value) |
| 2216 | { |
| 2217 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 2218 | return *this; |
| 2219 | } |
| 2220 | CONSTEXPR NPU_NAMESPACE::security_level get_pending_CSL() const |
| 2221 | { |
| 2222 | NPU_NAMESPACE::security_level value = |
| 2223 | static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1)); |
| 2224 | return value; |
| 2225 | } |
| 2226 | NPU_NAMESPACE::security_level get_pending_CSL() const volatile |
| 2227 | { |
| 2228 | NPU_NAMESPACE::security_level value = |
| 2229 | static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1)); |
| 2230 | return value; |
| 2231 | } |
| 2232 | CONSTEXPR reset_r &set_pending_CSL(NPU_NAMESPACE::security_level value) |
| 2233 | { |
| 2234 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 2235 | return *this; |
| 2236 | } |
| 2237 | #endif |
| 2238 | }; |
| 2239 | |
| 2240 | // qbase_r - Base address of command queue. The address is 4 byte aligned |
| 2241 | struct qbase_r |
| 2242 | { |
| 2243 | #ifndef __cplusplus |
| 2244 | union |
| 2245 | { |
| 2246 | struct |
| 2247 | { |
| 2248 | uint32_t offset_LO : 32; // Offset - LSB |
| 2249 | uint32_t offset_HI : 8; // Offset - MSB |
| 2250 | uint32_t reserved0 : 24; |
| 2251 | }; |
| 2252 | uint32_t word[2]; |
| 2253 | }; |
| 2254 | #else |
| 2255 | private: |
| 2256 | uint32_t word0; |
| 2257 | uint32_t word1; |
| 2258 | |
| 2259 | public: |
| 2260 | CONSTEXPR qbase_r() : word0(0), word1(0) {} |
| 2261 | CONSTEXPR qbase_r(uint64_t init) : |
| 2262 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 2263 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 2264 | { |
| 2265 | } |
| 2266 | CONSTEXPR void operator=(uint64_t value) |
| 2267 | { |
| 2268 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 2269 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 2270 | } |
| 2271 | void operator=(uint64_t value) volatile |
| 2272 | { |
| 2273 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 2274 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 2275 | } |
| 2276 | CONSTEXPR operator uint64_t() |
| 2277 | { |
| 2278 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 2279 | } |
| 2280 | operator uint64_t() volatile |
| 2281 | { |
| 2282 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 2283 | } |
| 2284 | qbase_r copy() volatile |
| 2285 | { |
| 2286 | return *this; |
| 2287 | } |
| 2288 | #endif |
| 2289 | }; |
| 2290 | |
| 2291 | // qread_r - Read offset in the command stream in bytes. Multiple of 4 in the range 0 to 16 MB |
| 2292 | struct qread_r |
| 2293 | { |
| 2294 | #ifndef __cplusplus |
| 2295 | union |
| 2296 | { |
| 2297 | struct |
| 2298 | { |
| 2299 | uint32_t QREAD : 32; // The read offset of the current command under execution |
| 2300 | }; |
| 2301 | uint32_t word; |
| 2302 | }; |
| 2303 | #else |
| 2304 | private: |
| 2305 | uint32_t word0; |
| 2306 | |
| 2307 | public: |
| 2308 | CONSTEXPR qread_r() : word0(0) {} |
| 2309 | CONSTEXPR qread_r(uint32_t init) : word0(init) {} |
| 2310 | CONSTEXPR void operator=(uint32_t value) |
| 2311 | { |
| 2312 | word0 = value; |
| 2313 | } |
| 2314 | void operator=(uint32_t value) volatile |
| 2315 | { |
| 2316 | word0 = value; |
| 2317 | } |
| 2318 | CONSTEXPR operator uint32_t() |
| 2319 | { |
| 2320 | return word0; |
| 2321 | } |
| 2322 | operator uint32_t() volatile |
| 2323 | { |
| 2324 | return word0; |
| 2325 | } |
| 2326 | qread_r copy() volatile |
| 2327 | { |
| 2328 | return *this; |
| 2329 | } |
| 2330 | CONSTEXPR uint32_t get_QREAD() const |
| 2331 | { |
| 2332 | uint32_t value = static_cast<uint32_t>(word0); |
| 2333 | return value; |
| 2334 | } |
| 2335 | uint32_t get_QREAD() const volatile |
| 2336 | { |
| 2337 | uint32_t value = static_cast<uint32_t>(word0); |
| 2338 | return value; |
| 2339 | } |
| 2340 | CONSTEXPR qread_r &set_QREAD(uint32_t value) |
| 2341 | { |
| 2342 | word0 = static_cast<uint32_t>(value); |
| 2343 | return *this; |
| 2344 | } |
| 2345 | #endif |
| 2346 | }; |
| 2347 | |
| 2348 | // qconfig_r - AXI configuration for the command stream in the range 0-3. Same encoding as for REGIONCFG |
| 2349 | struct qconfig_r |
| 2350 | { |
| 2351 | #ifndef __cplusplus |
| 2352 | union |
| 2353 | { |
| 2354 | struct |
| 2355 | { |
| 2356 | uint32_t cmd_region0 : 2; // Command region configuration |
| 2357 | uint32_t reserved0 : 30; |
| 2358 | }; |
| 2359 | uint32_t word; |
| 2360 | }; |
| 2361 | #else |
| 2362 | private: |
| 2363 | uint32_t word0; |
| 2364 | |
| 2365 | public: |
| 2366 | CONSTEXPR qconfig_r() : word0(0) {} |
| 2367 | CONSTEXPR qconfig_r(uint32_t init) : word0(init) {} |
| 2368 | CONSTEXPR void operator=(uint32_t value) |
| 2369 | { |
| 2370 | word0 = value; |
| 2371 | } |
| 2372 | void operator=(uint32_t value) volatile |
| 2373 | { |
| 2374 | word0 = value; |
| 2375 | } |
| 2376 | CONSTEXPR operator uint32_t() |
| 2377 | { |
| 2378 | return word0; |
| 2379 | } |
| 2380 | operator uint32_t() volatile |
| 2381 | { |
| 2382 | return word0; |
| 2383 | } |
| 2384 | qconfig_r copy() volatile |
| 2385 | { |
| 2386 | return *this; |
| 2387 | } |
| 2388 | CONSTEXPR NPU_NAMESPACE::mem_attr get_cmd_region0() const |
| 2389 | { |
| 2390 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0)); |
| 2391 | return value; |
| 2392 | } |
| 2393 | NPU_NAMESPACE::mem_attr get_cmd_region0() const volatile |
| 2394 | { |
| 2395 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0)); |
| 2396 | return value; |
| 2397 | } |
| 2398 | CONSTEXPR qconfig_r &set_cmd_region0(NPU_NAMESPACE::mem_attr value) |
| 2399 | { |
| 2400 | word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0); |
| 2401 | return *this; |
| 2402 | } |
| 2403 | #endif |
| 2404 | }; |
| 2405 | |
| 2406 | // qsize_r - Size of the command stream in bytes. Multiple of 4 in the range 0 to 16 MB |
| 2407 | struct qsize_r |
| 2408 | { |
| 2409 | #ifndef __cplusplus |
| 2410 | union |
| 2411 | { |
| 2412 | struct |
| 2413 | { |
| 2414 | uint32_t QSIZE : 32; // Size of the next command stream to be executed by the NPU |
| 2415 | }; |
| 2416 | uint32_t word; |
| 2417 | }; |
| 2418 | #else |
| 2419 | private: |
| 2420 | uint32_t word0; |
| 2421 | |
| 2422 | public: |
| 2423 | CONSTEXPR qsize_r() : word0(0) {} |
| 2424 | CONSTEXPR qsize_r(uint32_t init) : word0(init) {} |
| 2425 | CONSTEXPR void operator=(uint32_t value) |
| 2426 | { |
| 2427 | word0 = value; |
| 2428 | } |
| 2429 | void operator=(uint32_t value) volatile |
| 2430 | { |
| 2431 | word0 = value; |
| 2432 | } |
| 2433 | CONSTEXPR operator uint32_t() |
| 2434 | { |
| 2435 | return word0; |
| 2436 | } |
| 2437 | operator uint32_t() volatile |
| 2438 | { |
| 2439 | return word0; |
| 2440 | } |
| 2441 | qsize_r copy() volatile |
| 2442 | { |
| 2443 | return *this; |
| 2444 | } |
| 2445 | CONSTEXPR uint32_t get_QSIZE() const |
| 2446 | { |
| 2447 | uint32_t value = static_cast<uint32_t>(word0); |
| 2448 | return value; |
| 2449 | } |
| 2450 | uint32_t get_QSIZE() const volatile |
| 2451 | { |
| 2452 | uint32_t value = static_cast<uint32_t>(word0); |
| 2453 | return value; |
| 2454 | } |
| 2455 | CONSTEXPR qsize_r &set_QSIZE(uint32_t value) |
| 2456 | { |
| 2457 | word0 = static_cast<uint32_t>(value); |
| 2458 | return *this; |
| 2459 | } |
| 2460 | #endif |
| 2461 | }; |
| 2462 | |
| 2463 | // prot_r - Protection level configured for the NPU when acting as an AXI requester |
| 2464 | struct prot_r |
| 2465 | { |
| 2466 | #ifndef __cplusplus |
| 2467 | union |
| 2468 | { |
| 2469 | struct |
| 2470 | { |
| 2471 | uint32_t active_CPL : 1; // Current privilege level 0=User 1=Privileged |
| 2472 | uint32_t active_CSL : 1; // Current security level 0=Secure 1=Non secure |
| 2473 | uint32_t reserved0 : 30; |
| 2474 | }; |
| 2475 | uint32_t word; |
| 2476 | }; |
| 2477 | #else |
| 2478 | private: |
| 2479 | uint32_t word0; |
| 2480 | |
| 2481 | public: |
| 2482 | CONSTEXPR prot_r() : word0(0) {} |
| 2483 | CONSTEXPR prot_r(uint32_t init) : word0(init) {} |
| 2484 | CONSTEXPR void operator=(uint32_t value) |
| 2485 | { |
| 2486 | word0 = value; |
| 2487 | } |
| 2488 | void operator=(uint32_t value) volatile |
| 2489 | { |
| 2490 | word0 = value; |
| 2491 | } |
| 2492 | CONSTEXPR operator uint32_t() |
| 2493 | { |
| 2494 | return word0; |
| 2495 | } |
| 2496 | operator uint32_t() volatile |
| 2497 | { |
| 2498 | return word0; |
| 2499 | } |
| 2500 | prot_r copy() volatile |
| 2501 | { |
| 2502 | return *this; |
| 2503 | } |
| 2504 | CONSTEXPR NPU_NAMESPACE::privilege_level get_active_CPL() const |
| 2505 | { |
| 2506 | NPU_NAMESPACE::privilege_level value = |
| 2507 | static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0)); |
| 2508 | return value; |
| 2509 | } |
| 2510 | NPU_NAMESPACE::privilege_level get_active_CPL() const volatile |
| 2511 | { |
| 2512 | NPU_NAMESPACE::privilege_level value = |
| 2513 | static_cast<NPU_NAMESPACE::privilege_level>(((1U << 1) - 1) & (word0 >> 0)); |
| 2514 | return value; |
| 2515 | } |
| 2516 | CONSTEXPR prot_r &set_active_CPL(NPU_NAMESPACE::privilege_level value) |
| 2517 | { |
| 2518 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 2519 | return *this; |
| 2520 | } |
| 2521 | CONSTEXPR NPU_NAMESPACE::security_level get_active_CSL() const |
| 2522 | { |
| 2523 | NPU_NAMESPACE::security_level value = |
| 2524 | static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1)); |
| 2525 | return value; |
| 2526 | } |
| 2527 | NPU_NAMESPACE::security_level get_active_CSL() const volatile |
| 2528 | { |
| 2529 | NPU_NAMESPACE::security_level value = |
| 2530 | static_cast<NPU_NAMESPACE::security_level>(((1U << 1) - 1) & (word0 >> 1)); |
| 2531 | return value; |
| 2532 | } |
| 2533 | CONSTEXPR prot_r &set_active_CSL(NPU_NAMESPACE::security_level value) |
| 2534 | { |
| 2535 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 2536 | return *this; |
| 2537 | } |
| 2538 | #endif |
| 2539 | }; |
| 2540 | |
| 2541 | // config_r - RTL configuration |
| 2542 | struct config_r |
| 2543 | { |
| 2544 | #ifndef __cplusplus |
| 2545 | union |
| 2546 | { |
| 2547 | struct |
| 2548 | { |
| 2549 | uint32_t macs_per_cc : 4; // The log2(macs/clock cycle) |
| 2550 | uint32_t cmd_stream_version : 4; // command stream version accepted by this NPU |
| 2551 | uint32_t shram_size : 8; // Total size in KB of internal SHRAM |
| 2552 | uint32_t reserved0 : 10; |
| 2553 | uint32_t functional_safety : 1; // Functional safety configuration |
| 2554 | uint32_t custom_dma : 1; // Custom DMA configuration |
| 2555 | uint32_t product : 4; // Product configuration |
| 2556 | }; |
| 2557 | uint32_t word; |
| 2558 | }; |
| 2559 | #else |
| 2560 | private: |
| 2561 | uint32_t word0; |
| 2562 | |
| 2563 | public: |
| 2564 | CONSTEXPR config_r() : word0(268435456) {} |
| 2565 | CONSTEXPR config_r(uint32_t init) : word0(init) {} |
| 2566 | CONSTEXPR void operator=(uint32_t value) |
| 2567 | { |
| 2568 | word0 = value; |
| 2569 | } |
| 2570 | void operator=(uint32_t value) volatile |
| 2571 | { |
| 2572 | word0 = value; |
| 2573 | } |
| 2574 | CONSTEXPR operator uint32_t() |
| 2575 | { |
| 2576 | return word0; |
| 2577 | } |
| 2578 | operator uint32_t() volatile |
| 2579 | { |
| 2580 | return word0; |
| 2581 | } |
| 2582 | config_r copy() volatile |
| 2583 | { |
| 2584 | return *this; |
| 2585 | } |
| 2586 | CONSTEXPR uint32_t get_macs_per_cc() const |
| 2587 | { |
| 2588 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0)); |
| 2589 | return value; |
| 2590 | } |
| 2591 | uint32_t get_macs_per_cc() const volatile |
| 2592 | { |
| 2593 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 0)); |
| 2594 | return value; |
| 2595 | } |
| 2596 | CONSTEXPR config_r &set_macs_per_cc(uint32_t value) |
| 2597 | { |
| 2598 | word0 = (((~((1U << 4) - 1)) << 0) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 0); |
| 2599 | return *this; |
| 2600 | } |
| 2601 | CONSTEXPR uint32_t get_cmd_stream_version() const |
| 2602 | { |
| 2603 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4)); |
| 2604 | return value; |
| 2605 | } |
| 2606 | uint32_t get_cmd_stream_version() const volatile |
| 2607 | { |
| 2608 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 4)); |
| 2609 | return value; |
| 2610 | } |
| 2611 | CONSTEXPR config_r &set_cmd_stream_version(uint32_t value) |
| 2612 | { |
| 2613 | word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4); |
| 2614 | return *this; |
| 2615 | } |
| 2616 | CONSTEXPR uint32_t get_shram_size() const |
| 2617 | { |
| 2618 | uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 8)); |
| 2619 | return value; |
| 2620 | } |
| 2621 | uint32_t get_shram_size() const volatile |
| 2622 | { |
| 2623 | uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 8)); |
| 2624 | return value; |
| 2625 | } |
| 2626 | CONSTEXPR config_r &set_shram_size(uint32_t value) |
| 2627 | { |
| 2628 | word0 = (((~((1U << 8) - 1)) << 8) & word0) | ((((1U << 8) - 1) & static_cast<uint32_t>(value)) << 8); |
| 2629 | return *this; |
| 2630 | } |
| 2631 | CONSTEXPR NPU_NAMESPACE::functional_safety get_functional_safety() const |
| 2632 | { |
| 2633 | NPU_NAMESPACE::functional_safety value = |
| 2634 | static_cast<NPU_NAMESPACE::functional_safety>(((1U << 1) - 1) & (word0 >> 26)); |
| 2635 | return value; |
| 2636 | } |
| 2637 | NPU_NAMESPACE::functional_safety get_functional_safety() const volatile |
| 2638 | { |
| 2639 | NPU_NAMESPACE::functional_safety value = |
| 2640 | static_cast<NPU_NAMESPACE::functional_safety>(((1U << 1) - 1) & (word0 >> 26)); |
| 2641 | return value; |
| 2642 | } |
| 2643 | CONSTEXPR config_r &set_functional_safety(NPU_NAMESPACE::functional_safety value) |
| 2644 | { |
| 2645 | word0 = (((~((1U << 1) - 1)) << 26) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 26); |
| 2646 | return *this; |
| 2647 | } |
| 2648 | CONSTEXPR NPU_NAMESPACE::custom_dma get_custom_dma() const |
| 2649 | { |
| 2650 | NPU_NAMESPACE::custom_dma value = static_cast<NPU_NAMESPACE::custom_dma>(((1U << 1) - 1) & (word0 >> 27)); |
| 2651 | return value; |
| 2652 | } |
| 2653 | NPU_NAMESPACE::custom_dma get_custom_dma() const volatile |
| 2654 | { |
| 2655 | NPU_NAMESPACE::custom_dma value = static_cast<NPU_NAMESPACE::custom_dma>(((1U << 1) - 1) & (word0 >> 27)); |
| 2656 | return value; |
| 2657 | } |
| 2658 | CONSTEXPR config_r &set_custom_dma(NPU_NAMESPACE::custom_dma value) |
| 2659 | { |
| 2660 | word0 = (((~((1U << 1) - 1)) << 27) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 27); |
| 2661 | return *this; |
| 2662 | } |
| 2663 | CONSTEXPR uint32_t get_product() const |
| 2664 | { |
| 2665 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28)); |
| 2666 | return value; |
| 2667 | } |
| 2668 | uint32_t get_product() const volatile |
| 2669 | { |
| 2670 | uint32_t value = static_cast<uint32_t>(((1U << 4) - 1) & (word0 >> 28)); |
| 2671 | return value; |
| 2672 | } |
| 2673 | CONSTEXPR config_r &set_product(uint32_t value) |
| 2674 | { |
| 2675 | word0 = (((~((1U << 4) - 1)) << 28) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 28); |
| 2676 | return *this; |
| 2677 | } |
| 2678 | #endif |
| 2679 | }; |
| 2680 | |
| 2681 | // lock_r - Lock register. This register is designed for driver use and does not affect NPU functionality |
| 2682 | struct lock_r |
| 2683 | { |
| 2684 | #ifndef __cplusplus |
| 2685 | union |
| 2686 | { |
| 2687 | struct |
| 2688 | { |
| 2689 | uint32_t LOCK : 32; // 32 bit value for LOCK configuration |
| 2690 | }; |
| 2691 | uint32_t word; |
| 2692 | }; |
| 2693 | #else |
| 2694 | private: |
| 2695 | uint32_t word0; |
| 2696 | |
| 2697 | public: |
| 2698 | CONSTEXPR lock_r() : word0(0) {} |
| 2699 | CONSTEXPR lock_r(uint32_t init) : word0(init) {} |
| 2700 | CONSTEXPR void operator=(uint32_t value) |
| 2701 | { |
| 2702 | word0 = value; |
| 2703 | } |
| 2704 | void operator=(uint32_t value) volatile |
| 2705 | { |
| 2706 | word0 = value; |
| 2707 | } |
| 2708 | CONSTEXPR operator uint32_t() |
| 2709 | { |
| 2710 | return word0; |
| 2711 | } |
| 2712 | operator uint32_t() volatile |
| 2713 | { |
| 2714 | return word0; |
| 2715 | } |
| 2716 | lock_r copy() volatile |
| 2717 | { |
| 2718 | return *this; |
| 2719 | } |
| 2720 | CONSTEXPR uint32_t get_LOCK() const |
| 2721 | { |
| 2722 | uint32_t value = static_cast<uint32_t>(word0); |
| 2723 | return value; |
| 2724 | } |
| 2725 | uint32_t get_LOCK() const volatile |
| 2726 | { |
| 2727 | uint32_t value = static_cast<uint32_t>(word0); |
| 2728 | return value; |
| 2729 | } |
| 2730 | CONSTEXPR lock_r &set_LOCK(uint32_t value) |
| 2731 | { |
| 2732 | word0 = static_cast<uint32_t>(value); |
| 2733 | return *this; |
| 2734 | } |
| 2735 | #endif |
| 2736 | }; |
| 2737 | |
| 2738 | // regioncfg_r - Region memory type configuration. Bits[2*k+1:2*k] give the memory type for REGION[k] |
| 2739 | struct regioncfg_r |
| 2740 | { |
| 2741 | #ifndef __cplusplus |
| 2742 | union |
| 2743 | { |
| 2744 | struct |
| 2745 | { |
| 2746 | uint32_t region0 : 2; // Bits for Region0 Configuration |
| 2747 | uint32_t region1 : 2; // Bits for Region1 Configuration |
| 2748 | uint32_t region2 : 2; // Bits for Region2 Configuration |
| 2749 | uint32_t region3 : 2; // Bits for Region3 Configuration |
| 2750 | uint32_t region4 : 2; // Bits for Region4 Configuration |
| 2751 | uint32_t region5 : 2; // Bits for Region5 Configuration |
| 2752 | uint32_t region6 : 2; // Bits for Region6 Configuration |
| 2753 | uint32_t region7 : 2; // Bits for Region7 Configuration |
| 2754 | uint32_t reserved0 : 16; |
| 2755 | }; |
| 2756 | uint32_t word; |
| 2757 | }; |
| 2758 | #else |
| 2759 | private: |
| 2760 | uint32_t word0; |
| 2761 | |
| 2762 | public: |
| 2763 | CONSTEXPR regioncfg_r() : word0(0) {} |
| 2764 | CONSTEXPR regioncfg_r(uint32_t init) : word0(init) {} |
| 2765 | CONSTEXPR void operator=(uint32_t value) |
| 2766 | { |
| 2767 | word0 = value; |
| 2768 | } |
| 2769 | void operator=(uint32_t value) volatile |
| 2770 | { |
| 2771 | word0 = value; |
| 2772 | } |
| 2773 | CONSTEXPR operator uint32_t() |
| 2774 | { |
| 2775 | return word0; |
| 2776 | } |
| 2777 | operator uint32_t() volatile |
| 2778 | { |
| 2779 | return word0; |
| 2780 | } |
| 2781 | regioncfg_r copy() volatile |
| 2782 | { |
| 2783 | return *this; |
| 2784 | } |
| 2785 | CONSTEXPR NPU_NAMESPACE::mem_attr get_region0() const |
| 2786 | { |
| 2787 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0)); |
| 2788 | return value; |
| 2789 | } |
| 2790 | NPU_NAMESPACE::mem_attr get_region0() const volatile |
| 2791 | { |
| 2792 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 0)); |
| 2793 | return value; |
| 2794 | } |
| 2795 | CONSTEXPR regioncfg_r &set_region0(NPU_NAMESPACE::mem_attr value) |
| 2796 | { |
| 2797 | word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0); |
| 2798 | return *this; |
| 2799 | } |
| 2800 | CONSTEXPR NPU_NAMESPACE::mem_attr get_region1() const |
| 2801 | { |
| 2802 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 2)); |
| 2803 | return value; |
| 2804 | } |
| 2805 | NPU_NAMESPACE::mem_attr get_region1() const volatile |
| 2806 | { |
| 2807 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 2)); |
| 2808 | return value; |
| 2809 | } |
| 2810 | CONSTEXPR regioncfg_r &set_region1(NPU_NAMESPACE::mem_attr value) |
| 2811 | { |
| 2812 | word0 = (((~((1U << 2) - 1)) << 2) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 2); |
| 2813 | return *this; |
| 2814 | } |
| 2815 | CONSTEXPR NPU_NAMESPACE::mem_attr get_region2() const |
| 2816 | { |
| 2817 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 4)); |
| 2818 | return value; |
| 2819 | } |
| 2820 | NPU_NAMESPACE::mem_attr get_region2() const volatile |
| 2821 | { |
| 2822 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 4)); |
| 2823 | return value; |
| 2824 | } |
| 2825 | CONSTEXPR regioncfg_r &set_region2(NPU_NAMESPACE::mem_attr value) |
| 2826 | { |
| 2827 | word0 = (((~((1U << 2) - 1)) << 4) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 4); |
| 2828 | return *this; |
| 2829 | } |
| 2830 | CONSTEXPR NPU_NAMESPACE::mem_attr get_region3() const |
| 2831 | { |
| 2832 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 6)); |
| 2833 | return value; |
| 2834 | } |
| 2835 | NPU_NAMESPACE::mem_attr get_region3() const volatile |
| 2836 | { |
| 2837 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 6)); |
| 2838 | return value; |
| 2839 | } |
| 2840 | CONSTEXPR regioncfg_r &set_region3(NPU_NAMESPACE::mem_attr value) |
| 2841 | { |
| 2842 | word0 = (((~((1U << 2) - 1)) << 6) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 6); |
| 2843 | return *this; |
| 2844 | } |
| 2845 | CONSTEXPR NPU_NAMESPACE::mem_attr get_region4() const |
| 2846 | { |
| 2847 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 8)); |
| 2848 | return value; |
| 2849 | } |
| 2850 | NPU_NAMESPACE::mem_attr get_region4() const volatile |
| 2851 | { |
| 2852 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 8)); |
| 2853 | return value; |
| 2854 | } |
| 2855 | CONSTEXPR regioncfg_r &set_region4(NPU_NAMESPACE::mem_attr value) |
| 2856 | { |
| 2857 | word0 = (((~((1U << 2) - 1)) << 8) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 8); |
| 2858 | return *this; |
| 2859 | } |
| 2860 | CONSTEXPR NPU_NAMESPACE::mem_attr get_region5() const |
| 2861 | { |
| 2862 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 10)); |
| 2863 | return value; |
| 2864 | } |
| 2865 | NPU_NAMESPACE::mem_attr get_region5() const volatile |
| 2866 | { |
| 2867 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 10)); |
| 2868 | return value; |
| 2869 | } |
| 2870 | CONSTEXPR regioncfg_r &set_region5(NPU_NAMESPACE::mem_attr value) |
| 2871 | { |
| 2872 | word0 = (((~((1U << 2) - 1)) << 10) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 10); |
| 2873 | return *this; |
| 2874 | } |
| 2875 | CONSTEXPR NPU_NAMESPACE::mem_attr get_region6() const |
| 2876 | { |
| 2877 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 12)); |
| 2878 | return value; |
| 2879 | } |
| 2880 | NPU_NAMESPACE::mem_attr get_region6() const volatile |
| 2881 | { |
| 2882 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 12)); |
| 2883 | return value; |
| 2884 | } |
| 2885 | CONSTEXPR regioncfg_r &set_region6(NPU_NAMESPACE::mem_attr value) |
| 2886 | { |
| 2887 | word0 = (((~((1U << 2) - 1)) << 12) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 12); |
| 2888 | return *this; |
| 2889 | } |
| 2890 | CONSTEXPR NPU_NAMESPACE::mem_attr get_region7() const |
| 2891 | { |
| 2892 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 14)); |
| 2893 | return value; |
| 2894 | } |
| 2895 | NPU_NAMESPACE::mem_attr get_region7() const volatile |
| 2896 | { |
| 2897 | NPU_NAMESPACE::mem_attr value = static_cast<NPU_NAMESPACE::mem_attr>(((1U << 2) - 1) & (word0 >> 14)); |
| 2898 | return value; |
| 2899 | } |
| 2900 | CONSTEXPR regioncfg_r &set_region7(NPU_NAMESPACE::mem_attr value) |
| 2901 | { |
| 2902 | word0 = (((~((1U << 2) - 1)) << 14) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 14); |
| 2903 | return *this; |
| 2904 | } |
| 2905 | #endif |
| 2906 | }; |
| 2907 | |
| 2908 | // axi_limit0_r - AXI limits for port 0 counter 0 |
| 2909 | struct axi_limit0_r |
| 2910 | { |
| 2911 | #ifndef __cplusplus |
| 2912 | union |
| 2913 | { |
| 2914 | struct |
| 2915 | { |
| 2916 | uint32_t max_beats : 2; // Burst split alignment |
| 2917 | uint32_t reserved0 : 2; |
| 2918 | uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals |
| 2919 | uint32_t reserved1 : 8; |
| 2920 | uint32_t |
| 2921 | max_outstanding_read_m1 : 6; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 63 |
| 2922 | uint32_t reserved2 : 2; |
| 2923 | uint32_t max_outstanding_write_m1 : 5; // Maximum number of outstanding AXI write transactions - 1 in range |
| 2924 | // 0 to 31 |
| 2925 | uint32_t reserved3 : 3; |
| 2926 | }; |
| 2927 | uint32_t word; |
| 2928 | }; |
| 2929 | #else |
| 2930 | private: |
| 2931 | uint32_t word0; |
| 2932 | |
| 2933 | public: |
| 2934 | CONSTEXPR axi_limit0_r() : word0(0) {} |
| 2935 | CONSTEXPR axi_limit0_r(uint32_t init) : word0(init) {} |
| 2936 | CONSTEXPR void operator=(uint32_t value) |
| 2937 | { |
| 2938 | word0 = value; |
| 2939 | } |
| 2940 | void operator=(uint32_t value) volatile |
| 2941 | { |
| 2942 | word0 = value; |
| 2943 | } |
| 2944 | CONSTEXPR operator uint32_t() |
| 2945 | { |
| 2946 | return word0; |
| 2947 | } |
| 2948 | operator uint32_t() volatile |
| 2949 | { |
| 2950 | return word0; |
| 2951 | } |
| 2952 | axi_limit0_r copy() volatile |
| 2953 | { |
| 2954 | return *this; |
| 2955 | } |
| 2956 | CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const |
| 2957 | { |
| 2958 | NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0)); |
| 2959 | return value; |
| 2960 | } |
| 2961 | NPU_NAMESPACE::max_beats get_max_beats() const volatile |
| 2962 | { |
| 2963 | NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0)); |
| 2964 | return value; |
| 2965 | } |
| 2966 | CONSTEXPR axi_limit0_r &set_max_beats(NPU_NAMESPACE::max_beats value) |
| 2967 | { |
| 2968 | word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0); |
| 2969 | return *this; |
| 2970 | } |
| 2971 | CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const |
| 2972 | { |
| 2973 | NPU_NAMESPACE::axi_mem_encoding value = |
| 2974 | static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4)); |
| 2975 | return value; |
| 2976 | } |
| 2977 | NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile |
| 2978 | { |
| 2979 | NPU_NAMESPACE::axi_mem_encoding value = |
| 2980 | static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4)); |
| 2981 | return value; |
| 2982 | } |
| 2983 | CONSTEXPR axi_limit0_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value) |
| 2984 | { |
| 2985 | word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4); |
| 2986 | return *this; |
| 2987 | } |
| 2988 | CONSTEXPR uint32_t get_max_outstanding_read_m1() const |
| 2989 | { |
| 2990 | uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16)); |
| 2991 | return value; |
| 2992 | } |
| 2993 | uint32_t get_max_outstanding_read_m1() const volatile |
| 2994 | { |
| 2995 | uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16)); |
| 2996 | return value; |
| 2997 | } |
| 2998 | CONSTEXPR axi_limit0_r &set_max_outstanding_read_m1(uint32_t value) |
| 2999 | { |
| 3000 | word0 = (((~((1U << 6) - 1)) << 16) & word0) | ((((1U << 6) - 1) & static_cast<uint32_t>(value)) << 16); |
| 3001 | return *this; |
| 3002 | } |
| 3003 | CONSTEXPR uint32_t get_max_outstanding_write_m1() const |
| 3004 | { |
| 3005 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24)); |
| 3006 | return value; |
| 3007 | } |
| 3008 | uint32_t get_max_outstanding_write_m1() const volatile |
| 3009 | { |
| 3010 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24)); |
| 3011 | return value; |
| 3012 | } |
| 3013 | CONSTEXPR axi_limit0_r &set_max_outstanding_write_m1(uint32_t value) |
| 3014 | { |
| 3015 | word0 = (((~((1U << 5) - 1)) << 24) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 24); |
| 3016 | return *this; |
| 3017 | } |
| 3018 | #endif |
| 3019 | }; |
| 3020 | |
| 3021 | // axi_limit1_r - AXI limits for port 0 counter 1 |
| 3022 | struct axi_limit1_r |
| 3023 | { |
| 3024 | #ifndef __cplusplus |
| 3025 | union |
| 3026 | { |
| 3027 | struct |
| 3028 | { |
| 3029 | uint32_t max_beats : 2; // Burst split alignment |
| 3030 | uint32_t reserved0 : 2; |
| 3031 | uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals |
| 3032 | uint32_t reserved1 : 8; |
| 3033 | uint32_t |
| 3034 | max_outstanding_read_m1 : 6; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 63 |
| 3035 | uint32_t reserved2 : 2; |
| 3036 | uint32_t max_outstanding_write_m1 : 5; // Maximum number of outstanding AXI write transactions - 1 in range |
| 3037 | // 0 to 31 |
| 3038 | uint32_t reserved3 : 3; |
| 3039 | }; |
| 3040 | uint32_t word; |
| 3041 | }; |
| 3042 | #else |
| 3043 | private: |
| 3044 | uint32_t word0; |
| 3045 | |
| 3046 | public: |
| 3047 | CONSTEXPR axi_limit1_r() : word0(0) {} |
| 3048 | CONSTEXPR axi_limit1_r(uint32_t init) : word0(init) {} |
| 3049 | CONSTEXPR void operator=(uint32_t value) |
| 3050 | { |
| 3051 | word0 = value; |
| 3052 | } |
| 3053 | void operator=(uint32_t value) volatile |
| 3054 | { |
| 3055 | word0 = value; |
| 3056 | } |
| 3057 | CONSTEXPR operator uint32_t() |
| 3058 | { |
| 3059 | return word0; |
| 3060 | } |
| 3061 | operator uint32_t() volatile |
| 3062 | { |
| 3063 | return word0; |
| 3064 | } |
| 3065 | axi_limit1_r copy() volatile |
| 3066 | { |
| 3067 | return *this; |
| 3068 | } |
| 3069 | CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const |
| 3070 | { |
| 3071 | NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0)); |
| 3072 | return value; |
| 3073 | } |
| 3074 | NPU_NAMESPACE::max_beats get_max_beats() const volatile |
| 3075 | { |
| 3076 | NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0)); |
| 3077 | return value; |
| 3078 | } |
| 3079 | CONSTEXPR axi_limit1_r &set_max_beats(NPU_NAMESPACE::max_beats value) |
| 3080 | { |
| 3081 | word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0); |
| 3082 | return *this; |
| 3083 | } |
| 3084 | CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const |
| 3085 | { |
| 3086 | NPU_NAMESPACE::axi_mem_encoding value = |
| 3087 | static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4)); |
| 3088 | return value; |
| 3089 | } |
| 3090 | NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile |
| 3091 | { |
| 3092 | NPU_NAMESPACE::axi_mem_encoding value = |
| 3093 | static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4)); |
| 3094 | return value; |
| 3095 | } |
| 3096 | CONSTEXPR axi_limit1_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value) |
| 3097 | { |
| 3098 | word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4); |
| 3099 | return *this; |
| 3100 | } |
| 3101 | CONSTEXPR uint32_t get_max_outstanding_read_m1() const |
| 3102 | { |
| 3103 | uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16)); |
| 3104 | return value; |
| 3105 | } |
| 3106 | uint32_t get_max_outstanding_read_m1() const volatile |
| 3107 | { |
| 3108 | uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16)); |
| 3109 | return value; |
| 3110 | } |
| 3111 | CONSTEXPR axi_limit1_r &set_max_outstanding_read_m1(uint32_t value) |
| 3112 | { |
| 3113 | word0 = (((~((1U << 6) - 1)) << 16) & word0) | ((((1U << 6) - 1) & static_cast<uint32_t>(value)) << 16); |
| 3114 | return *this; |
| 3115 | } |
| 3116 | CONSTEXPR uint32_t get_max_outstanding_write_m1() const |
| 3117 | { |
| 3118 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24)); |
| 3119 | return value; |
| 3120 | } |
| 3121 | uint32_t get_max_outstanding_write_m1() const volatile |
| 3122 | { |
| 3123 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24)); |
| 3124 | return value; |
| 3125 | } |
| 3126 | CONSTEXPR axi_limit1_r &set_max_outstanding_write_m1(uint32_t value) |
| 3127 | { |
| 3128 | word0 = (((~((1U << 5) - 1)) << 24) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 24); |
| 3129 | return *this; |
| 3130 | } |
| 3131 | #endif |
| 3132 | }; |
| 3133 | |
| 3134 | // axi_limit2_r - AXI limits for port 1 counter 2 |
| 3135 | struct axi_limit2_r |
| 3136 | { |
| 3137 | #ifndef __cplusplus |
| 3138 | union |
| 3139 | { |
| 3140 | struct |
| 3141 | { |
| 3142 | uint32_t max_beats : 2; // Burst split alignment |
| 3143 | uint32_t reserved0 : 2; |
| 3144 | uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals |
| 3145 | uint32_t reserved1 : 8; |
| 3146 | uint32_t |
| 3147 | max_outstanding_read_m1 : 6; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 63 |
| 3148 | uint32_t reserved2 : 2; |
| 3149 | uint32_t max_outstanding_write_m1 : 5; // Maximum number of outstanding AXI write transactions - 1 in range |
| 3150 | // 0 to 31 |
| 3151 | uint32_t reserved3 : 3; |
| 3152 | }; |
| 3153 | uint32_t word; |
| 3154 | }; |
| 3155 | #else |
| 3156 | private: |
| 3157 | uint32_t word0; |
| 3158 | |
| 3159 | public: |
| 3160 | CONSTEXPR axi_limit2_r() : word0(0) {} |
| 3161 | CONSTEXPR axi_limit2_r(uint32_t init) : word0(init) {} |
| 3162 | CONSTEXPR void operator=(uint32_t value) |
| 3163 | { |
| 3164 | word0 = value; |
| 3165 | } |
| 3166 | void operator=(uint32_t value) volatile |
| 3167 | { |
| 3168 | word0 = value; |
| 3169 | } |
| 3170 | CONSTEXPR operator uint32_t() |
| 3171 | { |
| 3172 | return word0; |
| 3173 | } |
| 3174 | operator uint32_t() volatile |
| 3175 | { |
| 3176 | return word0; |
| 3177 | } |
| 3178 | axi_limit2_r copy() volatile |
| 3179 | { |
| 3180 | return *this; |
| 3181 | } |
| 3182 | CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const |
| 3183 | { |
| 3184 | NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0)); |
| 3185 | return value; |
| 3186 | } |
| 3187 | NPU_NAMESPACE::max_beats get_max_beats() const volatile |
| 3188 | { |
| 3189 | NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0)); |
| 3190 | return value; |
| 3191 | } |
| 3192 | CONSTEXPR axi_limit2_r &set_max_beats(NPU_NAMESPACE::max_beats value) |
| 3193 | { |
| 3194 | word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0); |
| 3195 | return *this; |
| 3196 | } |
| 3197 | CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const |
| 3198 | { |
| 3199 | NPU_NAMESPACE::axi_mem_encoding value = |
| 3200 | static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4)); |
| 3201 | return value; |
| 3202 | } |
| 3203 | NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile |
| 3204 | { |
| 3205 | NPU_NAMESPACE::axi_mem_encoding value = |
| 3206 | static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4)); |
| 3207 | return value; |
| 3208 | } |
| 3209 | CONSTEXPR axi_limit2_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value) |
| 3210 | { |
| 3211 | word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4); |
| 3212 | return *this; |
| 3213 | } |
| 3214 | CONSTEXPR uint32_t get_max_outstanding_read_m1() const |
| 3215 | { |
| 3216 | uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16)); |
| 3217 | return value; |
| 3218 | } |
| 3219 | uint32_t get_max_outstanding_read_m1() const volatile |
| 3220 | { |
| 3221 | uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16)); |
| 3222 | return value; |
| 3223 | } |
| 3224 | CONSTEXPR axi_limit2_r &set_max_outstanding_read_m1(uint32_t value) |
| 3225 | { |
| 3226 | word0 = (((~((1U << 6) - 1)) << 16) & word0) | ((((1U << 6) - 1) & static_cast<uint32_t>(value)) << 16); |
| 3227 | return *this; |
| 3228 | } |
| 3229 | CONSTEXPR uint32_t get_max_outstanding_write_m1() const |
| 3230 | { |
| 3231 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24)); |
| 3232 | return value; |
| 3233 | } |
| 3234 | uint32_t get_max_outstanding_write_m1() const volatile |
| 3235 | { |
| 3236 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24)); |
| 3237 | return value; |
| 3238 | } |
| 3239 | CONSTEXPR axi_limit2_r &set_max_outstanding_write_m1(uint32_t value) |
| 3240 | { |
| 3241 | word0 = (((~((1U << 5) - 1)) << 24) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 24); |
| 3242 | return *this; |
| 3243 | } |
| 3244 | #endif |
| 3245 | }; |
| 3246 | |
| 3247 | // axi_limit3_r - AXI limits for port 1 counter 3 |
| 3248 | struct axi_limit3_r |
| 3249 | { |
| 3250 | #ifndef __cplusplus |
| 3251 | union |
| 3252 | { |
| 3253 | struct |
| 3254 | { |
| 3255 | uint32_t max_beats : 2; // Burst split alignment |
| 3256 | uint32_t reserved0 : 2; |
| 3257 | uint32_t memtype : 4; // Memtype to be used to encode AxCACHE signals |
| 3258 | uint32_t reserved1 : 8; |
| 3259 | uint32_t |
| 3260 | max_outstanding_read_m1 : 6; // Maximum number of outstanding AXI read transactions - 1 in range 0 to 63 |
| 3261 | uint32_t reserved2 : 2; |
| 3262 | uint32_t max_outstanding_write_m1 : 5; // Maximum number of outstanding AXI write transactions - 1 in range |
| 3263 | // 0 to 31 |
| 3264 | uint32_t reserved3 : 3; |
| 3265 | }; |
| 3266 | uint32_t word; |
| 3267 | }; |
| 3268 | #else |
| 3269 | private: |
| 3270 | uint32_t word0; |
| 3271 | |
| 3272 | public: |
| 3273 | CONSTEXPR axi_limit3_r() : word0(0) {} |
| 3274 | CONSTEXPR axi_limit3_r(uint32_t init) : word0(init) {} |
| 3275 | CONSTEXPR void operator=(uint32_t value) |
| 3276 | { |
| 3277 | word0 = value; |
| 3278 | } |
| 3279 | void operator=(uint32_t value) volatile |
| 3280 | { |
| 3281 | word0 = value; |
| 3282 | } |
| 3283 | CONSTEXPR operator uint32_t() |
| 3284 | { |
| 3285 | return word0; |
| 3286 | } |
| 3287 | operator uint32_t() volatile |
| 3288 | { |
| 3289 | return word0; |
| 3290 | } |
| 3291 | axi_limit3_r copy() volatile |
| 3292 | { |
| 3293 | return *this; |
| 3294 | } |
| 3295 | CONSTEXPR NPU_NAMESPACE::max_beats get_max_beats() const |
| 3296 | { |
| 3297 | NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0)); |
| 3298 | return value; |
| 3299 | } |
| 3300 | NPU_NAMESPACE::max_beats get_max_beats() const volatile |
| 3301 | { |
| 3302 | NPU_NAMESPACE::max_beats value = static_cast<NPU_NAMESPACE::max_beats>(((1U << 2) - 1) & (word0 >> 0)); |
| 3303 | return value; |
| 3304 | } |
| 3305 | CONSTEXPR axi_limit3_r &set_max_beats(NPU_NAMESPACE::max_beats value) |
| 3306 | { |
| 3307 | word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0); |
| 3308 | return *this; |
| 3309 | } |
| 3310 | CONSTEXPR NPU_NAMESPACE::axi_mem_encoding get_memtype() const |
| 3311 | { |
| 3312 | NPU_NAMESPACE::axi_mem_encoding value = |
| 3313 | static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4)); |
| 3314 | return value; |
| 3315 | } |
| 3316 | NPU_NAMESPACE::axi_mem_encoding get_memtype() const volatile |
| 3317 | { |
| 3318 | NPU_NAMESPACE::axi_mem_encoding value = |
| 3319 | static_cast<NPU_NAMESPACE::axi_mem_encoding>(((1U << 4) - 1) & (word0 >> 4)); |
| 3320 | return value; |
| 3321 | } |
| 3322 | CONSTEXPR axi_limit3_r &set_memtype(NPU_NAMESPACE::axi_mem_encoding value) |
| 3323 | { |
| 3324 | word0 = (((~((1U << 4) - 1)) << 4) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 4); |
| 3325 | return *this; |
| 3326 | } |
| 3327 | CONSTEXPR uint32_t get_max_outstanding_read_m1() const |
| 3328 | { |
| 3329 | uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16)); |
| 3330 | return value; |
| 3331 | } |
| 3332 | uint32_t get_max_outstanding_read_m1() const volatile |
| 3333 | { |
| 3334 | uint32_t value = static_cast<uint32_t>(((1U << 6) - 1) & (word0 >> 16)); |
| 3335 | return value; |
| 3336 | } |
| 3337 | CONSTEXPR axi_limit3_r &set_max_outstanding_read_m1(uint32_t value) |
| 3338 | { |
| 3339 | word0 = (((~((1U << 6) - 1)) << 16) & word0) | ((((1U << 6) - 1) & static_cast<uint32_t>(value)) << 16); |
| 3340 | return *this; |
| 3341 | } |
| 3342 | CONSTEXPR uint32_t get_max_outstanding_write_m1() const |
| 3343 | { |
| 3344 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24)); |
| 3345 | return value; |
| 3346 | } |
| 3347 | uint32_t get_max_outstanding_write_m1() const volatile |
| 3348 | { |
| 3349 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 24)); |
| 3350 | return value; |
| 3351 | } |
| 3352 | CONSTEXPR axi_limit3_r &set_max_outstanding_write_m1(uint32_t value) |
| 3353 | { |
| 3354 | word0 = (((~((1U << 5) - 1)) << 24) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 24); |
| 3355 | return *this; |
| 3356 | } |
| 3357 | #endif |
| 3358 | }; |
| 3359 | |
| 3360 | // basep_r - The driver can use this address to relocate the command stream on region 0 |
| 3361 | struct basep_r |
| 3362 | { |
| 3363 | #ifndef __cplusplus |
| 3364 | union |
| 3365 | { |
| 3366 | struct |
| 3367 | { |
| 3368 | uint32_t offset_LO : 32; // Offset - LSB |
| 3369 | uint32_t offset_HI : 8; // Offset - MSB |
| 3370 | uint32_t reserved0 : 24; |
| 3371 | }; |
| 3372 | uint32_t word[2]; |
| 3373 | }; |
| 3374 | #else |
| 3375 | private: |
| 3376 | uint32_t word0; |
| 3377 | uint32_t word1; |
| 3378 | |
| 3379 | public: |
| 3380 | CONSTEXPR basep_r() : word0(0), word1(0) {} |
| 3381 | CONSTEXPR basep_r(uint64_t init) : |
| 3382 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 3383 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 3384 | { |
| 3385 | } |
| 3386 | CONSTEXPR void operator=(uint64_t value) |
| 3387 | { |
| 3388 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 3389 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 3390 | } |
| 3391 | void operator=(uint64_t value) volatile |
| 3392 | { |
| 3393 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 3394 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 3395 | } |
| 3396 | CONSTEXPR operator uint64_t() |
| 3397 | { |
| 3398 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 3399 | } |
| 3400 | operator uint64_t() volatile |
| 3401 | { |
| 3402 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 3403 | } |
| 3404 | basep_r copy() volatile |
| 3405 | { |
| 3406 | return *this; |
| 3407 | } |
| 3408 | #endif |
| 3409 | }; |
| 3410 | |
| 3411 | // wd_status_r - WD_STATUS |
| 3412 | struct wd_status_r |
| 3413 | { |
| 3414 | #ifndef __cplusplus |
| 3415 | union |
| 3416 | { |
| 3417 | struct |
| 3418 | { |
| 3419 | uint32_t core_slice_state : 2; // WD core slice parser state |
| 3420 | uint32_t core_idle : 1; // Core idle |
| 3421 | uint32_t ctrl_state : 2; // WD control state |
| 3422 | uint32_t ctrl_idle : 1; // All stripe jobs idle (all weights consumed) |
| 3423 | uint32_t write_buf_index0 : 3; // current write index for next data from core |
| 3424 | uint32_t write_buf_valid0 : 1; // write buf valid (full) |
| 3425 | uint32_t write_buf_idle0 : 1; // write buf idle (empty) |
| 3426 | uint32_t write_buf_index1 : 3; // current write index for next data from core |
| 3427 | uint32_t write_buf_valid1 : 1; // write buf valid (full) |
| 3428 | uint32_t write_buf_idle1 : 1; // write buf idle (empty) |
| 3429 | uint32_t events : 12; // WD events mapped as appendix A |
| 3430 | uint32_t reserved0 : 4; |
| 3431 | }; |
| 3432 | uint32_t word; |
| 3433 | }; |
| 3434 | #else |
| 3435 | private: |
| 3436 | uint32_t word0; |
| 3437 | |
| 3438 | public: |
| 3439 | CONSTEXPR wd_status_r() : word0(0) {} |
| 3440 | CONSTEXPR wd_status_r(uint32_t init) : word0(init) {} |
| 3441 | CONSTEXPR void operator=(uint32_t value) |
| 3442 | { |
| 3443 | word0 = value; |
| 3444 | } |
| 3445 | void operator=(uint32_t value) volatile |
| 3446 | { |
| 3447 | word0 = value; |
| 3448 | } |
| 3449 | CONSTEXPR operator uint32_t() |
| 3450 | { |
| 3451 | return word0; |
| 3452 | } |
| 3453 | operator uint32_t() volatile |
| 3454 | { |
| 3455 | return word0; |
| 3456 | } |
| 3457 | wd_status_r copy() volatile |
| 3458 | { |
| 3459 | return *this; |
| 3460 | } |
| 3461 | CONSTEXPR NPU_NAMESPACE::wd_core_slice_state get_core_slice_state() const |
| 3462 | { |
| 3463 | NPU_NAMESPACE::wd_core_slice_state value = |
| 3464 | static_cast<NPU_NAMESPACE::wd_core_slice_state>(((1U << 2) - 1) & (word0 >> 0)); |
| 3465 | return value; |
| 3466 | } |
| 3467 | NPU_NAMESPACE::wd_core_slice_state get_core_slice_state() const volatile |
| 3468 | { |
| 3469 | NPU_NAMESPACE::wd_core_slice_state value = |
| 3470 | static_cast<NPU_NAMESPACE::wd_core_slice_state>(((1U << 2) - 1) & (word0 >> 0)); |
| 3471 | return value; |
| 3472 | } |
| 3473 | CONSTEXPR wd_status_r &set_core_slice_state(NPU_NAMESPACE::wd_core_slice_state value) |
| 3474 | { |
| 3475 | word0 = (((~((1U << 2) - 1)) << 0) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 0); |
| 3476 | return *this; |
| 3477 | } |
| 3478 | CONSTEXPR uint32_t get_core_idle() const |
| 3479 | { |
| 3480 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 3481 | return value; |
| 3482 | } |
| 3483 | uint32_t get_core_idle() const volatile |
| 3484 | { |
| 3485 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 3486 | return value; |
| 3487 | } |
| 3488 | CONSTEXPR wd_status_r &set_core_idle(uint32_t value) |
| 3489 | { |
| 3490 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 3491 | return *this; |
| 3492 | } |
| 3493 | CONSTEXPR NPU_NAMESPACE::wd_ctrl_state get_ctrl_state() const |
| 3494 | { |
| 3495 | NPU_NAMESPACE::wd_ctrl_state value = static_cast<NPU_NAMESPACE::wd_ctrl_state>(((1U << 2) - 1) & (word0 >> 3)); |
| 3496 | return value; |
| 3497 | } |
| 3498 | NPU_NAMESPACE::wd_ctrl_state get_ctrl_state() const volatile |
| 3499 | { |
| 3500 | NPU_NAMESPACE::wd_ctrl_state value = static_cast<NPU_NAMESPACE::wd_ctrl_state>(((1U << 2) - 1) & (word0 >> 3)); |
| 3501 | return value; |
| 3502 | } |
| 3503 | CONSTEXPR wd_status_r &set_ctrl_state(NPU_NAMESPACE::wd_ctrl_state value) |
| 3504 | { |
| 3505 | word0 = (((~((1U << 2) - 1)) << 3) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 3); |
| 3506 | return *this; |
| 3507 | } |
| 3508 | CONSTEXPR uint32_t get_ctrl_idle() const |
| 3509 | { |
| 3510 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 3511 | return value; |
| 3512 | } |
| 3513 | uint32_t get_ctrl_idle() const volatile |
| 3514 | { |
| 3515 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 3516 | return value; |
| 3517 | } |
| 3518 | CONSTEXPR wd_status_r &set_ctrl_idle(uint32_t value) |
| 3519 | { |
| 3520 | word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5); |
| 3521 | return *this; |
| 3522 | } |
| 3523 | CONSTEXPR uint32_t get_write_buf_index0() const |
| 3524 | { |
| 3525 | uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 6)); |
| 3526 | return value; |
| 3527 | } |
| 3528 | uint32_t get_write_buf_index0() const volatile |
| 3529 | { |
| 3530 | uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 6)); |
| 3531 | return value; |
| 3532 | } |
| 3533 | CONSTEXPR wd_status_r &set_write_buf_index0(uint32_t value) |
| 3534 | { |
| 3535 | word0 = (((~((1U << 3) - 1)) << 6) & word0) | ((((1U << 3) - 1) & static_cast<uint32_t>(value)) << 6); |
| 3536 | return *this; |
| 3537 | } |
| 3538 | CONSTEXPR uint32_t get_write_buf_valid0() const |
| 3539 | { |
| 3540 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9)); |
| 3541 | return value; |
| 3542 | } |
| 3543 | uint32_t get_write_buf_valid0() const volatile |
| 3544 | { |
| 3545 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9)); |
| 3546 | return value; |
| 3547 | } |
| 3548 | CONSTEXPR wd_status_r &set_write_buf_valid0(uint32_t value) |
| 3549 | { |
| 3550 | word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9); |
| 3551 | return *this; |
| 3552 | } |
| 3553 | CONSTEXPR uint32_t get_write_buf_idle0() const |
| 3554 | { |
| 3555 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 3556 | return value; |
| 3557 | } |
| 3558 | uint32_t get_write_buf_idle0() const volatile |
| 3559 | { |
| 3560 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 3561 | return value; |
| 3562 | } |
| 3563 | CONSTEXPR wd_status_r &set_write_buf_idle0(uint32_t value) |
| 3564 | { |
| 3565 | word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10); |
| 3566 | return *this; |
| 3567 | } |
| 3568 | CONSTEXPR uint32_t get_write_buf_index1() const |
| 3569 | { |
| 3570 | uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 11)); |
| 3571 | return value; |
| 3572 | } |
| 3573 | uint32_t get_write_buf_index1() const volatile |
| 3574 | { |
| 3575 | uint32_t value = static_cast<uint32_t>(((1U << 3) - 1) & (word0 >> 11)); |
| 3576 | return value; |
| 3577 | } |
| 3578 | CONSTEXPR wd_status_r &set_write_buf_index1(uint32_t value) |
| 3579 | { |
| 3580 | word0 = (((~((1U << 3) - 1)) << 11) & word0) | ((((1U << 3) - 1) & static_cast<uint32_t>(value)) << 11); |
| 3581 | return *this; |
| 3582 | } |
| 3583 | CONSTEXPR uint32_t get_write_buf_valid1() const |
| 3584 | { |
| 3585 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14)); |
| 3586 | return value; |
| 3587 | } |
| 3588 | uint32_t get_write_buf_valid1() const volatile |
| 3589 | { |
| 3590 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14)); |
| 3591 | return value; |
| 3592 | } |
| 3593 | CONSTEXPR wd_status_r &set_write_buf_valid1(uint32_t value) |
| 3594 | { |
| 3595 | word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14); |
| 3596 | return *this; |
| 3597 | } |
| 3598 | CONSTEXPR uint32_t get_write_buf_idle1() const |
| 3599 | { |
| 3600 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15)); |
| 3601 | return value; |
| 3602 | } |
| 3603 | uint32_t get_write_buf_idle1() const volatile |
| 3604 | { |
| 3605 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15)); |
| 3606 | return value; |
| 3607 | } |
| 3608 | CONSTEXPR wd_status_r &set_write_buf_idle1(uint32_t value) |
| 3609 | { |
| 3610 | word0 = (((~((1U << 1) - 1)) << 15) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 15); |
| 3611 | return *this; |
| 3612 | } |
| 3613 | CONSTEXPR uint32_t get_events() const |
| 3614 | { |
| 3615 | uint32_t value = static_cast<uint32_t>(((1U << 12) - 1) & (word0 >> 16)); |
| 3616 | return value; |
| 3617 | } |
| 3618 | uint32_t get_events() const volatile |
| 3619 | { |
| 3620 | uint32_t value = static_cast<uint32_t>(((1U << 12) - 1) & (word0 >> 16)); |
| 3621 | return value; |
| 3622 | } |
| 3623 | CONSTEXPR wd_status_r &set_events(uint32_t value) |
| 3624 | { |
| 3625 | word0 = (((~((1U << 12) - 1)) << 16) & word0) | ((((1U << 12) - 1) & static_cast<uint32_t>(value)) << 16); |
| 3626 | return *this; |
| 3627 | } |
| 3628 | #endif |
| 3629 | }; |
| 3630 | |
| 3631 | // mac_status_r - MAC_STATUS |
| 3632 | struct mac_status_r |
| 3633 | { |
| 3634 | #ifndef __cplusplus |
| 3635 | union |
| 3636 | { |
| 3637 | struct |
| 3638 | { |
| 3639 | uint32_t block_cfg_valid : 1; // MAC has a valid block configuration |
| 3640 | uint32_t trav_en : 1; // MAC is doing block traversal |
| 3641 | uint32_t wait_for_ib : 1; // MAC is waiting for an Input Buffer to become available |
| 3642 | uint32_t wait_for_acc_buf : 1; // MAC is waiting for an Accumulator Buffer to become available |
| 3643 | uint32_t wait_for_weights : 1; // MAC is waiting for a Weight Block to become available |
| 3644 | uint32_t stall_stripe : 1; // MAC is stalling between two stripes |
| 3645 | uint32_t dw_sel : 1; // Currently used weight interface in MAC AI |
| 3646 | uint32_t wait_for_dw0_ready : 1; // MAC AI is waiting for MAC DPU to send dw0_ready to WD |
| 3647 | uint32_t wait_for_dw1_ready : 1; // MAC AI is waiting for MAC DPU to send dw1_ready to WD |
| 3648 | uint32_t acc_buf_sel_ai : 1; // Currently used AccBuf interface in MAC AI |
| 3649 | uint32_t wait_for_acc0_ready : 1; // MAC AI is waiting for acc0_ready from AO |
| 3650 | uint32_t wait_for_acc1_ready : 1; // MAC AI is waiting for acc1_ready from AO |
| 3651 | uint32_t acc_buf_sel_aa : 1; // Currently used AccBuf interface in MAC ADDER_ARRAY |
| 3652 | uint32_t acc0_valid : 1; // MAC outgoing value of acc0_valid |
| 3653 | uint32_t acc1_valid : 1; // MAC outgoing value of acc1_valid |
| 3654 | uint32_t reserved0 : 1; |
| 3655 | uint32_t events : 11; // Mapped to MAC events described in Appendix A |
| 3656 | uint32_t reserved1 : 5; |
| 3657 | }; |
| 3658 | uint32_t word; |
| 3659 | }; |
| 3660 | #else |
| 3661 | private: |
| 3662 | uint32_t word0; |
| 3663 | |
| 3664 | public: |
| 3665 | CONSTEXPR mac_status_r() : word0(0) {} |
| 3666 | CONSTEXPR mac_status_r(uint32_t init) : word0(init) {} |
| 3667 | CONSTEXPR void operator=(uint32_t value) |
| 3668 | { |
| 3669 | word0 = value; |
| 3670 | } |
| 3671 | void operator=(uint32_t value) volatile |
| 3672 | { |
| 3673 | word0 = value; |
| 3674 | } |
| 3675 | CONSTEXPR operator uint32_t() |
| 3676 | { |
| 3677 | return word0; |
| 3678 | } |
| 3679 | operator uint32_t() volatile |
| 3680 | { |
| 3681 | return word0; |
| 3682 | } |
| 3683 | mac_status_r copy() volatile |
| 3684 | { |
| 3685 | return *this; |
| 3686 | } |
| 3687 | CONSTEXPR uint32_t get_block_cfg_valid() const |
| 3688 | { |
| 3689 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 3690 | return value; |
| 3691 | } |
| 3692 | uint32_t get_block_cfg_valid() const volatile |
| 3693 | { |
| 3694 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 3695 | return value; |
| 3696 | } |
| 3697 | CONSTEXPR mac_status_r &set_block_cfg_valid(uint32_t value) |
| 3698 | { |
| 3699 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 3700 | return *this; |
| 3701 | } |
| 3702 | CONSTEXPR uint32_t get_trav_en() const |
| 3703 | { |
| 3704 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 3705 | return value; |
| 3706 | } |
| 3707 | uint32_t get_trav_en() const volatile |
| 3708 | { |
| 3709 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 3710 | return value; |
| 3711 | } |
| 3712 | CONSTEXPR mac_status_r &set_trav_en(uint32_t value) |
| 3713 | { |
| 3714 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 3715 | return *this; |
| 3716 | } |
| 3717 | CONSTEXPR uint32_t get_wait_for_ib() const |
| 3718 | { |
| 3719 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 3720 | return value; |
| 3721 | } |
| 3722 | uint32_t get_wait_for_ib() const volatile |
| 3723 | { |
| 3724 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 3725 | return value; |
| 3726 | } |
| 3727 | CONSTEXPR mac_status_r &set_wait_for_ib(uint32_t value) |
| 3728 | { |
| 3729 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 3730 | return *this; |
| 3731 | } |
| 3732 | CONSTEXPR uint32_t get_wait_for_acc_buf() const |
| 3733 | { |
| 3734 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 3735 | return value; |
| 3736 | } |
| 3737 | uint32_t get_wait_for_acc_buf() const volatile |
| 3738 | { |
| 3739 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 3740 | return value; |
| 3741 | } |
| 3742 | CONSTEXPR mac_status_r &set_wait_for_acc_buf(uint32_t value) |
| 3743 | { |
| 3744 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 3745 | return *this; |
| 3746 | } |
| 3747 | CONSTEXPR uint32_t get_wait_for_weights() const |
| 3748 | { |
| 3749 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 3750 | return value; |
| 3751 | } |
| 3752 | uint32_t get_wait_for_weights() const volatile |
| 3753 | { |
| 3754 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 3755 | return value; |
| 3756 | } |
| 3757 | CONSTEXPR mac_status_r &set_wait_for_weights(uint32_t value) |
| 3758 | { |
| 3759 | word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4); |
| 3760 | return *this; |
| 3761 | } |
| 3762 | CONSTEXPR uint32_t get_stall_stripe() const |
| 3763 | { |
| 3764 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 3765 | return value; |
| 3766 | } |
| 3767 | uint32_t get_stall_stripe() const volatile |
| 3768 | { |
| 3769 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 3770 | return value; |
| 3771 | } |
| 3772 | CONSTEXPR mac_status_r &set_stall_stripe(uint32_t value) |
| 3773 | { |
| 3774 | word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5); |
| 3775 | return *this; |
| 3776 | } |
| 3777 | CONSTEXPR uint32_t get_dw_sel() const |
| 3778 | { |
| 3779 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 3780 | return value; |
| 3781 | } |
| 3782 | uint32_t get_dw_sel() const volatile |
| 3783 | { |
| 3784 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 3785 | return value; |
| 3786 | } |
| 3787 | CONSTEXPR mac_status_r &set_dw_sel(uint32_t value) |
| 3788 | { |
| 3789 | word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6); |
| 3790 | return *this; |
| 3791 | } |
| 3792 | CONSTEXPR uint32_t get_wait_for_dw0_ready() const |
| 3793 | { |
| 3794 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 3795 | return value; |
| 3796 | } |
| 3797 | uint32_t get_wait_for_dw0_ready() const volatile |
| 3798 | { |
| 3799 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 3800 | return value; |
| 3801 | } |
| 3802 | CONSTEXPR mac_status_r &set_wait_for_dw0_ready(uint32_t value) |
| 3803 | { |
| 3804 | word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7); |
| 3805 | return *this; |
| 3806 | } |
| 3807 | CONSTEXPR uint32_t get_wait_for_dw1_ready() const |
| 3808 | { |
| 3809 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8)); |
| 3810 | return value; |
| 3811 | } |
| 3812 | uint32_t get_wait_for_dw1_ready() const volatile |
| 3813 | { |
| 3814 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8)); |
| 3815 | return value; |
| 3816 | } |
| 3817 | CONSTEXPR mac_status_r &set_wait_for_dw1_ready(uint32_t value) |
| 3818 | { |
| 3819 | word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8); |
| 3820 | return *this; |
| 3821 | } |
| 3822 | CONSTEXPR uint32_t get_acc_buf_sel_ai() const |
| 3823 | { |
| 3824 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9)); |
| 3825 | return value; |
| 3826 | } |
| 3827 | uint32_t get_acc_buf_sel_ai() const volatile |
| 3828 | { |
| 3829 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9)); |
| 3830 | return value; |
| 3831 | } |
| 3832 | CONSTEXPR mac_status_r &set_acc_buf_sel_ai(uint32_t value) |
| 3833 | { |
| 3834 | word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9); |
| 3835 | return *this; |
| 3836 | } |
| 3837 | CONSTEXPR uint32_t get_wait_for_acc0_ready() const |
| 3838 | { |
| 3839 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 3840 | return value; |
| 3841 | } |
| 3842 | uint32_t get_wait_for_acc0_ready() const volatile |
| 3843 | { |
| 3844 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 3845 | return value; |
| 3846 | } |
| 3847 | CONSTEXPR mac_status_r &set_wait_for_acc0_ready(uint32_t value) |
| 3848 | { |
| 3849 | word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10); |
| 3850 | return *this; |
| 3851 | } |
| 3852 | CONSTEXPR uint32_t get_wait_for_acc1_ready() const |
| 3853 | { |
| 3854 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11)); |
| 3855 | return value; |
| 3856 | } |
| 3857 | uint32_t get_wait_for_acc1_ready() const volatile |
| 3858 | { |
| 3859 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11)); |
| 3860 | return value; |
| 3861 | } |
| 3862 | CONSTEXPR mac_status_r &set_wait_for_acc1_ready(uint32_t value) |
| 3863 | { |
| 3864 | word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11); |
| 3865 | return *this; |
| 3866 | } |
| 3867 | CONSTEXPR uint32_t get_acc_buf_sel_aa() const |
| 3868 | { |
| 3869 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12)); |
| 3870 | return value; |
| 3871 | } |
| 3872 | uint32_t get_acc_buf_sel_aa() const volatile |
| 3873 | { |
| 3874 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12)); |
| 3875 | return value; |
| 3876 | } |
| 3877 | CONSTEXPR mac_status_r &set_acc_buf_sel_aa(uint32_t value) |
| 3878 | { |
| 3879 | word0 = (((~((1U << 1) - 1)) << 12) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 12); |
| 3880 | return *this; |
| 3881 | } |
| 3882 | CONSTEXPR uint32_t get_acc0_valid() const |
| 3883 | { |
| 3884 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13)); |
| 3885 | return value; |
| 3886 | } |
| 3887 | uint32_t get_acc0_valid() const volatile |
| 3888 | { |
| 3889 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13)); |
| 3890 | return value; |
| 3891 | } |
| 3892 | CONSTEXPR mac_status_r &set_acc0_valid(uint32_t value) |
| 3893 | { |
| 3894 | word0 = (((~((1U << 1) - 1)) << 13) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 13); |
| 3895 | return *this; |
| 3896 | } |
| 3897 | CONSTEXPR uint32_t get_acc1_valid() const |
| 3898 | { |
| 3899 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14)); |
| 3900 | return value; |
| 3901 | } |
| 3902 | uint32_t get_acc1_valid() const volatile |
| 3903 | { |
| 3904 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14)); |
| 3905 | return value; |
| 3906 | } |
| 3907 | CONSTEXPR mac_status_r &set_acc1_valid(uint32_t value) |
| 3908 | { |
| 3909 | word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14); |
| 3910 | return *this; |
| 3911 | } |
| 3912 | CONSTEXPR uint32_t get_events() const |
| 3913 | { |
| 3914 | uint32_t value = static_cast<uint32_t>(((1U << 11) - 1) & (word0 >> 16)); |
| 3915 | return value; |
| 3916 | } |
| 3917 | uint32_t get_events() const volatile |
| 3918 | { |
| 3919 | uint32_t value = static_cast<uint32_t>(((1U << 11) - 1) & (word0 >> 16)); |
| 3920 | return value; |
| 3921 | } |
| 3922 | CONSTEXPR mac_status_r &set_events(uint32_t value) |
| 3923 | { |
| 3924 | word0 = (((~((1U << 11) - 1)) << 16) & word0) | ((((1U << 11) - 1) & static_cast<uint32_t>(value)) << 16); |
| 3925 | return *this; |
| 3926 | } |
| 3927 | #endif |
| 3928 | }; |
| 3929 | |
| 3930 | // ao_status_r - AO_STATUS |
| 3931 | struct ao_status_r |
| 3932 | { |
| 3933 | #ifndef __cplusplus |
| 3934 | union |
| 3935 | { |
| 3936 | struct |
| 3937 | { |
| 3938 | uint32_t cmd_sbw_valid : 1; // Block command to shared buffer write module is valid |
| 3939 | uint32_t cmd_act_valid : 1; // Block command to activation function module is valid |
| 3940 | uint32_t cmd_ctl_valid : 1; // Block command to control module is valid |
| 3941 | uint32_t cmd_scl_valid : 1; // Block command to scale module is valid |
| 3942 | uint32_t cmd_sbr_valid : 1; // Block command to shared buffer read module is valid |
| 3943 | uint32_t cmd_ofm_valid : 1; // Block command to ofm parameter module is valid |
| 3944 | uint32_t blk_cmd_ready : 1; // Ready to accept block command |
| 3945 | uint32_t blk_cmd_valid : 1; // Block command from CC is valid |
| 3946 | uint32_t reserved0 : 8; |
| 3947 | uint32_t events : 8; // Mapped to AO events described in Appendix A |
| 3948 | uint32_t reserved1 : 8; |
| 3949 | }; |
| 3950 | uint32_t word; |
| 3951 | }; |
| 3952 | #else |
| 3953 | private: |
| 3954 | uint32_t word0; |
| 3955 | |
| 3956 | public: |
| 3957 | CONSTEXPR ao_status_r() : word0(0) {} |
| 3958 | CONSTEXPR ao_status_r(uint32_t init) : word0(init) {} |
| 3959 | CONSTEXPR void operator=(uint32_t value) |
| 3960 | { |
| 3961 | word0 = value; |
| 3962 | } |
| 3963 | void operator=(uint32_t value) volatile |
| 3964 | { |
| 3965 | word0 = value; |
| 3966 | } |
| 3967 | CONSTEXPR operator uint32_t() |
| 3968 | { |
| 3969 | return word0; |
| 3970 | } |
| 3971 | operator uint32_t() volatile |
| 3972 | { |
| 3973 | return word0; |
| 3974 | } |
| 3975 | ao_status_r copy() volatile |
| 3976 | { |
| 3977 | return *this; |
| 3978 | } |
| 3979 | CONSTEXPR uint32_t get_cmd_sbw_valid() const |
| 3980 | { |
| 3981 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 3982 | return value; |
| 3983 | } |
| 3984 | uint32_t get_cmd_sbw_valid() const volatile |
| 3985 | { |
| 3986 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 3987 | return value; |
| 3988 | } |
| 3989 | CONSTEXPR ao_status_r &set_cmd_sbw_valid(uint32_t value) |
| 3990 | { |
| 3991 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 3992 | return *this; |
| 3993 | } |
| 3994 | CONSTEXPR uint32_t get_cmd_act_valid() const |
| 3995 | { |
| 3996 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 3997 | return value; |
| 3998 | } |
| 3999 | uint32_t get_cmd_act_valid() const volatile |
| 4000 | { |
| 4001 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 4002 | return value; |
| 4003 | } |
| 4004 | CONSTEXPR ao_status_r &set_cmd_act_valid(uint32_t value) |
| 4005 | { |
| 4006 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 4007 | return *this; |
| 4008 | } |
| 4009 | CONSTEXPR uint32_t get_cmd_ctl_valid() const |
| 4010 | { |
| 4011 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 4012 | return value; |
| 4013 | } |
| 4014 | uint32_t get_cmd_ctl_valid() const volatile |
| 4015 | { |
| 4016 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 4017 | return value; |
| 4018 | } |
| 4019 | CONSTEXPR ao_status_r &set_cmd_ctl_valid(uint32_t value) |
| 4020 | { |
| 4021 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 4022 | return *this; |
| 4023 | } |
| 4024 | CONSTEXPR uint32_t get_cmd_scl_valid() const |
| 4025 | { |
| 4026 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 4027 | return value; |
| 4028 | } |
| 4029 | uint32_t get_cmd_scl_valid() const volatile |
| 4030 | { |
| 4031 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 4032 | return value; |
| 4033 | } |
| 4034 | CONSTEXPR ao_status_r &set_cmd_scl_valid(uint32_t value) |
| 4035 | { |
| 4036 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 4037 | return *this; |
| 4038 | } |
| 4039 | CONSTEXPR uint32_t get_cmd_sbr_valid() const |
| 4040 | { |
| 4041 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 4042 | return value; |
| 4043 | } |
| 4044 | uint32_t get_cmd_sbr_valid() const volatile |
| 4045 | { |
| 4046 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 4047 | return value; |
| 4048 | } |
| 4049 | CONSTEXPR ao_status_r &set_cmd_sbr_valid(uint32_t value) |
| 4050 | { |
| 4051 | word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4); |
| 4052 | return *this; |
| 4053 | } |
| 4054 | CONSTEXPR uint32_t get_cmd_ofm_valid() const |
| 4055 | { |
| 4056 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 4057 | return value; |
| 4058 | } |
| 4059 | uint32_t get_cmd_ofm_valid() const volatile |
| 4060 | { |
| 4061 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 4062 | return value; |
| 4063 | } |
| 4064 | CONSTEXPR ao_status_r &set_cmd_ofm_valid(uint32_t value) |
| 4065 | { |
| 4066 | word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5); |
| 4067 | return *this; |
| 4068 | } |
| 4069 | CONSTEXPR uint32_t get_blk_cmd_ready() const |
| 4070 | { |
| 4071 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 4072 | return value; |
| 4073 | } |
| 4074 | uint32_t get_blk_cmd_ready() const volatile |
| 4075 | { |
| 4076 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 4077 | return value; |
| 4078 | } |
| 4079 | CONSTEXPR ao_status_r &set_blk_cmd_ready(uint32_t value) |
| 4080 | { |
| 4081 | word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6); |
| 4082 | return *this; |
| 4083 | } |
| 4084 | CONSTEXPR uint32_t get_blk_cmd_valid() const |
| 4085 | { |
| 4086 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 4087 | return value; |
| 4088 | } |
| 4089 | uint32_t get_blk_cmd_valid() const volatile |
| 4090 | { |
| 4091 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 4092 | return value; |
| 4093 | } |
| 4094 | CONSTEXPR ao_status_r &set_blk_cmd_valid(uint32_t value) |
| 4095 | { |
| 4096 | word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7); |
| 4097 | return *this; |
| 4098 | } |
| 4099 | CONSTEXPR uint32_t get_events() const |
| 4100 | { |
| 4101 | uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 16)); |
| 4102 | return value; |
| 4103 | } |
| 4104 | uint32_t get_events() const volatile |
| 4105 | { |
| 4106 | uint32_t value = static_cast<uint32_t>(((1U << 8) - 1) & (word0 >> 16)); |
| 4107 | return value; |
| 4108 | } |
| 4109 | CONSTEXPR ao_status_r &set_events(uint32_t value) |
| 4110 | { |
| 4111 | word0 = (((~((1U << 8) - 1)) << 16) & word0) | ((((1U << 8) - 1) & static_cast<uint32_t>(value)) << 16); |
| 4112 | return *this; |
| 4113 | } |
| 4114 | #endif |
| 4115 | }; |
| 4116 | |
| 4117 | // dma_status0_r - DMA_STATUS0 |
| 4118 | struct dma_status0_r |
| 4119 | { |
| 4120 | #ifndef __cplusplus |
| 4121 | union |
| 4122 | { |
| 4123 | struct |
| 4124 | { |
| 4125 | uint32_t cmd_idle : 1; // When this bit is high means that the CMD block is not busy in generating addresses |
| 4126 | // for a CMD job |
| 4127 | uint32_t ifm_idle : 1; // When this bit is high means that there are no ongoing IFM jobs |
| 4128 | uint32_t wgt_idle_c0 : 1; // When this bit is high means that the WGT block is not busy in generating |
| 4129 | // addresses for a WGT job |
| 4130 | uint32_t bas_idle_c0 : 1; // When this bit is high means that the BAS block is not busy in generating |
| 4131 | // addresses for a BAS job |
| 4132 | uint32_t m2m_idle : 1; // When this bit is high means that there are no ongoing M2M jobs |
| 4133 | uint32_t ofm_idle : 1; // When this bit is high means that there are no ongoing OFM jobs |
| 4134 | uint32_t halt_req : 1; // CPM has requested to HALT AXI bus before soft reset |
| 4135 | uint32_t halt_ack : 1; // DMA is in condition to halt the AXI bus since there are no pending transactions |
| 4136 | uint32_t pause_req : 1; // CC has requested to pause the AXI |
| 4137 | uint32_t pause_ack : 1; // DMA is in condition to pause the AXI bus since there are no pending transactions |
| 4138 | uint32_t ib0_ai_valid_c0 : 1; // Data for AI to be read in IFM input buffer 0 - Core 0 |
| 4139 | uint32_t ib0_ai_ready_c0 : 1; // Data consumed from AI in IFM input buffer 0 - Core 0 |
| 4140 | uint32_t ib1_ai_valid_c0 : 1; // Data for AI to be read in IFM input buffer 1 - Core 0 |
| 4141 | uint32_t ib1_ai_ready_c0 : 1; // Data consumed from AI in IFM input buffer 1 - Core 0 |
| 4142 | uint32_t ib0_ao_valid_c0 : 1; // Data for AO to be read in IFM input buffer 0 - Core 0 |
| 4143 | uint32_t ib0_ao_ready_c0 : 1; // Data consumed from AO in IFM input buffer 0 - Core 0 |
| 4144 | uint32_t ib1_ao_valid_c0 : 1; // Data for AO to be read in IFM input buffer 0 - Core 0 |
| 4145 | uint32_t ib1_ao_ready_c0 : 1; // Data consumed from AO in IFM input buffer 1 - Core 0 |
| 4146 | uint32_t ob0_valid_c0 : 1; // Data for DMA ready to be consumed in OFM output buffer 0 - Core 0 |
| 4147 | uint32_t ob0_ready_c0 : 1; // Data consumed from DMA in OFM output buffer 0 - Core 0 |
| 4148 | uint32_t ob1_valid_c0 : 1; // Data for DMA ready to be consumed in OFM output buffer 1 - Core 0 |
| 4149 | uint32_t ob1_ready_c0 : 1; // Data consumed from DMA in OFM output buffer 1 - Core 0 |
| 4150 | uint32_t cmd_valid : 1; // New command word for CC to be consumed |
| 4151 | uint32_t cmd_ready : 1; // command word consumed by CC |
| 4152 | uint32_t wd_bitstream_valid_c0 : 1; // New weight word for WD to be consumed - Core 0 |
| 4153 | uint32_t wd_bitstream_ready_c0 : 1; // Weight word consumed by WD - Core 0 |
| 4154 | uint32_t bs_bitstream_valid_c0 : 1; // New BaS word for AO to be consumed - Core 0 |
| 4155 | uint32_t bs_bitstream_ready_c0 : 1; // BaS word consumed by AO - Core 0 |
| 4156 | uint32_t axi0_ar_stalled : 1; // Read transfer request stalled on arready low AXI0 (due to memory system) |
| 4157 | uint32_t axi0_rd_limit_stall : 1; // Read stalled due to one AXI0 limit counter being reached |
| 4158 | uint32_t axi0_aw_stalled : 1; // Write transfer request stalled on awready low AXI0 (due to memory system) |
| 4159 | uint32_t axi0_w_stalled : 1; // Write transfer stalled on awready low AXI0 (due to memory system) |
| 4160 | }; |
| 4161 | uint32_t word; |
| 4162 | }; |
| 4163 | #else |
| 4164 | private: |
| 4165 | uint32_t word0; |
| 4166 | |
| 4167 | public: |
| 4168 | CONSTEXPR dma_status0_r() : word0(0) {} |
| 4169 | CONSTEXPR dma_status0_r(uint32_t init) : word0(init) {} |
| 4170 | CONSTEXPR void operator=(uint32_t value) |
| 4171 | { |
| 4172 | word0 = value; |
| 4173 | } |
| 4174 | void operator=(uint32_t value) volatile |
| 4175 | { |
| 4176 | word0 = value; |
| 4177 | } |
| 4178 | CONSTEXPR operator uint32_t() |
| 4179 | { |
| 4180 | return word0; |
| 4181 | } |
| 4182 | operator uint32_t() volatile |
| 4183 | { |
| 4184 | return word0; |
| 4185 | } |
| 4186 | dma_status0_r copy() volatile |
| 4187 | { |
| 4188 | return *this; |
| 4189 | } |
| 4190 | CONSTEXPR uint32_t get_cmd_idle() const |
| 4191 | { |
| 4192 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 4193 | return value; |
| 4194 | } |
| 4195 | uint32_t get_cmd_idle() const volatile |
| 4196 | { |
| 4197 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 4198 | return value; |
| 4199 | } |
| 4200 | CONSTEXPR dma_status0_r &set_cmd_idle(uint32_t value) |
| 4201 | { |
| 4202 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 4203 | return *this; |
| 4204 | } |
| 4205 | CONSTEXPR uint32_t get_ifm_idle() const |
| 4206 | { |
| 4207 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 4208 | return value; |
| 4209 | } |
| 4210 | uint32_t get_ifm_idle() const volatile |
| 4211 | { |
| 4212 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 4213 | return value; |
| 4214 | } |
| 4215 | CONSTEXPR dma_status0_r &set_ifm_idle(uint32_t value) |
| 4216 | { |
| 4217 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 4218 | return *this; |
| 4219 | } |
| 4220 | CONSTEXPR uint32_t get_wgt_idle_c0() const |
| 4221 | { |
| 4222 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 4223 | return value; |
| 4224 | } |
| 4225 | uint32_t get_wgt_idle_c0() const volatile |
| 4226 | { |
| 4227 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 4228 | return value; |
| 4229 | } |
| 4230 | CONSTEXPR dma_status0_r &set_wgt_idle_c0(uint32_t value) |
| 4231 | { |
| 4232 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 4233 | return *this; |
| 4234 | } |
| 4235 | CONSTEXPR uint32_t get_bas_idle_c0() const |
| 4236 | { |
| 4237 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 4238 | return value; |
| 4239 | } |
| 4240 | uint32_t get_bas_idle_c0() const volatile |
| 4241 | { |
| 4242 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 4243 | return value; |
| 4244 | } |
| 4245 | CONSTEXPR dma_status0_r &set_bas_idle_c0(uint32_t value) |
| 4246 | { |
| 4247 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 4248 | return *this; |
| 4249 | } |
| 4250 | CONSTEXPR uint32_t get_m2m_idle() const |
| 4251 | { |
| 4252 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 4253 | return value; |
| 4254 | } |
| 4255 | uint32_t get_m2m_idle() const volatile |
| 4256 | { |
| 4257 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 4258 | return value; |
| 4259 | } |
| 4260 | CONSTEXPR dma_status0_r &set_m2m_idle(uint32_t value) |
| 4261 | { |
| 4262 | word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4); |
| 4263 | return *this; |
| 4264 | } |
| 4265 | CONSTEXPR uint32_t get_ofm_idle() const |
| 4266 | { |
| 4267 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 4268 | return value; |
| 4269 | } |
| 4270 | uint32_t get_ofm_idle() const volatile |
| 4271 | { |
| 4272 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 4273 | return value; |
| 4274 | } |
| 4275 | CONSTEXPR dma_status0_r &set_ofm_idle(uint32_t value) |
| 4276 | { |
| 4277 | word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5); |
| 4278 | return *this; |
| 4279 | } |
| 4280 | CONSTEXPR uint32_t get_halt_req() const |
| 4281 | { |
| 4282 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 4283 | return value; |
| 4284 | } |
| 4285 | uint32_t get_halt_req() const volatile |
| 4286 | { |
| 4287 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 4288 | return value; |
| 4289 | } |
| 4290 | CONSTEXPR dma_status0_r &set_halt_req(uint32_t value) |
| 4291 | { |
| 4292 | word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6); |
| 4293 | return *this; |
| 4294 | } |
| 4295 | CONSTEXPR uint32_t get_halt_ack() const |
| 4296 | { |
| 4297 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 4298 | return value; |
| 4299 | } |
| 4300 | uint32_t get_halt_ack() const volatile |
| 4301 | { |
| 4302 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 4303 | return value; |
| 4304 | } |
| 4305 | CONSTEXPR dma_status0_r &set_halt_ack(uint32_t value) |
| 4306 | { |
| 4307 | word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7); |
| 4308 | return *this; |
| 4309 | } |
| 4310 | CONSTEXPR uint32_t get_pause_req() const |
| 4311 | { |
| 4312 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8)); |
| 4313 | return value; |
| 4314 | } |
| 4315 | uint32_t get_pause_req() const volatile |
| 4316 | { |
| 4317 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8)); |
| 4318 | return value; |
| 4319 | } |
| 4320 | CONSTEXPR dma_status0_r &set_pause_req(uint32_t value) |
| 4321 | { |
| 4322 | word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8); |
| 4323 | return *this; |
| 4324 | } |
| 4325 | CONSTEXPR uint32_t get_pause_ack() const |
| 4326 | { |
| 4327 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9)); |
| 4328 | return value; |
| 4329 | } |
| 4330 | uint32_t get_pause_ack() const volatile |
| 4331 | { |
| 4332 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9)); |
| 4333 | return value; |
| 4334 | } |
| 4335 | CONSTEXPR dma_status0_r &set_pause_ack(uint32_t value) |
| 4336 | { |
| 4337 | word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9); |
| 4338 | return *this; |
| 4339 | } |
| 4340 | CONSTEXPR uint32_t get_ib0_ai_valid_c0() const |
| 4341 | { |
| 4342 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 4343 | return value; |
| 4344 | } |
| 4345 | uint32_t get_ib0_ai_valid_c0() const volatile |
| 4346 | { |
| 4347 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 4348 | return value; |
| 4349 | } |
| 4350 | CONSTEXPR dma_status0_r &set_ib0_ai_valid_c0(uint32_t value) |
| 4351 | { |
| 4352 | word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10); |
| 4353 | return *this; |
| 4354 | } |
| 4355 | CONSTEXPR uint32_t get_ib0_ai_ready_c0() const |
| 4356 | { |
| 4357 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11)); |
| 4358 | return value; |
| 4359 | } |
| 4360 | uint32_t get_ib0_ai_ready_c0() const volatile |
| 4361 | { |
| 4362 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11)); |
| 4363 | return value; |
| 4364 | } |
| 4365 | CONSTEXPR dma_status0_r &set_ib0_ai_ready_c0(uint32_t value) |
| 4366 | { |
| 4367 | word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11); |
| 4368 | return *this; |
| 4369 | } |
| 4370 | CONSTEXPR uint32_t get_ib1_ai_valid_c0() const |
| 4371 | { |
| 4372 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12)); |
| 4373 | return value; |
| 4374 | } |
| 4375 | uint32_t get_ib1_ai_valid_c0() const volatile |
| 4376 | { |
| 4377 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12)); |
| 4378 | return value; |
| 4379 | } |
| 4380 | CONSTEXPR dma_status0_r &set_ib1_ai_valid_c0(uint32_t value) |
| 4381 | { |
| 4382 | word0 = (((~((1U << 1) - 1)) << 12) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 12); |
| 4383 | return *this; |
| 4384 | } |
| 4385 | CONSTEXPR uint32_t get_ib1_ai_ready_c0() const |
| 4386 | { |
| 4387 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13)); |
| 4388 | return value; |
| 4389 | } |
| 4390 | uint32_t get_ib1_ai_ready_c0() const volatile |
| 4391 | { |
| 4392 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13)); |
| 4393 | return value; |
| 4394 | } |
| 4395 | CONSTEXPR dma_status0_r &set_ib1_ai_ready_c0(uint32_t value) |
| 4396 | { |
| 4397 | word0 = (((~((1U << 1) - 1)) << 13) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 13); |
| 4398 | return *this; |
| 4399 | } |
| 4400 | CONSTEXPR uint32_t get_ib0_ao_valid_c0() const |
| 4401 | { |
| 4402 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14)); |
| 4403 | return value; |
| 4404 | } |
| 4405 | uint32_t get_ib0_ao_valid_c0() const volatile |
| 4406 | { |
| 4407 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14)); |
| 4408 | return value; |
| 4409 | } |
| 4410 | CONSTEXPR dma_status0_r &set_ib0_ao_valid_c0(uint32_t value) |
| 4411 | { |
| 4412 | word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14); |
| 4413 | return *this; |
| 4414 | } |
| 4415 | CONSTEXPR uint32_t get_ib0_ao_ready_c0() const |
| 4416 | { |
| 4417 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15)); |
| 4418 | return value; |
| 4419 | } |
| 4420 | uint32_t get_ib0_ao_ready_c0() const volatile |
| 4421 | { |
| 4422 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15)); |
| 4423 | return value; |
| 4424 | } |
| 4425 | CONSTEXPR dma_status0_r &set_ib0_ao_ready_c0(uint32_t value) |
| 4426 | { |
| 4427 | word0 = (((~((1U << 1) - 1)) << 15) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 15); |
| 4428 | return *this; |
| 4429 | } |
| 4430 | CONSTEXPR uint32_t get_ib1_ao_valid_c0() const |
| 4431 | { |
| 4432 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16)); |
| 4433 | return value; |
| 4434 | } |
| 4435 | uint32_t get_ib1_ao_valid_c0() const volatile |
| 4436 | { |
| 4437 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16)); |
| 4438 | return value; |
| 4439 | } |
| 4440 | CONSTEXPR dma_status0_r &set_ib1_ao_valid_c0(uint32_t value) |
| 4441 | { |
| 4442 | word0 = (((~((1U << 1) - 1)) << 16) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 16); |
| 4443 | return *this; |
| 4444 | } |
| 4445 | CONSTEXPR uint32_t get_ib1_ao_ready_c0() const |
| 4446 | { |
| 4447 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17)); |
| 4448 | return value; |
| 4449 | } |
| 4450 | uint32_t get_ib1_ao_ready_c0() const volatile |
| 4451 | { |
| 4452 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17)); |
| 4453 | return value; |
| 4454 | } |
| 4455 | CONSTEXPR dma_status0_r &set_ib1_ao_ready_c0(uint32_t value) |
| 4456 | { |
| 4457 | word0 = (((~((1U << 1) - 1)) << 17) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 17); |
| 4458 | return *this; |
| 4459 | } |
| 4460 | CONSTEXPR uint32_t get_ob0_valid_c0() const |
| 4461 | { |
| 4462 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18)); |
| 4463 | return value; |
| 4464 | } |
| 4465 | uint32_t get_ob0_valid_c0() const volatile |
| 4466 | { |
| 4467 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18)); |
| 4468 | return value; |
| 4469 | } |
| 4470 | CONSTEXPR dma_status0_r &set_ob0_valid_c0(uint32_t value) |
| 4471 | { |
| 4472 | word0 = (((~((1U << 1) - 1)) << 18) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 18); |
| 4473 | return *this; |
| 4474 | } |
| 4475 | CONSTEXPR uint32_t get_ob0_ready_c0() const |
| 4476 | { |
| 4477 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19)); |
| 4478 | return value; |
| 4479 | } |
| 4480 | uint32_t get_ob0_ready_c0() const volatile |
| 4481 | { |
| 4482 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19)); |
| 4483 | return value; |
| 4484 | } |
| 4485 | CONSTEXPR dma_status0_r &set_ob0_ready_c0(uint32_t value) |
| 4486 | { |
| 4487 | word0 = (((~((1U << 1) - 1)) << 19) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 19); |
| 4488 | return *this; |
| 4489 | } |
| 4490 | CONSTEXPR uint32_t get_ob1_valid_c0() const |
| 4491 | { |
| 4492 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20)); |
| 4493 | return value; |
| 4494 | } |
| 4495 | uint32_t get_ob1_valid_c0() const volatile |
| 4496 | { |
| 4497 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20)); |
| 4498 | return value; |
| 4499 | } |
| 4500 | CONSTEXPR dma_status0_r &set_ob1_valid_c0(uint32_t value) |
| 4501 | { |
| 4502 | word0 = (((~((1U << 1) - 1)) << 20) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 20); |
| 4503 | return *this; |
| 4504 | } |
| 4505 | CONSTEXPR uint32_t get_ob1_ready_c0() const |
| 4506 | { |
| 4507 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21)); |
| 4508 | return value; |
| 4509 | } |
| 4510 | uint32_t get_ob1_ready_c0() const volatile |
| 4511 | { |
| 4512 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21)); |
| 4513 | return value; |
| 4514 | } |
| 4515 | CONSTEXPR dma_status0_r &set_ob1_ready_c0(uint32_t value) |
| 4516 | { |
| 4517 | word0 = (((~((1U << 1) - 1)) << 21) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 21); |
| 4518 | return *this; |
| 4519 | } |
| 4520 | CONSTEXPR uint32_t get_cmd_valid() const |
| 4521 | { |
| 4522 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22)); |
| 4523 | return value; |
| 4524 | } |
| 4525 | uint32_t get_cmd_valid() const volatile |
| 4526 | { |
| 4527 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22)); |
| 4528 | return value; |
| 4529 | } |
| 4530 | CONSTEXPR dma_status0_r &set_cmd_valid(uint32_t value) |
| 4531 | { |
| 4532 | word0 = (((~((1U << 1) - 1)) << 22) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 22); |
| 4533 | return *this; |
| 4534 | } |
| 4535 | CONSTEXPR uint32_t get_cmd_ready() const |
| 4536 | { |
| 4537 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23)); |
| 4538 | return value; |
| 4539 | } |
| 4540 | uint32_t get_cmd_ready() const volatile |
| 4541 | { |
| 4542 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23)); |
| 4543 | return value; |
| 4544 | } |
| 4545 | CONSTEXPR dma_status0_r &set_cmd_ready(uint32_t value) |
| 4546 | { |
| 4547 | word0 = (((~((1U << 1) - 1)) << 23) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 23); |
| 4548 | return *this; |
| 4549 | } |
| 4550 | CONSTEXPR uint32_t get_wd_bitstream_valid_c0() const |
| 4551 | { |
| 4552 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 24)); |
| 4553 | return value; |
| 4554 | } |
| 4555 | uint32_t get_wd_bitstream_valid_c0() const volatile |
| 4556 | { |
| 4557 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 24)); |
| 4558 | return value; |
| 4559 | } |
| 4560 | CONSTEXPR dma_status0_r &set_wd_bitstream_valid_c0(uint32_t value) |
| 4561 | { |
| 4562 | word0 = (((~((1U << 1) - 1)) << 24) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 24); |
| 4563 | return *this; |
| 4564 | } |
| 4565 | CONSTEXPR uint32_t get_wd_bitstream_ready_c0() const |
| 4566 | { |
| 4567 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 25)); |
| 4568 | return value; |
| 4569 | } |
| 4570 | uint32_t get_wd_bitstream_ready_c0() const volatile |
| 4571 | { |
| 4572 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 25)); |
| 4573 | return value; |
| 4574 | } |
| 4575 | CONSTEXPR dma_status0_r &set_wd_bitstream_ready_c0(uint32_t value) |
| 4576 | { |
| 4577 | word0 = (((~((1U << 1) - 1)) << 25) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 25); |
| 4578 | return *this; |
| 4579 | } |
| 4580 | CONSTEXPR uint32_t get_bs_bitstream_valid_c0() const |
| 4581 | { |
| 4582 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 26)); |
| 4583 | return value; |
| 4584 | } |
| 4585 | uint32_t get_bs_bitstream_valid_c0() const volatile |
| 4586 | { |
| 4587 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 26)); |
| 4588 | return value; |
| 4589 | } |
| 4590 | CONSTEXPR dma_status0_r &set_bs_bitstream_valid_c0(uint32_t value) |
| 4591 | { |
| 4592 | word0 = (((~((1U << 1) - 1)) << 26) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 26); |
| 4593 | return *this; |
| 4594 | } |
| 4595 | CONSTEXPR uint32_t get_bs_bitstream_ready_c0() const |
| 4596 | { |
| 4597 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 27)); |
| 4598 | return value; |
| 4599 | } |
| 4600 | uint32_t get_bs_bitstream_ready_c0() const volatile |
| 4601 | { |
| 4602 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 27)); |
| 4603 | return value; |
| 4604 | } |
| 4605 | CONSTEXPR dma_status0_r &set_bs_bitstream_ready_c0(uint32_t value) |
| 4606 | { |
| 4607 | word0 = (((~((1U << 1) - 1)) << 27) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 27); |
| 4608 | return *this; |
| 4609 | } |
| 4610 | CONSTEXPR uint32_t get_axi0_ar_stalled() const |
| 4611 | { |
| 4612 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 28)); |
| 4613 | return value; |
| 4614 | } |
| 4615 | uint32_t get_axi0_ar_stalled() const volatile |
| 4616 | { |
| 4617 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 28)); |
| 4618 | return value; |
| 4619 | } |
| 4620 | CONSTEXPR dma_status0_r &set_axi0_ar_stalled(uint32_t value) |
| 4621 | { |
| 4622 | word0 = (((~((1U << 1) - 1)) << 28) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 28); |
| 4623 | return *this; |
| 4624 | } |
| 4625 | CONSTEXPR uint32_t get_axi0_rd_limit_stall() const |
| 4626 | { |
| 4627 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 29)); |
| 4628 | return value; |
| 4629 | } |
| 4630 | uint32_t get_axi0_rd_limit_stall() const volatile |
| 4631 | { |
| 4632 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 29)); |
| 4633 | return value; |
| 4634 | } |
| 4635 | CONSTEXPR dma_status0_r &set_axi0_rd_limit_stall(uint32_t value) |
| 4636 | { |
| 4637 | word0 = (((~((1U << 1) - 1)) << 29) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 29); |
| 4638 | return *this; |
| 4639 | } |
| 4640 | CONSTEXPR uint32_t get_axi0_aw_stalled() const |
| 4641 | { |
| 4642 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 30)); |
| 4643 | return value; |
| 4644 | } |
| 4645 | uint32_t get_axi0_aw_stalled() const volatile |
| 4646 | { |
| 4647 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 30)); |
| 4648 | return value; |
| 4649 | } |
| 4650 | CONSTEXPR dma_status0_r &set_axi0_aw_stalled(uint32_t value) |
| 4651 | { |
| 4652 | word0 = (((~((1U << 1) - 1)) << 30) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 30); |
| 4653 | return *this; |
| 4654 | } |
| 4655 | CONSTEXPR uint32_t get_axi0_w_stalled() const |
| 4656 | { |
| 4657 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 4658 | return value; |
| 4659 | } |
| 4660 | uint32_t get_axi0_w_stalled() const volatile |
| 4661 | { |
| 4662 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 4663 | return value; |
| 4664 | } |
| 4665 | CONSTEXPR dma_status0_r &set_axi0_w_stalled(uint32_t value) |
| 4666 | { |
| 4667 | word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31); |
| 4668 | return *this; |
| 4669 | } |
| 4670 | #endif |
| 4671 | }; |
| 4672 | |
| 4673 | // dma_status1_r - DMA_STATUS1 |
| 4674 | struct dma_status1_r |
| 4675 | { |
| 4676 | #ifndef __cplusplus |
| 4677 | union |
| 4678 | { |
| 4679 | struct |
| 4680 | { |
| 4681 | uint32_t axi0_wr_limit_stall : 1; // Write stalled due to one AXI0 limit counter being reached |
| 4682 | uint32_t axi1_ar_stalled : 1; // Read transfer request stalled on arready low AXI1 (due to memory system) |
| 4683 | uint32_t axi1_rd_limit_stall : 1; // Read stalled due to one AXI1 limit counter being reached |
| 4684 | uint32_t axi1_wr_stalled : 1; // Write transfer request stalled on awready low AXI1 (due to memory system) |
| 4685 | uint32_t axi1_w_stalled : 1; // Write transfer stalled on wready low AXI1 (due to memory system) |
| 4686 | uint32_t axi1_wr_limit_stall : 1; // Write stalled due to one AXI1 limit counter being reached |
| 4687 | uint32_t wgt_idle_c1 : 1; // When this bit is high means that the WGT block is not busy in generating |
| 4688 | // addresses for a WGT job |
| 4689 | uint32_t bas_idle_c1 : 1; // When this bit is high means that the BAS block is not busy in generating |
| 4690 | // addresses for a BAS job |
| 4691 | uint32_t ib0_ai_valid_c1 : 1; // Data for AI to be read in IFM input buffer 0 - Core 1 |
| 4692 | uint32_t ib0_ai_ready_c1 : 1; // Data consumed from AI in IFM input buffer 0 - Core 1 |
| 4693 | uint32_t ib1_ai_valid_c1 : 1; // Data for AI to be read in IFM input buffer 1 - Core 1 |
| 4694 | uint32_t ib1_ai_ready_c1 : 1; // Data consumed from AI in IFM input buffer 1 - Core 1 |
| 4695 | uint32_t ib0_ao_valid_c1 : 1; // Data for AO to be read in IFM input buffer 0 - Core 1 |
| 4696 | uint32_t ib0_ao_ready_c1 : 1; // Data consumed from AO in IFM input buffer 0 - Core 1 |
| 4697 | uint32_t ib1_ao_valid_c1 : 1; // Data for AO to be read in IFM input buffer 0 - Core 1 |
| 4698 | uint32_t ib1_ao_ready_c1 : 1; // Data consumed from AO in IFM input buffer 1 - Core 1 |
| 4699 | uint32_t ob0_valid_c1 : 1; // Data for DMA ready to be consumed in OFM output buffer 0 - Core 1 |
| 4700 | uint32_t ob0_ready_c1 : 1; // Data consumed from DMA in OFM output buffer 0 - Core 1 |
| 4701 | uint32_t ob1_valid_c1 : 1; // Data for DMA ready to be consumed in OFM output buffer 1 - Core 1 |
| 4702 | uint32_t ob1_ready_c1 : 1; // Data consumed from DMA in OFM output buffer 1 - Core 1 |
| 4703 | uint32_t wd_bitstream_valid_c1 : 1; // New weight word for WD to be consumed - Core 1 |
| 4704 | uint32_t wd_bitstream_ready_c1 : 1; // Weight word consumed by WD - Core 1 |
| 4705 | uint32_t bs_bitstream_valid_c1 : 1; // New BaS word for AO to be consumed - Core 1 |
| 4706 | uint32_t bs_bitstream_ready_c1 : 1; // BaS word consumed by AO - Core 1 |
| 4707 | uint32_t reserved0 : 8; |
| 4708 | }; |
| 4709 | uint32_t word; |
| 4710 | }; |
| 4711 | #else |
| 4712 | private: |
| 4713 | uint32_t word0; |
| 4714 | |
| 4715 | public: |
| 4716 | CONSTEXPR dma_status1_r() : word0(0) {} |
| 4717 | CONSTEXPR dma_status1_r(uint32_t init) : word0(init) {} |
| 4718 | CONSTEXPR void operator=(uint32_t value) |
| 4719 | { |
| 4720 | word0 = value; |
| 4721 | } |
| 4722 | void operator=(uint32_t value) volatile |
| 4723 | { |
| 4724 | word0 = value; |
| 4725 | } |
| 4726 | CONSTEXPR operator uint32_t() |
| 4727 | { |
| 4728 | return word0; |
| 4729 | } |
| 4730 | operator uint32_t() volatile |
| 4731 | { |
| 4732 | return word0; |
| 4733 | } |
| 4734 | dma_status1_r copy() volatile |
| 4735 | { |
| 4736 | return *this; |
| 4737 | } |
| 4738 | CONSTEXPR uint32_t get_axi0_wr_limit_stall() const |
| 4739 | { |
| 4740 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 4741 | return value; |
| 4742 | } |
| 4743 | uint32_t get_axi0_wr_limit_stall() const volatile |
| 4744 | { |
| 4745 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 4746 | return value; |
| 4747 | } |
| 4748 | CONSTEXPR dma_status1_r &set_axi0_wr_limit_stall(uint32_t value) |
| 4749 | { |
| 4750 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 4751 | return *this; |
| 4752 | } |
| 4753 | CONSTEXPR uint32_t get_axi1_ar_stalled() const |
| 4754 | { |
| 4755 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 4756 | return value; |
| 4757 | } |
| 4758 | uint32_t get_axi1_ar_stalled() const volatile |
| 4759 | { |
| 4760 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 4761 | return value; |
| 4762 | } |
| 4763 | CONSTEXPR dma_status1_r &set_axi1_ar_stalled(uint32_t value) |
| 4764 | { |
| 4765 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 4766 | return *this; |
| 4767 | } |
| 4768 | CONSTEXPR uint32_t get_axi1_rd_limit_stall() const |
| 4769 | { |
| 4770 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 4771 | return value; |
| 4772 | } |
| 4773 | uint32_t get_axi1_rd_limit_stall() const volatile |
| 4774 | { |
| 4775 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 4776 | return value; |
| 4777 | } |
| 4778 | CONSTEXPR dma_status1_r &set_axi1_rd_limit_stall(uint32_t value) |
| 4779 | { |
| 4780 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 4781 | return *this; |
| 4782 | } |
| 4783 | CONSTEXPR uint32_t get_axi1_wr_stalled() const |
| 4784 | { |
| 4785 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 4786 | return value; |
| 4787 | } |
| 4788 | uint32_t get_axi1_wr_stalled() const volatile |
| 4789 | { |
| 4790 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 4791 | return value; |
| 4792 | } |
| 4793 | CONSTEXPR dma_status1_r &set_axi1_wr_stalled(uint32_t value) |
| 4794 | { |
| 4795 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 4796 | return *this; |
| 4797 | } |
| 4798 | CONSTEXPR uint32_t get_axi1_w_stalled() const |
| 4799 | { |
| 4800 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 4801 | return value; |
| 4802 | } |
| 4803 | uint32_t get_axi1_w_stalled() const volatile |
| 4804 | { |
| 4805 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 4806 | return value; |
| 4807 | } |
| 4808 | CONSTEXPR dma_status1_r &set_axi1_w_stalled(uint32_t value) |
| 4809 | { |
| 4810 | word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4); |
| 4811 | return *this; |
| 4812 | } |
| 4813 | CONSTEXPR uint32_t get_axi1_wr_limit_stall() const |
| 4814 | { |
| 4815 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 4816 | return value; |
| 4817 | } |
| 4818 | uint32_t get_axi1_wr_limit_stall() const volatile |
| 4819 | { |
| 4820 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 4821 | return value; |
| 4822 | } |
| 4823 | CONSTEXPR dma_status1_r &set_axi1_wr_limit_stall(uint32_t value) |
| 4824 | { |
| 4825 | word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5); |
| 4826 | return *this; |
| 4827 | } |
| 4828 | CONSTEXPR uint32_t get_wgt_idle_c1() const |
| 4829 | { |
| 4830 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 4831 | return value; |
| 4832 | } |
| 4833 | uint32_t get_wgt_idle_c1() const volatile |
| 4834 | { |
| 4835 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 6)); |
| 4836 | return value; |
| 4837 | } |
| 4838 | CONSTEXPR dma_status1_r &set_wgt_idle_c1(uint32_t value) |
| 4839 | { |
| 4840 | word0 = (((~((1U << 1) - 1)) << 6) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 6); |
| 4841 | return *this; |
| 4842 | } |
| 4843 | CONSTEXPR uint32_t get_bas_idle_c1() const |
| 4844 | { |
| 4845 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 4846 | return value; |
| 4847 | } |
| 4848 | uint32_t get_bas_idle_c1() const volatile |
| 4849 | { |
| 4850 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 7)); |
| 4851 | return value; |
| 4852 | } |
| 4853 | CONSTEXPR dma_status1_r &set_bas_idle_c1(uint32_t value) |
| 4854 | { |
| 4855 | word0 = (((~((1U << 1) - 1)) << 7) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 7); |
| 4856 | return *this; |
| 4857 | } |
| 4858 | CONSTEXPR uint32_t get_ib0_ai_valid_c1() const |
| 4859 | { |
| 4860 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8)); |
| 4861 | return value; |
| 4862 | } |
| 4863 | uint32_t get_ib0_ai_valid_c1() const volatile |
| 4864 | { |
| 4865 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 8)); |
| 4866 | return value; |
| 4867 | } |
| 4868 | CONSTEXPR dma_status1_r &set_ib0_ai_valid_c1(uint32_t value) |
| 4869 | { |
| 4870 | word0 = (((~((1U << 1) - 1)) << 8) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 8); |
| 4871 | return *this; |
| 4872 | } |
| 4873 | CONSTEXPR uint32_t get_ib0_ai_ready_c1() const |
| 4874 | { |
| 4875 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9)); |
| 4876 | return value; |
| 4877 | } |
| 4878 | uint32_t get_ib0_ai_ready_c1() const volatile |
| 4879 | { |
| 4880 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 9)); |
| 4881 | return value; |
| 4882 | } |
| 4883 | CONSTEXPR dma_status1_r &set_ib0_ai_ready_c1(uint32_t value) |
| 4884 | { |
| 4885 | word0 = (((~((1U << 1) - 1)) << 9) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 9); |
| 4886 | return *this; |
| 4887 | } |
| 4888 | CONSTEXPR uint32_t get_ib1_ai_valid_c1() const |
| 4889 | { |
| 4890 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 4891 | return value; |
| 4892 | } |
| 4893 | uint32_t get_ib1_ai_valid_c1() const volatile |
| 4894 | { |
| 4895 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 4896 | return value; |
| 4897 | } |
| 4898 | CONSTEXPR dma_status1_r &set_ib1_ai_valid_c1(uint32_t value) |
| 4899 | { |
| 4900 | word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10); |
| 4901 | return *this; |
| 4902 | } |
| 4903 | CONSTEXPR uint32_t get_ib1_ai_ready_c1() const |
| 4904 | { |
| 4905 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11)); |
| 4906 | return value; |
| 4907 | } |
| 4908 | uint32_t get_ib1_ai_ready_c1() const volatile |
| 4909 | { |
| 4910 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 11)); |
| 4911 | return value; |
| 4912 | } |
| 4913 | CONSTEXPR dma_status1_r &set_ib1_ai_ready_c1(uint32_t value) |
| 4914 | { |
| 4915 | word0 = (((~((1U << 1) - 1)) << 11) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 11); |
| 4916 | return *this; |
| 4917 | } |
| 4918 | CONSTEXPR uint32_t get_ib0_ao_valid_c1() const |
| 4919 | { |
| 4920 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12)); |
| 4921 | return value; |
| 4922 | } |
| 4923 | uint32_t get_ib0_ao_valid_c1() const volatile |
| 4924 | { |
| 4925 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 12)); |
| 4926 | return value; |
| 4927 | } |
| 4928 | CONSTEXPR dma_status1_r &set_ib0_ao_valid_c1(uint32_t value) |
| 4929 | { |
| 4930 | word0 = (((~((1U << 1) - 1)) << 12) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 12); |
| 4931 | return *this; |
| 4932 | } |
| 4933 | CONSTEXPR uint32_t get_ib0_ao_ready_c1() const |
| 4934 | { |
| 4935 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13)); |
| 4936 | return value; |
| 4937 | } |
| 4938 | uint32_t get_ib0_ao_ready_c1() const volatile |
| 4939 | { |
| 4940 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 13)); |
| 4941 | return value; |
| 4942 | } |
| 4943 | CONSTEXPR dma_status1_r &set_ib0_ao_ready_c1(uint32_t value) |
| 4944 | { |
| 4945 | word0 = (((~((1U << 1) - 1)) << 13) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 13); |
| 4946 | return *this; |
| 4947 | } |
| 4948 | CONSTEXPR uint32_t get_ib1_ao_valid_c1() const |
| 4949 | { |
| 4950 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14)); |
| 4951 | return value; |
| 4952 | } |
| 4953 | uint32_t get_ib1_ao_valid_c1() const volatile |
| 4954 | { |
| 4955 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 14)); |
| 4956 | return value; |
| 4957 | } |
| 4958 | CONSTEXPR dma_status1_r &set_ib1_ao_valid_c1(uint32_t value) |
| 4959 | { |
| 4960 | word0 = (((~((1U << 1) - 1)) << 14) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 14); |
| 4961 | return *this; |
| 4962 | } |
| 4963 | CONSTEXPR uint32_t get_ib1_ao_ready_c1() const |
| 4964 | { |
| 4965 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15)); |
| 4966 | return value; |
| 4967 | } |
| 4968 | uint32_t get_ib1_ao_ready_c1() const volatile |
| 4969 | { |
| 4970 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 15)); |
| 4971 | return value; |
| 4972 | } |
| 4973 | CONSTEXPR dma_status1_r &set_ib1_ao_ready_c1(uint32_t value) |
| 4974 | { |
| 4975 | word0 = (((~((1U << 1) - 1)) << 15) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 15); |
| 4976 | return *this; |
| 4977 | } |
| 4978 | CONSTEXPR uint32_t get_ob0_valid_c1() const |
| 4979 | { |
| 4980 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16)); |
| 4981 | return value; |
| 4982 | } |
| 4983 | uint32_t get_ob0_valid_c1() const volatile |
| 4984 | { |
| 4985 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 16)); |
| 4986 | return value; |
| 4987 | } |
| 4988 | CONSTEXPR dma_status1_r &set_ob0_valid_c1(uint32_t value) |
| 4989 | { |
| 4990 | word0 = (((~((1U << 1) - 1)) << 16) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 16); |
| 4991 | return *this; |
| 4992 | } |
| 4993 | CONSTEXPR uint32_t get_ob0_ready_c1() const |
| 4994 | { |
| 4995 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17)); |
| 4996 | return value; |
| 4997 | } |
| 4998 | uint32_t get_ob0_ready_c1() const volatile |
| 4999 | { |
| 5000 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 17)); |
| 5001 | return value; |
| 5002 | } |
| 5003 | CONSTEXPR dma_status1_r &set_ob0_ready_c1(uint32_t value) |
| 5004 | { |
| 5005 | word0 = (((~((1U << 1) - 1)) << 17) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 17); |
| 5006 | return *this; |
| 5007 | } |
| 5008 | CONSTEXPR uint32_t get_ob1_valid_c1() const |
| 5009 | { |
| 5010 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18)); |
| 5011 | return value; |
| 5012 | } |
| 5013 | uint32_t get_ob1_valid_c1() const volatile |
| 5014 | { |
| 5015 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 18)); |
| 5016 | return value; |
| 5017 | } |
| 5018 | CONSTEXPR dma_status1_r &set_ob1_valid_c1(uint32_t value) |
| 5019 | { |
| 5020 | word0 = (((~((1U << 1) - 1)) << 18) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 18); |
| 5021 | return *this; |
| 5022 | } |
| 5023 | CONSTEXPR uint32_t get_ob1_ready_c1() const |
| 5024 | { |
| 5025 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19)); |
| 5026 | return value; |
| 5027 | } |
| 5028 | uint32_t get_ob1_ready_c1() const volatile |
| 5029 | { |
| 5030 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 19)); |
| 5031 | return value; |
| 5032 | } |
| 5033 | CONSTEXPR dma_status1_r &set_ob1_ready_c1(uint32_t value) |
| 5034 | { |
| 5035 | word0 = (((~((1U << 1) - 1)) << 19) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 19); |
| 5036 | return *this; |
| 5037 | } |
| 5038 | CONSTEXPR uint32_t get_wd_bitstream_valid_c1() const |
| 5039 | { |
| 5040 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20)); |
| 5041 | return value; |
| 5042 | } |
| 5043 | uint32_t get_wd_bitstream_valid_c1() const volatile |
| 5044 | { |
| 5045 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 20)); |
| 5046 | return value; |
| 5047 | } |
| 5048 | CONSTEXPR dma_status1_r &set_wd_bitstream_valid_c1(uint32_t value) |
| 5049 | { |
| 5050 | word0 = (((~((1U << 1) - 1)) << 20) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 20); |
| 5051 | return *this; |
| 5052 | } |
| 5053 | CONSTEXPR uint32_t get_wd_bitstream_ready_c1() const |
| 5054 | { |
| 5055 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21)); |
| 5056 | return value; |
| 5057 | } |
| 5058 | uint32_t get_wd_bitstream_ready_c1() const volatile |
| 5059 | { |
| 5060 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 21)); |
| 5061 | return value; |
| 5062 | } |
| 5063 | CONSTEXPR dma_status1_r &set_wd_bitstream_ready_c1(uint32_t value) |
| 5064 | { |
| 5065 | word0 = (((~((1U << 1) - 1)) << 21) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 21); |
| 5066 | return *this; |
| 5067 | } |
| 5068 | CONSTEXPR uint32_t get_bs_bitstream_valid_c1() const |
| 5069 | { |
| 5070 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22)); |
| 5071 | return value; |
| 5072 | } |
| 5073 | uint32_t get_bs_bitstream_valid_c1() const volatile |
| 5074 | { |
| 5075 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 22)); |
| 5076 | return value; |
| 5077 | } |
| 5078 | CONSTEXPR dma_status1_r &set_bs_bitstream_valid_c1(uint32_t value) |
| 5079 | { |
| 5080 | word0 = (((~((1U << 1) - 1)) << 22) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 22); |
| 5081 | return *this; |
| 5082 | } |
| 5083 | CONSTEXPR uint32_t get_bs_bitstream_ready_c1() const |
| 5084 | { |
| 5085 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23)); |
| 5086 | return value; |
| 5087 | } |
| 5088 | uint32_t get_bs_bitstream_ready_c1() const volatile |
| 5089 | { |
| 5090 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 23)); |
| 5091 | return value; |
| 5092 | } |
| 5093 | CONSTEXPR dma_status1_r &set_bs_bitstream_ready_c1(uint32_t value) |
| 5094 | { |
| 5095 | word0 = (((~((1U << 1) - 1)) << 23) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 23); |
| 5096 | return *this; |
| 5097 | } |
| 5098 | #endif |
| 5099 | }; |
| 5100 | |
| 5101 | // clkforce_r - Force clocks on for clock gating |
| 5102 | struct clkforce_r |
| 5103 | { |
| 5104 | #ifndef __cplusplus |
| 5105 | union |
| 5106 | { |
| 5107 | struct |
| 5108 | { |
| 5109 | uint32_t top_level_clk : 1; // set to 1 to force on TOP level clock |
| 5110 | uint32_t cc_clk : 1; // set to 1 to force on CC clock |
| 5111 | uint32_t dma_clk : 1; // set to 1 to force on DMA clock |
| 5112 | uint32_t mac_clk : 1; // set to 1 to force on MAC clock |
| 5113 | uint32_t ao_clk : 1; // set to 1 to force on AO clock |
| 5114 | uint32_t wd_clk : 1; // set to 1 to force on WD clock |
| 5115 | uint32_t reserved0 : 26; |
| 5116 | }; |
| 5117 | uint32_t word; |
| 5118 | }; |
| 5119 | #else |
| 5120 | private: |
| 5121 | uint32_t word0; |
| 5122 | |
| 5123 | public: |
| 5124 | CONSTEXPR clkforce_r() : word0(0) {} |
| 5125 | CONSTEXPR clkforce_r(uint32_t init) : word0(init) {} |
| 5126 | CONSTEXPR void operator=(uint32_t value) |
| 5127 | { |
| 5128 | word0 = value; |
| 5129 | } |
| 5130 | void operator=(uint32_t value) volatile |
| 5131 | { |
| 5132 | word0 = value; |
| 5133 | } |
| 5134 | CONSTEXPR operator uint32_t() |
| 5135 | { |
| 5136 | return word0; |
| 5137 | } |
| 5138 | operator uint32_t() volatile |
| 5139 | { |
| 5140 | return word0; |
| 5141 | } |
| 5142 | clkforce_r copy() volatile |
| 5143 | { |
| 5144 | return *this; |
| 5145 | } |
| 5146 | CONSTEXPR uint32_t get_top_level_clk() const |
| 5147 | { |
| 5148 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5149 | return value; |
| 5150 | } |
| 5151 | uint32_t get_top_level_clk() const volatile |
| 5152 | { |
| 5153 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5154 | return value; |
| 5155 | } |
| 5156 | CONSTEXPR clkforce_r &set_top_level_clk(uint32_t value) |
| 5157 | { |
| 5158 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 5159 | return *this; |
| 5160 | } |
| 5161 | CONSTEXPR uint32_t get_cc_clk() const |
| 5162 | { |
| 5163 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5164 | return value; |
| 5165 | } |
| 5166 | uint32_t get_cc_clk() const volatile |
| 5167 | { |
| 5168 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5169 | return value; |
| 5170 | } |
| 5171 | CONSTEXPR clkforce_r &set_cc_clk(uint32_t value) |
| 5172 | { |
| 5173 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 5174 | return *this; |
| 5175 | } |
| 5176 | CONSTEXPR uint32_t get_dma_clk() const |
| 5177 | { |
| 5178 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5179 | return value; |
| 5180 | } |
| 5181 | uint32_t get_dma_clk() const volatile |
| 5182 | { |
| 5183 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5184 | return value; |
| 5185 | } |
| 5186 | CONSTEXPR clkforce_r &set_dma_clk(uint32_t value) |
| 5187 | { |
| 5188 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 5189 | return *this; |
| 5190 | } |
| 5191 | CONSTEXPR uint32_t get_mac_clk() const |
| 5192 | { |
| 5193 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5194 | return value; |
| 5195 | } |
| 5196 | uint32_t get_mac_clk() const volatile |
| 5197 | { |
| 5198 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5199 | return value; |
| 5200 | } |
| 5201 | CONSTEXPR clkforce_r &set_mac_clk(uint32_t value) |
| 5202 | { |
| 5203 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 5204 | return *this; |
| 5205 | } |
| 5206 | CONSTEXPR uint32_t get_ao_clk() const |
| 5207 | { |
| 5208 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 5209 | return value; |
| 5210 | } |
| 5211 | uint32_t get_ao_clk() const volatile |
| 5212 | { |
| 5213 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 4)); |
| 5214 | return value; |
| 5215 | } |
| 5216 | CONSTEXPR clkforce_r &set_ao_clk(uint32_t value) |
| 5217 | { |
| 5218 | word0 = (((~((1U << 1) - 1)) << 4) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 4); |
| 5219 | return *this; |
| 5220 | } |
| 5221 | CONSTEXPR uint32_t get_wd_clk() const |
| 5222 | { |
| 5223 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 5224 | return value; |
| 5225 | } |
| 5226 | uint32_t get_wd_clk() const volatile |
| 5227 | { |
| 5228 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 5)); |
| 5229 | return value; |
| 5230 | } |
| 5231 | CONSTEXPR clkforce_r &set_wd_clk(uint32_t value) |
| 5232 | { |
| 5233 | word0 = (((~((1U << 1) - 1)) << 5) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 5); |
| 5234 | return *this; |
| 5235 | } |
| 5236 | #endif |
| 5237 | }; |
| 5238 | |
| 5239 | // debug_address_r - Set debug address for register reads 0x400-0x7FF. The address must be 1KB aligned |
| 5240 | struct debug_address_r |
| 5241 | { |
| 5242 | #ifndef __cplusplus |
| 5243 | union |
| 5244 | { |
| 5245 | struct |
| 5246 | { |
| 5247 | uint32_t addr : 32; // Register address |
| 5248 | }; |
| 5249 | uint32_t word; |
| 5250 | }; |
| 5251 | #else |
| 5252 | private: |
| 5253 | uint32_t word0; |
| 5254 | |
| 5255 | public: |
| 5256 | CONSTEXPR debug_address_r() : word0(0) {} |
| 5257 | CONSTEXPR debug_address_r(uint32_t init) : word0(init) {} |
| 5258 | CONSTEXPR void operator=(uint32_t value) |
| 5259 | { |
| 5260 | word0 = value; |
| 5261 | } |
| 5262 | void operator=(uint32_t value) volatile |
| 5263 | { |
| 5264 | word0 = value; |
| 5265 | } |
| 5266 | CONSTEXPR operator uint32_t() |
| 5267 | { |
| 5268 | return word0; |
| 5269 | } |
| 5270 | operator uint32_t() volatile |
| 5271 | { |
| 5272 | return word0; |
| 5273 | } |
| 5274 | debug_address_r copy() volatile |
| 5275 | { |
| 5276 | return *this; |
| 5277 | } |
| 5278 | CONSTEXPR uint32_t get_addr() const |
| 5279 | { |
| 5280 | uint32_t value = static_cast<uint32_t>(word0); |
| 5281 | return value; |
| 5282 | } |
| 5283 | uint32_t get_addr() const volatile |
| 5284 | { |
| 5285 | uint32_t value = static_cast<uint32_t>(word0); |
| 5286 | return value; |
| 5287 | } |
| 5288 | CONSTEXPR debug_address_r &set_addr(uint32_t value) |
| 5289 | { |
| 5290 | word0 = static_cast<uint32_t>(value); |
| 5291 | return *this; |
| 5292 | } |
| 5293 | #endif |
| 5294 | }; |
| 5295 | |
| 5296 | // debug_misc_r - 32-bit read/write register for driver debug use. This does not affect NPU function |
| 5297 | struct debug_misc_r |
| 5298 | { |
| 5299 | #ifndef __cplusplus |
| 5300 | union |
| 5301 | { |
| 5302 | struct |
| 5303 | { |
| 5304 | uint32_t misc : 32; // Debug misc |
| 5305 | }; |
| 5306 | uint32_t word; |
| 5307 | }; |
| 5308 | #else |
| 5309 | private: |
| 5310 | uint32_t word0; |
| 5311 | |
| 5312 | public: |
| 5313 | CONSTEXPR debug_misc_r() : word0(0) {} |
| 5314 | CONSTEXPR debug_misc_r(uint32_t init) : word0(init) {} |
| 5315 | CONSTEXPR void operator=(uint32_t value) |
| 5316 | { |
| 5317 | word0 = value; |
| 5318 | } |
| 5319 | void operator=(uint32_t value) volatile |
| 5320 | { |
| 5321 | word0 = value; |
| 5322 | } |
| 5323 | CONSTEXPR operator uint32_t() |
| 5324 | { |
| 5325 | return word0; |
| 5326 | } |
| 5327 | operator uint32_t() volatile |
| 5328 | { |
| 5329 | return word0; |
| 5330 | } |
| 5331 | debug_misc_r copy() volatile |
| 5332 | { |
| 5333 | return *this; |
| 5334 | } |
| 5335 | CONSTEXPR uint32_t get_misc() const |
| 5336 | { |
| 5337 | uint32_t value = static_cast<uint32_t>(word0); |
| 5338 | return value; |
| 5339 | } |
| 5340 | uint32_t get_misc() const volatile |
| 5341 | { |
| 5342 | uint32_t value = static_cast<uint32_t>(word0); |
| 5343 | return value; |
| 5344 | } |
| 5345 | CONSTEXPR debug_misc_r &set_misc(uint32_t value) |
| 5346 | { |
| 5347 | word0 = static_cast<uint32_t>(value); |
| 5348 | return *this; |
| 5349 | } |
| 5350 | #endif |
| 5351 | }; |
| 5352 | |
| 5353 | // debugcore_r - Select core number for debug registers (0x200-0x2FF) and RAM reads (0x400-0x7FF). Value is 0 or 1 |
| 5354 | struct debugcore_r |
| 5355 | { |
| 5356 | #ifndef __cplusplus |
| 5357 | union |
| 5358 | { |
| 5359 | struct |
| 5360 | { |
| 5361 | uint32_t core : 32; // Debug core |
| 5362 | }; |
| 5363 | uint32_t word; |
| 5364 | }; |
| 5365 | #else |
| 5366 | private: |
| 5367 | uint32_t word0; |
| 5368 | |
| 5369 | public: |
| 5370 | CONSTEXPR debugcore_r() : word0(0) {} |
| 5371 | CONSTEXPR debugcore_r(uint32_t init) : word0(init) {} |
| 5372 | CONSTEXPR void operator=(uint32_t value) |
| 5373 | { |
| 5374 | word0 = value; |
| 5375 | } |
| 5376 | void operator=(uint32_t value) volatile |
| 5377 | { |
| 5378 | word0 = value; |
| 5379 | } |
| 5380 | CONSTEXPR operator uint32_t() |
| 5381 | { |
| 5382 | return word0; |
| 5383 | } |
| 5384 | operator uint32_t() volatile |
| 5385 | { |
| 5386 | return word0; |
| 5387 | } |
| 5388 | debugcore_r copy() volatile |
| 5389 | { |
| 5390 | return *this; |
| 5391 | } |
| 5392 | CONSTEXPR uint32_t get_core() const |
| 5393 | { |
| 5394 | uint32_t value = static_cast<uint32_t>(word0); |
| 5395 | return value; |
| 5396 | } |
| 5397 | uint32_t get_core() const volatile |
| 5398 | { |
| 5399 | uint32_t value = static_cast<uint32_t>(word0); |
| 5400 | return value; |
| 5401 | } |
| 5402 | CONSTEXPR debugcore_r &set_core(uint32_t value) |
| 5403 | { |
| 5404 | word0 = static_cast<uint32_t>(value); |
| 5405 | return *this; |
| 5406 | } |
| 5407 | #endif |
| 5408 | }; |
| 5409 | |
| 5410 | // debug_block_r - Set from which of four block banks the TSU registers are read. 0 = read from the current bank 256+n = |
| 5411 | // force to read from bank n where n is in the range 0 to 3 |
| 5412 | struct debug_block_r |
| 5413 | { |
| 5414 | #ifndef __cplusplus |
| 5415 | union |
| 5416 | { |
| 5417 | struct |
| 5418 | { |
| 5419 | uint32_t block : 32; // Debug block |
| 5420 | }; |
| 5421 | uint32_t word; |
| 5422 | }; |
| 5423 | #else |
| 5424 | private: |
| 5425 | uint32_t word0; |
| 5426 | |
| 5427 | public: |
| 5428 | CONSTEXPR debug_block_r() : word0(0) {} |
| 5429 | CONSTEXPR debug_block_r(uint32_t init) : word0(init) {} |
| 5430 | CONSTEXPR void operator=(uint32_t value) |
| 5431 | { |
| 5432 | word0 = value; |
| 5433 | } |
| 5434 | void operator=(uint32_t value) volatile |
| 5435 | { |
| 5436 | word0 = value; |
| 5437 | } |
| 5438 | CONSTEXPR operator uint32_t() |
| 5439 | { |
| 5440 | return word0; |
| 5441 | } |
| 5442 | operator uint32_t() volatile |
| 5443 | { |
| 5444 | return word0; |
| 5445 | } |
| 5446 | debug_block_r copy() volatile |
| 5447 | { |
| 5448 | return *this; |
| 5449 | } |
| 5450 | CONSTEXPR uint32_t get_block() const |
| 5451 | { |
| 5452 | uint32_t value = static_cast<uint32_t>(word0); |
| 5453 | return value; |
| 5454 | } |
| 5455 | uint32_t get_block() const volatile |
| 5456 | { |
| 5457 | uint32_t value = static_cast<uint32_t>(word0); |
| 5458 | return value; |
| 5459 | } |
| 5460 | CONSTEXPR debug_block_r &set_block(uint32_t value) |
| 5461 | { |
| 5462 | word0 = static_cast<uint32_t>(value); |
| 5463 | return *this; |
| 5464 | } |
| 5465 | #endif |
| 5466 | }; |
| 5467 | |
| 5468 | // pmcr_r - PMU Register control |
| 5469 | struct pmcr_r |
| 5470 | { |
| 5471 | #ifndef __cplusplus |
| 5472 | union |
| 5473 | { |
| 5474 | struct |
| 5475 | { |
| 5476 | uint32_t cnt_en : 1; // Enable counter |
| 5477 | uint32_t event_cnt_rst : 1; // Reset event counter |
| 5478 | uint32_t cycle_cnt_rst : 1; // Reset cycle counter |
| 5479 | uint32_t mask_en : 1; // PMU can be enabled/disabled by command stream operation NPU_OP_PMU_MASK |
| 5480 | uint32_t reserved0 : 7; |
| 5481 | uint32_t num_event_cnt : 5; // Number of event counters |
| 5482 | uint32_t reserved1 : 16; |
| 5483 | }; |
| 5484 | uint32_t word; |
| 5485 | }; |
| 5486 | #else |
| 5487 | private: |
| 5488 | uint32_t word0; |
| 5489 | |
| 5490 | public: |
| 5491 | CONSTEXPR pmcr_r() : word0(8192) {} |
| 5492 | CONSTEXPR pmcr_r(uint32_t init) : word0(init) {} |
| 5493 | CONSTEXPR void operator=(uint32_t value) |
| 5494 | { |
| 5495 | word0 = value; |
| 5496 | } |
| 5497 | void operator=(uint32_t value) volatile |
| 5498 | { |
| 5499 | word0 = value; |
| 5500 | } |
| 5501 | CONSTEXPR operator uint32_t() |
| 5502 | { |
| 5503 | return word0; |
| 5504 | } |
| 5505 | operator uint32_t() volatile |
| 5506 | { |
| 5507 | return word0; |
| 5508 | } |
| 5509 | pmcr_r copy() volatile |
| 5510 | { |
| 5511 | return *this; |
| 5512 | } |
| 5513 | CONSTEXPR uint32_t get_cnt_en() const |
| 5514 | { |
| 5515 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5516 | return value; |
| 5517 | } |
| 5518 | uint32_t get_cnt_en() const volatile |
| 5519 | { |
| 5520 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5521 | return value; |
| 5522 | } |
| 5523 | CONSTEXPR pmcr_r &set_cnt_en(uint32_t value) |
| 5524 | { |
| 5525 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 5526 | return *this; |
| 5527 | } |
| 5528 | CONSTEXPR uint32_t get_event_cnt_rst() const |
| 5529 | { |
| 5530 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5531 | return value; |
| 5532 | } |
| 5533 | uint32_t get_event_cnt_rst() const volatile |
| 5534 | { |
| 5535 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5536 | return value; |
| 5537 | } |
| 5538 | CONSTEXPR pmcr_r &set_event_cnt_rst(uint32_t value) |
| 5539 | { |
| 5540 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 5541 | return *this; |
| 5542 | } |
| 5543 | CONSTEXPR uint32_t get_cycle_cnt_rst() const |
| 5544 | { |
| 5545 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5546 | return value; |
| 5547 | } |
| 5548 | uint32_t get_cycle_cnt_rst() const volatile |
| 5549 | { |
| 5550 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5551 | return value; |
| 5552 | } |
| 5553 | CONSTEXPR pmcr_r &set_cycle_cnt_rst(uint32_t value) |
| 5554 | { |
| 5555 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 5556 | return *this; |
| 5557 | } |
| 5558 | CONSTEXPR uint32_t get_mask_en() const |
| 5559 | { |
| 5560 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5561 | return value; |
| 5562 | } |
| 5563 | uint32_t get_mask_en() const volatile |
| 5564 | { |
| 5565 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5566 | return value; |
| 5567 | } |
| 5568 | CONSTEXPR pmcr_r &set_mask_en(uint32_t value) |
| 5569 | { |
| 5570 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 5571 | return *this; |
| 5572 | } |
| 5573 | CONSTEXPR uint32_t get_num_event_cnt() const |
| 5574 | { |
| 5575 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 11)); |
| 5576 | return value; |
| 5577 | } |
| 5578 | uint32_t get_num_event_cnt() const volatile |
| 5579 | { |
| 5580 | uint32_t value = static_cast<uint32_t>(((1U << 5) - 1) & (word0 >> 11)); |
| 5581 | return value; |
| 5582 | } |
| 5583 | CONSTEXPR pmcr_r &set_num_event_cnt(uint32_t value) |
| 5584 | { |
| 5585 | word0 = (((~((1U << 5) - 1)) << 11) & word0) | ((((1U << 5) - 1) & static_cast<uint32_t>(value)) << 11); |
| 5586 | return *this; |
| 5587 | } |
| 5588 | #endif |
| 5589 | }; |
| 5590 | |
| 5591 | // pmcntenset_r - Count enable set register |
| 5592 | struct pmcntenset_r |
| 5593 | { |
| 5594 | #ifndef __cplusplus |
| 5595 | union |
| 5596 | { |
| 5597 | struct |
| 5598 | { |
| 5599 | uint32_t EVENT_CNT_0 : 1; // Event counter enable bit for PMEVCNTR0 |
| 5600 | uint32_t EVENT_CNT_1 : 1; // Event counter enable bit for PMEVCNTR1 |
| 5601 | uint32_t EVENT_CNT_2 : 1; // Event counter enable bit for PMEVCNTR2 |
| 5602 | uint32_t EVENT_CNT_3 : 1; // Event counter enable bit for PMEVCNTR3 |
| 5603 | uint32_t reserved0 : 27; |
| 5604 | uint32_t CYCLE_CNT : 1; // PMCCNTR enable bit |
| 5605 | }; |
| 5606 | uint32_t word; |
| 5607 | }; |
| 5608 | #else |
| 5609 | private: |
| 5610 | uint32_t word0; |
| 5611 | |
| 5612 | public: |
| 5613 | CONSTEXPR pmcntenset_r() : word0(0) {} |
| 5614 | CONSTEXPR pmcntenset_r(uint32_t init) : word0(init) {} |
| 5615 | CONSTEXPR void operator=(uint32_t value) |
| 5616 | { |
| 5617 | word0 = value; |
| 5618 | } |
| 5619 | void operator=(uint32_t value) volatile |
| 5620 | { |
| 5621 | word0 = value; |
| 5622 | } |
| 5623 | CONSTEXPR operator uint32_t() |
| 5624 | { |
| 5625 | return word0; |
| 5626 | } |
| 5627 | operator uint32_t() volatile |
| 5628 | { |
| 5629 | return word0; |
| 5630 | } |
| 5631 | pmcntenset_r copy() volatile |
| 5632 | { |
| 5633 | return *this; |
| 5634 | } |
| 5635 | CONSTEXPR uint32_t get_EVENT_CNT_0() const |
| 5636 | { |
| 5637 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5638 | return value; |
| 5639 | } |
| 5640 | uint32_t get_EVENT_CNT_0() const volatile |
| 5641 | { |
| 5642 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5643 | return value; |
| 5644 | } |
| 5645 | CONSTEXPR pmcntenset_r &set_EVENT_CNT_0(uint32_t value) |
| 5646 | { |
| 5647 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 5648 | return *this; |
| 5649 | } |
| 5650 | CONSTEXPR uint32_t get_EVENT_CNT_1() const |
| 5651 | { |
| 5652 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5653 | return value; |
| 5654 | } |
| 5655 | uint32_t get_EVENT_CNT_1() const volatile |
| 5656 | { |
| 5657 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5658 | return value; |
| 5659 | } |
| 5660 | CONSTEXPR pmcntenset_r &set_EVENT_CNT_1(uint32_t value) |
| 5661 | { |
| 5662 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 5663 | return *this; |
| 5664 | } |
| 5665 | CONSTEXPR uint32_t get_EVENT_CNT_2() const |
| 5666 | { |
| 5667 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5668 | return value; |
| 5669 | } |
| 5670 | uint32_t get_EVENT_CNT_2() const volatile |
| 5671 | { |
| 5672 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5673 | return value; |
| 5674 | } |
| 5675 | CONSTEXPR pmcntenset_r &set_EVENT_CNT_2(uint32_t value) |
| 5676 | { |
| 5677 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 5678 | return *this; |
| 5679 | } |
| 5680 | CONSTEXPR uint32_t get_EVENT_CNT_3() const |
| 5681 | { |
| 5682 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5683 | return value; |
| 5684 | } |
| 5685 | uint32_t get_EVENT_CNT_3() const volatile |
| 5686 | { |
| 5687 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5688 | return value; |
| 5689 | } |
| 5690 | CONSTEXPR pmcntenset_r &set_EVENT_CNT_3(uint32_t value) |
| 5691 | { |
| 5692 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 5693 | return *this; |
| 5694 | } |
| 5695 | CONSTEXPR uint32_t get_CYCLE_CNT() const |
| 5696 | { |
| 5697 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 5698 | return value; |
| 5699 | } |
| 5700 | uint32_t get_CYCLE_CNT() const volatile |
| 5701 | { |
| 5702 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 5703 | return value; |
| 5704 | } |
| 5705 | CONSTEXPR pmcntenset_r &set_CYCLE_CNT(uint32_t value) |
| 5706 | { |
| 5707 | word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31); |
| 5708 | return *this; |
| 5709 | } |
| 5710 | #endif |
| 5711 | }; |
| 5712 | |
| 5713 | // pmcntenclr_r - Count enable clear register |
| 5714 | struct pmcntenclr_r |
| 5715 | { |
| 5716 | #ifndef __cplusplus |
| 5717 | union |
| 5718 | { |
| 5719 | struct |
| 5720 | { |
| 5721 | uint32_t EVENT_CNT_0 : 1; // Event counter disable bit for PMEVCNTR0 |
| 5722 | uint32_t EVENT_CNT_1 : 1; // Event counter disable bit for PMEVCNTR1 |
| 5723 | uint32_t EVENT_CNT_2 : 1; // Event counter disable bit for PMEVCNTR2 |
| 5724 | uint32_t EVENT_CNT_3 : 1; // Event counter disable bit for PMEVCNTR3 |
| 5725 | uint32_t reserved0 : 27; |
| 5726 | uint32_t CYCLE_CNT : 1; // PMCCNTR disable bit |
| 5727 | }; |
| 5728 | uint32_t word; |
| 5729 | }; |
| 5730 | #else |
| 5731 | private: |
| 5732 | uint32_t word0; |
| 5733 | |
| 5734 | public: |
| 5735 | CONSTEXPR pmcntenclr_r() : word0(0) {} |
| 5736 | CONSTEXPR pmcntenclr_r(uint32_t init) : word0(init) {} |
| 5737 | CONSTEXPR void operator=(uint32_t value) |
| 5738 | { |
| 5739 | word0 = value; |
| 5740 | } |
| 5741 | void operator=(uint32_t value) volatile |
| 5742 | { |
| 5743 | word0 = value; |
| 5744 | } |
| 5745 | CONSTEXPR operator uint32_t() |
| 5746 | { |
| 5747 | return word0; |
| 5748 | } |
| 5749 | operator uint32_t() volatile |
| 5750 | { |
| 5751 | return word0; |
| 5752 | } |
| 5753 | pmcntenclr_r copy() volatile |
| 5754 | { |
| 5755 | return *this; |
| 5756 | } |
| 5757 | CONSTEXPR uint32_t get_EVENT_CNT_0() const |
| 5758 | { |
| 5759 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5760 | return value; |
| 5761 | } |
| 5762 | uint32_t get_EVENT_CNT_0() const volatile |
| 5763 | { |
| 5764 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5765 | return value; |
| 5766 | } |
| 5767 | CONSTEXPR pmcntenclr_r &set_EVENT_CNT_0(uint32_t value) |
| 5768 | { |
| 5769 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 5770 | return *this; |
| 5771 | } |
| 5772 | CONSTEXPR uint32_t get_EVENT_CNT_1() const |
| 5773 | { |
| 5774 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5775 | return value; |
| 5776 | } |
| 5777 | uint32_t get_EVENT_CNT_1() const volatile |
| 5778 | { |
| 5779 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5780 | return value; |
| 5781 | } |
| 5782 | CONSTEXPR pmcntenclr_r &set_EVENT_CNT_1(uint32_t value) |
| 5783 | { |
| 5784 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 5785 | return *this; |
| 5786 | } |
| 5787 | CONSTEXPR uint32_t get_EVENT_CNT_2() const |
| 5788 | { |
| 5789 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5790 | return value; |
| 5791 | } |
| 5792 | uint32_t get_EVENT_CNT_2() const volatile |
| 5793 | { |
| 5794 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5795 | return value; |
| 5796 | } |
| 5797 | CONSTEXPR pmcntenclr_r &set_EVENT_CNT_2(uint32_t value) |
| 5798 | { |
| 5799 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 5800 | return *this; |
| 5801 | } |
| 5802 | CONSTEXPR uint32_t get_EVENT_CNT_3() const |
| 5803 | { |
| 5804 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5805 | return value; |
| 5806 | } |
| 5807 | uint32_t get_EVENT_CNT_3() const volatile |
| 5808 | { |
| 5809 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5810 | return value; |
| 5811 | } |
| 5812 | CONSTEXPR pmcntenclr_r &set_EVENT_CNT_3(uint32_t value) |
| 5813 | { |
| 5814 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 5815 | return *this; |
| 5816 | } |
| 5817 | CONSTEXPR uint32_t get_CYCLE_CNT() const |
| 5818 | { |
| 5819 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 5820 | return value; |
| 5821 | } |
| 5822 | uint32_t get_CYCLE_CNT() const volatile |
| 5823 | { |
| 5824 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 5825 | return value; |
| 5826 | } |
| 5827 | CONSTEXPR pmcntenclr_r &set_CYCLE_CNT(uint32_t value) |
| 5828 | { |
| 5829 | word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31); |
| 5830 | return *this; |
| 5831 | } |
| 5832 | #endif |
| 5833 | }; |
| 5834 | |
| 5835 | // pmovsset_r - Overflow flag status set register |
| 5836 | struct pmovsset_r |
| 5837 | { |
| 5838 | #ifndef __cplusplus |
| 5839 | union |
| 5840 | { |
| 5841 | struct |
| 5842 | { |
| 5843 | uint32_t EVENT_CNT_0_OVF : 1; // Event counter overflow set bit for PMEVCNTR0 |
| 5844 | uint32_t EVENT_CNT_1_OVF : 1; // Event counter overflow set bit for PMEVCNTR1 |
| 5845 | uint32_t EVENT_CNT_2_OVF : 1; // Event counter overflow set bit for PMEVCNTR2 |
| 5846 | uint32_t EVENT_CNT_3_OVF : 1; // Event counter overflow set bit for PMEVCNTR3 |
| 5847 | uint32_t reserved0 : 27; |
| 5848 | uint32_t CYCLE_CNT_OVF : 1; // PMCCNTR overflow set bit |
| 5849 | }; |
| 5850 | uint32_t word; |
| 5851 | }; |
| 5852 | #else |
| 5853 | private: |
| 5854 | uint32_t word0; |
| 5855 | |
| 5856 | public: |
| 5857 | CONSTEXPR pmovsset_r() : word0(0) {} |
| 5858 | CONSTEXPR pmovsset_r(uint32_t init) : word0(init) {} |
| 5859 | CONSTEXPR void operator=(uint32_t value) |
| 5860 | { |
| 5861 | word0 = value; |
| 5862 | } |
| 5863 | void operator=(uint32_t value) volatile |
| 5864 | { |
| 5865 | word0 = value; |
| 5866 | } |
| 5867 | CONSTEXPR operator uint32_t() |
| 5868 | { |
| 5869 | return word0; |
| 5870 | } |
| 5871 | operator uint32_t() volatile |
| 5872 | { |
| 5873 | return word0; |
| 5874 | } |
| 5875 | pmovsset_r copy() volatile |
| 5876 | { |
| 5877 | return *this; |
| 5878 | } |
| 5879 | CONSTEXPR uint32_t get_EVENT_CNT_0_OVF() const |
| 5880 | { |
| 5881 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5882 | return value; |
| 5883 | } |
| 5884 | uint32_t get_EVENT_CNT_0_OVF() const volatile |
| 5885 | { |
| 5886 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 5887 | return value; |
| 5888 | } |
| 5889 | CONSTEXPR pmovsset_r &set_EVENT_CNT_0_OVF(uint32_t value) |
| 5890 | { |
| 5891 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 5892 | return *this; |
| 5893 | } |
| 5894 | CONSTEXPR uint32_t get_EVENT_CNT_1_OVF() const |
| 5895 | { |
| 5896 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5897 | return value; |
| 5898 | } |
| 5899 | uint32_t get_EVENT_CNT_1_OVF() const volatile |
| 5900 | { |
| 5901 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 5902 | return value; |
| 5903 | } |
| 5904 | CONSTEXPR pmovsset_r &set_EVENT_CNT_1_OVF(uint32_t value) |
| 5905 | { |
| 5906 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 5907 | return *this; |
| 5908 | } |
| 5909 | CONSTEXPR uint32_t get_EVENT_CNT_2_OVF() const |
| 5910 | { |
| 5911 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5912 | return value; |
| 5913 | } |
| 5914 | uint32_t get_EVENT_CNT_2_OVF() const volatile |
| 5915 | { |
| 5916 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 5917 | return value; |
| 5918 | } |
| 5919 | CONSTEXPR pmovsset_r &set_EVENT_CNT_2_OVF(uint32_t value) |
| 5920 | { |
| 5921 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 5922 | return *this; |
| 5923 | } |
| 5924 | CONSTEXPR uint32_t get_EVENT_CNT_3_OVF() const |
| 5925 | { |
| 5926 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5927 | return value; |
| 5928 | } |
| 5929 | uint32_t get_EVENT_CNT_3_OVF() const volatile |
| 5930 | { |
| 5931 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 5932 | return value; |
| 5933 | } |
| 5934 | CONSTEXPR pmovsset_r &set_EVENT_CNT_3_OVF(uint32_t value) |
| 5935 | { |
| 5936 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 5937 | return *this; |
| 5938 | } |
| 5939 | CONSTEXPR uint32_t get_CYCLE_CNT_OVF() const |
| 5940 | { |
| 5941 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 5942 | return value; |
| 5943 | } |
| 5944 | uint32_t get_CYCLE_CNT_OVF() const volatile |
| 5945 | { |
| 5946 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 5947 | return value; |
| 5948 | } |
| 5949 | CONSTEXPR pmovsset_r &set_CYCLE_CNT_OVF(uint32_t value) |
| 5950 | { |
| 5951 | word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31); |
| 5952 | return *this; |
| 5953 | } |
| 5954 | #endif |
| 5955 | }; |
| 5956 | |
| 5957 | // pmovsclr_r - Overflow flag status clear register |
| 5958 | struct pmovsclr_r |
| 5959 | { |
| 5960 | #ifndef __cplusplus |
| 5961 | union |
| 5962 | { |
| 5963 | struct |
| 5964 | { |
| 5965 | uint32_t EVENT_CNT_0_OVF : 1; // Event counter overflow clear bit for PMEVCNTR0 |
| 5966 | uint32_t EVENT_CNT_1_OVF : 1; // Event counter overflow clear bit for PMEVCNTR1 |
| 5967 | uint32_t EVENT_CNT_2_OVF : 1; // Event counter overflow clear bit for PMEVCNTR2 |
| 5968 | uint32_t EVENT_CNT_3_OVF : 1; // Event counter overflow clear bit for PMEVCNTR3 |
| 5969 | uint32_t reserved0 : 27; |
| 5970 | uint32_t CYCLE_CNT_OVF : 1; // PMCCNTR overflow clear bit |
| 5971 | }; |
| 5972 | uint32_t word; |
| 5973 | }; |
| 5974 | #else |
| 5975 | private: |
| 5976 | uint32_t word0; |
| 5977 | |
| 5978 | public: |
| 5979 | CONSTEXPR pmovsclr_r() : word0(0) {} |
| 5980 | CONSTEXPR pmovsclr_r(uint32_t init) : word0(init) {} |
| 5981 | CONSTEXPR void operator=(uint32_t value) |
| 5982 | { |
| 5983 | word0 = value; |
| 5984 | } |
| 5985 | void operator=(uint32_t value) volatile |
| 5986 | { |
| 5987 | word0 = value; |
| 5988 | } |
| 5989 | CONSTEXPR operator uint32_t() |
| 5990 | { |
| 5991 | return word0; |
| 5992 | } |
| 5993 | operator uint32_t() volatile |
| 5994 | { |
| 5995 | return word0; |
| 5996 | } |
| 5997 | pmovsclr_r copy() volatile |
| 5998 | { |
| 5999 | return *this; |
| 6000 | } |
| 6001 | CONSTEXPR uint32_t get_EVENT_CNT_0_OVF() const |
| 6002 | { |
| 6003 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 6004 | return value; |
| 6005 | } |
| 6006 | uint32_t get_EVENT_CNT_0_OVF() const volatile |
| 6007 | { |
| 6008 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 6009 | return value; |
| 6010 | } |
| 6011 | CONSTEXPR pmovsclr_r &set_EVENT_CNT_0_OVF(uint32_t value) |
| 6012 | { |
| 6013 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 6014 | return *this; |
| 6015 | } |
| 6016 | CONSTEXPR uint32_t get_EVENT_CNT_1_OVF() const |
| 6017 | { |
| 6018 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 6019 | return value; |
| 6020 | } |
| 6021 | uint32_t get_EVENT_CNT_1_OVF() const volatile |
| 6022 | { |
| 6023 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 6024 | return value; |
| 6025 | } |
| 6026 | CONSTEXPR pmovsclr_r &set_EVENT_CNT_1_OVF(uint32_t value) |
| 6027 | { |
| 6028 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 6029 | return *this; |
| 6030 | } |
| 6031 | CONSTEXPR uint32_t get_EVENT_CNT_2_OVF() const |
| 6032 | { |
| 6033 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 6034 | return value; |
| 6035 | } |
| 6036 | uint32_t get_EVENT_CNT_2_OVF() const volatile |
| 6037 | { |
| 6038 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 6039 | return value; |
| 6040 | } |
| 6041 | CONSTEXPR pmovsclr_r &set_EVENT_CNT_2_OVF(uint32_t value) |
| 6042 | { |
| 6043 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 6044 | return *this; |
| 6045 | } |
| 6046 | CONSTEXPR uint32_t get_EVENT_CNT_3_OVF() const |
| 6047 | { |
| 6048 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 6049 | return value; |
| 6050 | } |
| 6051 | uint32_t get_EVENT_CNT_3_OVF() const volatile |
| 6052 | { |
| 6053 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 6054 | return value; |
| 6055 | } |
| 6056 | CONSTEXPR pmovsclr_r &set_EVENT_CNT_3_OVF(uint32_t value) |
| 6057 | { |
| 6058 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 6059 | return *this; |
| 6060 | } |
| 6061 | CONSTEXPR uint32_t get_CYCLE_CNT_OVF() const |
| 6062 | { |
| 6063 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 6064 | return value; |
| 6065 | } |
| 6066 | uint32_t get_CYCLE_CNT_OVF() const volatile |
| 6067 | { |
| 6068 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 6069 | return value; |
| 6070 | } |
| 6071 | CONSTEXPR pmovsclr_r &set_CYCLE_CNT_OVF(uint32_t value) |
| 6072 | { |
| 6073 | word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31); |
| 6074 | return *this; |
| 6075 | } |
| 6076 | #endif |
| 6077 | }; |
| 6078 | |
| 6079 | // pmintset_r - Interrupt enable set register |
| 6080 | struct pmintset_r |
| 6081 | { |
| 6082 | #ifndef __cplusplus |
| 6083 | union |
| 6084 | { |
| 6085 | struct |
| 6086 | { |
| 6087 | uint32_t EVENT_CNT_0_INT : 1; // Event counter overflow interrupt request enable bit for PMEVCNTR0 |
| 6088 | uint32_t EVENT_CNT_1_INT : 1; // Event counter overflow interrupt request enable bit for PMEVCNTR1 |
| 6089 | uint32_t EVENT_CNT_2_INT : 1; // Event counter overflow interrupt request enable bit for PMEVCNTR2 |
| 6090 | uint32_t EVENT_CNT_3_INT : 1; // Event counter overflow interrupt request enable bit for PMEVCNTR3 |
| 6091 | uint32_t reserved0 : 27; |
| 6092 | uint32_t CYCLE_CNT_INT : 1; // PMCCNTR overflow interrupt request enable bit |
| 6093 | }; |
| 6094 | uint32_t word; |
| 6095 | }; |
| 6096 | #else |
| 6097 | private: |
| 6098 | uint32_t word0; |
| 6099 | |
| 6100 | public: |
| 6101 | CONSTEXPR pmintset_r() : word0(0) {} |
| 6102 | CONSTEXPR pmintset_r(uint32_t init) : word0(init) {} |
| 6103 | CONSTEXPR void operator=(uint32_t value) |
| 6104 | { |
| 6105 | word0 = value; |
| 6106 | } |
| 6107 | void operator=(uint32_t value) volatile |
| 6108 | { |
| 6109 | word0 = value; |
| 6110 | } |
| 6111 | CONSTEXPR operator uint32_t() |
| 6112 | { |
| 6113 | return word0; |
| 6114 | } |
| 6115 | operator uint32_t() volatile |
| 6116 | { |
| 6117 | return word0; |
| 6118 | } |
| 6119 | pmintset_r copy() volatile |
| 6120 | { |
| 6121 | return *this; |
| 6122 | } |
| 6123 | CONSTEXPR uint32_t get_EVENT_CNT_0_INT() const |
| 6124 | { |
| 6125 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 6126 | return value; |
| 6127 | } |
| 6128 | uint32_t get_EVENT_CNT_0_INT() const volatile |
| 6129 | { |
| 6130 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 6131 | return value; |
| 6132 | } |
| 6133 | CONSTEXPR pmintset_r &set_EVENT_CNT_0_INT(uint32_t value) |
| 6134 | { |
| 6135 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 6136 | return *this; |
| 6137 | } |
| 6138 | CONSTEXPR uint32_t get_EVENT_CNT_1_INT() const |
| 6139 | { |
| 6140 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 6141 | return value; |
| 6142 | } |
| 6143 | uint32_t get_EVENT_CNT_1_INT() const volatile |
| 6144 | { |
| 6145 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 6146 | return value; |
| 6147 | } |
| 6148 | CONSTEXPR pmintset_r &set_EVENT_CNT_1_INT(uint32_t value) |
| 6149 | { |
| 6150 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 6151 | return *this; |
| 6152 | } |
| 6153 | CONSTEXPR uint32_t get_EVENT_CNT_2_INT() const |
| 6154 | { |
| 6155 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 6156 | return value; |
| 6157 | } |
| 6158 | uint32_t get_EVENT_CNT_2_INT() const volatile |
| 6159 | { |
| 6160 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 6161 | return value; |
| 6162 | } |
| 6163 | CONSTEXPR pmintset_r &set_EVENT_CNT_2_INT(uint32_t value) |
| 6164 | { |
| 6165 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 6166 | return *this; |
| 6167 | } |
| 6168 | CONSTEXPR uint32_t get_EVENT_CNT_3_INT() const |
| 6169 | { |
| 6170 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 6171 | return value; |
| 6172 | } |
| 6173 | uint32_t get_EVENT_CNT_3_INT() const volatile |
| 6174 | { |
| 6175 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 6176 | return value; |
| 6177 | } |
| 6178 | CONSTEXPR pmintset_r &set_EVENT_CNT_3_INT(uint32_t value) |
| 6179 | { |
| 6180 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 6181 | return *this; |
| 6182 | } |
| 6183 | CONSTEXPR uint32_t get_CYCLE_CNT_INT() const |
| 6184 | { |
| 6185 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 6186 | return value; |
| 6187 | } |
| 6188 | uint32_t get_CYCLE_CNT_INT() const volatile |
| 6189 | { |
| 6190 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 6191 | return value; |
| 6192 | } |
| 6193 | CONSTEXPR pmintset_r &set_CYCLE_CNT_INT(uint32_t value) |
| 6194 | { |
| 6195 | word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31); |
| 6196 | return *this; |
| 6197 | } |
| 6198 | #endif |
| 6199 | }; |
| 6200 | |
| 6201 | // pmintclr_r - Interrupt enable clear register |
| 6202 | struct pmintclr_r |
| 6203 | { |
| 6204 | #ifndef __cplusplus |
| 6205 | union |
| 6206 | { |
| 6207 | struct |
| 6208 | { |
| 6209 | uint32_t EVENT_CNT_0_INT : 1; // Event counter overflow interrupt request disable bit for PMEVCNTR0 |
| 6210 | uint32_t EVENT_CNT_1_INT : 1; // Event counter overflow interrupt request disable bit for PMEVCNTR1 |
| 6211 | uint32_t EVENT_CNT_2_INT : 1; // Event counter overflow interrupt request disable bit for PMEVCNTR2 |
| 6212 | uint32_t EVENT_CNT_3_INT : 1; // Event counter overflow interrupt request disable bit for PMEVCNTR3 |
| 6213 | uint32_t reserved0 : 27; |
| 6214 | uint32_t CYCLE_CNT_INT : 1; // PMCCNTR overflow interrupt request disable bit |
| 6215 | }; |
| 6216 | uint32_t word; |
| 6217 | }; |
| 6218 | #else |
| 6219 | private: |
| 6220 | uint32_t word0; |
| 6221 | |
| 6222 | public: |
| 6223 | CONSTEXPR pmintclr_r() : word0(0) {} |
| 6224 | CONSTEXPR pmintclr_r(uint32_t init) : word0(init) {} |
| 6225 | CONSTEXPR void operator=(uint32_t value) |
| 6226 | { |
| 6227 | word0 = value; |
| 6228 | } |
| 6229 | void operator=(uint32_t value) volatile |
| 6230 | { |
| 6231 | word0 = value; |
| 6232 | } |
| 6233 | CONSTEXPR operator uint32_t() |
| 6234 | { |
| 6235 | return word0; |
| 6236 | } |
| 6237 | operator uint32_t() volatile |
| 6238 | { |
| 6239 | return word0; |
| 6240 | } |
| 6241 | pmintclr_r copy() volatile |
| 6242 | { |
| 6243 | return *this; |
| 6244 | } |
| 6245 | CONSTEXPR uint32_t get_EVENT_CNT_0_INT() const |
| 6246 | { |
| 6247 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 6248 | return value; |
| 6249 | } |
| 6250 | uint32_t get_EVENT_CNT_0_INT() const volatile |
| 6251 | { |
| 6252 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 0)); |
| 6253 | return value; |
| 6254 | } |
| 6255 | CONSTEXPR pmintclr_r &set_EVENT_CNT_0_INT(uint32_t value) |
| 6256 | { |
| 6257 | word0 = (((~((1U << 1) - 1)) << 0) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 0); |
| 6258 | return *this; |
| 6259 | } |
| 6260 | CONSTEXPR uint32_t get_EVENT_CNT_1_INT() const |
| 6261 | { |
| 6262 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 6263 | return value; |
| 6264 | } |
| 6265 | uint32_t get_EVENT_CNT_1_INT() const volatile |
| 6266 | { |
| 6267 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 1)); |
| 6268 | return value; |
| 6269 | } |
| 6270 | CONSTEXPR pmintclr_r &set_EVENT_CNT_1_INT(uint32_t value) |
| 6271 | { |
| 6272 | word0 = (((~((1U << 1) - 1)) << 1) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 1); |
| 6273 | return *this; |
| 6274 | } |
| 6275 | CONSTEXPR uint32_t get_EVENT_CNT_2_INT() const |
| 6276 | { |
| 6277 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 6278 | return value; |
| 6279 | } |
| 6280 | uint32_t get_EVENT_CNT_2_INT() const volatile |
| 6281 | { |
| 6282 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 2)); |
| 6283 | return value; |
| 6284 | } |
| 6285 | CONSTEXPR pmintclr_r &set_EVENT_CNT_2_INT(uint32_t value) |
| 6286 | { |
| 6287 | word0 = (((~((1U << 1) - 1)) << 2) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 2); |
| 6288 | return *this; |
| 6289 | } |
| 6290 | CONSTEXPR uint32_t get_EVENT_CNT_3_INT() const |
| 6291 | { |
| 6292 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 6293 | return value; |
| 6294 | } |
| 6295 | uint32_t get_EVENT_CNT_3_INT() const volatile |
| 6296 | { |
| 6297 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 3)); |
| 6298 | return value; |
| 6299 | } |
| 6300 | CONSTEXPR pmintclr_r &set_EVENT_CNT_3_INT(uint32_t value) |
| 6301 | { |
| 6302 | word0 = (((~((1U << 1) - 1)) << 3) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 3); |
| 6303 | return *this; |
| 6304 | } |
| 6305 | CONSTEXPR uint32_t get_CYCLE_CNT_INT() const |
| 6306 | { |
| 6307 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 6308 | return value; |
| 6309 | } |
| 6310 | uint32_t get_CYCLE_CNT_INT() const volatile |
| 6311 | { |
| 6312 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 31)); |
| 6313 | return value; |
| 6314 | } |
| 6315 | CONSTEXPR pmintclr_r &set_CYCLE_CNT_INT(uint32_t value) |
| 6316 | { |
| 6317 | word0 = (((~((1U << 1) - 1)) << 31) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 31); |
| 6318 | return *this; |
| 6319 | } |
| 6320 | #endif |
| 6321 | }; |
| 6322 | |
| 6323 | // pmccntr_r - Performance monitor cycle count register |
| 6324 | struct pmccntr_r |
| 6325 | { |
| 6326 | #ifndef __cplusplus |
| 6327 | union |
| 6328 | { |
| 6329 | struct |
| 6330 | { |
| 6331 | uint32_t CYCLE_CNT_LO : 32; // Cycle count - LSB |
| 6332 | uint32_t CYCLE_CNT_HI : 16; // Cycle count - MSB |
| 6333 | uint32_t reserved0 : 16; |
| 6334 | }; |
| 6335 | uint32_t word[2]; |
| 6336 | }; |
| 6337 | #else |
| 6338 | private: |
| 6339 | uint32_t word0; |
| 6340 | uint32_t word1; |
| 6341 | |
| 6342 | public: |
| 6343 | CONSTEXPR pmccntr_r() : word0(0), word1(0) {} |
| 6344 | CONSTEXPR pmccntr_r(uint64_t init) : |
| 6345 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 6346 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 6347 | { |
| 6348 | } |
| 6349 | CONSTEXPR void operator=(uint64_t value) |
| 6350 | { |
| 6351 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 6352 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 6353 | } |
| 6354 | void operator=(uint64_t value) volatile |
| 6355 | { |
| 6356 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 6357 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 6358 | } |
| 6359 | CONSTEXPR operator uint64_t() |
| 6360 | { |
| 6361 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 6362 | } |
| 6363 | operator uint64_t() volatile |
| 6364 | { |
| 6365 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 6366 | } |
| 6367 | pmccntr_r copy() volatile |
| 6368 | { |
| 6369 | return *this; |
| 6370 | } |
| 6371 | #endif |
| 6372 | }; |
| 6373 | |
| 6374 | // pmccntr_cfg_r - Set start/stop event on the cycle counter |
| 6375 | struct pmccntr_cfg_r |
| 6376 | { |
| 6377 | #ifndef __cplusplus |
| 6378 | union |
| 6379 | { |
| 6380 | struct |
| 6381 | { |
| 6382 | uint32_t CYCLE_CNT_CFG_START : 10; // Cycle counter start event |
| 6383 | uint32_t reserved0 : 6; |
| 6384 | uint32_t CYCLE_CNT_CFG_STOP : 10; // Cycle counter stop event |
| 6385 | uint32_t reserved1 : 6; |
| 6386 | }; |
| 6387 | uint32_t word; |
| 6388 | }; |
| 6389 | #else |
| 6390 | private: |
| 6391 | uint32_t word0; |
| 6392 | |
| 6393 | public: |
| 6394 | CONSTEXPR pmccntr_cfg_r() : word0(0) {} |
| 6395 | CONSTEXPR pmccntr_cfg_r(uint32_t init) : word0(init) {} |
| 6396 | CONSTEXPR void operator=(uint32_t value) |
| 6397 | { |
| 6398 | word0 = value; |
| 6399 | } |
| 6400 | void operator=(uint32_t value) volatile |
| 6401 | { |
| 6402 | word0 = value; |
| 6403 | } |
| 6404 | CONSTEXPR operator uint32_t() |
| 6405 | { |
| 6406 | return word0; |
| 6407 | } |
| 6408 | operator uint32_t() volatile |
| 6409 | { |
| 6410 | return word0; |
| 6411 | } |
| 6412 | pmccntr_cfg_r copy() volatile |
| 6413 | { |
| 6414 | return *this; |
| 6415 | } |
| 6416 | CONSTEXPR NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_START() const |
| 6417 | { |
| 6418 | NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0)); |
| 6419 | return value; |
| 6420 | } |
| 6421 | NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_START() const volatile |
| 6422 | { |
| 6423 | NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0)); |
| 6424 | return value; |
| 6425 | } |
| 6426 | CONSTEXPR pmccntr_cfg_r &set_CYCLE_CNT_CFG_START(NPU_NAMESPACE::pmu_event value) |
| 6427 | { |
| 6428 | word0 = (((~((1U << 10) - 1)) << 0) & word0) | ((((1U << 10) - 1) & static_cast<uint32_t>(value)) << 0); |
| 6429 | return *this; |
| 6430 | } |
| 6431 | CONSTEXPR NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_STOP() const |
| 6432 | { |
| 6433 | NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 16)); |
| 6434 | return value; |
| 6435 | } |
| 6436 | NPU_NAMESPACE::pmu_event get_CYCLE_CNT_CFG_STOP() const volatile |
| 6437 | { |
| 6438 | NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 16)); |
| 6439 | return value; |
| 6440 | } |
| 6441 | CONSTEXPR pmccntr_cfg_r &set_CYCLE_CNT_CFG_STOP(NPU_NAMESPACE::pmu_event value) |
| 6442 | { |
| 6443 | word0 = (((~((1U << 10) - 1)) << 16) & word0) | ((((1U << 10) - 1) & static_cast<uint32_t>(value)) << 16); |
| 6444 | return *this; |
| 6445 | } |
| 6446 | #endif |
| 6447 | }; |
| 6448 | |
| 6449 | // pmcaxi_chan_r - Set which AXI channel to monitor for latency measurements in PMU |
| 6450 | struct pmcaxi_chan_r |
| 6451 | { |
| 6452 | #ifndef __cplusplus |
| 6453 | union |
| 6454 | { |
| 6455 | struct |
| 6456 | { |
| 6457 | uint32_t CH_SEL : 4; // Channel select for latency measurements |
| 6458 | uint32_t reserved0 : 4; |
| 6459 | uint32_t AXI_CNT_SEL : 2; // AXI counter to monitor for latency measurements |
| 6460 | uint32_t BW_CH_SEL_EN : 1; // Bandwidth channel selector |
| 6461 | uint32_t reserved1 : 21; |
| 6462 | }; |
| 6463 | uint32_t word; |
| 6464 | }; |
| 6465 | #else |
| 6466 | private: |
| 6467 | uint32_t word0; |
| 6468 | |
| 6469 | public: |
| 6470 | CONSTEXPR pmcaxi_chan_r() : word0(0) {} |
| 6471 | CONSTEXPR pmcaxi_chan_r(uint32_t init) : word0(init) {} |
| 6472 | CONSTEXPR void operator=(uint32_t value) |
| 6473 | { |
| 6474 | word0 = value; |
| 6475 | } |
| 6476 | void operator=(uint32_t value) volatile |
| 6477 | { |
| 6478 | word0 = value; |
| 6479 | } |
| 6480 | CONSTEXPR operator uint32_t() |
| 6481 | { |
| 6482 | return word0; |
| 6483 | } |
| 6484 | operator uint32_t() volatile |
| 6485 | { |
| 6486 | return word0; |
| 6487 | } |
| 6488 | pmcaxi_chan_r copy() volatile |
| 6489 | { |
| 6490 | return *this; |
| 6491 | } |
| 6492 | CONSTEXPR NPU_NAMESPACE::pmu_axi_channel get_CH_SEL() const |
| 6493 | { |
| 6494 | NPU_NAMESPACE::pmu_axi_channel value = |
| 6495 | static_cast<NPU_NAMESPACE::pmu_axi_channel>(((1U << 4) - 1) & (word0 >> 0)); |
| 6496 | return value; |
| 6497 | } |
| 6498 | NPU_NAMESPACE::pmu_axi_channel get_CH_SEL() const volatile |
| 6499 | { |
| 6500 | NPU_NAMESPACE::pmu_axi_channel value = |
| 6501 | static_cast<NPU_NAMESPACE::pmu_axi_channel>(((1U << 4) - 1) & (word0 >> 0)); |
| 6502 | return value; |
| 6503 | } |
| 6504 | CONSTEXPR pmcaxi_chan_r &set_CH_SEL(NPU_NAMESPACE::pmu_axi_channel value) |
| 6505 | { |
| 6506 | word0 = (((~((1U << 4) - 1)) << 0) & word0) | ((((1U << 4) - 1) & static_cast<uint32_t>(value)) << 0); |
| 6507 | return *this; |
| 6508 | } |
| 6509 | CONSTEXPR uint32_t get_AXI_CNT_SEL() const |
| 6510 | { |
| 6511 | uint32_t value = static_cast<uint32_t>(((1U << 2) - 1) & (word0 >> 8)); |
| 6512 | return value; |
| 6513 | } |
| 6514 | uint32_t get_AXI_CNT_SEL() const volatile |
| 6515 | { |
| 6516 | uint32_t value = static_cast<uint32_t>(((1U << 2) - 1) & (word0 >> 8)); |
| 6517 | return value; |
| 6518 | } |
| 6519 | CONSTEXPR pmcaxi_chan_r &set_AXI_CNT_SEL(uint32_t value) |
| 6520 | { |
| 6521 | word0 = (((~((1U << 2) - 1)) << 8) & word0) | ((((1U << 2) - 1) & static_cast<uint32_t>(value)) << 8); |
| 6522 | return *this; |
| 6523 | } |
| 6524 | CONSTEXPR uint32_t get_BW_CH_SEL_EN() const |
| 6525 | { |
| 6526 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 6527 | return value; |
| 6528 | } |
| 6529 | uint32_t get_BW_CH_SEL_EN() const volatile |
| 6530 | { |
| 6531 | uint32_t value = static_cast<uint32_t>(((1U << 1) - 1) & (word0 >> 10)); |
| 6532 | return value; |
| 6533 | } |
| 6534 | CONSTEXPR pmcaxi_chan_r &set_BW_CH_SEL_EN(uint32_t value) |
| 6535 | { |
| 6536 | word0 = (((~((1U << 1) - 1)) << 10) & word0) | ((((1U << 1) - 1) & static_cast<uint32_t>(value)) << 10); |
| 6537 | return *this; |
| 6538 | } |
| 6539 | #endif |
| 6540 | }; |
| 6541 | |
| 6542 | // kernel_x_r - Kernel X offset of in kernel decomposition |
| 6543 | struct kernel_x_r |
| 6544 | { |
| 6545 | #ifndef __cplusplus |
| 6546 | union |
| 6547 | { |
| 6548 | struct |
| 6549 | { |
| 6550 | uint32_t value : 32; // 32-bit register value |
| 6551 | }; |
| 6552 | uint32_t word; |
| 6553 | }; |
| 6554 | #else |
| 6555 | private: |
| 6556 | uint32_t word0; |
| 6557 | |
| 6558 | public: |
| 6559 | CONSTEXPR kernel_x_r() : word0(0) {} |
| 6560 | CONSTEXPR kernel_x_r(uint32_t init) : word0(init) {} |
| 6561 | CONSTEXPR void operator=(uint32_t value) |
| 6562 | { |
| 6563 | word0 = value; |
| 6564 | } |
| 6565 | void operator=(uint32_t value) volatile |
| 6566 | { |
| 6567 | word0 = value; |
| 6568 | } |
| 6569 | CONSTEXPR operator uint32_t() |
| 6570 | { |
| 6571 | return word0; |
| 6572 | } |
| 6573 | operator uint32_t() volatile |
| 6574 | { |
| 6575 | return word0; |
| 6576 | } |
| 6577 | kernel_x_r copy() volatile |
| 6578 | { |
| 6579 | return *this; |
| 6580 | } |
| 6581 | CONSTEXPR uint32_t get_value() const |
| 6582 | { |
| 6583 | uint32_t value = static_cast<uint32_t>(word0); |
| 6584 | return value; |
| 6585 | } |
| 6586 | uint32_t get_value() const volatile |
| 6587 | { |
| 6588 | uint32_t value = static_cast<uint32_t>(word0); |
| 6589 | return value; |
| 6590 | } |
| 6591 | CONSTEXPR kernel_x_r &set_value(uint32_t value) |
| 6592 | { |
| 6593 | word0 = static_cast<uint32_t>(value); |
| 6594 | return *this; |
| 6595 | } |
| 6596 | #endif |
| 6597 | }; |
| 6598 | |
| 6599 | // kernel_y_r - Kernel Y offset of in kernel decomposition |
| 6600 | struct kernel_y_r |
| 6601 | { |
| 6602 | #ifndef __cplusplus |
| 6603 | union |
| 6604 | { |
| 6605 | struct |
| 6606 | { |
| 6607 | uint32_t value : 32; // 32-bit register value |
| 6608 | }; |
| 6609 | uint32_t word; |
| 6610 | }; |
| 6611 | #else |
| 6612 | private: |
| 6613 | uint32_t word0; |
| 6614 | |
| 6615 | public: |
| 6616 | CONSTEXPR kernel_y_r() : word0(0) {} |
| 6617 | CONSTEXPR kernel_y_r(uint32_t init) : word0(init) {} |
| 6618 | CONSTEXPR void operator=(uint32_t value) |
| 6619 | { |
| 6620 | word0 = value; |
| 6621 | } |
| 6622 | void operator=(uint32_t value) volatile |
| 6623 | { |
| 6624 | word0 = value; |
| 6625 | } |
| 6626 | CONSTEXPR operator uint32_t() |
| 6627 | { |
| 6628 | return word0; |
| 6629 | } |
| 6630 | operator uint32_t() volatile |
| 6631 | { |
| 6632 | return word0; |
| 6633 | } |
| 6634 | kernel_y_r copy() volatile |
| 6635 | { |
| 6636 | return *this; |
| 6637 | } |
| 6638 | CONSTEXPR uint32_t get_value() const |
| 6639 | { |
| 6640 | uint32_t value = static_cast<uint32_t>(word0); |
| 6641 | return value; |
| 6642 | } |
| 6643 | uint32_t get_value() const volatile |
| 6644 | { |
| 6645 | uint32_t value = static_cast<uint32_t>(word0); |
| 6646 | return value; |
| 6647 | } |
| 6648 | CONSTEXPR kernel_y_r &set_value(uint32_t value) |
| 6649 | { |
| 6650 | word0 = static_cast<uint32_t>(value); |
| 6651 | return *this; |
| 6652 | } |
| 6653 | #endif |
| 6654 | }; |
| 6655 | |
| 6656 | // kernel_w_m1_r - Kernel (width-1) of current block |
| 6657 | struct kernel_w_m1_r |
| 6658 | { |
| 6659 | #ifndef __cplusplus |
| 6660 | union |
| 6661 | { |
| 6662 | struct |
| 6663 | { |
| 6664 | uint32_t value : 32; // 32-bit register value |
| 6665 | }; |
| 6666 | uint32_t word; |
| 6667 | }; |
| 6668 | #else |
| 6669 | private: |
| 6670 | uint32_t word0; |
| 6671 | |
| 6672 | public: |
| 6673 | CONSTEXPR kernel_w_m1_r() : word0(0) {} |
| 6674 | CONSTEXPR kernel_w_m1_r(uint32_t init) : word0(init) {} |
| 6675 | CONSTEXPR void operator=(uint32_t value) |
| 6676 | { |
| 6677 | word0 = value; |
| 6678 | } |
| 6679 | void operator=(uint32_t value) volatile |
| 6680 | { |
| 6681 | word0 = value; |
| 6682 | } |
| 6683 | CONSTEXPR operator uint32_t() |
| 6684 | { |
| 6685 | return word0; |
| 6686 | } |
| 6687 | operator uint32_t() volatile |
| 6688 | { |
| 6689 | return word0; |
| 6690 | } |
| 6691 | kernel_w_m1_r copy() volatile |
| 6692 | { |
| 6693 | return *this; |
| 6694 | } |
| 6695 | CONSTEXPR uint32_t get_value() const |
| 6696 | { |
| 6697 | uint32_t value = static_cast<uint32_t>(word0); |
| 6698 | return value; |
| 6699 | } |
| 6700 | uint32_t get_value() const volatile |
| 6701 | { |
| 6702 | uint32_t value = static_cast<uint32_t>(word0); |
| 6703 | return value; |
| 6704 | } |
| 6705 | CONSTEXPR kernel_w_m1_r &set_value(uint32_t value) |
| 6706 | { |
| 6707 | word0 = static_cast<uint32_t>(value); |
| 6708 | return *this; |
| 6709 | } |
| 6710 | #endif |
| 6711 | }; |
| 6712 | |
| 6713 | // kernel_h_m1_r - Kernel (height-1) of current block |
| 6714 | struct kernel_h_m1_r |
| 6715 | { |
| 6716 | #ifndef __cplusplus |
| 6717 | union |
| 6718 | { |
| 6719 | struct |
| 6720 | { |
| 6721 | uint32_t value : 32; // 32-bit register value |
| 6722 | }; |
| 6723 | uint32_t word; |
| 6724 | }; |
| 6725 | #else |
| 6726 | private: |
| 6727 | uint32_t word0; |
| 6728 | |
| 6729 | public: |
| 6730 | CONSTEXPR kernel_h_m1_r() : word0(0) {} |
| 6731 | CONSTEXPR kernel_h_m1_r(uint32_t init) : word0(init) {} |
| 6732 | CONSTEXPR void operator=(uint32_t value) |
| 6733 | { |
| 6734 | word0 = value; |
| 6735 | } |
| 6736 | void operator=(uint32_t value) volatile |
| 6737 | { |
| 6738 | word0 = value; |
| 6739 | } |
| 6740 | CONSTEXPR operator uint32_t() |
| 6741 | { |
| 6742 | return word0; |
| 6743 | } |
| 6744 | operator uint32_t() volatile |
| 6745 | { |
| 6746 | return word0; |
| 6747 | } |
| 6748 | kernel_h_m1_r copy() volatile |
| 6749 | { |
| 6750 | return *this; |
| 6751 | } |
| 6752 | CONSTEXPR uint32_t get_value() const |
| 6753 | { |
| 6754 | uint32_t value = static_cast<uint32_t>(word0); |
| 6755 | return value; |
| 6756 | } |
| 6757 | uint32_t get_value() const volatile |
| 6758 | { |
| 6759 | uint32_t value = static_cast<uint32_t>(word0); |
| 6760 | return value; |
| 6761 | } |
| 6762 | CONSTEXPR kernel_h_m1_r &set_value(uint32_t value) |
| 6763 | { |
| 6764 | word0 = static_cast<uint32_t>(value); |
| 6765 | return *this; |
| 6766 | } |
| 6767 | #endif |
| 6768 | }; |
| 6769 | |
| 6770 | // ofm_cblk_width_m1_r - OFM current block (width-1) |
| 6771 | struct ofm_cblk_width_m1_r |
| 6772 | { |
| 6773 | #ifndef __cplusplus |
| 6774 | union |
| 6775 | { |
| 6776 | struct |
| 6777 | { |
| 6778 | uint32_t value : 32; // 32-bit register value |
| 6779 | }; |
| 6780 | uint32_t word; |
| 6781 | }; |
| 6782 | #else |
| 6783 | private: |
| 6784 | uint32_t word0; |
| 6785 | |
| 6786 | public: |
| 6787 | CONSTEXPR ofm_cblk_width_m1_r() : word0(0) {} |
| 6788 | CONSTEXPR ofm_cblk_width_m1_r(uint32_t init) : word0(init) {} |
| 6789 | CONSTEXPR void operator=(uint32_t value) |
| 6790 | { |
| 6791 | word0 = value; |
| 6792 | } |
| 6793 | void operator=(uint32_t value) volatile |
| 6794 | { |
| 6795 | word0 = value; |
| 6796 | } |
| 6797 | CONSTEXPR operator uint32_t() |
| 6798 | { |
| 6799 | return word0; |
| 6800 | } |
| 6801 | operator uint32_t() volatile |
| 6802 | { |
| 6803 | return word0; |
| 6804 | } |
| 6805 | ofm_cblk_width_m1_r copy() volatile |
| 6806 | { |
| 6807 | return *this; |
| 6808 | } |
| 6809 | CONSTEXPR uint32_t get_value() const |
| 6810 | { |
| 6811 | uint32_t value = static_cast<uint32_t>(word0); |
| 6812 | return value; |
| 6813 | } |
| 6814 | uint32_t get_value() const volatile |
| 6815 | { |
| 6816 | uint32_t value = static_cast<uint32_t>(word0); |
| 6817 | return value; |
| 6818 | } |
| 6819 | CONSTEXPR ofm_cblk_width_m1_r &set_value(uint32_t value) |
| 6820 | { |
| 6821 | word0 = static_cast<uint32_t>(value); |
| 6822 | return *this; |
| 6823 | } |
| 6824 | #endif |
| 6825 | }; |
| 6826 | |
| 6827 | // ofm_cblk_height_m1_r - OFM current block (height-1) |
| 6828 | struct ofm_cblk_height_m1_r |
| 6829 | { |
| 6830 | #ifndef __cplusplus |
| 6831 | union |
| 6832 | { |
| 6833 | struct |
| 6834 | { |
| 6835 | uint32_t value : 32; // 32-bit register value |
| 6836 | }; |
| 6837 | uint32_t word; |
| 6838 | }; |
| 6839 | #else |
| 6840 | private: |
| 6841 | uint32_t word0; |
| 6842 | |
| 6843 | public: |
| 6844 | CONSTEXPR ofm_cblk_height_m1_r() : word0(0) {} |
| 6845 | CONSTEXPR ofm_cblk_height_m1_r(uint32_t init) : word0(init) {} |
| 6846 | CONSTEXPR void operator=(uint32_t value) |
| 6847 | { |
| 6848 | word0 = value; |
| 6849 | } |
| 6850 | void operator=(uint32_t value) volatile |
| 6851 | { |
| 6852 | word0 = value; |
| 6853 | } |
| 6854 | CONSTEXPR operator uint32_t() |
| 6855 | { |
| 6856 | return word0; |
| 6857 | } |
| 6858 | operator uint32_t() volatile |
| 6859 | { |
| 6860 | return word0; |
| 6861 | } |
| 6862 | ofm_cblk_height_m1_r copy() volatile |
| 6863 | { |
| 6864 | return *this; |
| 6865 | } |
| 6866 | CONSTEXPR uint32_t get_value() const |
| 6867 | { |
| 6868 | uint32_t value = static_cast<uint32_t>(word0); |
| 6869 | return value; |
| 6870 | } |
| 6871 | uint32_t get_value() const volatile |
| 6872 | { |
| 6873 | uint32_t value = static_cast<uint32_t>(word0); |
| 6874 | return value; |
| 6875 | } |
| 6876 | CONSTEXPR ofm_cblk_height_m1_r &set_value(uint32_t value) |
| 6877 | { |
| 6878 | word0 = static_cast<uint32_t>(value); |
| 6879 | return *this; |
| 6880 | } |
| 6881 | #endif |
| 6882 | }; |
| 6883 | |
| 6884 | // ofm_cblk_depth_m1_r - OFM current block (depth-1) |
| 6885 | struct ofm_cblk_depth_m1_r |
| 6886 | { |
| 6887 | #ifndef __cplusplus |
| 6888 | union |
| 6889 | { |
| 6890 | struct |
| 6891 | { |
| 6892 | uint32_t value : 32; // 32-bit register value |
| 6893 | }; |
| 6894 | uint32_t word; |
| 6895 | }; |
| 6896 | #else |
| 6897 | private: |
| 6898 | uint32_t word0; |
| 6899 | |
| 6900 | public: |
| 6901 | CONSTEXPR ofm_cblk_depth_m1_r() : word0(0) {} |
| 6902 | CONSTEXPR ofm_cblk_depth_m1_r(uint32_t init) : word0(init) {} |
| 6903 | CONSTEXPR void operator=(uint32_t value) |
| 6904 | { |
| 6905 | word0 = value; |
| 6906 | } |
| 6907 | void operator=(uint32_t value) volatile |
| 6908 | { |
| 6909 | word0 = value; |
| 6910 | } |
| 6911 | CONSTEXPR operator uint32_t() |
| 6912 | { |
| 6913 | return word0; |
| 6914 | } |
| 6915 | operator uint32_t() volatile |
| 6916 | { |
| 6917 | return word0; |
| 6918 | } |
| 6919 | ofm_cblk_depth_m1_r copy() volatile |
| 6920 | { |
| 6921 | return *this; |
| 6922 | } |
| 6923 | CONSTEXPR uint32_t get_value() const |
| 6924 | { |
| 6925 | uint32_t value = static_cast<uint32_t>(word0); |
| 6926 | return value; |
| 6927 | } |
| 6928 | uint32_t get_value() const volatile |
| 6929 | { |
| 6930 | uint32_t value = static_cast<uint32_t>(word0); |
| 6931 | return value; |
| 6932 | } |
| 6933 | CONSTEXPR ofm_cblk_depth_m1_r &set_value(uint32_t value) |
| 6934 | { |
| 6935 | word0 = static_cast<uint32_t>(value); |
| 6936 | return *this; |
| 6937 | } |
| 6938 | #endif |
| 6939 | }; |
| 6940 | |
| 6941 | // ifm_cblk_depth_m1_r - IFM current block (depth-1) |
| 6942 | struct ifm_cblk_depth_m1_r |
| 6943 | { |
| 6944 | #ifndef __cplusplus |
| 6945 | union |
| 6946 | { |
| 6947 | struct |
| 6948 | { |
| 6949 | uint32_t value : 32; // 32-bit register value |
| 6950 | }; |
| 6951 | uint32_t word; |
| 6952 | }; |
| 6953 | #else |
| 6954 | private: |
| 6955 | uint32_t word0; |
| 6956 | |
| 6957 | public: |
| 6958 | CONSTEXPR ifm_cblk_depth_m1_r() : word0(0) {} |
| 6959 | CONSTEXPR ifm_cblk_depth_m1_r(uint32_t init) : word0(init) {} |
| 6960 | CONSTEXPR void operator=(uint32_t value) |
| 6961 | { |
| 6962 | word0 = value; |
| 6963 | } |
| 6964 | void operator=(uint32_t value) volatile |
| 6965 | { |
| 6966 | word0 = value; |
| 6967 | } |
| 6968 | CONSTEXPR operator uint32_t() |
| 6969 | { |
| 6970 | return word0; |
| 6971 | } |
| 6972 | operator uint32_t() volatile |
| 6973 | { |
| 6974 | return word0; |
| 6975 | } |
| 6976 | ifm_cblk_depth_m1_r copy() volatile |
| 6977 | { |
| 6978 | return *this; |
| 6979 | } |
| 6980 | CONSTEXPR uint32_t get_value() const |
| 6981 | { |
| 6982 | uint32_t value = static_cast<uint32_t>(word0); |
| 6983 | return value; |
| 6984 | } |
| 6985 | uint32_t get_value() const volatile |
| 6986 | { |
| 6987 | uint32_t value = static_cast<uint32_t>(word0); |
| 6988 | return value; |
| 6989 | } |
| 6990 | CONSTEXPR ifm_cblk_depth_m1_r &set_value(uint32_t value) |
| 6991 | { |
| 6992 | word0 = static_cast<uint32_t>(value); |
| 6993 | return *this; |
| 6994 | } |
| 6995 | #endif |
| 6996 | }; |
| 6997 | |
| 6998 | // ofm_x_r - Block X coordinate in OFM |
| 6999 | struct ofm_x_r |
| 7000 | { |
| 7001 | #ifndef __cplusplus |
| 7002 | union |
| 7003 | { |
| 7004 | struct |
| 7005 | { |
| 7006 | uint32_t value : 32; // 32-bit register value |
| 7007 | }; |
| 7008 | uint32_t word; |
| 7009 | }; |
| 7010 | #else |
| 7011 | private: |
| 7012 | uint32_t word0; |
| 7013 | |
| 7014 | public: |
| 7015 | CONSTEXPR ofm_x_r() : word0(0) {} |
| 7016 | CONSTEXPR ofm_x_r(uint32_t init) : word0(init) {} |
| 7017 | CONSTEXPR void operator=(uint32_t value) |
| 7018 | { |
| 7019 | word0 = value; |
| 7020 | } |
| 7021 | void operator=(uint32_t value) volatile |
| 7022 | { |
| 7023 | word0 = value; |
| 7024 | } |
| 7025 | CONSTEXPR operator uint32_t() |
| 7026 | { |
| 7027 | return word0; |
| 7028 | } |
| 7029 | operator uint32_t() volatile |
| 7030 | { |
| 7031 | return word0; |
| 7032 | } |
| 7033 | ofm_x_r copy() volatile |
| 7034 | { |
| 7035 | return *this; |
| 7036 | } |
| 7037 | CONSTEXPR uint32_t get_value() const |
| 7038 | { |
| 7039 | uint32_t value = static_cast<uint32_t>(word0); |
| 7040 | return value; |
| 7041 | } |
| 7042 | uint32_t get_value() const volatile |
| 7043 | { |
| 7044 | uint32_t value = static_cast<uint32_t>(word0); |
| 7045 | return value; |
| 7046 | } |
| 7047 | CONSTEXPR ofm_x_r &set_value(uint32_t value) |
| 7048 | { |
| 7049 | word0 = static_cast<uint32_t>(value); |
| 7050 | return *this; |
| 7051 | } |
| 7052 | #endif |
| 7053 | }; |
| 7054 | |
| 7055 | // ofm_y_r - Block Y coordinate in OFM |
| 7056 | struct ofm_y_r |
| 7057 | { |
| 7058 | #ifndef __cplusplus |
| 7059 | union |
| 7060 | { |
| 7061 | struct |
| 7062 | { |
| 7063 | uint32_t value : 32; // 32-bit register value |
| 7064 | }; |
| 7065 | uint32_t word; |
| 7066 | }; |
| 7067 | #else |
| 7068 | private: |
| 7069 | uint32_t word0; |
| 7070 | |
| 7071 | public: |
| 7072 | CONSTEXPR ofm_y_r() : word0(0) {} |
| 7073 | CONSTEXPR ofm_y_r(uint32_t init) : word0(init) {} |
| 7074 | CONSTEXPR void operator=(uint32_t value) |
| 7075 | { |
| 7076 | word0 = value; |
| 7077 | } |
| 7078 | void operator=(uint32_t value) volatile |
| 7079 | { |
| 7080 | word0 = value; |
| 7081 | } |
| 7082 | CONSTEXPR operator uint32_t() |
| 7083 | { |
| 7084 | return word0; |
| 7085 | } |
| 7086 | operator uint32_t() volatile |
| 7087 | { |
| 7088 | return word0; |
| 7089 | } |
| 7090 | ofm_y_r copy() volatile |
| 7091 | { |
| 7092 | return *this; |
| 7093 | } |
| 7094 | CONSTEXPR uint32_t get_value() const |
| 7095 | { |
| 7096 | uint32_t value = static_cast<uint32_t>(word0); |
| 7097 | return value; |
| 7098 | } |
| 7099 | uint32_t get_value() const volatile |
| 7100 | { |
| 7101 | uint32_t value = static_cast<uint32_t>(word0); |
| 7102 | return value; |
| 7103 | } |
| 7104 | CONSTEXPR ofm_y_r &set_value(uint32_t value) |
| 7105 | { |
| 7106 | word0 = static_cast<uint32_t>(value); |
| 7107 | return *this; |
| 7108 | } |
| 7109 | #endif |
| 7110 | }; |
| 7111 | |
| 7112 | // ofm_z_r - Block Z (channel) coordinate in OFM |
| 7113 | struct ofm_z_r |
| 7114 | { |
| 7115 | #ifndef __cplusplus |
| 7116 | union |
| 7117 | { |
| 7118 | struct |
| 7119 | { |
| 7120 | uint32_t value : 32; // 32-bit register value |
| 7121 | }; |
| 7122 | uint32_t word; |
| 7123 | }; |
| 7124 | #else |
| 7125 | private: |
| 7126 | uint32_t word0; |
| 7127 | |
| 7128 | public: |
| 7129 | CONSTEXPR ofm_z_r() : word0(0) {} |
| 7130 | CONSTEXPR ofm_z_r(uint32_t init) : word0(init) {} |
| 7131 | CONSTEXPR void operator=(uint32_t value) |
| 7132 | { |
| 7133 | word0 = value; |
| 7134 | } |
| 7135 | void operator=(uint32_t value) volatile |
| 7136 | { |
| 7137 | word0 = value; |
| 7138 | } |
| 7139 | CONSTEXPR operator uint32_t() |
| 7140 | { |
| 7141 | return word0; |
| 7142 | } |
| 7143 | operator uint32_t() volatile |
| 7144 | { |
| 7145 | return word0; |
| 7146 | } |
| 7147 | ofm_z_r copy() volatile |
| 7148 | { |
| 7149 | return *this; |
| 7150 | } |
| 7151 | CONSTEXPR uint32_t get_value() const |
| 7152 | { |
| 7153 | uint32_t value = static_cast<uint32_t>(word0); |
| 7154 | return value; |
| 7155 | } |
| 7156 | uint32_t get_value() const volatile |
| 7157 | { |
| 7158 | uint32_t value = static_cast<uint32_t>(word0); |
| 7159 | return value; |
| 7160 | } |
| 7161 | CONSTEXPR ofm_z_r &set_value(uint32_t value) |
| 7162 | { |
| 7163 | word0 = static_cast<uint32_t>(value); |
| 7164 | return *this; |
| 7165 | } |
| 7166 | #endif |
| 7167 | }; |
| 7168 | |
| 7169 | // ifm_z_r - Block Z (channel) coordinate in IFM |
| 7170 | struct ifm_z_r |
| 7171 | { |
| 7172 | #ifndef __cplusplus |
| 7173 | union |
| 7174 | { |
| 7175 | struct |
| 7176 | { |
| 7177 | uint32_t value : 32; // 32-bit register value |
| 7178 | }; |
| 7179 | uint32_t word; |
| 7180 | }; |
| 7181 | #else |
| 7182 | private: |
| 7183 | uint32_t word0; |
| 7184 | |
| 7185 | public: |
| 7186 | CONSTEXPR ifm_z_r() : word0(0) {} |
| 7187 | CONSTEXPR ifm_z_r(uint32_t init) : word0(init) {} |
| 7188 | CONSTEXPR void operator=(uint32_t value) |
| 7189 | { |
| 7190 | word0 = value; |
| 7191 | } |
| 7192 | void operator=(uint32_t value) volatile |
| 7193 | { |
| 7194 | word0 = value; |
| 7195 | } |
| 7196 | CONSTEXPR operator uint32_t() |
| 7197 | { |
| 7198 | return word0; |
| 7199 | } |
| 7200 | operator uint32_t() volatile |
| 7201 | { |
| 7202 | return word0; |
| 7203 | } |
| 7204 | ifm_z_r copy() volatile |
| 7205 | { |
| 7206 | return *this; |
| 7207 | } |
| 7208 | CONSTEXPR uint32_t get_value() const |
| 7209 | { |
| 7210 | uint32_t value = static_cast<uint32_t>(word0); |
| 7211 | return value; |
| 7212 | } |
| 7213 | uint32_t get_value() const volatile |
| 7214 | { |
| 7215 | uint32_t value = static_cast<uint32_t>(word0); |
| 7216 | return value; |
| 7217 | } |
| 7218 | CONSTEXPR ifm_z_r &set_value(uint32_t value) |
| 7219 | { |
| 7220 | word0 = static_cast<uint32_t>(value); |
| 7221 | return *this; |
| 7222 | } |
| 7223 | #endif |
| 7224 | }; |
| 7225 | |
| 7226 | // pad_top_r - Block top pad |
| 7227 | struct pad_top_r |
| 7228 | { |
| 7229 | #ifndef __cplusplus |
| 7230 | union |
| 7231 | { |
| 7232 | struct |
| 7233 | { |
| 7234 | uint32_t value : 32; // 32-bit register value |
| 7235 | }; |
| 7236 | uint32_t word; |
| 7237 | }; |
| 7238 | #else |
| 7239 | private: |
| 7240 | uint32_t word0; |
| 7241 | |
| 7242 | public: |
| 7243 | CONSTEXPR pad_top_r() : word0(0) {} |
| 7244 | CONSTEXPR pad_top_r(uint32_t init) : word0(init) {} |
| 7245 | CONSTEXPR void operator=(uint32_t value) |
| 7246 | { |
| 7247 | word0 = value; |
| 7248 | } |
| 7249 | void operator=(uint32_t value) volatile |
| 7250 | { |
| 7251 | word0 = value; |
| 7252 | } |
| 7253 | CONSTEXPR operator uint32_t() |
| 7254 | { |
| 7255 | return word0; |
| 7256 | } |
| 7257 | operator uint32_t() volatile |
| 7258 | { |
| 7259 | return word0; |
| 7260 | } |
| 7261 | pad_top_r copy() volatile |
| 7262 | { |
| 7263 | return *this; |
| 7264 | } |
| 7265 | CONSTEXPR uint32_t get_value() const |
| 7266 | { |
| 7267 | uint32_t value = static_cast<uint32_t>(word0); |
| 7268 | return value; |
| 7269 | } |
| 7270 | uint32_t get_value() const volatile |
| 7271 | { |
| 7272 | uint32_t value = static_cast<uint32_t>(word0); |
| 7273 | return value; |
| 7274 | } |
| 7275 | CONSTEXPR pad_top_r &set_value(uint32_t value) |
| 7276 | { |
| 7277 | word0 = static_cast<uint32_t>(value); |
| 7278 | return *this; |
| 7279 | } |
| 7280 | #endif |
| 7281 | }; |
| 7282 | |
| 7283 | // pad_left_r - Block left pad |
| 7284 | struct pad_left_r |
| 7285 | { |
| 7286 | #ifndef __cplusplus |
| 7287 | union |
| 7288 | { |
| 7289 | struct |
| 7290 | { |
| 7291 | uint32_t value : 32; // 32-bit register value |
| 7292 | }; |
| 7293 | uint32_t word; |
| 7294 | }; |
| 7295 | #else |
| 7296 | private: |
| 7297 | uint32_t word0; |
| 7298 | |
| 7299 | public: |
| 7300 | CONSTEXPR pad_left_r() : word0(0) {} |
| 7301 | CONSTEXPR pad_left_r(uint32_t init) : word0(init) {} |
| 7302 | CONSTEXPR void operator=(uint32_t value) |
| 7303 | { |
| 7304 | word0 = value; |
| 7305 | } |
| 7306 | void operator=(uint32_t value) volatile |
| 7307 | { |
| 7308 | word0 = value; |
| 7309 | } |
| 7310 | CONSTEXPR operator uint32_t() |
| 7311 | { |
| 7312 | return word0; |
| 7313 | } |
| 7314 | operator uint32_t() volatile |
| 7315 | { |
| 7316 | return word0; |
| 7317 | } |
| 7318 | pad_left_r copy() volatile |
| 7319 | { |
| 7320 | return *this; |
| 7321 | } |
| 7322 | CONSTEXPR uint32_t get_value() const |
| 7323 | { |
| 7324 | uint32_t value = static_cast<uint32_t>(word0); |
| 7325 | return value; |
| 7326 | } |
| 7327 | uint32_t get_value() const volatile |
| 7328 | { |
| 7329 | uint32_t value = static_cast<uint32_t>(word0); |
| 7330 | return value; |
| 7331 | } |
| 7332 | CONSTEXPR pad_left_r &set_value(uint32_t value) |
| 7333 | { |
| 7334 | word0 = static_cast<uint32_t>(value); |
| 7335 | return *this; |
| 7336 | } |
| 7337 | #endif |
| 7338 | }; |
| 7339 | |
| 7340 | // ifm_cblk_width_r - IFM current block derived width |
| 7341 | struct ifm_cblk_width_r |
| 7342 | { |
| 7343 | #ifndef __cplusplus |
| 7344 | union |
| 7345 | { |
| 7346 | struct |
| 7347 | { |
| 7348 | uint32_t value : 32; // 32-bit register value |
| 7349 | }; |
| 7350 | uint32_t word; |
| 7351 | }; |
| 7352 | #else |
| 7353 | private: |
| 7354 | uint32_t word0; |
| 7355 | |
| 7356 | public: |
| 7357 | CONSTEXPR ifm_cblk_width_r() : word0(0) {} |
| 7358 | CONSTEXPR ifm_cblk_width_r(uint32_t init) : word0(init) {} |
| 7359 | CONSTEXPR void operator=(uint32_t value) |
| 7360 | { |
| 7361 | word0 = value; |
| 7362 | } |
| 7363 | void operator=(uint32_t value) volatile |
| 7364 | { |
| 7365 | word0 = value; |
| 7366 | } |
| 7367 | CONSTEXPR operator uint32_t() |
| 7368 | { |
| 7369 | return word0; |
| 7370 | } |
| 7371 | operator uint32_t() volatile |
| 7372 | { |
| 7373 | return word0; |
| 7374 | } |
| 7375 | ifm_cblk_width_r copy() volatile |
| 7376 | { |
| 7377 | return *this; |
| 7378 | } |
| 7379 | CONSTEXPR uint32_t get_value() const |
| 7380 | { |
| 7381 | uint32_t value = static_cast<uint32_t>(word0); |
| 7382 | return value; |
| 7383 | } |
| 7384 | uint32_t get_value() const volatile |
| 7385 | { |
| 7386 | uint32_t value = static_cast<uint32_t>(word0); |
| 7387 | return value; |
| 7388 | } |
| 7389 | CONSTEXPR ifm_cblk_width_r &set_value(uint32_t value) |
| 7390 | { |
| 7391 | word0 = static_cast<uint32_t>(value); |
| 7392 | return *this; |
| 7393 | } |
| 7394 | #endif |
| 7395 | }; |
| 7396 | |
| 7397 | // ifm_cblk_height_r - IFM current block derived height |
| 7398 | struct ifm_cblk_height_r |
| 7399 | { |
| 7400 | #ifndef __cplusplus |
| 7401 | union |
| 7402 | { |
| 7403 | struct |
| 7404 | { |
| 7405 | uint32_t value : 32; // 32-bit register value |
| 7406 | }; |
| 7407 | uint32_t word; |
| 7408 | }; |
| 7409 | #else |
| 7410 | private: |
| 7411 | uint32_t word0; |
| 7412 | |
| 7413 | public: |
| 7414 | CONSTEXPR ifm_cblk_height_r() : word0(0) {} |
| 7415 | CONSTEXPR ifm_cblk_height_r(uint32_t init) : word0(init) {} |
| 7416 | CONSTEXPR void operator=(uint32_t value) |
| 7417 | { |
| 7418 | word0 = value; |
| 7419 | } |
| 7420 | void operator=(uint32_t value) volatile |
| 7421 | { |
| 7422 | word0 = value; |
| 7423 | } |
| 7424 | CONSTEXPR operator uint32_t() |
| 7425 | { |
| 7426 | return word0; |
| 7427 | } |
| 7428 | operator uint32_t() volatile |
| 7429 | { |
| 7430 | return word0; |
| 7431 | } |
| 7432 | ifm_cblk_height_r copy() volatile |
| 7433 | { |
| 7434 | return *this; |
| 7435 | } |
| 7436 | CONSTEXPR uint32_t get_value() const |
| 7437 | { |
| 7438 | uint32_t value = static_cast<uint32_t>(word0); |
| 7439 | return value; |
| 7440 | } |
| 7441 | uint32_t get_value() const volatile |
| 7442 | { |
| 7443 | uint32_t value = static_cast<uint32_t>(word0); |
| 7444 | return value; |
| 7445 | } |
| 7446 | CONSTEXPR ifm_cblk_height_r &set_value(uint32_t value) |
| 7447 | { |
| 7448 | word0 = static_cast<uint32_t>(value); |
| 7449 | return *this; |
| 7450 | } |
| 7451 | #endif |
| 7452 | }; |
| 7453 | |
| 7454 | // dma_ifm_src_r - DMA IFM channel source position on AXI |
| 7455 | struct dma_ifm_src_r |
| 7456 | { |
| 7457 | #ifndef __cplusplus |
| 7458 | union |
| 7459 | { |
| 7460 | struct |
| 7461 | { |
| 7462 | uint32_t offset_LO : 32; // Offset - LSB |
| 7463 | uint32_t offset_HI : 8; // Offset - MSB |
| 7464 | uint32_t reserved0 : 24; |
| 7465 | }; |
| 7466 | uint32_t word[2]; |
| 7467 | }; |
| 7468 | #else |
| 7469 | private: |
| 7470 | uint32_t word0; |
| 7471 | uint32_t word1; |
| 7472 | |
| 7473 | public: |
| 7474 | CONSTEXPR dma_ifm_src_r() : word0(0), word1(0) {} |
| 7475 | CONSTEXPR dma_ifm_src_r(uint64_t init) : |
| 7476 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 7477 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 7478 | { |
| 7479 | } |
| 7480 | CONSTEXPR void operator=(uint64_t value) |
| 7481 | { |
| 7482 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7483 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7484 | } |
| 7485 | void operator=(uint64_t value) volatile |
| 7486 | { |
| 7487 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7488 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7489 | } |
| 7490 | CONSTEXPR operator uint64_t() |
| 7491 | { |
| 7492 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7493 | } |
| 7494 | operator uint64_t() volatile |
| 7495 | { |
| 7496 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7497 | } |
| 7498 | dma_ifm_src_r copy() volatile |
| 7499 | { |
| 7500 | return *this; |
| 7501 | } |
| 7502 | #endif |
| 7503 | }; |
| 7504 | |
| 7505 | // dma_ifm_dst_r - DMA IFM channel destination position in SHRAM |
| 7506 | struct dma_ifm_dst_r |
| 7507 | { |
| 7508 | #ifndef __cplusplus |
| 7509 | union |
| 7510 | { |
| 7511 | struct |
| 7512 | { |
| 7513 | uint32_t value : 32; // 32-bit register value |
| 7514 | }; |
| 7515 | uint32_t word; |
| 7516 | }; |
| 7517 | #else |
| 7518 | private: |
| 7519 | uint32_t word0; |
| 7520 | |
| 7521 | public: |
| 7522 | CONSTEXPR dma_ifm_dst_r() : word0(0) {} |
| 7523 | CONSTEXPR dma_ifm_dst_r(uint32_t init) : word0(init) {} |
| 7524 | CONSTEXPR void operator=(uint32_t value) |
| 7525 | { |
| 7526 | word0 = value; |
| 7527 | } |
| 7528 | void operator=(uint32_t value) volatile |
| 7529 | { |
| 7530 | word0 = value; |
| 7531 | } |
| 7532 | CONSTEXPR operator uint32_t() |
| 7533 | { |
| 7534 | return word0; |
| 7535 | } |
| 7536 | operator uint32_t() volatile |
| 7537 | { |
| 7538 | return word0; |
| 7539 | } |
| 7540 | dma_ifm_dst_r copy() volatile |
| 7541 | { |
| 7542 | return *this; |
| 7543 | } |
| 7544 | CONSTEXPR uint32_t get_value() const |
| 7545 | { |
| 7546 | uint32_t value = static_cast<uint32_t>(word0); |
| 7547 | return value; |
| 7548 | } |
| 7549 | uint32_t get_value() const volatile |
| 7550 | { |
| 7551 | uint32_t value = static_cast<uint32_t>(word0); |
| 7552 | return value; |
| 7553 | } |
| 7554 | CONSTEXPR dma_ifm_dst_r &set_value(uint32_t value) |
| 7555 | { |
| 7556 | word0 = static_cast<uint32_t>(value); |
| 7557 | return *this; |
| 7558 | } |
| 7559 | #endif |
| 7560 | }; |
| 7561 | |
| 7562 | // dma_ofm_src_r - DMA OFM channel source position in SHRAM |
| 7563 | struct dma_ofm_src_r |
| 7564 | { |
| 7565 | #ifndef __cplusplus |
| 7566 | union |
| 7567 | { |
| 7568 | struct |
| 7569 | { |
| 7570 | uint32_t value : 32; // 32-bit register value |
| 7571 | }; |
| 7572 | uint32_t word; |
| 7573 | }; |
| 7574 | #else |
| 7575 | private: |
| 7576 | uint32_t word0; |
| 7577 | |
| 7578 | public: |
| 7579 | CONSTEXPR dma_ofm_src_r() : word0(0) {} |
| 7580 | CONSTEXPR dma_ofm_src_r(uint32_t init) : word0(init) {} |
| 7581 | CONSTEXPR void operator=(uint32_t value) |
| 7582 | { |
| 7583 | word0 = value; |
| 7584 | } |
| 7585 | void operator=(uint32_t value) volatile |
| 7586 | { |
| 7587 | word0 = value; |
| 7588 | } |
| 7589 | CONSTEXPR operator uint32_t() |
| 7590 | { |
| 7591 | return word0; |
| 7592 | } |
| 7593 | operator uint32_t() volatile |
| 7594 | { |
| 7595 | return word0; |
| 7596 | } |
| 7597 | dma_ofm_src_r copy() volatile |
| 7598 | { |
| 7599 | return *this; |
| 7600 | } |
| 7601 | CONSTEXPR uint32_t get_value() const |
| 7602 | { |
| 7603 | uint32_t value = static_cast<uint32_t>(word0); |
| 7604 | return value; |
| 7605 | } |
| 7606 | uint32_t get_value() const volatile |
| 7607 | { |
| 7608 | uint32_t value = static_cast<uint32_t>(word0); |
| 7609 | return value; |
| 7610 | } |
| 7611 | CONSTEXPR dma_ofm_src_r &set_value(uint32_t value) |
| 7612 | { |
| 7613 | word0 = static_cast<uint32_t>(value); |
| 7614 | return *this; |
| 7615 | } |
| 7616 | #endif |
| 7617 | }; |
| 7618 | |
| 7619 | // dma_ofm_dst_r - DMA OFM channel destination position on AXI |
| 7620 | struct dma_ofm_dst_r |
| 7621 | { |
| 7622 | #ifndef __cplusplus |
| 7623 | union |
| 7624 | { |
| 7625 | struct |
| 7626 | { |
| 7627 | uint32_t offset_LO : 32; // Offset - LSB |
| 7628 | uint32_t offset_HI : 8; // Offset - MSB |
| 7629 | uint32_t reserved0 : 24; |
| 7630 | }; |
| 7631 | uint32_t word[2]; |
| 7632 | }; |
| 7633 | #else |
| 7634 | private: |
| 7635 | uint32_t word0; |
| 7636 | uint32_t word1; |
| 7637 | |
| 7638 | public: |
| 7639 | CONSTEXPR dma_ofm_dst_r() : word0(0), word1(0) {} |
| 7640 | CONSTEXPR dma_ofm_dst_r(uint64_t init) : |
| 7641 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 7642 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 7643 | { |
| 7644 | } |
| 7645 | CONSTEXPR void operator=(uint64_t value) |
| 7646 | { |
| 7647 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7648 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7649 | } |
| 7650 | void operator=(uint64_t value) volatile |
| 7651 | { |
| 7652 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7653 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7654 | } |
| 7655 | CONSTEXPR operator uint64_t() |
| 7656 | { |
| 7657 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7658 | } |
| 7659 | operator uint64_t() volatile |
| 7660 | { |
| 7661 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7662 | } |
| 7663 | dma_ofm_dst_r copy() volatile |
| 7664 | { |
| 7665 | return *this; |
| 7666 | } |
| 7667 | #endif |
| 7668 | }; |
| 7669 | |
| 7670 | // dma_weight_src_r - DMA weight channel source position on AXI |
| 7671 | struct dma_weight_src_r |
| 7672 | { |
| 7673 | #ifndef __cplusplus |
| 7674 | union |
| 7675 | { |
| 7676 | struct |
| 7677 | { |
| 7678 | uint32_t offset_LO : 32; // Offset - LSB |
| 7679 | uint32_t offset_HI : 8; // Offset - MSB |
| 7680 | uint32_t reserved0 : 24; |
| 7681 | }; |
| 7682 | uint32_t word[2]; |
| 7683 | }; |
| 7684 | #else |
| 7685 | private: |
| 7686 | uint32_t word0; |
| 7687 | uint32_t word1; |
| 7688 | |
| 7689 | public: |
| 7690 | CONSTEXPR dma_weight_src_r() : word0(0), word1(0) {} |
| 7691 | CONSTEXPR dma_weight_src_r(uint64_t init) : |
| 7692 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 7693 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 7694 | { |
| 7695 | } |
| 7696 | CONSTEXPR void operator=(uint64_t value) |
| 7697 | { |
| 7698 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7699 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7700 | } |
| 7701 | void operator=(uint64_t value) volatile |
| 7702 | { |
| 7703 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7704 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7705 | } |
| 7706 | CONSTEXPR operator uint64_t() |
| 7707 | { |
| 7708 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7709 | } |
| 7710 | operator uint64_t() volatile |
| 7711 | { |
| 7712 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7713 | } |
| 7714 | dma_weight_src_r copy() volatile |
| 7715 | { |
| 7716 | return *this; |
| 7717 | } |
| 7718 | #endif |
| 7719 | }; |
| 7720 | |
| 7721 | // dma_cmd_src_r - DMA command channel source position on AXI |
| 7722 | struct dma_cmd_src_r |
| 7723 | { |
| 7724 | #ifndef __cplusplus |
| 7725 | union |
| 7726 | { |
| 7727 | struct |
| 7728 | { |
| 7729 | uint32_t offset_LO : 32; // Offset - LSB |
| 7730 | uint32_t offset_HI : 8; // Offset - MSB |
| 7731 | uint32_t reserved0 : 24; |
| 7732 | }; |
| 7733 | uint32_t word[2]; |
| 7734 | }; |
| 7735 | #else |
| 7736 | private: |
| 7737 | uint32_t word0; |
| 7738 | uint32_t word1; |
| 7739 | |
| 7740 | public: |
| 7741 | CONSTEXPR dma_cmd_src_r() : word0(0), word1(0) {} |
| 7742 | CONSTEXPR dma_cmd_src_r(uint64_t init) : |
| 7743 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 7744 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 7745 | { |
| 7746 | } |
| 7747 | CONSTEXPR void operator=(uint64_t value) |
| 7748 | { |
| 7749 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7750 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7751 | } |
| 7752 | void operator=(uint64_t value) volatile |
| 7753 | { |
| 7754 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7755 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7756 | } |
| 7757 | CONSTEXPR operator uint64_t() |
| 7758 | { |
| 7759 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7760 | } |
| 7761 | operator uint64_t() volatile |
| 7762 | { |
| 7763 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7764 | } |
| 7765 | dma_cmd_src_r copy() volatile |
| 7766 | { |
| 7767 | return *this; |
| 7768 | } |
| 7769 | #endif |
| 7770 | }; |
| 7771 | |
| 7772 | // dma_cmd_size_r - DMA command channel number of bytes buffered |
| 7773 | struct dma_cmd_size_r |
| 7774 | { |
| 7775 | #ifndef __cplusplus |
| 7776 | union |
| 7777 | { |
| 7778 | struct |
| 7779 | { |
| 7780 | uint32_t value : 32; // 32-bit register value |
| 7781 | }; |
| 7782 | uint32_t word; |
| 7783 | }; |
| 7784 | #else |
| 7785 | private: |
| 7786 | uint32_t word0; |
| 7787 | |
| 7788 | public: |
| 7789 | CONSTEXPR dma_cmd_size_r() : word0(0) {} |
| 7790 | CONSTEXPR dma_cmd_size_r(uint32_t init) : word0(init) {} |
| 7791 | CONSTEXPR void operator=(uint32_t value) |
| 7792 | { |
| 7793 | word0 = value; |
| 7794 | } |
| 7795 | void operator=(uint32_t value) volatile |
| 7796 | { |
| 7797 | word0 = value; |
| 7798 | } |
| 7799 | CONSTEXPR operator uint32_t() |
| 7800 | { |
| 7801 | return word0; |
| 7802 | } |
| 7803 | operator uint32_t() volatile |
| 7804 | { |
| 7805 | return word0; |
| 7806 | } |
| 7807 | dma_cmd_size_r copy() volatile |
| 7808 | { |
| 7809 | return *this; |
| 7810 | } |
| 7811 | CONSTEXPR uint32_t get_value() const |
| 7812 | { |
| 7813 | uint32_t value = static_cast<uint32_t>(word0); |
| 7814 | return value; |
| 7815 | } |
| 7816 | uint32_t get_value() const volatile |
| 7817 | { |
| 7818 | uint32_t value = static_cast<uint32_t>(word0); |
| 7819 | return value; |
| 7820 | } |
| 7821 | CONSTEXPR dma_cmd_size_r &set_value(uint32_t value) |
| 7822 | { |
| 7823 | word0 = static_cast<uint32_t>(value); |
| 7824 | return *this; |
| 7825 | } |
| 7826 | #endif |
| 7827 | }; |
| 7828 | |
| 7829 | // dma_m2m_src_r - DMA memory to memory source position on AXI |
| 7830 | struct dma_m2m_src_r |
| 7831 | { |
| 7832 | #ifndef __cplusplus |
| 7833 | union |
| 7834 | { |
| 7835 | struct |
| 7836 | { |
| 7837 | uint32_t offset_LO : 32; // Offset - LSB |
| 7838 | uint32_t offset_HI : 8; // Offset - MSB |
| 7839 | uint32_t reserved0 : 24; |
| 7840 | }; |
| 7841 | uint32_t word[2]; |
| 7842 | }; |
| 7843 | #else |
| 7844 | private: |
| 7845 | uint32_t word0; |
| 7846 | uint32_t word1; |
| 7847 | |
| 7848 | public: |
| 7849 | CONSTEXPR dma_m2m_src_r() : word0(0), word1(0) {} |
| 7850 | CONSTEXPR dma_m2m_src_r(uint64_t init) : |
| 7851 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 7852 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 7853 | { |
| 7854 | } |
| 7855 | CONSTEXPR void operator=(uint64_t value) |
| 7856 | { |
| 7857 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7858 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7859 | } |
| 7860 | void operator=(uint64_t value) volatile |
| 7861 | { |
| 7862 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7863 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7864 | } |
| 7865 | CONSTEXPR operator uint64_t() |
| 7866 | { |
| 7867 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7868 | } |
| 7869 | operator uint64_t() volatile |
| 7870 | { |
| 7871 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7872 | } |
| 7873 | dma_m2m_src_r copy() volatile |
| 7874 | { |
| 7875 | return *this; |
| 7876 | } |
| 7877 | #endif |
| 7878 | }; |
| 7879 | |
| 7880 | // dma_m2m_dst_r - DMA memory to memory destination position on AXI |
| 7881 | struct dma_m2m_dst_r |
| 7882 | { |
| 7883 | #ifndef __cplusplus |
| 7884 | union |
| 7885 | { |
| 7886 | struct |
| 7887 | { |
| 7888 | uint32_t offset_LO : 32; // Offset - LSB |
| 7889 | uint32_t offset_HI : 8; // Offset - MSB |
| 7890 | uint32_t reserved0 : 24; |
| 7891 | }; |
| 7892 | uint32_t word[2]; |
| 7893 | }; |
| 7894 | #else |
| 7895 | private: |
| 7896 | uint32_t word0; |
| 7897 | uint32_t word1; |
| 7898 | |
| 7899 | public: |
| 7900 | CONSTEXPR dma_m2m_dst_r() : word0(0), word1(0) {} |
| 7901 | CONSTEXPR dma_m2m_dst_r(uint64_t init) : |
| 7902 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 7903 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 7904 | { |
| 7905 | } |
| 7906 | CONSTEXPR void operator=(uint64_t value) |
| 7907 | { |
| 7908 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7909 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7910 | } |
| 7911 | void operator=(uint64_t value) volatile |
| 7912 | { |
| 7913 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7914 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 7915 | } |
| 7916 | CONSTEXPR operator uint64_t() |
| 7917 | { |
| 7918 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7919 | } |
| 7920 | operator uint64_t() volatile |
| 7921 | { |
| 7922 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 7923 | } |
| 7924 | dma_m2m_dst_r copy() volatile |
| 7925 | { |
| 7926 | return *this; |
| 7927 | } |
| 7928 | #endif |
| 7929 | }; |
| 7930 | |
| 7931 | // current_qread_r - QREAD position being issued (rather than completed) |
| 7932 | struct current_qread_r |
| 7933 | { |
| 7934 | #ifndef __cplusplus |
| 7935 | union |
| 7936 | { |
| 7937 | struct |
| 7938 | { |
| 7939 | uint32_t value : 32; // 32-bit register value |
| 7940 | }; |
| 7941 | uint32_t word; |
| 7942 | }; |
| 7943 | #else |
| 7944 | private: |
| 7945 | uint32_t word0; |
| 7946 | |
| 7947 | public: |
| 7948 | CONSTEXPR current_qread_r() : word0(0) {} |
| 7949 | CONSTEXPR current_qread_r(uint32_t init) : word0(init) {} |
| 7950 | CONSTEXPR void operator=(uint32_t value) |
| 7951 | { |
| 7952 | word0 = value; |
| 7953 | } |
| 7954 | void operator=(uint32_t value) volatile |
| 7955 | { |
| 7956 | word0 = value; |
| 7957 | } |
| 7958 | CONSTEXPR operator uint32_t() |
| 7959 | { |
| 7960 | return word0; |
| 7961 | } |
| 7962 | operator uint32_t() volatile |
| 7963 | { |
| 7964 | return word0; |
| 7965 | } |
| 7966 | current_qread_r copy() volatile |
| 7967 | { |
| 7968 | return *this; |
| 7969 | } |
| 7970 | CONSTEXPR uint32_t get_value() const |
| 7971 | { |
| 7972 | uint32_t value = static_cast<uint32_t>(word0); |
| 7973 | return value; |
| 7974 | } |
| 7975 | uint32_t get_value() const volatile |
| 7976 | { |
| 7977 | uint32_t value = static_cast<uint32_t>(word0); |
| 7978 | return value; |
| 7979 | } |
| 7980 | CONSTEXPR current_qread_r &set_value(uint32_t value) |
| 7981 | { |
| 7982 | word0 = static_cast<uint32_t>(value); |
| 7983 | return *this; |
| 7984 | } |
| 7985 | #endif |
| 7986 | }; |
| 7987 | |
| 7988 | // dma_scale_src_r - DMA scale and bias channel source position on AXI |
| 7989 | struct dma_scale_src_r |
| 7990 | { |
| 7991 | #ifndef __cplusplus |
| 7992 | union |
| 7993 | { |
| 7994 | struct |
| 7995 | { |
| 7996 | uint32_t offset_LO : 32; // Offset - LSB |
| 7997 | uint32_t offset_HI : 8; // Offset - MSB |
| 7998 | uint32_t reserved0 : 24; |
| 7999 | }; |
| 8000 | uint32_t word[2]; |
| 8001 | }; |
| 8002 | #else |
| 8003 | private: |
| 8004 | uint32_t word0; |
| 8005 | uint32_t word1; |
| 8006 | |
| 8007 | public: |
| 8008 | CONSTEXPR dma_scale_src_r() : word0(0), word1(0) {} |
| 8009 | CONSTEXPR dma_scale_src_r(uint64_t init) : |
| 8010 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 8011 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 8012 | { |
| 8013 | } |
| 8014 | CONSTEXPR void operator=(uint64_t value) |
| 8015 | { |
| 8016 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 8017 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 8018 | } |
| 8019 | void operator=(uint64_t value) volatile |
| 8020 | { |
| 8021 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 8022 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 8023 | } |
| 8024 | CONSTEXPR operator uint64_t() |
| 8025 | { |
| 8026 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 8027 | } |
| 8028 | operator uint64_t() volatile |
| 8029 | { |
| 8030 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 8031 | } |
| 8032 | dma_scale_src_r copy() volatile |
| 8033 | { |
| 8034 | return *this; |
| 8035 | } |
| 8036 | #endif |
| 8037 | }; |
| 8038 | |
| 8039 | // current_block_r - 0-3. Current block bank being executed by the TSU or last one executed if TSU is stopped |
| 8040 | struct current_block_r |
| 8041 | { |
| 8042 | #ifndef __cplusplus |
| 8043 | union |
| 8044 | { |
| 8045 | struct |
| 8046 | { |
| 8047 | uint32_t value : 32; // 32-bit register value |
| 8048 | }; |
| 8049 | uint32_t word; |
| 8050 | }; |
| 8051 | #else |
| 8052 | private: |
| 8053 | uint32_t word0; |
| 8054 | |
| 8055 | public: |
| 8056 | CONSTEXPR current_block_r() : word0(0) {} |
| 8057 | CONSTEXPR current_block_r(uint32_t init) : word0(init) {} |
| 8058 | CONSTEXPR void operator=(uint32_t value) |
| 8059 | { |
| 8060 | word0 = value; |
| 8061 | } |
| 8062 | void operator=(uint32_t value) volatile |
| 8063 | { |
| 8064 | word0 = value; |
| 8065 | } |
| 8066 | CONSTEXPR operator uint32_t() |
| 8067 | { |
| 8068 | return word0; |
| 8069 | } |
| 8070 | operator uint32_t() volatile |
| 8071 | { |
| 8072 | return word0; |
| 8073 | } |
| 8074 | current_block_r copy() volatile |
| 8075 | { |
| 8076 | return *this; |
| 8077 | } |
| 8078 | CONSTEXPR uint32_t get_value() const |
| 8079 | { |
| 8080 | uint32_t value = static_cast<uint32_t>(word0); |
| 8081 | return value; |
| 8082 | } |
| 8083 | uint32_t get_value() const volatile |
| 8084 | { |
| 8085 | uint32_t value = static_cast<uint32_t>(word0); |
| 8086 | return value; |
| 8087 | } |
| 8088 | CONSTEXPR current_block_r &set_value(uint32_t value) |
| 8089 | { |
| 8090 | word0 = static_cast<uint32_t>(value); |
| 8091 | return *this; |
| 8092 | } |
| 8093 | #endif |
| 8094 | }; |
| 8095 | |
| 8096 | // current_op_r - Current NPU OP command being executed by the TSU |
| 8097 | struct current_op_r |
| 8098 | { |
| 8099 | #ifndef __cplusplus |
| 8100 | union |
| 8101 | { |
| 8102 | struct |
| 8103 | { |
| 8104 | uint32_t value : 32; // 32-bit register value |
| 8105 | }; |
| 8106 | uint32_t word; |
| 8107 | }; |
| 8108 | #else |
| 8109 | private: |
| 8110 | uint32_t word0; |
| 8111 | |
| 8112 | public: |
| 8113 | CONSTEXPR current_op_r() : word0(0) {} |
| 8114 | CONSTEXPR current_op_r(uint32_t init) : word0(init) {} |
| 8115 | CONSTEXPR void operator=(uint32_t value) |
| 8116 | { |
| 8117 | word0 = value; |
| 8118 | } |
| 8119 | void operator=(uint32_t value) volatile |
| 8120 | { |
| 8121 | word0 = value; |
| 8122 | } |
| 8123 | CONSTEXPR operator uint32_t() |
| 8124 | { |
| 8125 | return word0; |
| 8126 | } |
| 8127 | operator uint32_t() volatile |
| 8128 | { |
| 8129 | return word0; |
| 8130 | } |
| 8131 | current_op_r copy() volatile |
| 8132 | { |
| 8133 | return *this; |
| 8134 | } |
| 8135 | CONSTEXPR uint32_t get_value() const |
| 8136 | { |
| 8137 | uint32_t value = static_cast<uint32_t>(word0); |
| 8138 | return value; |
| 8139 | } |
| 8140 | uint32_t get_value() const volatile |
| 8141 | { |
| 8142 | uint32_t value = static_cast<uint32_t>(word0); |
| 8143 | return value; |
| 8144 | } |
| 8145 | CONSTEXPR current_op_r &set_value(uint32_t value) |
| 8146 | { |
| 8147 | word0 = static_cast<uint32_t>(value); |
| 8148 | return *this; |
| 8149 | } |
| 8150 | #endif |
| 8151 | }; |
| 8152 | |
| 8153 | // current_cmd_r - Current 32-bit command being parsed by the command stream parser |
| 8154 | struct current_cmd_r |
| 8155 | { |
| 8156 | #ifndef __cplusplus |
| 8157 | union |
| 8158 | { |
| 8159 | struct |
| 8160 | { |
| 8161 | uint32_t value : 32; // 32-bit register value |
| 8162 | }; |
| 8163 | uint32_t word; |
| 8164 | }; |
| 8165 | #else |
| 8166 | private: |
| 8167 | uint32_t word0; |
| 8168 | |
| 8169 | public: |
| 8170 | CONSTEXPR current_cmd_r() : word0(0) {} |
| 8171 | CONSTEXPR current_cmd_r(uint32_t init) : word0(init) {} |
| 8172 | CONSTEXPR void operator=(uint32_t value) |
| 8173 | { |
| 8174 | word0 = value; |
| 8175 | } |
| 8176 | void operator=(uint32_t value) volatile |
| 8177 | { |
| 8178 | word0 = value; |
| 8179 | } |
| 8180 | CONSTEXPR operator uint32_t() |
| 8181 | { |
| 8182 | return word0; |
| 8183 | } |
| 8184 | operator uint32_t() volatile |
| 8185 | { |
| 8186 | return word0; |
| 8187 | } |
| 8188 | current_cmd_r copy() volatile |
| 8189 | { |
| 8190 | return *this; |
| 8191 | } |
| 8192 | CONSTEXPR uint32_t get_value() const |
| 8193 | { |
| 8194 | uint32_t value = static_cast<uint32_t>(word0); |
| 8195 | return value; |
| 8196 | } |
| 8197 | uint32_t get_value() const volatile |
| 8198 | { |
| 8199 | uint32_t value = static_cast<uint32_t>(word0); |
| 8200 | return value; |
| 8201 | } |
| 8202 | CONSTEXPR current_cmd_r &set_value(uint32_t value) |
| 8203 | { |
| 8204 | word0 = static_cast<uint32_t>(value); |
| 8205 | return *this; |
| 8206 | } |
| 8207 | #endif |
| 8208 | }; |
| 8209 | |
| 8210 | // pmevcntr_r - Performance monitor event 0 count register |
| 8211 | struct pmevcntr_r |
| 8212 | { |
| 8213 | #ifndef __cplusplus |
| 8214 | union |
| 8215 | { |
| 8216 | struct |
| 8217 | { |
| 8218 | uint32_t count : 32; // Count word |
| 8219 | }; |
| 8220 | uint32_t word; |
| 8221 | }; |
| 8222 | #else |
| 8223 | private: |
| 8224 | uint32_t word0; |
| 8225 | |
| 8226 | public: |
| 8227 | CONSTEXPR pmevcntr_r() : word0(0) {} |
| 8228 | CONSTEXPR pmevcntr_r(uint32_t init) : word0(init) {} |
| 8229 | CONSTEXPR void operator=(uint32_t value) |
| 8230 | { |
| 8231 | word0 = value; |
| 8232 | } |
| 8233 | void operator=(uint32_t value) volatile |
| 8234 | { |
| 8235 | word0 = value; |
| 8236 | } |
| 8237 | CONSTEXPR operator uint32_t() |
| 8238 | { |
| 8239 | return word0; |
| 8240 | } |
| 8241 | operator uint32_t() volatile |
| 8242 | { |
| 8243 | return word0; |
| 8244 | } |
| 8245 | pmevcntr_r copy() volatile |
| 8246 | { |
| 8247 | return *this; |
| 8248 | } |
| 8249 | CONSTEXPR uint32_t get_count() const |
| 8250 | { |
| 8251 | uint32_t value = static_cast<uint32_t>(word0); |
| 8252 | return value; |
| 8253 | } |
| 8254 | uint32_t get_count() const volatile |
| 8255 | { |
| 8256 | uint32_t value = static_cast<uint32_t>(word0); |
| 8257 | return value; |
| 8258 | } |
| 8259 | CONSTEXPR pmevcntr_r &set_count(uint32_t value) |
| 8260 | { |
| 8261 | word0 = static_cast<uint32_t>(value); |
| 8262 | return *this; |
| 8263 | } |
| 8264 | #endif |
| 8265 | }; |
| 8266 | |
| 8267 | // pmevtyper_r - Performance monitor event type register 0 |
| 8268 | struct pmevtyper_r |
| 8269 | { |
| 8270 | #ifndef __cplusplus |
| 8271 | union |
| 8272 | { |
| 8273 | struct |
| 8274 | { |
| 8275 | uint32_t EV_TYPE : 10; // Event Type |
| 8276 | uint32_t reserved0 : 22; |
| 8277 | }; |
| 8278 | uint32_t word; |
| 8279 | }; |
| 8280 | #else |
| 8281 | private: |
| 8282 | uint32_t word0; |
| 8283 | |
| 8284 | public: |
| 8285 | CONSTEXPR pmevtyper_r() : word0(0) {} |
| 8286 | CONSTEXPR pmevtyper_r(uint32_t init) : word0(init) {} |
| 8287 | CONSTEXPR void operator=(uint32_t value) |
| 8288 | { |
| 8289 | word0 = value; |
| 8290 | } |
| 8291 | void operator=(uint32_t value) volatile |
| 8292 | { |
| 8293 | word0 = value; |
| 8294 | } |
| 8295 | CONSTEXPR operator uint32_t() |
| 8296 | { |
| 8297 | return word0; |
| 8298 | } |
| 8299 | operator uint32_t() volatile |
| 8300 | { |
| 8301 | return word0; |
| 8302 | } |
| 8303 | pmevtyper_r copy() volatile |
| 8304 | { |
| 8305 | return *this; |
| 8306 | } |
| 8307 | CONSTEXPR NPU_NAMESPACE::pmu_event get_EV_TYPE() const |
| 8308 | { |
| 8309 | NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0)); |
| 8310 | return value; |
| 8311 | } |
| 8312 | NPU_NAMESPACE::pmu_event get_EV_TYPE() const volatile |
| 8313 | { |
| 8314 | NPU_NAMESPACE::pmu_event value = static_cast<NPU_NAMESPACE::pmu_event>(((1U << 10) - 1) & (word0 >> 0)); |
| 8315 | return value; |
| 8316 | } |
| 8317 | CONSTEXPR pmevtyper_r &set_EV_TYPE(NPU_NAMESPACE::pmu_event value) |
| 8318 | { |
| 8319 | word0 = (((~((1U << 10) - 1)) << 0) & word0) | ((((1U << 10) - 1) & static_cast<uint32_t>(value)) << 0); |
| 8320 | return *this; |
| 8321 | } |
| 8322 | #endif |
| 8323 | }; |
| 8324 | |
| 8325 | // shared_buffer_r - Shared buffer debug access. Only valid in STOPPED state |
| 8326 | struct shared_buffer_r |
| 8327 | { |
| 8328 | #ifndef __cplusplus |
| 8329 | union |
| 8330 | { |
| 8331 | struct |
| 8332 | { |
| 8333 | uint32_t mem_word : 32; // Memory word |
| 8334 | }; |
| 8335 | uint32_t word; |
| 8336 | }; |
| 8337 | #else |
| 8338 | private: |
| 8339 | uint32_t word0; |
| 8340 | |
| 8341 | public: |
| 8342 | CONSTEXPR shared_buffer_r() : word0(0) {} |
| 8343 | CONSTEXPR shared_buffer_r(uint32_t init) : word0(init) {} |
| 8344 | CONSTEXPR void operator=(uint32_t value) |
| 8345 | { |
| 8346 | word0 = value; |
| 8347 | } |
| 8348 | void operator=(uint32_t value) volatile |
| 8349 | { |
| 8350 | word0 = value; |
| 8351 | } |
| 8352 | CONSTEXPR operator uint32_t() |
| 8353 | { |
| 8354 | return word0; |
| 8355 | } |
| 8356 | operator uint32_t() volatile |
| 8357 | { |
| 8358 | return word0; |
| 8359 | } |
| 8360 | shared_buffer_r copy() volatile |
| 8361 | { |
| 8362 | return *this; |
| 8363 | } |
| 8364 | CONSTEXPR uint32_t get_mem_word() const |
| 8365 | { |
| 8366 | uint32_t value = static_cast<uint32_t>(word0); |
| 8367 | return value; |
| 8368 | } |
| 8369 | uint32_t get_mem_word() const volatile |
| 8370 | { |
| 8371 | uint32_t value = static_cast<uint32_t>(word0); |
| 8372 | return value; |
| 8373 | } |
| 8374 | CONSTEXPR shared_buffer_r &set_mem_word(uint32_t value) |
| 8375 | { |
| 8376 | word0 = static_cast<uint32_t>(value); |
| 8377 | return *this; |
| 8378 | } |
| 8379 | #endif |
| 8380 | }; |
| 8381 | |
| 8382 | // ifm_pad_top_r - None |
| 8383 | struct ifm_pad_top_r |
| 8384 | { |
| 8385 | #ifndef __cplusplus |
| 8386 | union |
| 8387 | { |
| 8388 | struct |
| 8389 | { |
| 8390 | uint32_t value : 32; // 32-bit register value |
| 8391 | }; |
| 8392 | uint32_t word; |
| 8393 | }; |
| 8394 | #else |
| 8395 | private: |
| 8396 | uint32_t word0; |
| 8397 | |
| 8398 | public: |
| 8399 | CONSTEXPR ifm_pad_top_r() : word0(0) {} |
| 8400 | CONSTEXPR ifm_pad_top_r(uint32_t init) : word0(init) {} |
| 8401 | CONSTEXPR void operator=(uint32_t value) |
| 8402 | { |
| 8403 | word0 = value; |
| 8404 | } |
| 8405 | void operator=(uint32_t value) volatile |
| 8406 | { |
| 8407 | word0 = value; |
| 8408 | } |
| 8409 | CONSTEXPR operator uint32_t() |
| 8410 | { |
| 8411 | return word0; |
| 8412 | } |
| 8413 | operator uint32_t() volatile |
| 8414 | { |
| 8415 | return word0; |
| 8416 | } |
| 8417 | ifm_pad_top_r copy() volatile |
| 8418 | { |
| 8419 | return *this; |
| 8420 | } |
| 8421 | CONSTEXPR uint32_t get_value() const |
| 8422 | { |
| 8423 | uint32_t value = static_cast<uint32_t>(word0); |
| 8424 | return value; |
| 8425 | } |
| 8426 | uint32_t get_value() const volatile |
| 8427 | { |
| 8428 | uint32_t value = static_cast<uint32_t>(word0); |
| 8429 | return value; |
| 8430 | } |
| 8431 | CONSTEXPR ifm_pad_top_r &set_value(uint32_t value) |
| 8432 | { |
| 8433 | word0 = static_cast<uint32_t>(value); |
| 8434 | return *this; |
| 8435 | } |
| 8436 | #endif |
| 8437 | }; |
| 8438 | |
| 8439 | // ifm_pad_left_r - None |
| 8440 | struct ifm_pad_left_r |
| 8441 | { |
| 8442 | #ifndef __cplusplus |
| 8443 | union |
| 8444 | { |
| 8445 | struct |
| 8446 | { |
| 8447 | uint32_t value : 32; // 32-bit register value |
| 8448 | }; |
| 8449 | uint32_t word; |
| 8450 | }; |
| 8451 | #else |
| 8452 | private: |
| 8453 | uint32_t word0; |
| 8454 | |
| 8455 | public: |
| 8456 | CONSTEXPR ifm_pad_left_r() : word0(0) {} |
| 8457 | CONSTEXPR ifm_pad_left_r(uint32_t init) : word0(init) {} |
| 8458 | CONSTEXPR void operator=(uint32_t value) |
| 8459 | { |
| 8460 | word0 = value; |
| 8461 | } |
| 8462 | void operator=(uint32_t value) volatile |
| 8463 | { |
| 8464 | word0 = value; |
| 8465 | } |
| 8466 | CONSTEXPR operator uint32_t() |
| 8467 | { |
| 8468 | return word0; |
| 8469 | } |
| 8470 | operator uint32_t() volatile |
| 8471 | { |
| 8472 | return word0; |
| 8473 | } |
| 8474 | ifm_pad_left_r copy() volatile |
| 8475 | { |
| 8476 | return *this; |
| 8477 | } |
| 8478 | CONSTEXPR uint32_t get_value() const |
| 8479 | { |
| 8480 | uint32_t value = static_cast<uint32_t>(word0); |
| 8481 | return value; |
| 8482 | } |
| 8483 | uint32_t get_value() const volatile |
| 8484 | { |
| 8485 | uint32_t value = static_cast<uint32_t>(word0); |
| 8486 | return value; |
| 8487 | } |
| 8488 | CONSTEXPR ifm_pad_left_r &set_value(uint32_t value) |
| 8489 | { |
| 8490 | word0 = static_cast<uint32_t>(value); |
| 8491 | return *this; |
| 8492 | } |
| 8493 | #endif |
| 8494 | }; |
| 8495 | |
| 8496 | // ifm_pad_right_r - None |
| 8497 | struct ifm_pad_right_r |
| 8498 | { |
| 8499 | #ifndef __cplusplus |
| 8500 | union |
| 8501 | { |
| 8502 | struct |
| 8503 | { |
| 8504 | uint32_t value : 32; // 32-bit register value |
| 8505 | }; |
| 8506 | uint32_t word; |
| 8507 | }; |
| 8508 | #else |
| 8509 | private: |
| 8510 | uint32_t word0; |
| 8511 | |
| 8512 | public: |
| 8513 | CONSTEXPR ifm_pad_right_r() : word0(0) {} |
| 8514 | CONSTEXPR ifm_pad_right_r(uint32_t init) : word0(init) {} |
| 8515 | CONSTEXPR void operator=(uint32_t value) |
| 8516 | { |
| 8517 | word0 = value; |
| 8518 | } |
| 8519 | void operator=(uint32_t value) volatile |
| 8520 | { |
| 8521 | word0 = value; |
| 8522 | } |
| 8523 | CONSTEXPR operator uint32_t() |
| 8524 | { |
| 8525 | return word0; |
| 8526 | } |
| 8527 | operator uint32_t() volatile |
| 8528 | { |
| 8529 | return word0; |
| 8530 | } |
| 8531 | ifm_pad_right_r copy() volatile |
| 8532 | { |
| 8533 | return *this; |
| 8534 | } |
| 8535 | CONSTEXPR uint32_t get_value() const |
| 8536 | { |
| 8537 | uint32_t value = static_cast<uint32_t>(word0); |
| 8538 | return value; |
| 8539 | } |
| 8540 | uint32_t get_value() const volatile |
| 8541 | { |
| 8542 | uint32_t value = static_cast<uint32_t>(word0); |
| 8543 | return value; |
| 8544 | } |
| 8545 | CONSTEXPR ifm_pad_right_r &set_value(uint32_t value) |
| 8546 | { |
| 8547 | word0 = static_cast<uint32_t>(value); |
| 8548 | return *this; |
| 8549 | } |
| 8550 | #endif |
| 8551 | }; |
| 8552 | |
| 8553 | // ifm_pad_bottom_r - None |
| 8554 | struct ifm_pad_bottom_r |
| 8555 | { |
| 8556 | #ifndef __cplusplus |
| 8557 | union |
| 8558 | { |
| 8559 | struct |
| 8560 | { |
| 8561 | uint32_t value : 32; // 32-bit register value |
| 8562 | }; |
| 8563 | uint32_t word; |
| 8564 | }; |
| 8565 | #else |
| 8566 | private: |
| 8567 | uint32_t word0; |
| 8568 | |
| 8569 | public: |
| 8570 | CONSTEXPR ifm_pad_bottom_r() : word0(0) {} |
| 8571 | CONSTEXPR ifm_pad_bottom_r(uint32_t init) : word0(init) {} |
| 8572 | CONSTEXPR void operator=(uint32_t value) |
| 8573 | { |
| 8574 | word0 = value; |
| 8575 | } |
| 8576 | void operator=(uint32_t value) volatile |
| 8577 | { |
| 8578 | word0 = value; |
| 8579 | } |
| 8580 | CONSTEXPR operator uint32_t() |
| 8581 | { |
| 8582 | return word0; |
| 8583 | } |
| 8584 | operator uint32_t() volatile |
| 8585 | { |
| 8586 | return word0; |
| 8587 | } |
| 8588 | ifm_pad_bottom_r copy() volatile |
| 8589 | { |
| 8590 | return *this; |
| 8591 | } |
| 8592 | CONSTEXPR uint32_t get_value() const |
| 8593 | { |
| 8594 | uint32_t value = static_cast<uint32_t>(word0); |
| 8595 | return value; |
| 8596 | } |
| 8597 | uint32_t get_value() const volatile |
| 8598 | { |
| 8599 | uint32_t value = static_cast<uint32_t>(word0); |
| 8600 | return value; |
| 8601 | } |
| 8602 | CONSTEXPR ifm_pad_bottom_r &set_value(uint32_t value) |
| 8603 | { |
| 8604 | word0 = static_cast<uint32_t>(value); |
| 8605 | return *this; |
| 8606 | } |
| 8607 | #endif |
| 8608 | }; |
| 8609 | |
| 8610 | // ifm_depth_m1_r - None |
| 8611 | struct ifm_depth_m1_r |
| 8612 | { |
| 8613 | #ifndef __cplusplus |
| 8614 | union |
| 8615 | { |
| 8616 | struct |
| 8617 | { |
| 8618 | uint32_t value : 32; // 32-bit register value |
| 8619 | }; |
| 8620 | uint32_t word; |
| 8621 | }; |
| 8622 | #else |
| 8623 | private: |
| 8624 | uint32_t word0; |
| 8625 | |
| 8626 | public: |
| 8627 | CONSTEXPR ifm_depth_m1_r() : word0(0) {} |
| 8628 | CONSTEXPR ifm_depth_m1_r(uint32_t init) : word0(init) {} |
| 8629 | CONSTEXPR void operator=(uint32_t value) |
| 8630 | { |
| 8631 | word0 = value; |
| 8632 | } |
| 8633 | void operator=(uint32_t value) volatile |
| 8634 | { |
| 8635 | word0 = value; |
| 8636 | } |
| 8637 | CONSTEXPR operator uint32_t() |
| 8638 | { |
| 8639 | return word0; |
| 8640 | } |
| 8641 | operator uint32_t() volatile |
| 8642 | { |
| 8643 | return word0; |
| 8644 | } |
| 8645 | ifm_depth_m1_r copy() volatile |
| 8646 | { |
| 8647 | return *this; |
| 8648 | } |
| 8649 | CONSTEXPR uint32_t get_value() const |
| 8650 | { |
| 8651 | uint32_t value = static_cast<uint32_t>(word0); |
| 8652 | return value; |
| 8653 | } |
| 8654 | uint32_t get_value() const volatile |
| 8655 | { |
| 8656 | uint32_t value = static_cast<uint32_t>(word0); |
| 8657 | return value; |
| 8658 | } |
| 8659 | CONSTEXPR ifm_depth_m1_r &set_value(uint32_t value) |
| 8660 | { |
| 8661 | word0 = static_cast<uint32_t>(value); |
| 8662 | return *this; |
| 8663 | } |
| 8664 | #endif |
| 8665 | }; |
| 8666 | |
| 8667 | // ifm_precision_r - None |
| 8668 | struct ifm_precision_r |
| 8669 | { |
| 8670 | #ifndef __cplusplus |
| 8671 | union |
| 8672 | { |
| 8673 | struct |
| 8674 | { |
| 8675 | uint32_t value : 32; // 32-bit register value |
| 8676 | }; |
| 8677 | uint32_t word; |
| 8678 | }; |
| 8679 | #else |
| 8680 | private: |
| 8681 | uint32_t word0; |
| 8682 | |
| 8683 | public: |
| 8684 | CONSTEXPR ifm_precision_r() : word0(0) {} |
| 8685 | CONSTEXPR ifm_precision_r(uint32_t init) : word0(init) {} |
| 8686 | CONSTEXPR void operator=(uint32_t value) |
| 8687 | { |
| 8688 | word0 = value; |
| 8689 | } |
| 8690 | void operator=(uint32_t value) volatile |
| 8691 | { |
| 8692 | word0 = value; |
| 8693 | } |
| 8694 | CONSTEXPR operator uint32_t() |
| 8695 | { |
| 8696 | return word0; |
| 8697 | } |
| 8698 | operator uint32_t() volatile |
| 8699 | { |
| 8700 | return word0; |
| 8701 | } |
| 8702 | ifm_precision_r copy() volatile |
| 8703 | { |
| 8704 | return *this; |
| 8705 | } |
| 8706 | CONSTEXPR uint32_t get_value() const |
| 8707 | { |
| 8708 | uint32_t value = static_cast<uint32_t>(word0); |
| 8709 | return value; |
| 8710 | } |
| 8711 | uint32_t get_value() const volatile |
| 8712 | { |
| 8713 | uint32_t value = static_cast<uint32_t>(word0); |
| 8714 | return value; |
| 8715 | } |
| 8716 | CONSTEXPR ifm_precision_r &set_value(uint32_t value) |
| 8717 | { |
| 8718 | word0 = static_cast<uint32_t>(value); |
| 8719 | return *this; |
| 8720 | } |
| 8721 | #endif |
| 8722 | }; |
| 8723 | |
| 8724 | // ifm_upscale_r - None |
| 8725 | struct ifm_upscale_r |
| 8726 | { |
| 8727 | #ifndef __cplusplus |
| 8728 | union |
| 8729 | { |
| 8730 | struct |
| 8731 | { |
| 8732 | uint32_t value : 32; // 32-bit register value |
| 8733 | }; |
| 8734 | uint32_t word; |
| 8735 | }; |
| 8736 | #else |
| 8737 | private: |
| 8738 | uint32_t word0; |
| 8739 | |
| 8740 | public: |
| 8741 | CONSTEXPR ifm_upscale_r() : word0(0) {} |
| 8742 | CONSTEXPR ifm_upscale_r(uint32_t init) : word0(init) {} |
| 8743 | CONSTEXPR void operator=(uint32_t value) |
| 8744 | { |
| 8745 | word0 = value; |
| 8746 | } |
| 8747 | void operator=(uint32_t value) volatile |
| 8748 | { |
| 8749 | word0 = value; |
| 8750 | } |
| 8751 | CONSTEXPR operator uint32_t() |
| 8752 | { |
| 8753 | return word0; |
| 8754 | } |
| 8755 | operator uint32_t() volatile |
| 8756 | { |
| 8757 | return word0; |
| 8758 | } |
| 8759 | ifm_upscale_r copy() volatile |
| 8760 | { |
| 8761 | return *this; |
| 8762 | } |
| 8763 | CONSTEXPR uint32_t get_value() const |
| 8764 | { |
| 8765 | uint32_t value = static_cast<uint32_t>(word0); |
| 8766 | return value; |
| 8767 | } |
| 8768 | uint32_t get_value() const volatile |
| 8769 | { |
| 8770 | uint32_t value = static_cast<uint32_t>(word0); |
| 8771 | return value; |
| 8772 | } |
| 8773 | CONSTEXPR ifm_upscale_r &set_value(uint32_t value) |
| 8774 | { |
| 8775 | word0 = static_cast<uint32_t>(value); |
| 8776 | return *this; |
| 8777 | } |
| 8778 | #endif |
| 8779 | }; |
| 8780 | |
| 8781 | // ifm_zero_point_r - None |
| 8782 | struct ifm_zero_point_r |
| 8783 | { |
| 8784 | #ifndef __cplusplus |
| 8785 | union |
| 8786 | { |
| 8787 | struct |
| 8788 | { |
| 8789 | uint32_t value : 32; // 32-bit register value |
| 8790 | }; |
| 8791 | uint32_t word; |
| 8792 | }; |
| 8793 | #else |
| 8794 | private: |
| 8795 | uint32_t word0; |
| 8796 | |
| 8797 | public: |
| 8798 | CONSTEXPR ifm_zero_point_r() : word0(0) {} |
| 8799 | CONSTEXPR ifm_zero_point_r(uint32_t init) : word0(init) {} |
| 8800 | CONSTEXPR void operator=(uint32_t value) |
| 8801 | { |
| 8802 | word0 = value; |
| 8803 | } |
| 8804 | void operator=(uint32_t value) volatile |
| 8805 | { |
| 8806 | word0 = value; |
| 8807 | } |
| 8808 | CONSTEXPR operator uint32_t() |
| 8809 | { |
| 8810 | return word0; |
| 8811 | } |
| 8812 | operator uint32_t() volatile |
| 8813 | { |
| 8814 | return word0; |
| 8815 | } |
| 8816 | ifm_zero_point_r copy() volatile |
| 8817 | { |
| 8818 | return *this; |
| 8819 | } |
| 8820 | CONSTEXPR uint32_t get_value() const |
| 8821 | { |
| 8822 | uint32_t value = static_cast<uint32_t>(word0); |
| 8823 | return value; |
| 8824 | } |
| 8825 | uint32_t get_value() const volatile |
| 8826 | { |
| 8827 | uint32_t value = static_cast<uint32_t>(word0); |
| 8828 | return value; |
| 8829 | } |
| 8830 | CONSTEXPR ifm_zero_point_r &set_value(uint32_t value) |
| 8831 | { |
| 8832 | word0 = static_cast<uint32_t>(value); |
| 8833 | return *this; |
| 8834 | } |
| 8835 | #endif |
| 8836 | }; |
| 8837 | |
| 8838 | // ifm_width0_m1_r - None |
| 8839 | struct ifm_width0_m1_r |
| 8840 | { |
| 8841 | #ifndef __cplusplus |
| 8842 | union |
| 8843 | { |
| 8844 | struct |
| 8845 | { |
| 8846 | uint32_t value : 32; // 32-bit register value |
| 8847 | }; |
| 8848 | uint32_t word; |
| 8849 | }; |
| 8850 | #else |
| 8851 | private: |
| 8852 | uint32_t word0; |
| 8853 | |
| 8854 | public: |
| 8855 | CONSTEXPR ifm_width0_m1_r() : word0(0) {} |
| 8856 | CONSTEXPR ifm_width0_m1_r(uint32_t init) : word0(init) {} |
| 8857 | CONSTEXPR void operator=(uint32_t value) |
| 8858 | { |
| 8859 | word0 = value; |
| 8860 | } |
| 8861 | void operator=(uint32_t value) volatile |
| 8862 | { |
| 8863 | word0 = value; |
| 8864 | } |
| 8865 | CONSTEXPR operator uint32_t() |
| 8866 | { |
| 8867 | return word0; |
| 8868 | } |
| 8869 | operator uint32_t() volatile |
| 8870 | { |
| 8871 | return word0; |
| 8872 | } |
| 8873 | ifm_width0_m1_r copy() volatile |
| 8874 | { |
| 8875 | return *this; |
| 8876 | } |
| 8877 | CONSTEXPR uint32_t get_value() const |
| 8878 | { |
| 8879 | uint32_t value = static_cast<uint32_t>(word0); |
| 8880 | return value; |
| 8881 | } |
| 8882 | uint32_t get_value() const volatile |
| 8883 | { |
| 8884 | uint32_t value = static_cast<uint32_t>(word0); |
| 8885 | return value; |
| 8886 | } |
| 8887 | CONSTEXPR ifm_width0_m1_r &set_value(uint32_t value) |
| 8888 | { |
| 8889 | word0 = static_cast<uint32_t>(value); |
| 8890 | return *this; |
| 8891 | } |
| 8892 | #endif |
| 8893 | }; |
| 8894 | |
| 8895 | // ifm_height0_m1_r - None |
| 8896 | struct ifm_height0_m1_r |
| 8897 | { |
| 8898 | #ifndef __cplusplus |
| 8899 | union |
| 8900 | { |
| 8901 | struct |
| 8902 | { |
| 8903 | uint32_t value : 32; // 32-bit register value |
| 8904 | }; |
| 8905 | uint32_t word; |
| 8906 | }; |
| 8907 | #else |
| 8908 | private: |
| 8909 | uint32_t word0; |
| 8910 | |
| 8911 | public: |
| 8912 | CONSTEXPR ifm_height0_m1_r() : word0(0) {} |
| 8913 | CONSTEXPR ifm_height0_m1_r(uint32_t init) : word0(init) {} |
| 8914 | CONSTEXPR void operator=(uint32_t value) |
| 8915 | { |
| 8916 | word0 = value; |
| 8917 | } |
| 8918 | void operator=(uint32_t value) volatile |
| 8919 | { |
| 8920 | word0 = value; |
| 8921 | } |
| 8922 | CONSTEXPR operator uint32_t() |
| 8923 | { |
| 8924 | return word0; |
| 8925 | } |
| 8926 | operator uint32_t() volatile |
| 8927 | { |
| 8928 | return word0; |
| 8929 | } |
| 8930 | ifm_height0_m1_r copy() volatile |
| 8931 | { |
| 8932 | return *this; |
| 8933 | } |
| 8934 | CONSTEXPR uint32_t get_value() const |
| 8935 | { |
| 8936 | uint32_t value = static_cast<uint32_t>(word0); |
| 8937 | return value; |
| 8938 | } |
| 8939 | uint32_t get_value() const volatile |
| 8940 | { |
| 8941 | uint32_t value = static_cast<uint32_t>(word0); |
| 8942 | return value; |
| 8943 | } |
| 8944 | CONSTEXPR ifm_height0_m1_r &set_value(uint32_t value) |
| 8945 | { |
| 8946 | word0 = static_cast<uint32_t>(value); |
| 8947 | return *this; |
| 8948 | } |
| 8949 | #endif |
| 8950 | }; |
| 8951 | |
| 8952 | // ifm_height1_m1_r - None |
| 8953 | struct ifm_height1_m1_r |
| 8954 | { |
| 8955 | #ifndef __cplusplus |
| 8956 | union |
| 8957 | { |
| 8958 | struct |
| 8959 | { |
| 8960 | uint32_t value : 32; // 32-bit register value |
| 8961 | }; |
| 8962 | uint32_t word; |
| 8963 | }; |
| 8964 | #else |
| 8965 | private: |
| 8966 | uint32_t word0; |
| 8967 | |
| 8968 | public: |
| 8969 | CONSTEXPR ifm_height1_m1_r() : word0(0) {} |
| 8970 | CONSTEXPR ifm_height1_m1_r(uint32_t init) : word0(init) {} |
| 8971 | CONSTEXPR void operator=(uint32_t value) |
| 8972 | { |
| 8973 | word0 = value; |
| 8974 | } |
| 8975 | void operator=(uint32_t value) volatile |
| 8976 | { |
| 8977 | word0 = value; |
| 8978 | } |
| 8979 | CONSTEXPR operator uint32_t() |
| 8980 | { |
| 8981 | return word0; |
| 8982 | } |
| 8983 | operator uint32_t() volatile |
| 8984 | { |
| 8985 | return word0; |
| 8986 | } |
| 8987 | ifm_height1_m1_r copy() volatile |
| 8988 | { |
| 8989 | return *this; |
| 8990 | } |
| 8991 | CONSTEXPR uint32_t get_value() const |
| 8992 | { |
| 8993 | uint32_t value = static_cast<uint32_t>(word0); |
| 8994 | return value; |
| 8995 | } |
| 8996 | uint32_t get_value() const volatile |
| 8997 | { |
| 8998 | uint32_t value = static_cast<uint32_t>(word0); |
| 8999 | return value; |
| 9000 | } |
| 9001 | CONSTEXPR ifm_height1_m1_r &set_value(uint32_t value) |
| 9002 | { |
| 9003 | word0 = static_cast<uint32_t>(value); |
| 9004 | return *this; |
| 9005 | } |
| 9006 | #endif |
| 9007 | }; |
| 9008 | |
| 9009 | // ifm_ib_end_r - None |
| 9010 | struct ifm_ib_end_r |
| 9011 | { |
| 9012 | #ifndef __cplusplus |
| 9013 | union |
| 9014 | { |
| 9015 | struct |
| 9016 | { |
| 9017 | uint32_t value : 32; // 32-bit register value |
| 9018 | }; |
| 9019 | uint32_t word; |
| 9020 | }; |
| 9021 | #else |
| 9022 | private: |
| 9023 | uint32_t word0; |
| 9024 | |
| 9025 | public: |
| 9026 | CONSTEXPR ifm_ib_end_r() : word0(0) {} |
| 9027 | CONSTEXPR ifm_ib_end_r(uint32_t init) : word0(init) {} |
| 9028 | CONSTEXPR void operator=(uint32_t value) |
| 9029 | { |
| 9030 | word0 = value; |
| 9031 | } |
| 9032 | void operator=(uint32_t value) volatile |
| 9033 | { |
| 9034 | word0 = value; |
| 9035 | } |
| 9036 | CONSTEXPR operator uint32_t() |
| 9037 | { |
| 9038 | return word0; |
| 9039 | } |
| 9040 | operator uint32_t() volatile |
| 9041 | { |
| 9042 | return word0; |
| 9043 | } |
| 9044 | ifm_ib_end_r copy() volatile |
| 9045 | { |
| 9046 | return *this; |
| 9047 | } |
| 9048 | CONSTEXPR uint32_t get_value() const |
| 9049 | { |
| 9050 | uint32_t value = static_cast<uint32_t>(word0); |
| 9051 | return value; |
| 9052 | } |
| 9053 | uint32_t get_value() const volatile |
| 9054 | { |
| 9055 | uint32_t value = static_cast<uint32_t>(word0); |
| 9056 | return value; |
| 9057 | } |
| 9058 | CONSTEXPR ifm_ib_end_r &set_value(uint32_t value) |
| 9059 | { |
| 9060 | word0 = static_cast<uint32_t>(value); |
| 9061 | return *this; |
| 9062 | } |
| 9063 | #endif |
| 9064 | }; |
| 9065 | |
| 9066 | // ifm_region_r - None |
| 9067 | struct ifm_region_r |
| 9068 | { |
| 9069 | #ifndef __cplusplus |
| 9070 | union |
| 9071 | { |
| 9072 | struct |
| 9073 | { |
| 9074 | uint32_t value : 32; // 32-bit register value |
| 9075 | }; |
| 9076 | uint32_t word; |
| 9077 | }; |
| 9078 | #else |
| 9079 | private: |
| 9080 | uint32_t word0; |
| 9081 | |
| 9082 | public: |
| 9083 | CONSTEXPR ifm_region_r() : word0(0) {} |
| 9084 | CONSTEXPR ifm_region_r(uint32_t init) : word0(init) {} |
| 9085 | CONSTEXPR void operator=(uint32_t value) |
| 9086 | { |
| 9087 | word0 = value; |
| 9088 | } |
| 9089 | void operator=(uint32_t value) volatile |
| 9090 | { |
| 9091 | word0 = value; |
| 9092 | } |
| 9093 | CONSTEXPR operator uint32_t() |
| 9094 | { |
| 9095 | return word0; |
| 9096 | } |
| 9097 | operator uint32_t() volatile |
| 9098 | { |
| 9099 | return word0; |
| 9100 | } |
| 9101 | ifm_region_r copy() volatile |
| 9102 | { |
| 9103 | return *this; |
| 9104 | } |
| 9105 | CONSTEXPR uint32_t get_value() const |
| 9106 | { |
| 9107 | uint32_t value = static_cast<uint32_t>(word0); |
| 9108 | return value; |
| 9109 | } |
| 9110 | uint32_t get_value() const volatile |
| 9111 | { |
| 9112 | uint32_t value = static_cast<uint32_t>(word0); |
| 9113 | return value; |
| 9114 | } |
| 9115 | CONSTEXPR ifm_region_r &set_value(uint32_t value) |
| 9116 | { |
| 9117 | word0 = static_cast<uint32_t>(value); |
| 9118 | return *this; |
| 9119 | } |
| 9120 | #endif |
| 9121 | }; |
| 9122 | |
| 9123 | // ofm_width_m1_r - None |
| 9124 | struct ofm_width_m1_r |
| 9125 | { |
| 9126 | #ifndef __cplusplus |
| 9127 | union |
| 9128 | { |
| 9129 | struct |
| 9130 | { |
| 9131 | uint32_t value : 32; // 32-bit register value |
| 9132 | }; |
| 9133 | uint32_t word; |
| 9134 | }; |
| 9135 | #else |
| 9136 | private: |
| 9137 | uint32_t word0; |
| 9138 | |
| 9139 | public: |
| 9140 | CONSTEXPR ofm_width_m1_r() : word0(0) {} |
| 9141 | CONSTEXPR ofm_width_m1_r(uint32_t init) : word0(init) {} |
| 9142 | CONSTEXPR void operator=(uint32_t value) |
| 9143 | { |
| 9144 | word0 = value; |
| 9145 | } |
| 9146 | void operator=(uint32_t value) volatile |
| 9147 | { |
| 9148 | word0 = value; |
| 9149 | } |
| 9150 | CONSTEXPR operator uint32_t() |
| 9151 | { |
| 9152 | return word0; |
| 9153 | } |
| 9154 | operator uint32_t() volatile |
| 9155 | { |
| 9156 | return word0; |
| 9157 | } |
| 9158 | ofm_width_m1_r copy() volatile |
| 9159 | { |
| 9160 | return *this; |
| 9161 | } |
| 9162 | CONSTEXPR uint32_t get_value() const |
| 9163 | { |
| 9164 | uint32_t value = static_cast<uint32_t>(word0); |
| 9165 | return value; |
| 9166 | } |
| 9167 | uint32_t get_value() const volatile |
| 9168 | { |
| 9169 | uint32_t value = static_cast<uint32_t>(word0); |
| 9170 | return value; |
| 9171 | } |
| 9172 | CONSTEXPR ofm_width_m1_r &set_value(uint32_t value) |
| 9173 | { |
| 9174 | word0 = static_cast<uint32_t>(value); |
| 9175 | return *this; |
| 9176 | } |
| 9177 | #endif |
| 9178 | }; |
| 9179 | |
| 9180 | // ofm_height_m1_r - None |
| 9181 | struct ofm_height_m1_r |
| 9182 | { |
| 9183 | #ifndef __cplusplus |
| 9184 | union |
| 9185 | { |
| 9186 | struct |
| 9187 | { |
| 9188 | uint32_t value : 32; // 32-bit register value |
| 9189 | }; |
| 9190 | uint32_t word; |
| 9191 | }; |
| 9192 | #else |
| 9193 | private: |
| 9194 | uint32_t word0; |
| 9195 | |
| 9196 | public: |
| 9197 | CONSTEXPR ofm_height_m1_r() : word0(0) {} |
| 9198 | CONSTEXPR ofm_height_m1_r(uint32_t init) : word0(init) {} |
| 9199 | CONSTEXPR void operator=(uint32_t value) |
| 9200 | { |
| 9201 | word0 = value; |
| 9202 | } |
| 9203 | void operator=(uint32_t value) volatile |
| 9204 | { |
| 9205 | word0 = value; |
| 9206 | } |
| 9207 | CONSTEXPR operator uint32_t() |
| 9208 | { |
| 9209 | return word0; |
| 9210 | } |
| 9211 | operator uint32_t() volatile |
| 9212 | { |
| 9213 | return word0; |
| 9214 | } |
| 9215 | ofm_height_m1_r copy() volatile |
| 9216 | { |
| 9217 | return *this; |
| 9218 | } |
| 9219 | CONSTEXPR uint32_t get_value() const |
| 9220 | { |
| 9221 | uint32_t value = static_cast<uint32_t>(word0); |
| 9222 | return value; |
| 9223 | } |
| 9224 | uint32_t get_value() const volatile |
| 9225 | { |
| 9226 | uint32_t value = static_cast<uint32_t>(word0); |
| 9227 | return value; |
| 9228 | } |
| 9229 | CONSTEXPR ofm_height_m1_r &set_value(uint32_t value) |
| 9230 | { |
| 9231 | word0 = static_cast<uint32_t>(value); |
| 9232 | return *this; |
| 9233 | } |
| 9234 | #endif |
| 9235 | }; |
| 9236 | |
| 9237 | // ofm_depth_m1_r - None |
| 9238 | struct ofm_depth_m1_r |
| 9239 | { |
| 9240 | #ifndef __cplusplus |
| 9241 | union |
| 9242 | { |
| 9243 | struct |
| 9244 | { |
| 9245 | uint32_t value : 32; // 32-bit register value |
| 9246 | }; |
| 9247 | uint32_t word; |
| 9248 | }; |
| 9249 | #else |
| 9250 | private: |
| 9251 | uint32_t word0; |
| 9252 | |
| 9253 | public: |
| 9254 | CONSTEXPR ofm_depth_m1_r() : word0(0) {} |
| 9255 | CONSTEXPR ofm_depth_m1_r(uint32_t init) : word0(init) {} |
| 9256 | CONSTEXPR void operator=(uint32_t value) |
| 9257 | { |
| 9258 | word0 = value; |
| 9259 | } |
| 9260 | void operator=(uint32_t value) volatile |
| 9261 | { |
| 9262 | word0 = value; |
| 9263 | } |
| 9264 | CONSTEXPR operator uint32_t() |
| 9265 | { |
| 9266 | return word0; |
| 9267 | } |
| 9268 | operator uint32_t() volatile |
| 9269 | { |
| 9270 | return word0; |
| 9271 | } |
| 9272 | ofm_depth_m1_r copy() volatile |
| 9273 | { |
| 9274 | return *this; |
| 9275 | } |
| 9276 | CONSTEXPR uint32_t get_value() const |
| 9277 | { |
| 9278 | uint32_t value = static_cast<uint32_t>(word0); |
| 9279 | return value; |
| 9280 | } |
| 9281 | uint32_t get_value() const volatile |
| 9282 | { |
| 9283 | uint32_t value = static_cast<uint32_t>(word0); |
| 9284 | return value; |
| 9285 | } |
| 9286 | CONSTEXPR ofm_depth_m1_r &set_value(uint32_t value) |
| 9287 | { |
| 9288 | word0 = static_cast<uint32_t>(value); |
| 9289 | return *this; |
| 9290 | } |
| 9291 | #endif |
| 9292 | }; |
| 9293 | |
| 9294 | // ofm_precision_r - None |
| 9295 | struct ofm_precision_r |
| 9296 | { |
| 9297 | #ifndef __cplusplus |
| 9298 | union |
| 9299 | { |
| 9300 | struct |
| 9301 | { |
| 9302 | uint32_t value : 32; // 32-bit register value |
| 9303 | }; |
| 9304 | uint32_t word; |
| 9305 | }; |
| 9306 | #else |
| 9307 | private: |
| 9308 | uint32_t word0; |
| 9309 | |
| 9310 | public: |
| 9311 | CONSTEXPR ofm_precision_r() : word0(0) {} |
| 9312 | CONSTEXPR ofm_precision_r(uint32_t init) : word0(init) {} |
| 9313 | CONSTEXPR void operator=(uint32_t value) |
| 9314 | { |
| 9315 | word0 = value; |
| 9316 | } |
| 9317 | void operator=(uint32_t value) volatile |
| 9318 | { |
| 9319 | word0 = value; |
| 9320 | } |
| 9321 | CONSTEXPR operator uint32_t() |
| 9322 | { |
| 9323 | return word0; |
| 9324 | } |
| 9325 | operator uint32_t() volatile |
| 9326 | { |
| 9327 | return word0; |
| 9328 | } |
| 9329 | ofm_precision_r copy() volatile |
| 9330 | { |
| 9331 | return *this; |
| 9332 | } |
| 9333 | CONSTEXPR uint32_t get_value() const |
| 9334 | { |
| 9335 | uint32_t value = static_cast<uint32_t>(word0); |
| 9336 | return value; |
| 9337 | } |
| 9338 | uint32_t get_value() const volatile |
| 9339 | { |
| 9340 | uint32_t value = static_cast<uint32_t>(word0); |
| 9341 | return value; |
| 9342 | } |
| 9343 | CONSTEXPR ofm_precision_r &set_value(uint32_t value) |
| 9344 | { |
| 9345 | word0 = static_cast<uint32_t>(value); |
| 9346 | return *this; |
| 9347 | } |
| 9348 | #endif |
| 9349 | }; |
| 9350 | |
| 9351 | // ofm_blk_width_m1_r - None |
| 9352 | struct ofm_blk_width_m1_r |
| 9353 | { |
| 9354 | #ifndef __cplusplus |
| 9355 | union |
| 9356 | { |
| 9357 | struct |
| 9358 | { |
| 9359 | uint32_t value : 32; // 32-bit register value |
| 9360 | }; |
| 9361 | uint32_t word; |
| 9362 | }; |
| 9363 | #else |
| 9364 | private: |
| 9365 | uint32_t word0; |
| 9366 | |
| 9367 | public: |
| 9368 | CONSTEXPR ofm_blk_width_m1_r() : word0(0) {} |
| 9369 | CONSTEXPR ofm_blk_width_m1_r(uint32_t init) : word0(init) {} |
| 9370 | CONSTEXPR void operator=(uint32_t value) |
| 9371 | { |
| 9372 | word0 = value; |
| 9373 | } |
| 9374 | void operator=(uint32_t value) volatile |
| 9375 | { |
| 9376 | word0 = value; |
| 9377 | } |
| 9378 | CONSTEXPR operator uint32_t() |
| 9379 | { |
| 9380 | return word0; |
| 9381 | } |
| 9382 | operator uint32_t() volatile |
| 9383 | { |
| 9384 | return word0; |
| 9385 | } |
| 9386 | ofm_blk_width_m1_r copy() volatile |
| 9387 | { |
| 9388 | return *this; |
| 9389 | } |
| 9390 | CONSTEXPR uint32_t get_value() const |
| 9391 | { |
| 9392 | uint32_t value = static_cast<uint32_t>(word0); |
| 9393 | return value; |
| 9394 | } |
| 9395 | uint32_t get_value() const volatile |
| 9396 | { |
| 9397 | uint32_t value = static_cast<uint32_t>(word0); |
| 9398 | return value; |
| 9399 | } |
| 9400 | CONSTEXPR ofm_blk_width_m1_r &set_value(uint32_t value) |
| 9401 | { |
| 9402 | word0 = static_cast<uint32_t>(value); |
| 9403 | return *this; |
| 9404 | } |
| 9405 | #endif |
| 9406 | }; |
| 9407 | |
| 9408 | // ofm_blk_height_m1_r - None |
| 9409 | struct ofm_blk_height_m1_r |
| 9410 | { |
| 9411 | #ifndef __cplusplus |
| 9412 | union |
| 9413 | { |
| 9414 | struct |
| 9415 | { |
| 9416 | uint32_t value : 32; // 32-bit register value |
| 9417 | }; |
| 9418 | uint32_t word; |
| 9419 | }; |
| 9420 | #else |
| 9421 | private: |
| 9422 | uint32_t word0; |
| 9423 | |
| 9424 | public: |
| 9425 | CONSTEXPR ofm_blk_height_m1_r() : word0(0) {} |
| 9426 | CONSTEXPR ofm_blk_height_m1_r(uint32_t init) : word0(init) {} |
| 9427 | CONSTEXPR void operator=(uint32_t value) |
| 9428 | { |
| 9429 | word0 = value; |
| 9430 | } |
| 9431 | void operator=(uint32_t value) volatile |
| 9432 | { |
| 9433 | word0 = value; |
| 9434 | } |
| 9435 | CONSTEXPR operator uint32_t() |
| 9436 | { |
| 9437 | return word0; |
| 9438 | } |
| 9439 | operator uint32_t() volatile |
| 9440 | { |
| 9441 | return word0; |
| 9442 | } |
| 9443 | ofm_blk_height_m1_r copy() volatile |
| 9444 | { |
| 9445 | return *this; |
| 9446 | } |
| 9447 | CONSTEXPR uint32_t get_value() const |
| 9448 | { |
| 9449 | uint32_t value = static_cast<uint32_t>(word0); |
| 9450 | return value; |
| 9451 | } |
| 9452 | uint32_t get_value() const volatile |
| 9453 | { |
| 9454 | uint32_t value = static_cast<uint32_t>(word0); |
| 9455 | return value; |
| 9456 | } |
| 9457 | CONSTEXPR ofm_blk_height_m1_r &set_value(uint32_t value) |
| 9458 | { |
| 9459 | word0 = static_cast<uint32_t>(value); |
| 9460 | return *this; |
| 9461 | } |
| 9462 | #endif |
| 9463 | }; |
| 9464 | |
| 9465 | // ofm_blk_depth_m1_r - None |
| 9466 | struct ofm_blk_depth_m1_r |
| 9467 | { |
| 9468 | #ifndef __cplusplus |
| 9469 | union |
| 9470 | { |
| 9471 | struct |
| 9472 | { |
| 9473 | uint32_t value : 32; // 32-bit register value |
| 9474 | }; |
| 9475 | uint32_t word; |
| 9476 | }; |
| 9477 | #else |
| 9478 | private: |
| 9479 | uint32_t word0; |
| 9480 | |
| 9481 | public: |
| 9482 | CONSTEXPR ofm_blk_depth_m1_r() : word0(0) {} |
| 9483 | CONSTEXPR ofm_blk_depth_m1_r(uint32_t init) : word0(init) {} |
| 9484 | CONSTEXPR void operator=(uint32_t value) |
| 9485 | { |
| 9486 | word0 = value; |
| 9487 | } |
| 9488 | void operator=(uint32_t value) volatile |
| 9489 | { |
| 9490 | word0 = value; |
| 9491 | } |
| 9492 | CONSTEXPR operator uint32_t() |
| 9493 | { |
| 9494 | return word0; |
| 9495 | } |
| 9496 | operator uint32_t() volatile |
| 9497 | { |
| 9498 | return word0; |
| 9499 | } |
| 9500 | ofm_blk_depth_m1_r copy() volatile |
| 9501 | { |
| 9502 | return *this; |
| 9503 | } |
| 9504 | CONSTEXPR uint32_t get_value() const |
| 9505 | { |
| 9506 | uint32_t value = static_cast<uint32_t>(word0); |
| 9507 | return value; |
| 9508 | } |
| 9509 | uint32_t get_value() const volatile |
| 9510 | { |
| 9511 | uint32_t value = static_cast<uint32_t>(word0); |
| 9512 | return value; |
| 9513 | } |
| 9514 | CONSTEXPR ofm_blk_depth_m1_r &set_value(uint32_t value) |
| 9515 | { |
| 9516 | word0 = static_cast<uint32_t>(value); |
| 9517 | return *this; |
| 9518 | } |
| 9519 | #endif |
| 9520 | }; |
| 9521 | |
| 9522 | // ofm_zero_point_r - None |
| 9523 | struct ofm_zero_point_r |
| 9524 | { |
| 9525 | #ifndef __cplusplus |
| 9526 | union |
| 9527 | { |
| 9528 | struct |
| 9529 | { |
| 9530 | uint32_t value : 32; // 32-bit register value |
| 9531 | }; |
| 9532 | uint32_t word; |
| 9533 | }; |
| 9534 | #else |
| 9535 | private: |
| 9536 | uint32_t word0; |
| 9537 | |
| 9538 | public: |
| 9539 | CONSTEXPR ofm_zero_point_r() : word0(0) {} |
| 9540 | CONSTEXPR ofm_zero_point_r(uint32_t init) : word0(init) {} |
| 9541 | CONSTEXPR void operator=(uint32_t value) |
| 9542 | { |
| 9543 | word0 = value; |
| 9544 | } |
| 9545 | void operator=(uint32_t value) volatile |
| 9546 | { |
| 9547 | word0 = value; |
| 9548 | } |
| 9549 | CONSTEXPR operator uint32_t() |
| 9550 | { |
| 9551 | return word0; |
| 9552 | } |
| 9553 | operator uint32_t() volatile |
| 9554 | { |
| 9555 | return word0; |
| 9556 | } |
| 9557 | ofm_zero_point_r copy() volatile |
| 9558 | { |
| 9559 | return *this; |
| 9560 | } |
| 9561 | CONSTEXPR uint32_t get_value() const |
| 9562 | { |
| 9563 | uint32_t value = static_cast<uint32_t>(word0); |
| 9564 | return value; |
| 9565 | } |
| 9566 | uint32_t get_value() const volatile |
| 9567 | { |
| 9568 | uint32_t value = static_cast<uint32_t>(word0); |
| 9569 | return value; |
| 9570 | } |
| 9571 | CONSTEXPR ofm_zero_point_r &set_value(uint32_t value) |
| 9572 | { |
| 9573 | word0 = static_cast<uint32_t>(value); |
| 9574 | return *this; |
| 9575 | } |
| 9576 | #endif |
| 9577 | }; |
| 9578 | |
| 9579 | // ofm_width0_m1_r - None |
| 9580 | struct ofm_width0_m1_r |
| 9581 | { |
| 9582 | #ifndef __cplusplus |
| 9583 | union |
| 9584 | { |
| 9585 | struct |
| 9586 | { |
| 9587 | uint32_t value : 32; // 32-bit register value |
| 9588 | }; |
| 9589 | uint32_t word; |
| 9590 | }; |
| 9591 | #else |
| 9592 | private: |
| 9593 | uint32_t word0; |
| 9594 | |
| 9595 | public: |
| 9596 | CONSTEXPR ofm_width0_m1_r() : word0(0) {} |
| 9597 | CONSTEXPR ofm_width0_m1_r(uint32_t init) : word0(init) {} |
| 9598 | CONSTEXPR void operator=(uint32_t value) |
| 9599 | { |
| 9600 | word0 = value; |
| 9601 | } |
| 9602 | void operator=(uint32_t value) volatile |
| 9603 | { |
| 9604 | word0 = value; |
| 9605 | } |
| 9606 | CONSTEXPR operator uint32_t() |
| 9607 | { |
| 9608 | return word0; |
| 9609 | } |
| 9610 | operator uint32_t() volatile |
| 9611 | { |
| 9612 | return word0; |
| 9613 | } |
| 9614 | ofm_width0_m1_r copy() volatile |
| 9615 | { |
| 9616 | return *this; |
| 9617 | } |
| 9618 | CONSTEXPR uint32_t get_value() const |
| 9619 | { |
| 9620 | uint32_t value = static_cast<uint32_t>(word0); |
| 9621 | return value; |
| 9622 | } |
| 9623 | uint32_t get_value() const volatile |
| 9624 | { |
| 9625 | uint32_t value = static_cast<uint32_t>(word0); |
| 9626 | return value; |
| 9627 | } |
| 9628 | CONSTEXPR ofm_width0_m1_r &set_value(uint32_t value) |
| 9629 | { |
| 9630 | word0 = static_cast<uint32_t>(value); |
| 9631 | return *this; |
| 9632 | } |
| 9633 | #endif |
| 9634 | }; |
| 9635 | |
| 9636 | // ofm_height0_m1_r - None |
| 9637 | struct ofm_height0_m1_r |
| 9638 | { |
| 9639 | #ifndef __cplusplus |
| 9640 | union |
| 9641 | { |
| 9642 | struct |
| 9643 | { |
| 9644 | uint32_t value : 32; // 32-bit register value |
| 9645 | }; |
| 9646 | uint32_t word; |
| 9647 | }; |
| 9648 | #else |
| 9649 | private: |
| 9650 | uint32_t word0; |
| 9651 | |
| 9652 | public: |
| 9653 | CONSTEXPR ofm_height0_m1_r() : word0(0) {} |
| 9654 | CONSTEXPR ofm_height0_m1_r(uint32_t init) : word0(init) {} |
| 9655 | CONSTEXPR void operator=(uint32_t value) |
| 9656 | { |
| 9657 | word0 = value; |
| 9658 | } |
| 9659 | void operator=(uint32_t value) volatile |
| 9660 | { |
| 9661 | word0 = value; |
| 9662 | } |
| 9663 | CONSTEXPR operator uint32_t() |
| 9664 | { |
| 9665 | return word0; |
| 9666 | } |
| 9667 | operator uint32_t() volatile |
| 9668 | { |
| 9669 | return word0; |
| 9670 | } |
| 9671 | ofm_height0_m1_r copy() volatile |
| 9672 | { |
| 9673 | return *this; |
| 9674 | } |
| 9675 | CONSTEXPR uint32_t get_value() const |
| 9676 | { |
| 9677 | uint32_t value = static_cast<uint32_t>(word0); |
| 9678 | return value; |
| 9679 | } |
| 9680 | uint32_t get_value() const volatile |
| 9681 | { |
| 9682 | uint32_t value = static_cast<uint32_t>(word0); |
| 9683 | return value; |
| 9684 | } |
| 9685 | CONSTEXPR ofm_height0_m1_r &set_value(uint32_t value) |
| 9686 | { |
| 9687 | word0 = static_cast<uint32_t>(value); |
| 9688 | return *this; |
| 9689 | } |
| 9690 | #endif |
| 9691 | }; |
| 9692 | |
| 9693 | // ofm_height1_m1_r - None |
| 9694 | struct ofm_height1_m1_r |
| 9695 | { |
| 9696 | #ifndef __cplusplus |
| 9697 | union |
| 9698 | { |
| 9699 | struct |
| 9700 | { |
| 9701 | uint32_t value : 32; // 32-bit register value |
| 9702 | }; |
| 9703 | uint32_t word; |
| 9704 | }; |
| 9705 | #else |
| 9706 | private: |
| 9707 | uint32_t word0; |
| 9708 | |
| 9709 | public: |
| 9710 | CONSTEXPR ofm_height1_m1_r() : word0(0) {} |
| 9711 | CONSTEXPR ofm_height1_m1_r(uint32_t init) : word0(init) {} |
| 9712 | CONSTEXPR void operator=(uint32_t value) |
| 9713 | { |
| 9714 | word0 = value; |
| 9715 | } |
| 9716 | void operator=(uint32_t value) volatile |
| 9717 | { |
| 9718 | word0 = value; |
| 9719 | } |
| 9720 | CONSTEXPR operator uint32_t() |
| 9721 | { |
| 9722 | return word0; |
| 9723 | } |
| 9724 | operator uint32_t() volatile |
| 9725 | { |
| 9726 | return word0; |
| 9727 | } |
| 9728 | ofm_height1_m1_r copy() volatile |
| 9729 | { |
| 9730 | return *this; |
| 9731 | } |
| 9732 | CONSTEXPR uint32_t get_value() const |
| 9733 | { |
| 9734 | uint32_t value = static_cast<uint32_t>(word0); |
| 9735 | return value; |
| 9736 | } |
| 9737 | uint32_t get_value() const volatile |
| 9738 | { |
| 9739 | uint32_t value = static_cast<uint32_t>(word0); |
| 9740 | return value; |
| 9741 | } |
| 9742 | CONSTEXPR ofm_height1_m1_r &set_value(uint32_t value) |
| 9743 | { |
| 9744 | word0 = static_cast<uint32_t>(value); |
| 9745 | return *this; |
| 9746 | } |
| 9747 | #endif |
| 9748 | }; |
| 9749 | |
| 9750 | // ofm_region_r - None |
| 9751 | struct ofm_region_r |
| 9752 | { |
| 9753 | #ifndef __cplusplus |
| 9754 | union |
| 9755 | { |
| 9756 | struct |
| 9757 | { |
| 9758 | uint32_t value : 32; // 32-bit register value |
| 9759 | }; |
| 9760 | uint32_t word; |
| 9761 | }; |
| 9762 | #else |
| 9763 | private: |
| 9764 | uint32_t word0; |
| 9765 | |
| 9766 | public: |
| 9767 | CONSTEXPR ofm_region_r() : word0(0) {} |
| 9768 | CONSTEXPR ofm_region_r(uint32_t init) : word0(init) {} |
| 9769 | CONSTEXPR void operator=(uint32_t value) |
| 9770 | { |
| 9771 | word0 = value; |
| 9772 | } |
| 9773 | void operator=(uint32_t value) volatile |
| 9774 | { |
| 9775 | word0 = value; |
| 9776 | } |
| 9777 | CONSTEXPR operator uint32_t() |
| 9778 | { |
| 9779 | return word0; |
| 9780 | } |
| 9781 | operator uint32_t() volatile |
| 9782 | { |
| 9783 | return word0; |
| 9784 | } |
| 9785 | ofm_region_r copy() volatile |
| 9786 | { |
| 9787 | return *this; |
| 9788 | } |
| 9789 | CONSTEXPR uint32_t get_value() const |
| 9790 | { |
| 9791 | uint32_t value = static_cast<uint32_t>(word0); |
| 9792 | return value; |
| 9793 | } |
| 9794 | uint32_t get_value() const volatile |
| 9795 | { |
| 9796 | uint32_t value = static_cast<uint32_t>(word0); |
| 9797 | return value; |
| 9798 | } |
| 9799 | CONSTEXPR ofm_region_r &set_value(uint32_t value) |
| 9800 | { |
| 9801 | word0 = static_cast<uint32_t>(value); |
| 9802 | return *this; |
| 9803 | } |
| 9804 | #endif |
| 9805 | }; |
| 9806 | |
| 9807 | // kernel_width_m1_r - None |
| 9808 | struct kernel_width_m1_r |
| 9809 | { |
| 9810 | #ifndef __cplusplus |
| 9811 | union |
| 9812 | { |
| 9813 | struct |
| 9814 | { |
| 9815 | uint32_t value : 32; // 32-bit register value |
| 9816 | }; |
| 9817 | uint32_t word; |
| 9818 | }; |
| 9819 | #else |
| 9820 | private: |
| 9821 | uint32_t word0; |
| 9822 | |
| 9823 | public: |
| 9824 | CONSTEXPR kernel_width_m1_r() : word0(0) {} |
| 9825 | CONSTEXPR kernel_width_m1_r(uint32_t init) : word0(init) {} |
| 9826 | CONSTEXPR void operator=(uint32_t value) |
| 9827 | { |
| 9828 | word0 = value; |
| 9829 | } |
| 9830 | void operator=(uint32_t value) volatile |
| 9831 | { |
| 9832 | word0 = value; |
| 9833 | } |
| 9834 | CONSTEXPR operator uint32_t() |
| 9835 | { |
| 9836 | return word0; |
| 9837 | } |
| 9838 | operator uint32_t() volatile |
| 9839 | { |
| 9840 | return word0; |
| 9841 | } |
| 9842 | kernel_width_m1_r copy() volatile |
| 9843 | { |
| 9844 | return *this; |
| 9845 | } |
| 9846 | CONSTEXPR uint32_t get_value() const |
| 9847 | { |
| 9848 | uint32_t value = static_cast<uint32_t>(word0); |
| 9849 | return value; |
| 9850 | } |
| 9851 | uint32_t get_value() const volatile |
| 9852 | { |
| 9853 | uint32_t value = static_cast<uint32_t>(word0); |
| 9854 | return value; |
| 9855 | } |
| 9856 | CONSTEXPR kernel_width_m1_r &set_value(uint32_t value) |
| 9857 | { |
| 9858 | word0 = static_cast<uint32_t>(value); |
| 9859 | return *this; |
| 9860 | } |
| 9861 | #endif |
| 9862 | }; |
| 9863 | |
| 9864 | // kernel_height_m1_r - None |
| 9865 | struct kernel_height_m1_r |
| 9866 | { |
| 9867 | #ifndef __cplusplus |
| 9868 | union |
| 9869 | { |
| 9870 | struct |
| 9871 | { |
| 9872 | uint32_t value : 32; // 32-bit register value |
| 9873 | }; |
| 9874 | uint32_t word; |
| 9875 | }; |
| 9876 | #else |
| 9877 | private: |
| 9878 | uint32_t word0; |
| 9879 | |
| 9880 | public: |
| 9881 | CONSTEXPR kernel_height_m1_r() : word0(0) {} |
| 9882 | CONSTEXPR kernel_height_m1_r(uint32_t init) : word0(init) {} |
| 9883 | CONSTEXPR void operator=(uint32_t value) |
| 9884 | { |
| 9885 | word0 = value; |
| 9886 | } |
| 9887 | void operator=(uint32_t value) volatile |
| 9888 | { |
| 9889 | word0 = value; |
| 9890 | } |
| 9891 | CONSTEXPR operator uint32_t() |
| 9892 | { |
| 9893 | return word0; |
| 9894 | } |
| 9895 | operator uint32_t() volatile |
| 9896 | { |
| 9897 | return word0; |
| 9898 | } |
| 9899 | kernel_height_m1_r copy() volatile |
| 9900 | { |
| 9901 | return *this; |
| 9902 | } |
| 9903 | CONSTEXPR uint32_t get_value() const |
| 9904 | { |
| 9905 | uint32_t value = static_cast<uint32_t>(word0); |
| 9906 | return value; |
| 9907 | } |
| 9908 | uint32_t get_value() const volatile |
| 9909 | { |
| 9910 | uint32_t value = static_cast<uint32_t>(word0); |
| 9911 | return value; |
| 9912 | } |
| 9913 | CONSTEXPR kernel_height_m1_r &set_value(uint32_t value) |
| 9914 | { |
| 9915 | word0 = static_cast<uint32_t>(value); |
| 9916 | return *this; |
| 9917 | } |
| 9918 | #endif |
| 9919 | }; |
| 9920 | |
| 9921 | // kernel_stride_r - None |
| 9922 | struct kernel_stride_r |
| 9923 | { |
| 9924 | #ifndef __cplusplus |
| 9925 | union |
| 9926 | { |
| 9927 | struct |
| 9928 | { |
| 9929 | uint32_t value : 32; // 32-bit register value |
| 9930 | }; |
| 9931 | uint32_t word; |
| 9932 | }; |
| 9933 | #else |
| 9934 | private: |
| 9935 | uint32_t word0; |
| 9936 | |
| 9937 | public: |
| 9938 | CONSTEXPR kernel_stride_r() : word0(0) {} |
| 9939 | CONSTEXPR kernel_stride_r(uint32_t init) : word0(init) {} |
| 9940 | CONSTEXPR void operator=(uint32_t value) |
| 9941 | { |
| 9942 | word0 = value; |
| 9943 | } |
| 9944 | void operator=(uint32_t value) volatile |
| 9945 | { |
| 9946 | word0 = value; |
| 9947 | } |
| 9948 | CONSTEXPR operator uint32_t() |
| 9949 | { |
| 9950 | return word0; |
| 9951 | } |
| 9952 | operator uint32_t() volatile |
| 9953 | { |
| 9954 | return word0; |
| 9955 | } |
| 9956 | kernel_stride_r copy() volatile |
| 9957 | { |
| 9958 | return *this; |
| 9959 | } |
| 9960 | CONSTEXPR uint32_t get_value() const |
| 9961 | { |
| 9962 | uint32_t value = static_cast<uint32_t>(word0); |
| 9963 | return value; |
| 9964 | } |
| 9965 | uint32_t get_value() const volatile |
| 9966 | { |
| 9967 | uint32_t value = static_cast<uint32_t>(word0); |
| 9968 | return value; |
| 9969 | } |
| 9970 | CONSTEXPR kernel_stride_r &set_value(uint32_t value) |
| 9971 | { |
| 9972 | word0 = static_cast<uint32_t>(value); |
| 9973 | return *this; |
| 9974 | } |
| 9975 | #endif |
| 9976 | }; |
| 9977 | |
| 9978 | // parallel_mode_r - None |
| 9979 | struct parallel_mode_r |
| 9980 | { |
| 9981 | #ifndef __cplusplus |
| 9982 | union |
| 9983 | { |
| 9984 | struct |
| 9985 | { |
| 9986 | uint32_t value : 32; // 32-bit register value |
| 9987 | }; |
| 9988 | uint32_t word; |
| 9989 | }; |
| 9990 | #else |
| 9991 | private: |
| 9992 | uint32_t word0; |
| 9993 | |
| 9994 | public: |
| 9995 | CONSTEXPR parallel_mode_r() : word0(0) {} |
| 9996 | CONSTEXPR parallel_mode_r(uint32_t init) : word0(init) {} |
| 9997 | CONSTEXPR void operator=(uint32_t value) |
| 9998 | { |
| 9999 | word0 = value; |
| 10000 | } |
| 10001 | void operator=(uint32_t value) volatile |
| 10002 | { |
| 10003 | word0 = value; |
| 10004 | } |
| 10005 | CONSTEXPR operator uint32_t() |
| 10006 | { |
| 10007 | return word0; |
| 10008 | } |
| 10009 | operator uint32_t() volatile |
| 10010 | { |
| 10011 | return word0; |
| 10012 | } |
| 10013 | parallel_mode_r copy() volatile |
| 10014 | { |
| 10015 | return *this; |
| 10016 | } |
| 10017 | CONSTEXPR uint32_t get_value() const |
| 10018 | { |
| 10019 | uint32_t value = static_cast<uint32_t>(word0); |
| 10020 | return value; |
| 10021 | } |
| 10022 | uint32_t get_value() const volatile |
| 10023 | { |
| 10024 | uint32_t value = static_cast<uint32_t>(word0); |
| 10025 | return value; |
| 10026 | } |
| 10027 | CONSTEXPR parallel_mode_r &set_value(uint32_t value) |
| 10028 | { |
| 10029 | word0 = static_cast<uint32_t>(value); |
| 10030 | return *this; |
| 10031 | } |
| 10032 | #endif |
| 10033 | }; |
| 10034 | |
| 10035 | // acc_format_r - None |
| 10036 | struct acc_format_r |
| 10037 | { |
| 10038 | #ifndef __cplusplus |
| 10039 | union |
| 10040 | { |
| 10041 | struct |
| 10042 | { |
| 10043 | uint32_t value : 32; // 32-bit register value |
| 10044 | }; |
| 10045 | uint32_t word; |
| 10046 | }; |
| 10047 | #else |
| 10048 | private: |
| 10049 | uint32_t word0; |
| 10050 | |
| 10051 | public: |
| 10052 | CONSTEXPR acc_format_r() : word0(0) {} |
| 10053 | CONSTEXPR acc_format_r(uint32_t init) : word0(init) {} |
| 10054 | CONSTEXPR void operator=(uint32_t value) |
| 10055 | { |
| 10056 | word0 = value; |
| 10057 | } |
| 10058 | void operator=(uint32_t value) volatile |
| 10059 | { |
| 10060 | word0 = value; |
| 10061 | } |
| 10062 | CONSTEXPR operator uint32_t() |
| 10063 | { |
| 10064 | return word0; |
| 10065 | } |
| 10066 | operator uint32_t() volatile |
| 10067 | { |
| 10068 | return word0; |
| 10069 | } |
| 10070 | acc_format_r copy() volatile |
| 10071 | { |
| 10072 | return *this; |
| 10073 | } |
| 10074 | CONSTEXPR uint32_t get_value() const |
| 10075 | { |
| 10076 | uint32_t value = static_cast<uint32_t>(word0); |
| 10077 | return value; |
| 10078 | } |
| 10079 | uint32_t get_value() const volatile |
| 10080 | { |
| 10081 | uint32_t value = static_cast<uint32_t>(word0); |
| 10082 | return value; |
| 10083 | } |
| 10084 | CONSTEXPR acc_format_r &set_value(uint32_t value) |
| 10085 | { |
| 10086 | word0 = static_cast<uint32_t>(value); |
| 10087 | return *this; |
| 10088 | } |
| 10089 | #endif |
| 10090 | }; |
| 10091 | |
| 10092 | // activation_r - None |
| 10093 | struct activation_r |
| 10094 | { |
| 10095 | #ifndef __cplusplus |
| 10096 | union |
| 10097 | { |
| 10098 | struct |
| 10099 | { |
| 10100 | uint32_t value : 32; // 32-bit register value |
| 10101 | }; |
| 10102 | uint32_t word; |
| 10103 | }; |
| 10104 | #else |
| 10105 | private: |
| 10106 | uint32_t word0; |
| 10107 | |
| 10108 | public: |
| 10109 | CONSTEXPR activation_r() : word0(0) {} |
| 10110 | CONSTEXPR activation_r(uint32_t init) : word0(init) {} |
| 10111 | CONSTEXPR void operator=(uint32_t value) |
| 10112 | { |
| 10113 | word0 = value; |
| 10114 | } |
| 10115 | void operator=(uint32_t value) volatile |
| 10116 | { |
| 10117 | word0 = value; |
| 10118 | } |
| 10119 | CONSTEXPR operator uint32_t() |
| 10120 | { |
| 10121 | return word0; |
| 10122 | } |
| 10123 | operator uint32_t() volatile |
| 10124 | { |
| 10125 | return word0; |
| 10126 | } |
| 10127 | activation_r copy() volatile |
| 10128 | { |
| 10129 | return *this; |
| 10130 | } |
| 10131 | CONSTEXPR uint32_t get_value() const |
| 10132 | { |
| 10133 | uint32_t value = static_cast<uint32_t>(word0); |
| 10134 | return value; |
| 10135 | } |
| 10136 | uint32_t get_value() const volatile |
| 10137 | { |
| 10138 | uint32_t value = static_cast<uint32_t>(word0); |
| 10139 | return value; |
| 10140 | } |
| 10141 | CONSTEXPR activation_r &set_value(uint32_t value) |
| 10142 | { |
| 10143 | word0 = static_cast<uint32_t>(value); |
| 10144 | return *this; |
| 10145 | } |
| 10146 | #endif |
| 10147 | }; |
| 10148 | |
| 10149 | // activation_min_r - None |
| 10150 | struct activation_min_r |
| 10151 | { |
| 10152 | #ifndef __cplusplus |
| 10153 | union |
| 10154 | { |
| 10155 | struct |
| 10156 | { |
| 10157 | uint32_t value : 32; // 32-bit register value |
| 10158 | }; |
| 10159 | uint32_t word; |
| 10160 | }; |
| 10161 | #else |
| 10162 | private: |
| 10163 | uint32_t word0; |
| 10164 | |
| 10165 | public: |
| 10166 | CONSTEXPR activation_min_r() : word0(0) {} |
| 10167 | CONSTEXPR activation_min_r(uint32_t init) : word0(init) {} |
| 10168 | CONSTEXPR void operator=(uint32_t value) |
| 10169 | { |
| 10170 | word0 = value; |
| 10171 | } |
| 10172 | void operator=(uint32_t value) volatile |
| 10173 | { |
| 10174 | word0 = value; |
| 10175 | } |
| 10176 | CONSTEXPR operator uint32_t() |
| 10177 | { |
| 10178 | return word0; |
| 10179 | } |
| 10180 | operator uint32_t() volatile |
| 10181 | { |
| 10182 | return word0; |
| 10183 | } |
| 10184 | activation_min_r copy() volatile |
| 10185 | { |
| 10186 | return *this; |
| 10187 | } |
| 10188 | CONSTEXPR uint32_t get_value() const |
| 10189 | { |
| 10190 | uint32_t value = static_cast<uint32_t>(word0); |
| 10191 | return value; |
| 10192 | } |
| 10193 | uint32_t get_value() const volatile |
| 10194 | { |
| 10195 | uint32_t value = static_cast<uint32_t>(word0); |
| 10196 | return value; |
| 10197 | } |
| 10198 | CONSTEXPR activation_min_r &set_value(uint32_t value) |
| 10199 | { |
| 10200 | word0 = static_cast<uint32_t>(value); |
| 10201 | return *this; |
| 10202 | } |
| 10203 | #endif |
| 10204 | }; |
| 10205 | |
| 10206 | // activation_max_r - None |
| 10207 | struct activation_max_r |
| 10208 | { |
| 10209 | #ifndef __cplusplus |
| 10210 | union |
| 10211 | { |
| 10212 | struct |
| 10213 | { |
| 10214 | uint32_t value : 32; // 32-bit register value |
| 10215 | }; |
| 10216 | uint32_t word; |
| 10217 | }; |
| 10218 | #else |
| 10219 | private: |
| 10220 | uint32_t word0; |
| 10221 | |
| 10222 | public: |
| 10223 | CONSTEXPR activation_max_r() : word0(0) {} |
| 10224 | CONSTEXPR activation_max_r(uint32_t init) : word0(init) {} |
| 10225 | CONSTEXPR void operator=(uint32_t value) |
| 10226 | { |
| 10227 | word0 = value; |
| 10228 | } |
| 10229 | void operator=(uint32_t value) volatile |
| 10230 | { |
| 10231 | word0 = value; |
| 10232 | } |
| 10233 | CONSTEXPR operator uint32_t() |
| 10234 | { |
| 10235 | return word0; |
| 10236 | } |
| 10237 | operator uint32_t() volatile |
| 10238 | { |
| 10239 | return word0; |
| 10240 | } |
| 10241 | activation_max_r copy() volatile |
| 10242 | { |
| 10243 | return *this; |
| 10244 | } |
| 10245 | CONSTEXPR uint32_t get_value() const |
| 10246 | { |
| 10247 | uint32_t value = static_cast<uint32_t>(word0); |
| 10248 | return value; |
| 10249 | } |
| 10250 | uint32_t get_value() const volatile |
| 10251 | { |
| 10252 | uint32_t value = static_cast<uint32_t>(word0); |
| 10253 | return value; |
| 10254 | } |
| 10255 | CONSTEXPR activation_max_r &set_value(uint32_t value) |
| 10256 | { |
| 10257 | word0 = static_cast<uint32_t>(value); |
| 10258 | return *this; |
| 10259 | } |
| 10260 | #endif |
| 10261 | }; |
| 10262 | |
| 10263 | // weight_region_r - None |
| 10264 | struct weight_region_r |
| 10265 | { |
| 10266 | #ifndef __cplusplus |
| 10267 | union |
| 10268 | { |
| 10269 | struct |
| 10270 | { |
| 10271 | uint32_t value : 32; // 32-bit register value |
| 10272 | }; |
| 10273 | uint32_t word; |
| 10274 | }; |
| 10275 | #else |
| 10276 | private: |
| 10277 | uint32_t word0; |
| 10278 | |
| 10279 | public: |
| 10280 | CONSTEXPR weight_region_r() : word0(0) {} |
| 10281 | CONSTEXPR weight_region_r(uint32_t init) : word0(init) {} |
| 10282 | CONSTEXPR void operator=(uint32_t value) |
| 10283 | { |
| 10284 | word0 = value; |
| 10285 | } |
| 10286 | void operator=(uint32_t value) volatile |
| 10287 | { |
| 10288 | word0 = value; |
| 10289 | } |
| 10290 | CONSTEXPR operator uint32_t() |
| 10291 | { |
| 10292 | return word0; |
| 10293 | } |
| 10294 | operator uint32_t() volatile |
| 10295 | { |
| 10296 | return word0; |
| 10297 | } |
| 10298 | weight_region_r copy() volatile |
| 10299 | { |
| 10300 | return *this; |
| 10301 | } |
| 10302 | CONSTEXPR uint32_t get_value() const |
| 10303 | { |
| 10304 | uint32_t value = static_cast<uint32_t>(word0); |
| 10305 | return value; |
| 10306 | } |
| 10307 | uint32_t get_value() const volatile |
| 10308 | { |
| 10309 | uint32_t value = static_cast<uint32_t>(word0); |
| 10310 | return value; |
| 10311 | } |
| 10312 | CONSTEXPR weight_region_r &set_value(uint32_t value) |
| 10313 | { |
| 10314 | word0 = static_cast<uint32_t>(value); |
| 10315 | return *this; |
| 10316 | } |
| 10317 | #endif |
| 10318 | }; |
| 10319 | |
| 10320 | // scale_region_r - None |
| 10321 | struct scale_region_r |
| 10322 | { |
| 10323 | #ifndef __cplusplus |
| 10324 | union |
| 10325 | { |
| 10326 | struct |
| 10327 | { |
| 10328 | uint32_t value : 32; // 32-bit register value |
| 10329 | }; |
| 10330 | uint32_t word; |
| 10331 | }; |
| 10332 | #else |
| 10333 | private: |
| 10334 | uint32_t word0; |
| 10335 | |
| 10336 | public: |
| 10337 | CONSTEXPR scale_region_r() : word0(0) {} |
| 10338 | CONSTEXPR scale_region_r(uint32_t init) : word0(init) {} |
| 10339 | CONSTEXPR void operator=(uint32_t value) |
| 10340 | { |
| 10341 | word0 = value; |
| 10342 | } |
| 10343 | void operator=(uint32_t value) volatile |
| 10344 | { |
| 10345 | word0 = value; |
| 10346 | } |
| 10347 | CONSTEXPR operator uint32_t() |
| 10348 | { |
| 10349 | return word0; |
| 10350 | } |
| 10351 | operator uint32_t() volatile |
| 10352 | { |
| 10353 | return word0; |
| 10354 | } |
| 10355 | scale_region_r copy() volatile |
| 10356 | { |
| 10357 | return *this; |
| 10358 | } |
| 10359 | CONSTEXPR uint32_t get_value() const |
| 10360 | { |
| 10361 | uint32_t value = static_cast<uint32_t>(word0); |
| 10362 | return value; |
| 10363 | } |
| 10364 | uint32_t get_value() const volatile |
| 10365 | { |
| 10366 | uint32_t value = static_cast<uint32_t>(word0); |
| 10367 | return value; |
| 10368 | } |
| 10369 | CONSTEXPR scale_region_r &set_value(uint32_t value) |
| 10370 | { |
| 10371 | word0 = static_cast<uint32_t>(value); |
| 10372 | return *this; |
| 10373 | } |
| 10374 | #endif |
| 10375 | }; |
| 10376 | |
| 10377 | // ab_start_r - None |
| 10378 | struct ab_start_r |
| 10379 | { |
| 10380 | #ifndef __cplusplus |
| 10381 | union |
| 10382 | { |
| 10383 | struct |
| 10384 | { |
| 10385 | uint32_t value : 32; // 32-bit register value |
| 10386 | }; |
| 10387 | uint32_t word; |
| 10388 | }; |
| 10389 | #else |
| 10390 | private: |
| 10391 | uint32_t word0; |
| 10392 | |
| 10393 | public: |
| 10394 | CONSTEXPR ab_start_r() : word0(0) {} |
| 10395 | CONSTEXPR ab_start_r(uint32_t init) : word0(init) {} |
| 10396 | CONSTEXPR void operator=(uint32_t value) |
| 10397 | { |
| 10398 | word0 = value; |
| 10399 | } |
| 10400 | void operator=(uint32_t value) volatile |
| 10401 | { |
| 10402 | word0 = value; |
| 10403 | } |
| 10404 | CONSTEXPR operator uint32_t() |
| 10405 | { |
| 10406 | return word0; |
| 10407 | } |
| 10408 | operator uint32_t() volatile |
| 10409 | { |
| 10410 | return word0; |
| 10411 | } |
| 10412 | ab_start_r copy() volatile |
| 10413 | { |
| 10414 | return *this; |
| 10415 | } |
| 10416 | CONSTEXPR uint32_t get_value() const |
| 10417 | { |
| 10418 | uint32_t value = static_cast<uint32_t>(word0); |
| 10419 | return value; |
| 10420 | } |
| 10421 | uint32_t get_value() const volatile |
| 10422 | { |
| 10423 | uint32_t value = static_cast<uint32_t>(word0); |
| 10424 | return value; |
| 10425 | } |
| 10426 | CONSTEXPR ab_start_r &set_value(uint32_t value) |
| 10427 | { |
| 10428 | word0 = static_cast<uint32_t>(value); |
| 10429 | return *this; |
| 10430 | } |
| 10431 | #endif |
| 10432 | }; |
| 10433 | |
| 10434 | // blockdep_r - None |
| 10435 | struct blockdep_r |
| 10436 | { |
| 10437 | #ifndef __cplusplus |
| 10438 | union |
| 10439 | { |
| 10440 | struct |
| 10441 | { |
| 10442 | uint32_t value : 32; // 32-bit register value |
| 10443 | }; |
| 10444 | uint32_t word; |
| 10445 | }; |
| 10446 | #else |
| 10447 | private: |
| 10448 | uint32_t word0; |
| 10449 | |
| 10450 | public: |
| 10451 | CONSTEXPR blockdep_r() : word0(0) {} |
| 10452 | CONSTEXPR blockdep_r(uint32_t init) : word0(init) {} |
| 10453 | CONSTEXPR void operator=(uint32_t value) |
| 10454 | { |
| 10455 | word0 = value; |
| 10456 | } |
| 10457 | void operator=(uint32_t value) volatile |
| 10458 | { |
| 10459 | word0 = value; |
| 10460 | } |
| 10461 | CONSTEXPR operator uint32_t() |
| 10462 | { |
| 10463 | return word0; |
| 10464 | } |
| 10465 | operator uint32_t() volatile |
| 10466 | { |
| 10467 | return word0; |
| 10468 | } |
| 10469 | blockdep_r copy() volatile |
| 10470 | { |
| 10471 | return *this; |
| 10472 | } |
| 10473 | CONSTEXPR uint32_t get_value() const |
| 10474 | { |
| 10475 | uint32_t value = static_cast<uint32_t>(word0); |
| 10476 | return value; |
| 10477 | } |
| 10478 | uint32_t get_value() const volatile |
| 10479 | { |
| 10480 | uint32_t value = static_cast<uint32_t>(word0); |
| 10481 | return value; |
| 10482 | } |
| 10483 | CONSTEXPR blockdep_r &set_value(uint32_t value) |
| 10484 | { |
| 10485 | word0 = static_cast<uint32_t>(value); |
| 10486 | return *this; |
| 10487 | } |
| 10488 | #endif |
| 10489 | }; |
| 10490 | |
| 10491 | // dma0_src_region_r - None |
| 10492 | struct dma0_src_region_r |
| 10493 | { |
| 10494 | #ifndef __cplusplus |
| 10495 | union |
| 10496 | { |
| 10497 | struct |
| 10498 | { |
| 10499 | uint32_t value : 32; // 32-bit register value |
| 10500 | }; |
| 10501 | uint32_t word; |
| 10502 | }; |
| 10503 | #else |
| 10504 | private: |
| 10505 | uint32_t word0; |
| 10506 | |
| 10507 | public: |
| 10508 | CONSTEXPR dma0_src_region_r() : word0(0) {} |
| 10509 | CONSTEXPR dma0_src_region_r(uint32_t init) : word0(init) {} |
| 10510 | CONSTEXPR void operator=(uint32_t value) |
| 10511 | { |
| 10512 | word0 = value; |
| 10513 | } |
| 10514 | void operator=(uint32_t value) volatile |
| 10515 | { |
| 10516 | word0 = value; |
| 10517 | } |
| 10518 | CONSTEXPR operator uint32_t() |
| 10519 | { |
| 10520 | return word0; |
| 10521 | } |
| 10522 | operator uint32_t() volatile |
| 10523 | { |
| 10524 | return word0; |
| 10525 | } |
| 10526 | dma0_src_region_r copy() volatile |
| 10527 | { |
| 10528 | return *this; |
| 10529 | } |
| 10530 | CONSTEXPR uint32_t get_value() const |
| 10531 | { |
| 10532 | uint32_t value = static_cast<uint32_t>(word0); |
| 10533 | return value; |
| 10534 | } |
| 10535 | uint32_t get_value() const volatile |
| 10536 | { |
| 10537 | uint32_t value = static_cast<uint32_t>(word0); |
| 10538 | return value; |
| 10539 | } |
| 10540 | CONSTEXPR dma0_src_region_r &set_value(uint32_t value) |
| 10541 | { |
| 10542 | word0 = static_cast<uint32_t>(value); |
| 10543 | return *this; |
| 10544 | } |
| 10545 | #endif |
| 10546 | }; |
| 10547 | |
| 10548 | // dma0_dst_region_r - None |
| 10549 | struct dma0_dst_region_r |
| 10550 | { |
| 10551 | #ifndef __cplusplus |
| 10552 | union |
| 10553 | { |
| 10554 | struct |
| 10555 | { |
| 10556 | uint32_t value : 32; // 32-bit register value |
| 10557 | }; |
| 10558 | uint32_t word; |
| 10559 | }; |
| 10560 | #else |
| 10561 | private: |
| 10562 | uint32_t word0; |
| 10563 | |
| 10564 | public: |
| 10565 | CONSTEXPR dma0_dst_region_r() : word0(0) {} |
| 10566 | CONSTEXPR dma0_dst_region_r(uint32_t init) : word0(init) {} |
| 10567 | CONSTEXPR void operator=(uint32_t value) |
| 10568 | { |
| 10569 | word0 = value; |
| 10570 | } |
| 10571 | void operator=(uint32_t value) volatile |
| 10572 | { |
| 10573 | word0 = value; |
| 10574 | } |
| 10575 | CONSTEXPR operator uint32_t() |
| 10576 | { |
| 10577 | return word0; |
| 10578 | } |
| 10579 | operator uint32_t() volatile |
| 10580 | { |
| 10581 | return word0; |
| 10582 | } |
| 10583 | dma0_dst_region_r copy() volatile |
| 10584 | { |
| 10585 | return *this; |
| 10586 | } |
| 10587 | CONSTEXPR uint32_t get_value() const |
| 10588 | { |
| 10589 | uint32_t value = static_cast<uint32_t>(word0); |
| 10590 | return value; |
| 10591 | } |
| 10592 | uint32_t get_value() const volatile |
| 10593 | { |
| 10594 | uint32_t value = static_cast<uint32_t>(word0); |
| 10595 | return value; |
| 10596 | } |
| 10597 | CONSTEXPR dma0_dst_region_r &set_value(uint32_t value) |
| 10598 | { |
| 10599 | word0 = static_cast<uint32_t>(value); |
| 10600 | return *this; |
| 10601 | } |
| 10602 | #endif |
| 10603 | }; |
| 10604 | |
| 10605 | // dma0_size0_r - None |
| 10606 | struct dma0_size0_r |
| 10607 | { |
| 10608 | #ifndef __cplusplus |
| 10609 | union |
| 10610 | { |
| 10611 | struct |
| 10612 | { |
| 10613 | uint32_t value : 32; // 32-bit register value |
| 10614 | }; |
| 10615 | uint32_t word; |
| 10616 | }; |
| 10617 | #else |
| 10618 | private: |
| 10619 | uint32_t word0; |
| 10620 | |
| 10621 | public: |
| 10622 | CONSTEXPR dma0_size0_r() : word0(0) {} |
| 10623 | CONSTEXPR dma0_size0_r(uint32_t init) : word0(init) {} |
| 10624 | CONSTEXPR void operator=(uint32_t value) |
| 10625 | { |
| 10626 | word0 = value; |
| 10627 | } |
| 10628 | void operator=(uint32_t value) volatile |
| 10629 | { |
| 10630 | word0 = value; |
| 10631 | } |
| 10632 | CONSTEXPR operator uint32_t() |
| 10633 | { |
| 10634 | return word0; |
| 10635 | } |
| 10636 | operator uint32_t() volatile |
| 10637 | { |
| 10638 | return word0; |
| 10639 | } |
| 10640 | dma0_size0_r copy() volatile |
| 10641 | { |
| 10642 | return *this; |
| 10643 | } |
| 10644 | CONSTEXPR uint32_t get_value() const |
| 10645 | { |
| 10646 | uint32_t value = static_cast<uint32_t>(word0); |
| 10647 | return value; |
| 10648 | } |
| 10649 | uint32_t get_value() const volatile |
| 10650 | { |
| 10651 | uint32_t value = static_cast<uint32_t>(word0); |
| 10652 | return value; |
| 10653 | } |
| 10654 | CONSTEXPR dma0_size0_r &set_value(uint32_t value) |
| 10655 | { |
| 10656 | word0 = static_cast<uint32_t>(value); |
| 10657 | return *this; |
| 10658 | } |
| 10659 | #endif |
| 10660 | }; |
| 10661 | |
| 10662 | // dma0_size1_r - None |
| 10663 | struct dma0_size1_r |
| 10664 | { |
| 10665 | #ifndef __cplusplus |
| 10666 | union |
| 10667 | { |
| 10668 | struct |
| 10669 | { |
| 10670 | uint32_t value : 32; // 32-bit register value |
| 10671 | }; |
| 10672 | uint32_t word; |
| 10673 | }; |
| 10674 | #else |
| 10675 | private: |
| 10676 | uint32_t word0; |
| 10677 | |
| 10678 | public: |
| 10679 | CONSTEXPR dma0_size1_r() : word0(0) {} |
| 10680 | CONSTEXPR dma0_size1_r(uint32_t init) : word0(init) {} |
| 10681 | CONSTEXPR void operator=(uint32_t value) |
| 10682 | { |
| 10683 | word0 = value; |
| 10684 | } |
| 10685 | void operator=(uint32_t value) volatile |
| 10686 | { |
| 10687 | word0 = value; |
| 10688 | } |
| 10689 | CONSTEXPR operator uint32_t() |
| 10690 | { |
| 10691 | return word0; |
| 10692 | } |
| 10693 | operator uint32_t() volatile |
| 10694 | { |
| 10695 | return word0; |
| 10696 | } |
| 10697 | dma0_size1_r copy() volatile |
| 10698 | { |
| 10699 | return *this; |
| 10700 | } |
| 10701 | CONSTEXPR uint32_t get_value() const |
| 10702 | { |
| 10703 | uint32_t value = static_cast<uint32_t>(word0); |
| 10704 | return value; |
| 10705 | } |
| 10706 | uint32_t get_value() const volatile |
| 10707 | { |
| 10708 | uint32_t value = static_cast<uint32_t>(word0); |
| 10709 | return value; |
| 10710 | } |
| 10711 | CONSTEXPR dma0_size1_r &set_value(uint32_t value) |
| 10712 | { |
| 10713 | word0 = static_cast<uint32_t>(value); |
| 10714 | return *this; |
| 10715 | } |
| 10716 | #endif |
| 10717 | }; |
| 10718 | |
| 10719 | // ifm2_broadcast_r - None |
| 10720 | struct ifm2_broadcast_r |
| 10721 | { |
| 10722 | #ifndef __cplusplus |
| 10723 | union |
| 10724 | { |
| 10725 | struct |
| 10726 | { |
| 10727 | uint32_t value : 32; // 32-bit register value |
| 10728 | }; |
| 10729 | uint32_t word; |
| 10730 | }; |
| 10731 | #else |
| 10732 | private: |
| 10733 | uint32_t word0; |
| 10734 | |
| 10735 | public: |
| 10736 | CONSTEXPR ifm2_broadcast_r() : word0(0) {} |
| 10737 | CONSTEXPR ifm2_broadcast_r(uint32_t init) : word0(init) {} |
| 10738 | CONSTEXPR void operator=(uint32_t value) |
| 10739 | { |
| 10740 | word0 = value; |
| 10741 | } |
| 10742 | void operator=(uint32_t value) volatile |
| 10743 | { |
| 10744 | word0 = value; |
| 10745 | } |
| 10746 | CONSTEXPR operator uint32_t() |
| 10747 | { |
| 10748 | return word0; |
| 10749 | } |
| 10750 | operator uint32_t() volatile |
| 10751 | { |
| 10752 | return word0; |
| 10753 | } |
| 10754 | ifm2_broadcast_r copy() volatile |
| 10755 | { |
| 10756 | return *this; |
| 10757 | } |
| 10758 | CONSTEXPR uint32_t get_value() const |
| 10759 | { |
| 10760 | uint32_t value = static_cast<uint32_t>(word0); |
| 10761 | return value; |
| 10762 | } |
| 10763 | uint32_t get_value() const volatile |
| 10764 | { |
| 10765 | uint32_t value = static_cast<uint32_t>(word0); |
| 10766 | return value; |
| 10767 | } |
| 10768 | CONSTEXPR ifm2_broadcast_r &set_value(uint32_t value) |
| 10769 | { |
| 10770 | word0 = static_cast<uint32_t>(value); |
| 10771 | return *this; |
| 10772 | } |
| 10773 | #endif |
| 10774 | }; |
| 10775 | |
| 10776 | // ifm2_scalar_r - None |
| 10777 | struct ifm2_scalar_r |
| 10778 | { |
| 10779 | #ifndef __cplusplus |
| 10780 | union |
| 10781 | { |
| 10782 | struct |
| 10783 | { |
| 10784 | uint32_t value : 32; // 32-bit register value |
| 10785 | }; |
| 10786 | uint32_t word; |
| 10787 | }; |
| 10788 | #else |
| 10789 | private: |
| 10790 | uint32_t word0; |
| 10791 | |
| 10792 | public: |
| 10793 | CONSTEXPR ifm2_scalar_r() : word0(0) {} |
| 10794 | CONSTEXPR ifm2_scalar_r(uint32_t init) : word0(init) {} |
| 10795 | CONSTEXPR void operator=(uint32_t value) |
| 10796 | { |
| 10797 | word0 = value; |
| 10798 | } |
| 10799 | void operator=(uint32_t value) volatile |
| 10800 | { |
| 10801 | word0 = value; |
| 10802 | } |
| 10803 | CONSTEXPR operator uint32_t() |
| 10804 | { |
| 10805 | return word0; |
| 10806 | } |
| 10807 | operator uint32_t() volatile |
| 10808 | { |
| 10809 | return word0; |
| 10810 | } |
| 10811 | ifm2_scalar_r copy() volatile |
| 10812 | { |
| 10813 | return *this; |
| 10814 | } |
| 10815 | CONSTEXPR uint32_t get_value() const |
| 10816 | { |
| 10817 | uint32_t value = static_cast<uint32_t>(word0); |
| 10818 | return value; |
| 10819 | } |
| 10820 | uint32_t get_value() const volatile |
| 10821 | { |
| 10822 | uint32_t value = static_cast<uint32_t>(word0); |
| 10823 | return value; |
| 10824 | } |
| 10825 | CONSTEXPR ifm2_scalar_r &set_value(uint32_t value) |
| 10826 | { |
| 10827 | word0 = static_cast<uint32_t>(value); |
| 10828 | return *this; |
| 10829 | } |
| 10830 | #endif |
| 10831 | }; |
| 10832 | |
| 10833 | // ifm2_precision_r - None |
| 10834 | struct ifm2_precision_r |
| 10835 | { |
| 10836 | #ifndef __cplusplus |
| 10837 | union |
| 10838 | { |
| 10839 | struct |
| 10840 | { |
| 10841 | uint32_t value : 32; // 32-bit register value |
| 10842 | }; |
| 10843 | uint32_t word; |
| 10844 | }; |
| 10845 | #else |
| 10846 | private: |
| 10847 | uint32_t word0; |
| 10848 | |
| 10849 | public: |
| 10850 | CONSTEXPR ifm2_precision_r() : word0(0) {} |
| 10851 | CONSTEXPR ifm2_precision_r(uint32_t init) : word0(init) {} |
| 10852 | CONSTEXPR void operator=(uint32_t value) |
| 10853 | { |
| 10854 | word0 = value; |
| 10855 | } |
| 10856 | void operator=(uint32_t value) volatile |
| 10857 | { |
| 10858 | word0 = value; |
| 10859 | } |
| 10860 | CONSTEXPR operator uint32_t() |
| 10861 | { |
| 10862 | return word0; |
| 10863 | } |
| 10864 | operator uint32_t() volatile |
| 10865 | { |
| 10866 | return word0; |
| 10867 | } |
| 10868 | ifm2_precision_r copy() volatile |
| 10869 | { |
| 10870 | return *this; |
| 10871 | } |
| 10872 | CONSTEXPR uint32_t get_value() const |
| 10873 | { |
| 10874 | uint32_t value = static_cast<uint32_t>(word0); |
| 10875 | return value; |
| 10876 | } |
| 10877 | uint32_t get_value() const volatile |
| 10878 | { |
| 10879 | uint32_t value = static_cast<uint32_t>(word0); |
| 10880 | return value; |
| 10881 | } |
| 10882 | CONSTEXPR ifm2_precision_r &set_value(uint32_t value) |
| 10883 | { |
| 10884 | word0 = static_cast<uint32_t>(value); |
| 10885 | return *this; |
| 10886 | } |
| 10887 | #endif |
| 10888 | }; |
| 10889 | |
| 10890 | // ifm2_zero_point_r - None |
| 10891 | struct ifm2_zero_point_r |
| 10892 | { |
| 10893 | #ifndef __cplusplus |
| 10894 | union |
| 10895 | { |
| 10896 | struct |
| 10897 | { |
| 10898 | uint32_t value : 32; // 32-bit register value |
| 10899 | }; |
| 10900 | uint32_t word; |
| 10901 | }; |
| 10902 | #else |
| 10903 | private: |
| 10904 | uint32_t word0; |
| 10905 | |
| 10906 | public: |
| 10907 | CONSTEXPR ifm2_zero_point_r() : word0(0) {} |
| 10908 | CONSTEXPR ifm2_zero_point_r(uint32_t init) : word0(init) {} |
| 10909 | CONSTEXPR void operator=(uint32_t value) |
| 10910 | { |
| 10911 | word0 = value; |
| 10912 | } |
| 10913 | void operator=(uint32_t value) volatile |
| 10914 | { |
| 10915 | word0 = value; |
| 10916 | } |
| 10917 | CONSTEXPR operator uint32_t() |
| 10918 | { |
| 10919 | return word0; |
| 10920 | } |
| 10921 | operator uint32_t() volatile |
| 10922 | { |
| 10923 | return word0; |
| 10924 | } |
| 10925 | ifm2_zero_point_r copy() volatile |
| 10926 | { |
| 10927 | return *this; |
| 10928 | } |
| 10929 | CONSTEXPR uint32_t get_value() const |
| 10930 | { |
| 10931 | uint32_t value = static_cast<uint32_t>(word0); |
| 10932 | return value; |
| 10933 | } |
| 10934 | uint32_t get_value() const volatile |
| 10935 | { |
| 10936 | uint32_t value = static_cast<uint32_t>(word0); |
| 10937 | return value; |
| 10938 | } |
| 10939 | CONSTEXPR ifm2_zero_point_r &set_value(uint32_t value) |
| 10940 | { |
| 10941 | word0 = static_cast<uint32_t>(value); |
| 10942 | return *this; |
| 10943 | } |
| 10944 | #endif |
| 10945 | }; |
| 10946 | |
| 10947 | // ifm2_width0_m1_r - None |
| 10948 | struct ifm2_width0_m1_r |
| 10949 | { |
| 10950 | #ifndef __cplusplus |
| 10951 | union |
| 10952 | { |
| 10953 | struct |
| 10954 | { |
| 10955 | uint32_t value : 32; // 32-bit register value |
| 10956 | }; |
| 10957 | uint32_t word; |
| 10958 | }; |
| 10959 | #else |
| 10960 | private: |
| 10961 | uint32_t word0; |
| 10962 | |
| 10963 | public: |
| 10964 | CONSTEXPR ifm2_width0_m1_r() : word0(0) {} |
| 10965 | CONSTEXPR ifm2_width0_m1_r(uint32_t init) : word0(init) {} |
| 10966 | CONSTEXPR void operator=(uint32_t value) |
| 10967 | { |
| 10968 | word0 = value; |
| 10969 | } |
| 10970 | void operator=(uint32_t value) volatile |
| 10971 | { |
| 10972 | word0 = value; |
| 10973 | } |
| 10974 | CONSTEXPR operator uint32_t() |
| 10975 | { |
| 10976 | return word0; |
| 10977 | } |
| 10978 | operator uint32_t() volatile |
| 10979 | { |
| 10980 | return word0; |
| 10981 | } |
| 10982 | ifm2_width0_m1_r copy() volatile |
| 10983 | { |
| 10984 | return *this; |
| 10985 | } |
| 10986 | CONSTEXPR uint32_t get_value() const |
| 10987 | { |
| 10988 | uint32_t value = static_cast<uint32_t>(word0); |
| 10989 | return value; |
| 10990 | } |
| 10991 | uint32_t get_value() const volatile |
| 10992 | { |
| 10993 | uint32_t value = static_cast<uint32_t>(word0); |
| 10994 | return value; |
| 10995 | } |
| 10996 | CONSTEXPR ifm2_width0_m1_r &set_value(uint32_t value) |
| 10997 | { |
| 10998 | word0 = static_cast<uint32_t>(value); |
| 10999 | return *this; |
| 11000 | } |
| 11001 | #endif |
| 11002 | }; |
| 11003 | |
| 11004 | // ifm2_height0_m1_r - None |
| 11005 | struct ifm2_height0_m1_r |
| 11006 | { |
| 11007 | #ifndef __cplusplus |
| 11008 | union |
| 11009 | { |
| 11010 | struct |
| 11011 | { |
| 11012 | uint32_t value : 32; // 32-bit register value |
| 11013 | }; |
| 11014 | uint32_t word; |
| 11015 | }; |
| 11016 | #else |
| 11017 | private: |
| 11018 | uint32_t word0; |
| 11019 | |
| 11020 | public: |
| 11021 | CONSTEXPR ifm2_height0_m1_r() : word0(0) {} |
| 11022 | CONSTEXPR ifm2_height0_m1_r(uint32_t init) : word0(init) {} |
| 11023 | CONSTEXPR void operator=(uint32_t value) |
| 11024 | { |
| 11025 | word0 = value; |
| 11026 | } |
| 11027 | void operator=(uint32_t value) volatile |
| 11028 | { |
| 11029 | word0 = value; |
| 11030 | } |
| 11031 | CONSTEXPR operator uint32_t() |
| 11032 | { |
| 11033 | return word0; |
| 11034 | } |
| 11035 | operator uint32_t() volatile |
| 11036 | { |
| 11037 | return word0; |
| 11038 | } |
| 11039 | ifm2_height0_m1_r copy() volatile |
| 11040 | { |
| 11041 | return *this; |
| 11042 | } |
| 11043 | CONSTEXPR uint32_t get_value() const |
| 11044 | { |
| 11045 | uint32_t value = static_cast<uint32_t>(word0); |
| 11046 | return value; |
| 11047 | } |
| 11048 | uint32_t get_value() const volatile |
| 11049 | { |
| 11050 | uint32_t value = static_cast<uint32_t>(word0); |
| 11051 | return value; |
| 11052 | } |
| 11053 | CONSTEXPR ifm2_height0_m1_r &set_value(uint32_t value) |
| 11054 | { |
| 11055 | word0 = static_cast<uint32_t>(value); |
| 11056 | return *this; |
| 11057 | } |
| 11058 | #endif |
| 11059 | }; |
| 11060 | |
| 11061 | // ifm2_height1_m1_r - None |
| 11062 | struct ifm2_height1_m1_r |
| 11063 | { |
| 11064 | #ifndef __cplusplus |
| 11065 | union |
| 11066 | { |
| 11067 | struct |
| 11068 | { |
| 11069 | uint32_t value : 32; // 32-bit register value |
| 11070 | }; |
| 11071 | uint32_t word; |
| 11072 | }; |
| 11073 | #else |
| 11074 | private: |
| 11075 | uint32_t word0; |
| 11076 | |
| 11077 | public: |
| 11078 | CONSTEXPR ifm2_height1_m1_r() : word0(0) {} |
| 11079 | CONSTEXPR ifm2_height1_m1_r(uint32_t init) : word0(init) {} |
| 11080 | CONSTEXPR void operator=(uint32_t value) |
| 11081 | { |
| 11082 | word0 = value; |
| 11083 | } |
| 11084 | void operator=(uint32_t value) volatile |
| 11085 | { |
| 11086 | word0 = value; |
| 11087 | } |
| 11088 | CONSTEXPR operator uint32_t() |
| 11089 | { |
| 11090 | return word0; |
| 11091 | } |
| 11092 | operator uint32_t() volatile |
| 11093 | { |
| 11094 | return word0; |
| 11095 | } |
| 11096 | ifm2_height1_m1_r copy() volatile |
| 11097 | { |
| 11098 | return *this; |
| 11099 | } |
| 11100 | CONSTEXPR uint32_t get_value() const |
| 11101 | { |
| 11102 | uint32_t value = static_cast<uint32_t>(word0); |
| 11103 | return value; |
| 11104 | } |
| 11105 | uint32_t get_value() const volatile |
| 11106 | { |
| 11107 | uint32_t value = static_cast<uint32_t>(word0); |
| 11108 | return value; |
| 11109 | } |
| 11110 | CONSTEXPR ifm2_height1_m1_r &set_value(uint32_t value) |
| 11111 | { |
| 11112 | word0 = static_cast<uint32_t>(value); |
| 11113 | return *this; |
| 11114 | } |
| 11115 | #endif |
| 11116 | }; |
| 11117 | |
| 11118 | // ifm2_ib_start_r - None |
| 11119 | struct ifm2_ib_start_r |
| 11120 | { |
| 11121 | #ifndef __cplusplus |
| 11122 | union |
| 11123 | { |
| 11124 | struct |
| 11125 | { |
| 11126 | uint32_t value : 32; // 32-bit register value |
| 11127 | }; |
| 11128 | uint32_t word; |
| 11129 | }; |
| 11130 | #else |
| 11131 | private: |
| 11132 | uint32_t word0; |
| 11133 | |
| 11134 | public: |
| 11135 | CONSTEXPR ifm2_ib_start_r() : word0(0) {} |
| 11136 | CONSTEXPR ifm2_ib_start_r(uint32_t init) : word0(init) {} |
| 11137 | CONSTEXPR void operator=(uint32_t value) |
| 11138 | { |
| 11139 | word0 = value; |
| 11140 | } |
| 11141 | void operator=(uint32_t value) volatile |
| 11142 | { |
| 11143 | word0 = value; |
| 11144 | } |
| 11145 | CONSTEXPR operator uint32_t() |
| 11146 | { |
| 11147 | return word0; |
| 11148 | } |
| 11149 | operator uint32_t() volatile |
| 11150 | { |
| 11151 | return word0; |
| 11152 | } |
| 11153 | ifm2_ib_start_r copy() volatile |
| 11154 | { |
| 11155 | return *this; |
| 11156 | } |
| 11157 | CONSTEXPR uint32_t get_value() const |
| 11158 | { |
| 11159 | uint32_t value = static_cast<uint32_t>(word0); |
| 11160 | return value; |
| 11161 | } |
| 11162 | uint32_t get_value() const volatile |
| 11163 | { |
| 11164 | uint32_t value = static_cast<uint32_t>(word0); |
| 11165 | return value; |
| 11166 | } |
| 11167 | CONSTEXPR ifm2_ib_start_r &set_value(uint32_t value) |
| 11168 | { |
| 11169 | word0 = static_cast<uint32_t>(value); |
| 11170 | return *this; |
| 11171 | } |
| 11172 | #endif |
| 11173 | }; |
| 11174 | |
| 11175 | // ifm2_region_r - None |
| 11176 | struct ifm2_region_r |
| 11177 | { |
| 11178 | #ifndef __cplusplus |
| 11179 | union |
| 11180 | { |
| 11181 | struct |
| 11182 | { |
| 11183 | uint32_t value : 32; // 32-bit register value |
| 11184 | }; |
| 11185 | uint32_t word; |
| 11186 | }; |
| 11187 | #else |
| 11188 | private: |
| 11189 | uint32_t word0; |
| 11190 | |
| 11191 | public: |
| 11192 | CONSTEXPR ifm2_region_r() : word0(0) {} |
| 11193 | CONSTEXPR ifm2_region_r(uint32_t init) : word0(init) {} |
| 11194 | CONSTEXPR void operator=(uint32_t value) |
| 11195 | { |
| 11196 | word0 = value; |
| 11197 | } |
| 11198 | void operator=(uint32_t value) volatile |
| 11199 | { |
| 11200 | word0 = value; |
| 11201 | } |
| 11202 | CONSTEXPR operator uint32_t() |
| 11203 | { |
| 11204 | return word0; |
| 11205 | } |
| 11206 | operator uint32_t() volatile |
| 11207 | { |
| 11208 | return word0; |
| 11209 | } |
| 11210 | ifm2_region_r copy() volatile |
| 11211 | { |
| 11212 | return *this; |
| 11213 | } |
| 11214 | CONSTEXPR uint32_t get_value() const |
| 11215 | { |
| 11216 | uint32_t value = static_cast<uint32_t>(word0); |
| 11217 | return value; |
| 11218 | } |
| 11219 | uint32_t get_value() const volatile |
| 11220 | { |
| 11221 | uint32_t value = static_cast<uint32_t>(word0); |
| 11222 | return value; |
| 11223 | } |
| 11224 | CONSTEXPR ifm2_region_r &set_value(uint32_t value) |
| 11225 | { |
| 11226 | word0 = static_cast<uint32_t>(value); |
| 11227 | return *this; |
| 11228 | } |
| 11229 | #endif |
| 11230 | }; |
| 11231 | |
| 11232 | // ifm_base0_r - None |
| 11233 | struct ifm_base0_r |
| 11234 | { |
| 11235 | #ifndef __cplusplus |
| 11236 | union |
| 11237 | { |
| 11238 | struct |
| 11239 | { |
| 11240 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11241 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11242 | }; |
| 11243 | uint32_t word[2]; |
| 11244 | }; |
| 11245 | #else |
| 11246 | private: |
| 11247 | uint32_t word0; |
| 11248 | uint32_t word1; |
| 11249 | |
| 11250 | public: |
| 11251 | CONSTEXPR ifm_base0_r() : word0(0), word1(0) {} |
| 11252 | CONSTEXPR ifm_base0_r(uint64_t init) : |
| 11253 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11254 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11255 | { |
| 11256 | } |
| 11257 | CONSTEXPR void operator=(uint64_t value) |
| 11258 | { |
| 11259 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11260 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11261 | } |
| 11262 | void operator=(uint64_t value) volatile |
| 11263 | { |
| 11264 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11265 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11266 | } |
| 11267 | CONSTEXPR operator uint64_t() |
| 11268 | { |
| 11269 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11270 | } |
| 11271 | operator uint64_t() volatile |
| 11272 | { |
| 11273 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11274 | } |
| 11275 | ifm_base0_r copy() volatile |
| 11276 | { |
| 11277 | return *this; |
| 11278 | } |
| 11279 | #endif |
| 11280 | }; |
| 11281 | |
| 11282 | // ifm_base1_r - None |
| 11283 | struct ifm_base1_r |
| 11284 | { |
| 11285 | #ifndef __cplusplus |
| 11286 | union |
| 11287 | { |
| 11288 | struct |
| 11289 | { |
| 11290 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11291 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11292 | }; |
| 11293 | uint32_t word[2]; |
| 11294 | }; |
| 11295 | #else |
| 11296 | private: |
| 11297 | uint32_t word0; |
| 11298 | uint32_t word1; |
| 11299 | |
| 11300 | public: |
| 11301 | CONSTEXPR ifm_base1_r() : word0(0), word1(0) {} |
| 11302 | CONSTEXPR ifm_base1_r(uint64_t init) : |
| 11303 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11304 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11305 | { |
| 11306 | } |
| 11307 | CONSTEXPR void operator=(uint64_t value) |
| 11308 | { |
| 11309 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11310 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11311 | } |
| 11312 | void operator=(uint64_t value) volatile |
| 11313 | { |
| 11314 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11315 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11316 | } |
| 11317 | CONSTEXPR operator uint64_t() |
| 11318 | { |
| 11319 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11320 | } |
| 11321 | operator uint64_t() volatile |
| 11322 | { |
| 11323 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11324 | } |
| 11325 | ifm_base1_r copy() volatile |
| 11326 | { |
| 11327 | return *this; |
| 11328 | } |
| 11329 | #endif |
| 11330 | }; |
| 11331 | |
| 11332 | // ifm_base2_r - None |
| 11333 | struct ifm_base2_r |
| 11334 | { |
| 11335 | #ifndef __cplusplus |
| 11336 | union |
| 11337 | { |
| 11338 | struct |
| 11339 | { |
| 11340 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11341 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11342 | }; |
| 11343 | uint32_t word[2]; |
| 11344 | }; |
| 11345 | #else |
| 11346 | private: |
| 11347 | uint32_t word0; |
| 11348 | uint32_t word1; |
| 11349 | |
| 11350 | public: |
| 11351 | CONSTEXPR ifm_base2_r() : word0(0), word1(0) {} |
| 11352 | CONSTEXPR ifm_base2_r(uint64_t init) : |
| 11353 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11354 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11355 | { |
| 11356 | } |
| 11357 | CONSTEXPR void operator=(uint64_t value) |
| 11358 | { |
| 11359 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11360 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11361 | } |
| 11362 | void operator=(uint64_t value) volatile |
| 11363 | { |
| 11364 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11365 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11366 | } |
| 11367 | CONSTEXPR operator uint64_t() |
| 11368 | { |
| 11369 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11370 | } |
| 11371 | operator uint64_t() volatile |
| 11372 | { |
| 11373 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11374 | } |
| 11375 | ifm_base2_r copy() volatile |
| 11376 | { |
| 11377 | return *this; |
| 11378 | } |
| 11379 | #endif |
| 11380 | }; |
| 11381 | |
| 11382 | // ifm_base3_r - None |
| 11383 | struct ifm_base3_r |
| 11384 | { |
| 11385 | #ifndef __cplusplus |
| 11386 | union |
| 11387 | { |
| 11388 | struct |
| 11389 | { |
| 11390 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11391 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11392 | }; |
| 11393 | uint32_t word[2]; |
| 11394 | }; |
| 11395 | #else |
| 11396 | private: |
| 11397 | uint32_t word0; |
| 11398 | uint32_t word1; |
| 11399 | |
| 11400 | public: |
| 11401 | CONSTEXPR ifm_base3_r() : word0(0), word1(0) {} |
| 11402 | CONSTEXPR ifm_base3_r(uint64_t init) : |
| 11403 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11404 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11405 | { |
| 11406 | } |
| 11407 | CONSTEXPR void operator=(uint64_t value) |
| 11408 | { |
| 11409 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11410 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11411 | } |
| 11412 | void operator=(uint64_t value) volatile |
| 11413 | { |
| 11414 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11415 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11416 | } |
| 11417 | CONSTEXPR operator uint64_t() |
| 11418 | { |
| 11419 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11420 | } |
| 11421 | operator uint64_t() volatile |
| 11422 | { |
| 11423 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11424 | } |
| 11425 | ifm_base3_r copy() volatile |
| 11426 | { |
| 11427 | return *this; |
| 11428 | } |
| 11429 | #endif |
| 11430 | }; |
| 11431 | |
| 11432 | // ifm_stride_x_r - None |
| 11433 | struct ifm_stride_x_r |
| 11434 | { |
| 11435 | #ifndef __cplusplus |
| 11436 | union |
| 11437 | { |
| 11438 | struct |
| 11439 | { |
| 11440 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11441 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11442 | }; |
| 11443 | uint32_t word[2]; |
| 11444 | }; |
| 11445 | #else |
| 11446 | private: |
| 11447 | uint32_t word0; |
| 11448 | uint32_t word1; |
| 11449 | |
| 11450 | public: |
| 11451 | CONSTEXPR ifm_stride_x_r() : word0(0), word1(0) {} |
| 11452 | CONSTEXPR ifm_stride_x_r(uint64_t init) : |
| 11453 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11454 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11455 | { |
| 11456 | } |
| 11457 | CONSTEXPR void operator=(uint64_t value) |
| 11458 | { |
| 11459 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11460 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11461 | } |
| 11462 | void operator=(uint64_t value) volatile |
| 11463 | { |
| 11464 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11465 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11466 | } |
| 11467 | CONSTEXPR operator uint64_t() |
| 11468 | { |
| 11469 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11470 | } |
| 11471 | operator uint64_t() volatile |
| 11472 | { |
| 11473 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11474 | } |
| 11475 | ifm_stride_x_r copy() volatile |
| 11476 | { |
| 11477 | return *this; |
| 11478 | } |
| 11479 | #endif |
| 11480 | }; |
| 11481 | |
| 11482 | // ifm_stride_y_r - None |
| 11483 | struct ifm_stride_y_r |
| 11484 | { |
| 11485 | #ifndef __cplusplus |
| 11486 | union |
| 11487 | { |
| 11488 | struct |
| 11489 | { |
| 11490 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11491 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11492 | }; |
| 11493 | uint32_t word[2]; |
| 11494 | }; |
| 11495 | #else |
| 11496 | private: |
| 11497 | uint32_t word0; |
| 11498 | uint32_t word1; |
| 11499 | |
| 11500 | public: |
| 11501 | CONSTEXPR ifm_stride_y_r() : word0(0), word1(0) {} |
| 11502 | CONSTEXPR ifm_stride_y_r(uint64_t init) : |
| 11503 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11504 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11505 | { |
| 11506 | } |
| 11507 | CONSTEXPR void operator=(uint64_t value) |
| 11508 | { |
| 11509 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11510 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11511 | } |
| 11512 | void operator=(uint64_t value) volatile |
| 11513 | { |
| 11514 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11515 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11516 | } |
| 11517 | CONSTEXPR operator uint64_t() |
| 11518 | { |
| 11519 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11520 | } |
| 11521 | operator uint64_t() volatile |
| 11522 | { |
| 11523 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11524 | } |
| 11525 | ifm_stride_y_r copy() volatile |
| 11526 | { |
| 11527 | return *this; |
| 11528 | } |
| 11529 | #endif |
| 11530 | }; |
| 11531 | |
| 11532 | // ifm_stride_c_r - None |
| 11533 | struct ifm_stride_c_r |
| 11534 | { |
| 11535 | #ifndef __cplusplus |
| 11536 | union |
| 11537 | { |
| 11538 | struct |
| 11539 | { |
| 11540 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11541 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11542 | }; |
| 11543 | uint32_t word[2]; |
| 11544 | }; |
| 11545 | #else |
| 11546 | private: |
| 11547 | uint32_t word0; |
| 11548 | uint32_t word1; |
| 11549 | |
| 11550 | public: |
| 11551 | CONSTEXPR ifm_stride_c_r() : word0(0), word1(0) {} |
| 11552 | CONSTEXPR ifm_stride_c_r(uint64_t init) : |
| 11553 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11554 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11555 | { |
| 11556 | } |
| 11557 | CONSTEXPR void operator=(uint64_t value) |
| 11558 | { |
| 11559 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11560 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11561 | } |
| 11562 | void operator=(uint64_t value) volatile |
| 11563 | { |
| 11564 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11565 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11566 | } |
| 11567 | CONSTEXPR operator uint64_t() |
| 11568 | { |
| 11569 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11570 | } |
| 11571 | operator uint64_t() volatile |
| 11572 | { |
| 11573 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11574 | } |
| 11575 | ifm_stride_c_r copy() volatile |
| 11576 | { |
| 11577 | return *this; |
| 11578 | } |
| 11579 | #endif |
| 11580 | }; |
| 11581 | |
| 11582 | // ofm_base0_r - None |
| 11583 | struct ofm_base0_r |
| 11584 | { |
| 11585 | #ifndef __cplusplus |
| 11586 | union |
| 11587 | { |
| 11588 | struct |
| 11589 | { |
| 11590 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11591 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11592 | }; |
| 11593 | uint32_t word[2]; |
| 11594 | }; |
| 11595 | #else |
| 11596 | private: |
| 11597 | uint32_t word0; |
| 11598 | uint32_t word1; |
| 11599 | |
| 11600 | public: |
| 11601 | CONSTEXPR ofm_base0_r() : word0(0), word1(0) {} |
| 11602 | CONSTEXPR ofm_base0_r(uint64_t init) : |
| 11603 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11604 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11605 | { |
| 11606 | } |
| 11607 | CONSTEXPR void operator=(uint64_t value) |
| 11608 | { |
| 11609 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11610 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11611 | } |
| 11612 | void operator=(uint64_t value) volatile |
| 11613 | { |
| 11614 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11615 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11616 | } |
| 11617 | CONSTEXPR operator uint64_t() |
| 11618 | { |
| 11619 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11620 | } |
| 11621 | operator uint64_t() volatile |
| 11622 | { |
| 11623 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11624 | } |
| 11625 | ofm_base0_r copy() volatile |
| 11626 | { |
| 11627 | return *this; |
| 11628 | } |
| 11629 | #endif |
| 11630 | }; |
| 11631 | |
| 11632 | // ofm_base1_r - None |
| 11633 | struct ofm_base1_r |
| 11634 | { |
| 11635 | #ifndef __cplusplus |
| 11636 | union |
| 11637 | { |
| 11638 | struct |
| 11639 | { |
| 11640 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11641 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11642 | }; |
| 11643 | uint32_t word[2]; |
| 11644 | }; |
| 11645 | #else |
| 11646 | private: |
| 11647 | uint32_t word0; |
| 11648 | uint32_t word1; |
| 11649 | |
| 11650 | public: |
| 11651 | CONSTEXPR ofm_base1_r() : word0(0), word1(0) {} |
| 11652 | CONSTEXPR ofm_base1_r(uint64_t init) : |
| 11653 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11654 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11655 | { |
| 11656 | } |
| 11657 | CONSTEXPR void operator=(uint64_t value) |
| 11658 | { |
| 11659 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11660 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11661 | } |
| 11662 | void operator=(uint64_t value) volatile |
| 11663 | { |
| 11664 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11665 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11666 | } |
| 11667 | CONSTEXPR operator uint64_t() |
| 11668 | { |
| 11669 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11670 | } |
| 11671 | operator uint64_t() volatile |
| 11672 | { |
| 11673 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11674 | } |
| 11675 | ofm_base1_r copy() volatile |
| 11676 | { |
| 11677 | return *this; |
| 11678 | } |
| 11679 | #endif |
| 11680 | }; |
| 11681 | |
| 11682 | // ofm_base2_r - None |
| 11683 | struct ofm_base2_r |
| 11684 | { |
| 11685 | #ifndef __cplusplus |
| 11686 | union |
| 11687 | { |
| 11688 | struct |
| 11689 | { |
| 11690 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11691 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11692 | }; |
| 11693 | uint32_t word[2]; |
| 11694 | }; |
| 11695 | #else |
| 11696 | private: |
| 11697 | uint32_t word0; |
| 11698 | uint32_t word1; |
| 11699 | |
| 11700 | public: |
| 11701 | CONSTEXPR ofm_base2_r() : word0(0), word1(0) {} |
| 11702 | CONSTEXPR ofm_base2_r(uint64_t init) : |
| 11703 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11704 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11705 | { |
| 11706 | } |
| 11707 | CONSTEXPR void operator=(uint64_t value) |
| 11708 | { |
| 11709 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11710 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11711 | } |
| 11712 | void operator=(uint64_t value) volatile |
| 11713 | { |
| 11714 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11715 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11716 | } |
| 11717 | CONSTEXPR operator uint64_t() |
| 11718 | { |
| 11719 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11720 | } |
| 11721 | operator uint64_t() volatile |
| 11722 | { |
| 11723 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11724 | } |
| 11725 | ofm_base2_r copy() volatile |
| 11726 | { |
| 11727 | return *this; |
| 11728 | } |
| 11729 | #endif |
| 11730 | }; |
| 11731 | |
| 11732 | // ofm_base3_r - None |
| 11733 | struct ofm_base3_r |
| 11734 | { |
| 11735 | #ifndef __cplusplus |
| 11736 | union |
| 11737 | { |
| 11738 | struct |
| 11739 | { |
| 11740 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11741 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11742 | }; |
| 11743 | uint32_t word[2]; |
| 11744 | }; |
| 11745 | #else |
| 11746 | private: |
| 11747 | uint32_t word0; |
| 11748 | uint32_t word1; |
| 11749 | |
| 11750 | public: |
| 11751 | CONSTEXPR ofm_base3_r() : word0(0), word1(0) {} |
| 11752 | CONSTEXPR ofm_base3_r(uint64_t init) : |
| 11753 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11754 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11755 | { |
| 11756 | } |
| 11757 | CONSTEXPR void operator=(uint64_t value) |
| 11758 | { |
| 11759 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11760 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11761 | } |
| 11762 | void operator=(uint64_t value) volatile |
| 11763 | { |
| 11764 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11765 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11766 | } |
| 11767 | CONSTEXPR operator uint64_t() |
| 11768 | { |
| 11769 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11770 | } |
| 11771 | operator uint64_t() volatile |
| 11772 | { |
| 11773 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11774 | } |
| 11775 | ofm_base3_r copy() volatile |
| 11776 | { |
| 11777 | return *this; |
| 11778 | } |
| 11779 | #endif |
| 11780 | }; |
| 11781 | |
| 11782 | // ofm_stride_x_r - None |
| 11783 | struct ofm_stride_x_r |
| 11784 | { |
| 11785 | #ifndef __cplusplus |
| 11786 | union |
| 11787 | { |
| 11788 | struct |
| 11789 | { |
| 11790 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11791 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11792 | }; |
| 11793 | uint32_t word[2]; |
| 11794 | }; |
| 11795 | #else |
| 11796 | private: |
| 11797 | uint32_t word0; |
| 11798 | uint32_t word1; |
| 11799 | |
| 11800 | public: |
| 11801 | CONSTEXPR ofm_stride_x_r() : word0(0), word1(0) {} |
| 11802 | CONSTEXPR ofm_stride_x_r(uint64_t init) : |
| 11803 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11804 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11805 | { |
| 11806 | } |
| 11807 | CONSTEXPR void operator=(uint64_t value) |
| 11808 | { |
| 11809 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11810 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11811 | } |
| 11812 | void operator=(uint64_t value) volatile |
| 11813 | { |
| 11814 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11815 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11816 | } |
| 11817 | CONSTEXPR operator uint64_t() |
| 11818 | { |
| 11819 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11820 | } |
| 11821 | operator uint64_t() volatile |
| 11822 | { |
| 11823 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11824 | } |
| 11825 | ofm_stride_x_r copy() volatile |
| 11826 | { |
| 11827 | return *this; |
| 11828 | } |
| 11829 | #endif |
| 11830 | }; |
| 11831 | |
| 11832 | // ofm_stride_y_r - None |
| 11833 | struct ofm_stride_y_r |
| 11834 | { |
| 11835 | #ifndef __cplusplus |
| 11836 | union |
| 11837 | { |
| 11838 | struct |
| 11839 | { |
| 11840 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11841 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11842 | }; |
| 11843 | uint32_t word[2]; |
| 11844 | }; |
| 11845 | #else |
| 11846 | private: |
| 11847 | uint32_t word0; |
| 11848 | uint32_t word1; |
| 11849 | |
| 11850 | public: |
| 11851 | CONSTEXPR ofm_stride_y_r() : word0(0), word1(0) {} |
| 11852 | CONSTEXPR ofm_stride_y_r(uint64_t init) : |
| 11853 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11854 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11855 | { |
| 11856 | } |
| 11857 | CONSTEXPR void operator=(uint64_t value) |
| 11858 | { |
| 11859 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11860 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11861 | } |
| 11862 | void operator=(uint64_t value) volatile |
| 11863 | { |
| 11864 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11865 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11866 | } |
| 11867 | CONSTEXPR operator uint64_t() |
| 11868 | { |
| 11869 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11870 | } |
| 11871 | operator uint64_t() volatile |
| 11872 | { |
| 11873 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11874 | } |
| 11875 | ofm_stride_y_r copy() volatile |
| 11876 | { |
| 11877 | return *this; |
| 11878 | } |
| 11879 | #endif |
| 11880 | }; |
| 11881 | |
| 11882 | // ofm_stride_c_r - None |
| 11883 | struct ofm_stride_c_r |
| 11884 | { |
| 11885 | #ifndef __cplusplus |
| 11886 | union |
| 11887 | { |
| 11888 | struct |
| 11889 | { |
| 11890 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11891 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11892 | }; |
| 11893 | uint32_t word[2]; |
| 11894 | }; |
| 11895 | #else |
| 11896 | private: |
| 11897 | uint32_t word0; |
| 11898 | uint32_t word1; |
| 11899 | |
| 11900 | public: |
| 11901 | CONSTEXPR ofm_stride_c_r() : word0(0), word1(0) {} |
| 11902 | CONSTEXPR ofm_stride_c_r(uint64_t init) : |
| 11903 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11904 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11905 | { |
| 11906 | } |
| 11907 | CONSTEXPR void operator=(uint64_t value) |
| 11908 | { |
| 11909 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11910 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11911 | } |
| 11912 | void operator=(uint64_t value) volatile |
| 11913 | { |
| 11914 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11915 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11916 | } |
| 11917 | CONSTEXPR operator uint64_t() |
| 11918 | { |
| 11919 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11920 | } |
| 11921 | operator uint64_t() volatile |
| 11922 | { |
| 11923 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11924 | } |
| 11925 | ofm_stride_c_r copy() volatile |
| 11926 | { |
| 11927 | return *this; |
| 11928 | } |
| 11929 | #endif |
| 11930 | }; |
| 11931 | |
| 11932 | // weight_base_r - None |
| 11933 | struct weight_base_r |
| 11934 | { |
| 11935 | #ifndef __cplusplus |
| 11936 | union |
| 11937 | { |
| 11938 | struct |
| 11939 | { |
| 11940 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 11941 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 11942 | }; |
| 11943 | uint32_t word[2]; |
| 11944 | }; |
| 11945 | #else |
| 11946 | private: |
| 11947 | uint32_t word0; |
| 11948 | uint32_t word1; |
| 11949 | |
| 11950 | public: |
| 11951 | CONSTEXPR weight_base_r() : word0(0), word1(0) {} |
| 11952 | CONSTEXPR weight_base_r(uint64_t init) : |
| 11953 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 11954 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 11955 | { |
| 11956 | } |
| 11957 | CONSTEXPR void operator=(uint64_t value) |
| 11958 | { |
| 11959 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11960 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11961 | } |
| 11962 | void operator=(uint64_t value) volatile |
| 11963 | { |
| 11964 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11965 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 11966 | } |
| 11967 | CONSTEXPR operator uint64_t() |
| 11968 | { |
| 11969 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11970 | } |
| 11971 | operator uint64_t() volatile |
| 11972 | { |
| 11973 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 11974 | } |
| 11975 | weight_base_r copy() volatile |
| 11976 | { |
| 11977 | return *this; |
| 11978 | } |
| 11979 | #endif |
| 11980 | }; |
| 11981 | |
| 11982 | // weight_length_r - None |
| 11983 | struct weight_length_r |
| 11984 | { |
| 11985 | #ifndef __cplusplus |
| 11986 | union |
| 11987 | { |
| 11988 | struct |
| 11989 | { |
| 11990 | uint32_t value : 32; // 32-bit register value |
| 11991 | }; |
| 11992 | uint32_t word; |
| 11993 | }; |
| 11994 | #else |
| 11995 | private: |
| 11996 | uint32_t word0; |
| 11997 | |
| 11998 | public: |
| 11999 | CONSTEXPR weight_length_r() : word0(0) {} |
| 12000 | CONSTEXPR weight_length_r(uint32_t init) : word0(init) {} |
| 12001 | CONSTEXPR void operator=(uint32_t value) |
| 12002 | { |
| 12003 | word0 = value; |
| 12004 | } |
| 12005 | void operator=(uint32_t value) volatile |
| 12006 | { |
| 12007 | word0 = value; |
| 12008 | } |
| 12009 | CONSTEXPR operator uint32_t() |
| 12010 | { |
| 12011 | return word0; |
| 12012 | } |
| 12013 | operator uint32_t() volatile |
| 12014 | { |
| 12015 | return word0; |
| 12016 | } |
| 12017 | weight_length_r copy() volatile |
| 12018 | { |
| 12019 | return *this; |
| 12020 | } |
| 12021 | CONSTEXPR uint32_t get_value() const |
| 12022 | { |
| 12023 | uint32_t value = static_cast<uint32_t>(word0); |
| 12024 | return value; |
| 12025 | } |
| 12026 | uint32_t get_value() const volatile |
| 12027 | { |
| 12028 | uint32_t value = static_cast<uint32_t>(word0); |
| 12029 | return value; |
| 12030 | } |
| 12031 | CONSTEXPR weight_length_r &set_value(uint32_t value) |
| 12032 | { |
| 12033 | word0 = static_cast<uint32_t>(value); |
| 12034 | return *this; |
| 12035 | } |
| 12036 | #endif |
| 12037 | }; |
| 12038 | |
| 12039 | // scale_base_r - None |
| 12040 | struct scale_base_r |
| 12041 | { |
| 12042 | #ifndef __cplusplus |
| 12043 | union |
| 12044 | { |
| 12045 | struct |
| 12046 | { |
| 12047 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12048 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12049 | }; |
| 12050 | uint32_t word[2]; |
| 12051 | }; |
| 12052 | #else |
| 12053 | private: |
| 12054 | uint32_t word0; |
| 12055 | uint32_t word1; |
| 12056 | |
| 12057 | public: |
| 12058 | CONSTEXPR scale_base_r() : word0(0), word1(0) {} |
| 12059 | CONSTEXPR scale_base_r(uint64_t init) : |
| 12060 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12061 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12062 | { |
| 12063 | } |
| 12064 | CONSTEXPR void operator=(uint64_t value) |
| 12065 | { |
| 12066 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12067 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12068 | } |
| 12069 | void operator=(uint64_t value) volatile |
| 12070 | { |
| 12071 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12072 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12073 | } |
| 12074 | CONSTEXPR operator uint64_t() |
| 12075 | { |
| 12076 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12077 | } |
| 12078 | operator uint64_t() volatile |
| 12079 | { |
| 12080 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12081 | } |
| 12082 | scale_base_r copy() volatile |
| 12083 | { |
| 12084 | return *this; |
| 12085 | } |
| 12086 | #endif |
| 12087 | }; |
| 12088 | |
| 12089 | // scale_length_r - None |
| 12090 | struct scale_length_r |
| 12091 | { |
| 12092 | #ifndef __cplusplus |
| 12093 | union |
| 12094 | { |
| 12095 | struct |
| 12096 | { |
| 12097 | uint32_t value : 32; // 32-bit register value |
| 12098 | }; |
| 12099 | uint32_t word; |
| 12100 | }; |
| 12101 | #else |
| 12102 | private: |
| 12103 | uint32_t word0; |
| 12104 | |
| 12105 | public: |
| 12106 | CONSTEXPR scale_length_r() : word0(0) {} |
| 12107 | CONSTEXPR scale_length_r(uint32_t init) : word0(init) {} |
| 12108 | CONSTEXPR void operator=(uint32_t value) |
| 12109 | { |
| 12110 | word0 = value; |
| 12111 | } |
| 12112 | void operator=(uint32_t value) volatile |
| 12113 | { |
| 12114 | word0 = value; |
| 12115 | } |
| 12116 | CONSTEXPR operator uint32_t() |
| 12117 | { |
| 12118 | return word0; |
| 12119 | } |
| 12120 | operator uint32_t() volatile |
| 12121 | { |
| 12122 | return word0; |
| 12123 | } |
| 12124 | scale_length_r copy() volatile |
| 12125 | { |
| 12126 | return *this; |
| 12127 | } |
| 12128 | CONSTEXPR uint32_t get_value() const |
| 12129 | { |
| 12130 | uint32_t value = static_cast<uint32_t>(word0); |
| 12131 | return value; |
| 12132 | } |
| 12133 | uint32_t get_value() const volatile |
| 12134 | { |
| 12135 | uint32_t value = static_cast<uint32_t>(word0); |
| 12136 | return value; |
| 12137 | } |
| 12138 | CONSTEXPR scale_length_r &set_value(uint32_t value) |
| 12139 | { |
| 12140 | word0 = static_cast<uint32_t>(value); |
| 12141 | return *this; |
| 12142 | } |
| 12143 | #endif |
| 12144 | }; |
| 12145 | |
| 12146 | // ofm_scale_r - None |
| 12147 | struct ofm_scale_r |
| 12148 | { |
| 12149 | #ifndef __cplusplus |
| 12150 | union |
| 12151 | { |
| 12152 | struct |
| 12153 | { |
| 12154 | uint32_t value : 32; // 32-bit register value |
| 12155 | }; |
| 12156 | uint32_t word; |
| 12157 | }; |
| 12158 | #else |
| 12159 | private: |
| 12160 | uint32_t word0; |
| 12161 | |
| 12162 | public: |
| 12163 | CONSTEXPR ofm_scale_r() : word0(0) {} |
| 12164 | CONSTEXPR ofm_scale_r(uint32_t init) : word0(init) {} |
| 12165 | CONSTEXPR void operator=(uint32_t value) |
| 12166 | { |
| 12167 | word0 = value; |
| 12168 | } |
| 12169 | void operator=(uint32_t value) volatile |
| 12170 | { |
| 12171 | word0 = value; |
| 12172 | } |
| 12173 | CONSTEXPR operator uint32_t() |
| 12174 | { |
| 12175 | return word0; |
| 12176 | } |
| 12177 | operator uint32_t() volatile |
| 12178 | { |
| 12179 | return word0; |
| 12180 | } |
| 12181 | ofm_scale_r copy() volatile |
| 12182 | { |
| 12183 | return *this; |
| 12184 | } |
| 12185 | CONSTEXPR uint32_t get_value() const |
| 12186 | { |
| 12187 | uint32_t value = static_cast<uint32_t>(word0); |
| 12188 | return value; |
| 12189 | } |
| 12190 | uint32_t get_value() const volatile |
| 12191 | { |
| 12192 | uint32_t value = static_cast<uint32_t>(word0); |
| 12193 | return value; |
| 12194 | } |
| 12195 | CONSTEXPR ofm_scale_r &set_value(uint32_t value) |
| 12196 | { |
| 12197 | word0 = static_cast<uint32_t>(value); |
| 12198 | return *this; |
| 12199 | } |
| 12200 | #endif |
| 12201 | }; |
| 12202 | |
| 12203 | // ofm_scale_shift_r - None |
| 12204 | struct ofm_scale_shift_r |
| 12205 | { |
| 12206 | #ifndef __cplusplus |
| 12207 | union |
| 12208 | { |
| 12209 | struct |
| 12210 | { |
| 12211 | uint32_t value : 32; // 32-bit register value |
| 12212 | }; |
| 12213 | uint32_t word; |
| 12214 | }; |
| 12215 | #else |
| 12216 | private: |
| 12217 | uint32_t word0; |
| 12218 | |
| 12219 | public: |
| 12220 | CONSTEXPR ofm_scale_shift_r() : word0(0) {} |
| 12221 | CONSTEXPR ofm_scale_shift_r(uint32_t init) : word0(init) {} |
| 12222 | CONSTEXPR void operator=(uint32_t value) |
| 12223 | { |
| 12224 | word0 = value; |
| 12225 | } |
| 12226 | void operator=(uint32_t value) volatile |
| 12227 | { |
| 12228 | word0 = value; |
| 12229 | } |
| 12230 | CONSTEXPR operator uint32_t() |
| 12231 | { |
| 12232 | return word0; |
| 12233 | } |
| 12234 | operator uint32_t() volatile |
| 12235 | { |
| 12236 | return word0; |
| 12237 | } |
| 12238 | ofm_scale_shift_r copy() volatile |
| 12239 | { |
| 12240 | return *this; |
| 12241 | } |
| 12242 | CONSTEXPR uint32_t get_value() const |
| 12243 | { |
| 12244 | uint32_t value = static_cast<uint32_t>(word0); |
| 12245 | return value; |
| 12246 | } |
| 12247 | uint32_t get_value() const volatile |
| 12248 | { |
| 12249 | uint32_t value = static_cast<uint32_t>(word0); |
| 12250 | return value; |
| 12251 | } |
| 12252 | CONSTEXPR ofm_scale_shift_r &set_value(uint32_t value) |
| 12253 | { |
| 12254 | word0 = static_cast<uint32_t>(value); |
| 12255 | return *this; |
| 12256 | } |
| 12257 | #endif |
| 12258 | }; |
| 12259 | |
| 12260 | // opa_scale_r - None |
| 12261 | struct opa_scale_r |
| 12262 | { |
| 12263 | #ifndef __cplusplus |
| 12264 | union |
| 12265 | { |
| 12266 | struct |
| 12267 | { |
| 12268 | uint32_t value : 32; // 32-bit register value |
| 12269 | }; |
| 12270 | uint32_t word; |
| 12271 | }; |
| 12272 | #else |
| 12273 | private: |
| 12274 | uint32_t word0; |
| 12275 | |
| 12276 | public: |
| 12277 | CONSTEXPR opa_scale_r() : word0(0) {} |
| 12278 | CONSTEXPR opa_scale_r(uint32_t init) : word0(init) {} |
| 12279 | CONSTEXPR void operator=(uint32_t value) |
| 12280 | { |
| 12281 | word0 = value; |
| 12282 | } |
| 12283 | void operator=(uint32_t value) volatile |
| 12284 | { |
| 12285 | word0 = value; |
| 12286 | } |
| 12287 | CONSTEXPR operator uint32_t() |
| 12288 | { |
| 12289 | return word0; |
| 12290 | } |
| 12291 | operator uint32_t() volatile |
| 12292 | { |
| 12293 | return word0; |
| 12294 | } |
| 12295 | opa_scale_r copy() volatile |
| 12296 | { |
| 12297 | return *this; |
| 12298 | } |
| 12299 | CONSTEXPR uint32_t get_value() const |
| 12300 | { |
| 12301 | uint32_t value = static_cast<uint32_t>(word0); |
| 12302 | return value; |
| 12303 | } |
| 12304 | uint32_t get_value() const volatile |
| 12305 | { |
| 12306 | uint32_t value = static_cast<uint32_t>(word0); |
| 12307 | return value; |
| 12308 | } |
| 12309 | CONSTEXPR opa_scale_r &set_value(uint32_t value) |
| 12310 | { |
| 12311 | word0 = static_cast<uint32_t>(value); |
| 12312 | return *this; |
| 12313 | } |
| 12314 | #endif |
| 12315 | }; |
| 12316 | |
| 12317 | // opa_scale_shift_r - None |
| 12318 | struct opa_scale_shift_r |
| 12319 | { |
| 12320 | #ifndef __cplusplus |
| 12321 | union |
| 12322 | { |
| 12323 | struct |
| 12324 | { |
| 12325 | uint32_t value : 32; // 32-bit register value |
| 12326 | }; |
| 12327 | uint32_t word; |
| 12328 | }; |
| 12329 | #else |
| 12330 | private: |
| 12331 | uint32_t word0; |
| 12332 | |
| 12333 | public: |
| 12334 | CONSTEXPR opa_scale_shift_r() : word0(0) {} |
| 12335 | CONSTEXPR opa_scale_shift_r(uint32_t init) : word0(init) {} |
| 12336 | CONSTEXPR void operator=(uint32_t value) |
| 12337 | { |
| 12338 | word0 = value; |
| 12339 | } |
| 12340 | void operator=(uint32_t value) volatile |
| 12341 | { |
| 12342 | word0 = value; |
| 12343 | } |
| 12344 | CONSTEXPR operator uint32_t() |
| 12345 | { |
| 12346 | return word0; |
| 12347 | } |
| 12348 | operator uint32_t() volatile |
| 12349 | { |
| 12350 | return word0; |
| 12351 | } |
| 12352 | opa_scale_shift_r copy() volatile |
| 12353 | { |
| 12354 | return *this; |
| 12355 | } |
| 12356 | CONSTEXPR uint32_t get_value() const |
| 12357 | { |
| 12358 | uint32_t value = static_cast<uint32_t>(word0); |
| 12359 | return value; |
| 12360 | } |
| 12361 | uint32_t get_value() const volatile |
| 12362 | { |
| 12363 | uint32_t value = static_cast<uint32_t>(word0); |
| 12364 | return value; |
| 12365 | } |
| 12366 | CONSTEXPR opa_scale_shift_r &set_value(uint32_t value) |
| 12367 | { |
| 12368 | word0 = static_cast<uint32_t>(value); |
| 12369 | return *this; |
| 12370 | } |
| 12371 | #endif |
| 12372 | }; |
| 12373 | |
| 12374 | // opb_scale_r - None |
| 12375 | struct opb_scale_r |
| 12376 | { |
| 12377 | #ifndef __cplusplus |
| 12378 | union |
| 12379 | { |
| 12380 | struct |
| 12381 | { |
| 12382 | uint32_t value : 32; // 32-bit register value |
| 12383 | }; |
| 12384 | uint32_t word; |
| 12385 | }; |
| 12386 | #else |
| 12387 | private: |
| 12388 | uint32_t word0; |
| 12389 | |
| 12390 | public: |
| 12391 | CONSTEXPR opb_scale_r() : word0(0) {} |
| 12392 | CONSTEXPR opb_scale_r(uint32_t init) : word0(init) {} |
| 12393 | CONSTEXPR void operator=(uint32_t value) |
| 12394 | { |
| 12395 | word0 = value; |
| 12396 | } |
| 12397 | void operator=(uint32_t value) volatile |
| 12398 | { |
| 12399 | word0 = value; |
| 12400 | } |
| 12401 | CONSTEXPR operator uint32_t() |
| 12402 | { |
| 12403 | return word0; |
| 12404 | } |
| 12405 | operator uint32_t() volatile |
| 12406 | { |
| 12407 | return word0; |
| 12408 | } |
| 12409 | opb_scale_r copy() volatile |
| 12410 | { |
| 12411 | return *this; |
| 12412 | } |
| 12413 | CONSTEXPR uint32_t get_value() const |
| 12414 | { |
| 12415 | uint32_t value = static_cast<uint32_t>(word0); |
| 12416 | return value; |
| 12417 | } |
| 12418 | uint32_t get_value() const volatile |
| 12419 | { |
| 12420 | uint32_t value = static_cast<uint32_t>(word0); |
| 12421 | return value; |
| 12422 | } |
| 12423 | CONSTEXPR opb_scale_r &set_value(uint32_t value) |
| 12424 | { |
| 12425 | word0 = static_cast<uint32_t>(value); |
| 12426 | return *this; |
| 12427 | } |
| 12428 | #endif |
| 12429 | }; |
| 12430 | |
| 12431 | // dma0_src_r - None |
| 12432 | struct dma0_src_r |
| 12433 | { |
| 12434 | #ifndef __cplusplus |
| 12435 | union |
| 12436 | { |
| 12437 | struct |
| 12438 | { |
| 12439 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12440 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12441 | }; |
| 12442 | uint32_t word[2]; |
| 12443 | }; |
| 12444 | #else |
| 12445 | private: |
| 12446 | uint32_t word0; |
| 12447 | uint32_t word1; |
| 12448 | |
| 12449 | public: |
| 12450 | CONSTEXPR dma0_src_r() : word0(0), word1(0) {} |
| 12451 | CONSTEXPR dma0_src_r(uint64_t init) : |
| 12452 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12453 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12454 | { |
| 12455 | } |
| 12456 | CONSTEXPR void operator=(uint64_t value) |
| 12457 | { |
| 12458 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12459 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12460 | } |
| 12461 | void operator=(uint64_t value) volatile |
| 12462 | { |
| 12463 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12464 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12465 | } |
| 12466 | CONSTEXPR operator uint64_t() |
| 12467 | { |
| 12468 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12469 | } |
| 12470 | operator uint64_t() volatile |
| 12471 | { |
| 12472 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12473 | } |
| 12474 | dma0_src_r copy() volatile |
| 12475 | { |
| 12476 | return *this; |
| 12477 | } |
| 12478 | #endif |
| 12479 | }; |
| 12480 | |
| 12481 | // dma0_dst_r - None |
| 12482 | struct dma0_dst_r |
| 12483 | { |
| 12484 | #ifndef __cplusplus |
| 12485 | union |
| 12486 | { |
| 12487 | struct |
| 12488 | { |
| 12489 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12490 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12491 | }; |
| 12492 | uint32_t word[2]; |
| 12493 | }; |
| 12494 | #else |
| 12495 | private: |
| 12496 | uint32_t word0; |
| 12497 | uint32_t word1; |
| 12498 | |
| 12499 | public: |
| 12500 | CONSTEXPR dma0_dst_r() : word0(0), word1(0) {} |
| 12501 | CONSTEXPR dma0_dst_r(uint64_t init) : |
| 12502 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12503 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12504 | { |
| 12505 | } |
| 12506 | CONSTEXPR void operator=(uint64_t value) |
| 12507 | { |
| 12508 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12509 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12510 | } |
| 12511 | void operator=(uint64_t value) volatile |
| 12512 | { |
| 12513 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12514 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12515 | } |
| 12516 | CONSTEXPR operator uint64_t() |
| 12517 | { |
| 12518 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12519 | } |
| 12520 | operator uint64_t() volatile |
| 12521 | { |
| 12522 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12523 | } |
| 12524 | dma0_dst_r copy() volatile |
| 12525 | { |
| 12526 | return *this; |
| 12527 | } |
| 12528 | #endif |
| 12529 | }; |
| 12530 | |
| 12531 | // dma0_len_r - None |
| 12532 | struct dma0_len_r |
| 12533 | { |
| 12534 | #ifndef __cplusplus |
| 12535 | union |
| 12536 | { |
| 12537 | struct |
| 12538 | { |
| 12539 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12540 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12541 | }; |
| 12542 | uint32_t word[2]; |
| 12543 | }; |
| 12544 | #else |
| 12545 | private: |
| 12546 | uint32_t word0; |
| 12547 | uint32_t word1; |
| 12548 | |
| 12549 | public: |
| 12550 | CONSTEXPR dma0_len_r() : word0(0), word1(0) {} |
| 12551 | CONSTEXPR dma0_len_r(uint64_t init) : |
| 12552 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12553 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12554 | { |
| 12555 | } |
| 12556 | CONSTEXPR void operator=(uint64_t value) |
| 12557 | { |
| 12558 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12559 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12560 | } |
| 12561 | void operator=(uint64_t value) volatile |
| 12562 | { |
| 12563 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12564 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12565 | } |
| 12566 | CONSTEXPR operator uint64_t() |
| 12567 | { |
| 12568 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12569 | } |
| 12570 | operator uint64_t() volatile |
| 12571 | { |
| 12572 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12573 | } |
| 12574 | dma0_len_r copy() volatile |
| 12575 | { |
| 12576 | return *this; |
| 12577 | } |
| 12578 | #endif |
| 12579 | }; |
| 12580 | |
| 12581 | // dma0_skip0_r - None |
| 12582 | struct dma0_skip0_r |
| 12583 | { |
| 12584 | #ifndef __cplusplus |
| 12585 | union |
| 12586 | { |
| 12587 | struct |
| 12588 | { |
| 12589 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12590 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12591 | }; |
| 12592 | uint32_t word[2]; |
| 12593 | }; |
| 12594 | #else |
| 12595 | private: |
| 12596 | uint32_t word0; |
| 12597 | uint32_t word1; |
| 12598 | |
| 12599 | public: |
| 12600 | CONSTEXPR dma0_skip0_r() : word0(0), word1(0) {} |
| 12601 | CONSTEXPR dma0_skip0_r(uint64_t init) : |
| 12602 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12603 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12604 | { |
| 12605 | } |
| 12606 | CONSTEXPR void operator=(uint64_t value) |
| 12607 | { |
| 12608 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12609 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12610 | } |
| 12611 | void operator=(uint64_t value) volatile |
| 12612 | { |
| 12613 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12614 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12615 | } |
| 12616 | CONSTEXPR operator uint64_t() |
| 12617 | { |
| 12618 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12619 | } |
| 12620 | operator uint64_t() volatile |
| 12621 | { |
| 12622 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12623 | } |
| 12624 | dma0_skip0_r copy() volatile |
| 12625 | { |
| 12626 | return *this; |
| 12627 | } |
| 12628 | #endif |
| 12629 | }; |
| 12630 | |
| 12631 | // dma0_skip1_r - None |
| 12632 | struct dma0_skip1_r |
| 12633 | { |
| 12634 | #ifndef __cplusplus |
| 12635 | union |
| 12636 | { |
| 12637 | struct |
| 12638 | { |
| 12639 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12640 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12641 | }; |
| 12642 | uint32_t word[2]; |
| 12643 | }; |
| 12644 | #else |
| 12645 | private: |
| 12646 | uint32_t word0; |
| 12647 | uint32_t word1; |
| 12648 | |
| 12649 | public: |
| 12650 | CONSTEXPR dma0_skip1_r() : word0(0), word1(0) {} |
| 12651 | CONSTEXPR dma0_skip1_r(uint64_t init) : |
| 12652 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12653 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12654 | { |
| 12655 | } |
| 12656 | CONSTEXPR void operator=(uint64_t value) |
| 12657 | { |
| 12658 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12659 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12660 | } |
| 12661 | void operator=(uint64_t value) volatile |
| 12662 | { |
| 12663 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12664 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12665 | } |
| 12666 | CONSTEXPR operator uint64_t() |
| 12667 | { |
| 12668 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12669 | } |
| 12670 | operator uint64_t() volatile |
| 12671 | { |
| 12672 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12673 | } |
| 12674 | dma0_skip1_r copy() volatile |
| 12675 | { |
| 12676 | return *this; |
| 12677 | } |
| 12678 | #endif |
| 12679 | }; |
| 12680 | |
| 12681 | // ifm2_base0_r - None |
| 12682 | struct ifm2_base0_r |
| 12683 | { |
| 12684 | #ifndef __cplusplus |
| 12685 | union |
| 12686 | { |
| 12687 | struct |
| 12688 | { |
| 12689 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12690 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12691 | }; |
| 12692 | uint32_t word[2]; |
| 12693 | }; |
| 12694 | #else |
| 12695 | private: |
| 12696 | uint32_t word0; |
| 12697 | uint32_t word1; |
| 12698 | |
| 12699 | public: |
| 12700 | CONSTEXPR ifm2_base0_r() : word0(0), word1(0) {} |
| 12701 | CONSTEXPR ifm2_base0_r(uint64_t init) : |
| 12702 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12703 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12704 | { |
| 12705 | } |
| 12706 | CONSTEXPR void operator=(uint64_t value) |
| 12707 | { |
| 12708 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12709 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12710 | } |
| 12711 | void operator=(uint64_t value) volatile |
| 12712 | { |
| 12713 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12714 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12715 | } |
| 12716 | CONSTEXPR operator uint64_t() |
| 12717 | { |
| 12718 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12719 | } |
| 12720 | operator uint64_t() volatile |
| 12721 | { |
| 12722 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12723 | } |
| 12724 | ifm2_base0_r copy() volatile |
| 12725 | { |
| 12726 | return *this; |
| 12727 | } |
| 12728 | #endif |
| 12729 | }; |
| 12730 | |
| 12731 | // ifm2_base1_r - None |
| 12732 | struct ifm2_base1_r |
| 12733 | { |
| 12734 | #ifndef __cplusplus |
| 12735 | union |
| 12736 | { |
| 12737 | struct |
| 12738 | { |
| 12739 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12740 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12741 | }; |
| 12742 | uint32_t word[2]; |
| 12743 | }; |
| 12744 | #else |
| 12745 | private: |
| 12746 | uint32_t word0; |
| 12747 | uint32_t word1; |
| 12748 | |
| 12749 | public: |
| 12750 | CONSTEXPR ifm2_base1_r() : word0(0), word1(0) {} |
| 12751 | CONSTEXPR ifm2_base1_r(uint64_t init) : |
| 12752 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12753 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12754 | { |
| 12755 | } |
| 12756 | CONSTEXPR void operator=(uint64_t value) |
| 12757 | { |
| 12758 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12759 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12760 | } |
| 12761 | void operator=(uint64_t value) volatile |
| 12762 | { |
| 12763 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12764 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12765 | } |
| 12766 | CONSTEXPR operator uint64_t() |
| 12767 | { |
| 12768 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12769 | } |
| 12770 | operator uint64_t() volatile |
| 12771 | { |
| 12772 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12773 | } |
| 12774 | ifm2_base1_r copy() volatile |
| 12775 | { |
| 12776 | return *this; |
| 12777 | } |
| 12778 | #endif |
| 12779 | }; |
| 12780 | |
| 12781 | // ifm2_base2_r - None |
| 12782 | struct ifm2_base2_r |
| 12783 | { |
| 12784 | #ifndef __cplusplus |
| 12785 | union |
| 12786 | { |
| 12787 | struct |
| 12788 | { |
| 12789 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12790 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12791 | }; |
| 12792 | uint32_t word[2]; |
| 12793 | }; |
| 12794 | #else |
| 12795 | private: |
| 12796 | uint32_t word0; |
| 12797 | uint32_t word1; |
| 12798 | |
| 12799 | public: |
| 12800 | CONSTEXPR ifm2_base2_r() : word0(0), word1(0) {} |
| 12801 | CONSTEXPR ifm2_base2_r(uint64_t init) : |
| 12802 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12803 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12804 | { |
| 12805 | } |
| 12806 | CONSTEXPR void operator=(uint64_t value) |
| 12807 | { |
| 12808 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12809 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12810 | } |
| 12811 | void operator=(uint64_t value) volatile |
| 12812 | { |
| 12813 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12814 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12815 | } |
| 12816 | CONSTEXPR operator uint64_t() |
| 12817 | { |
| 12818 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12819 | } |
| 12820 | operator uint64_t() volatile |
| 12821 | { |
| 12822 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12823 | } |
| 12824 | ifm2_base2_r copy() volatile |
| 12825 | { |
| 12826 | return *this; |
| 12827 | } |
| 12828 | #endif |
| 12829 | }; |
| 12830 | |
| 12831 | // ifm2_base3_r - None |
| 12832 | struct ifm2_base3_r |
| 12833 | { |
| 12834 | #ifndef __cplusplus |
| 12835 | union |
| 12836 | { |
| 12837 | struct |
| 12838 | { |
| 12839 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12840 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12841 | }; |
| 12842 | uint32_t word[2]; |
| 12843 | }; |
| 12844 | #else |
| 12845 | private: |
| 12846 | uint32_t word0; |
| 12847 | uint32_t word1; |
| 12848 | |
| 12849 | public: |
| 12850 | CONSTEXPR ifm2_base3_r() : word0(0), word1(0) {} |
| 12851 | CONSTEXPR ifm2_base3_r(uint64_t init) : |
| 12852 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12853 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12854 | { |
| 12855 | } |
| 12856 | CONSTEXPR void operator=(uint64_t value) |
| 12857 | { |
| 12858 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12859 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12860 | } |
| 12861 | void operator=(uint64_t value) volatile |
| 12862 | { |
| 12863 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12864 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12865 | } |
| 12866 | CONSTEXPR operator uint64_t() |
| 12867 | { |
| 12868 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12869 | } |
| 12870 | operator uint64_t() volatile |
| 12871 | { |
| 12872 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12873 | } |
| 12874 | ifm2_base3_r copy() volatile |
| 12875 | { |
| 12876 | return *this; |
| 12877 | } |
| 12878 | #endif |
| 12879 | }; |
| 12880 | |
| 12881 | // ifm2_stride_x_r - None |
| 12882 | struct ifm2_stride_x_r |
| 12883 | { |
| 12884 | #ifndef __cplusplus |
| 12885 | union |
| 12886 | { |
| 12887 | struct |
| 12888 | { |
| 12889 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12890 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12891 | }; |
| 12892 | uint32_t word[2]; |
| 12893 | }; |
| 12894 | #else |
| 12895 | private: |
| 12896 | uint32_t word0; |
| 12897 | uint32_t word1; |
| 12898 | |
| 12899 | public: |
| 12900 | CONSTEXPR ifm2_stride_x_r() : word0(0), word1(0) {} |
| 12901 | CONSTEXPR ifm2_stride_x_r(uint64_t init) : |
| 12902 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12903 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12904 | { |
| 12905 | } |
| 12906 | CONSTEXPR void operator=(uint64_t value) |
| 12907 | { |
| 12908 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12909 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12910 | } |
| 12911 | void operator=(uint64_t value) volatile |
| 12912 | { |
| 12913 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12914 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12915 | } |
| 12916 | CONSTEXPR operator uint64_t() |
| 12917 | { |
| 12918 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12919 | } |
| 12920 | operator uint64_t() volatile |
| 12921 | { |
| 12922 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12923 | } |
| 12924 | ifm2_stride_x_r copy() volatile |
| 12925 | { |
| 12926 | return *this; |
| 12927 | } |
| 12928 | #endif |
| 12929 | }; |
| 12930 | |
| 12931 | // ifm2_stride_y_r - None |
| 12932 | struct ifm2_stride_y_r |
| 12933 | { |
| 12934 | #ifndef __cplusplus |
| 12935 | union |
| 12936 | { |
| 12937 | struct |
| 12938 | { |
| 12939 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12940 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12941 | }; |
| 12942 | uint32_t word[2]; |
| 12943 | }; |
| 12944 | #else |
| 12945 | private: |
| 12946 | uint32_t word0; |
| 12947 | uint32_t word1; |
| 12948 | |
| 12949 | public: |
| 12950 | CONSTEXPR ifm2_stride_y_r() : word0(0), word1(0) {} |
| 12951 | CONSTEXPR ifm2_stride_y_r(uint64_t init) : |
| 12952 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 12953 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 12954 | { |
| 12955 | } |
| 12956 | CONSTEXPR void operator=(uint64_t value) |
| 12957 | { |
| 12958 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12959 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12960 | } |
| 12961 | void operator=(uint64_t value) volatile |
| 12962 | { |
| 12963 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12964 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 12965 | } |
| 12966 | CONSTEXPR operator uint64_t() |
| 12967 | { |
| 12968 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12969 | } |
| 12970 | operator uint64_t() volatile |
| 12971 | { |
| 12972 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 12973 | } |
| 12974 | ifm2_stride_y_r copy() volatile |
| 12975 | { |
| 12976 | return *this; |
| 12977 | } |
| 12978 | #endif |
| 12979 | }; |
| 12980 | |
| 12981 | // ifm2_stride_c_r - None |
| 12982 | struct ifm2_stride_c_r |
| 12983 | { |
| 12984 | #ifndef __cplusplus |
| 12985 | union |
| 12986 | { |
| 12987 | struct |
| 12988 | { |
| 12989 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 12990 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 12991 | }; |
| 12992 | uint32_t word[2]; |
| 12993 | }; |
| 12994 | #else |
| 12995 | private: |
| 12996 | uint32_t word0; |
| 12997 | uint32_t word1; |
| 12998 | |
| 12999 | public: |
| 13000 | CONSTEXPR ifm2_stride_c_r() : word0(0), word1(0) {} |
| 13001 | CONSTEXPR ifm2_stride_c_r(uint64_t init) : |
| 13002 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 13003 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 13004 | { |
| 13005 | } |
| 13006 | CONSTEXPR void operator=(uint64_t value) |
| 13007 | { |
| 13008 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13009 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13010 | } |
| 13011 | void operator=(uint64_t value) volatile |
| 13012 | { |
| 13013 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13014 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13015 | } |
| 13016 | CONSTEXPR operator uint64_t() |
| 13017 | { |
| 13018 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 13019 | } |
| 13020 | operator uint64_t() volatile |
| 13021 | { |
| 13022 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 13023 | } |
| 13024 | ifm2_stride_c_r copy() volatile |
| 13025 | { |
| 13026 | return *this; |
| 13027 | } |
| 13028 | #endif |
| 13029 | }; |
| 13030 | |
| 13031 | // weight1_base_r - None |
| 13032 | struct weight1_base_r |
| 13033 | { |
| 13034 | #ifndef __cplusplus |
| 13035 | union |
| 13036 | { |
| 13037 | struct |
| 13038 | { |
| 13039 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 13040 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 13041 | }; |
| 13042 | uint32_t word[2]; |
| 13043 | }; |
| 13044 | #else |
| 13045 | private: |
| 13046 | uint32_t word0; |
| 13047 | uint32_t word1; |
| 13048 | |
| 13049 | public: |
| 13050 | CONSTEXPR weight1_base_r() : word0(0), word1(0) {} |
| 13051 | CONSTEXPR weight1_base_r(uint64_t init) : |
| 13052 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 13053 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 13054 | { |
| 13055 | } |
| 13056 | CONSTEXPR void operator=(uint64_t value) |
| 13057 | { |
| 13058 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13059 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13060 | } |
| 13061 | void operator=(uint64_t value) volatile |
| 13062 | { |
| 13063 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13064 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13065 | } |
| 13066 | CONSTEXPR operator uint64_t() |
| 13067 | { |
| 13068 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 13069 | } |
| 13070 | operator uint64_t() volatile |
| 13071 | { |
| 13072 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 13073 | } |
| 13074 | weight1_base_r copy() volatile |
| 13075 | { |
| 13076 | return *this; |
| 13077 | } |
| 13078 | #endif |
| 13079 | }; |
| 13080 | |
| 13081 | // weight1_length_r - None |
| 13082 | struct weight1_length_r |
| 13083 | { |
| 13084 | #ifndef __cplusplus |
| 13085 | union |
| 13086 | { |
| 13087 | struct |
| 13088 | { |
| 13089 | uint32_t value : 32; // 32-bit register value |
| 13090 | }; |
| 13091 | uint32_t word; |
| 13092 | }; |
| 13093 | #else |
| 13094 | private: |
| 13095 | uint32_t word0; |
| 13096 | |
| 13097 | public: |
| 13098 | CONSTEXPR weight1_length_r() : word0(0) {} |
| 13099 | CONSTEXPR weight1_length_r(uint32_t init) : word0(init) {} |
| 13100 | CONSTEXPR void operator=(uint32_t value) |
| 13101 | { |
| 13102 | word0 = value; |
| 13103 | } |
| 13104 | void operator=(uint32_t value) volatile |
| 13105 | { |
| 13106 | word0 = value; |
| 13107 | } |
| 13108 | CONSTEXPR operator uint32_t() |
| 13109 | { |
| 13110 | return word0; |
| 13111 | } |
| 13112 | operator uint32_t() volatile |
| 13113 | { |
| 13114 | return word0; |
| 13115 | } |
| 13116 | weight1_length_r copy() volatile |
| 13117 | { |
| 13118 | return *this; |
| 13119 | } |
| 13120 | CONSTEXPR uint32_t get_value() const |
| 13121 | { |
| 13122 | uint32_t value = static_cast<uint32_t>(word0); |
| 13123 | return value; |
| 13124 | } |
| 13125 | uint32_t get_value() const volatile |
| 13126 | { |
| 13127 | uint32_t value = static_cast<uint32_t>(word0); |
| 13128 | return value; |
| 13129 | } |
| 13130 | CONSTEXPR weight1_length_r &set_value(uint32_t value) |
| 13131 | { |
| 13132 | word0 = static_cast<uint32_t>(value); |
| 13133 | return *this; |
| 13134 | } |
| 13135 | #endif |
| 13136 | }; |
| 13137 | |
| 13138 | // scale1_base_r - None |
| 13139 | struct scale1_base_r |
| 13140 | { |
| 13141 | #ifndef __cplusplus |
| 13142 | union |
| 13143 | { |
| 13144 | struct |
| 13145 | { |
| 13146 | uint32_t value_LO : 32; // 64-bit register value - LSB |
| 13147 | uint32_t value_HI : 32; // 64-bit register value - MSB |
| 13148 | }; |
| 13149 | uint32_t word[2]; |
| 13150 | }; |
| 13151 | #else |
| 13152 | private: |
| 13153 | uint32_t word0; |
| 13154 | uint32_t word1; |
| 13155 | |
| 13156 | public: |
| 13157 | CONSTEXPR scale1_base_r() : word0(0), word1(0) {} |
| 13158 | CONSTEXPR scale1_base_r(uint64_t init) : |
| 13159 | word0(static_cast<uint32_t>((init) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 13160 | word1(static_cast<uint32_t>((init >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 13161 | { |
| 13162 | } |
| 13163 | CONSTEXPR void operator=(uint64_t value) |
| 13164 | { |
| 13165 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13166 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13167 | } |
| 13168 | void operator=(uint64_t value) volatile |
| 13169 | { |
| 13170 | word0 = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13171 | word1 = static_cast<uint32_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 13172 | } |
| 13173 | CONSTEXPR operator uint64_t() |
| 13174 | { |
| 13175 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 13176 | } |
| 13177 | operator uint64_t() volatile |
| 13178 | { |
| 13179 | return (static_cast<uint64_t>(word1) << 32) | word0; |
| 13180 | } |
| 13181 | scale1_base_r copy() volatile |
| 13182 | { |
| 13183 | return *this; |
| 13184 | } |
| 13185 | #endif |
| 13186 | }; |
| 13187 | |
| 13188 | // scale1_length_r - None |
| 13189 | struct scale1_length_r |
| 13190 | { |
| 13191 | #ifndef __cplusplus |
| 13192 | union |
| 13193 | { |
| 13194 | struct |
| 13195 | { |
| 13196 | uint32_t value : 32; // 32-bit register value |
| 13197 | }; |
| 13198 | uint32_t word; |
| 13199 | }; |
| 13200 | #else |
| 13201 | private: |
| 13202 | uint32_t word0; |
| 13203 | |
| 13204 | public: |
| 13205 | CONSTEXPR scale1_length_r() : word0(0) {} |
| 13206 | CONSTEXPR scale1_length_r(uint32_t init) : word0(init) {} |
| 13207 | CONSTEXPR void operator=(uint32_t value) |
| 13208 | { |
| 13209 | word0 = value; |
| 13210 | } |
| 13211 | void operator=(uint32_t value) volatile |
| 13212 | { |
| 13213 | word0 = value; |
| 13214 | } |
| 13215 | CONSTEXPR operator uint32_t() |
| 13216 | { |
| 13217 | return word0; |
| 13218 | } |
| 13219 | operator uint32_t() volatile |
| 13220 | { |
| 13221 | return word0; |
| 13222 | } |
| 13223 | scale1_length_r copy() volatile |
| 13224 | { |
| 13225 | return *this; |
| 13226 | } |
| 13227 | CONSTEXPR uint32_t get_value() const |
| 13228 | { |
| 13229 | uint32_t value = static_cast<uint32_t>(word0); |
| 13230 | return value; |
| 13231 | } |
| 13232 | uint32_t get_value() const volatile |
| 13233 | { |
| 13234 | uint32_t value = static_cast<uint32_t>(word0); |
| 13235 | return value; |
| 13236 | } |
| 13237 | CONSTEXPR scale1_length_r &set_value(uint32_t value) |
| 13238 | { |
| 13239 | word0 = static_cast<uint32_t>(value); |
| 13240 | return *this; |
| 13241 | } |
| 13242 | #endif |
| 13243 | }; |
| 13244 | |
| 13245 | // revision_r - Internal FPGA build revision: first 32-bits of the Ultan Git hash used for the build |
| 13246 | struct revision_r |
| 13247 | { |
| 13248 | #ifndef __cplusplus |
| 13249 | union |
| 13250 | { |
| 13251 | struct |
| 13252 | { |
| 13253 | uint32_t value : 32; // 32-bit register value |
| 13254 | }; |
| 13255 | uint32_t word; |
| 13256 | }; |
| 13257 | #else |
| 13258 | private: |
| 13259 | uint32_t word0; |
| 13260 | |
| 13261 | public: |
| 13262 | CONSTEXPR revision_r() : word0(0) {} |
| 13263 | CONSTEXPR revision_r(uint32_t init) : word0(init) {} |
| 13264 | CONSTEXPR void operator=(uint32_t value) |
| 13265 | { |
| 13266 | word0 = value; |
| 13267 | } |
| 13268 | void operator=(uint32_t value) volatile |
| 13269 | { |
| 13270 | word0 = value; |
| 13271 | } |
| 13272 | CONSTEXPR operator uint32_t() |
| 13273 | { |
| 13274 | return word0; |
| 13275 | } |
| 13276 | operator uint32_t() volatile |
| 13277 | { |
| 13278 | return word0; |
| 13279 | } |
| 13280 | revision_r copy() volatile |
| 13281 | { |
| 13282 | return *this; |
| 13283 | } |
| 13284 | CONSTEXPR uint32_t get_value() const |
| 13285 | { |
| 13286 | uint32_t value = static_cast<uint32_t>(word0); |
| 13287 | return value; |
| 13288 | } |
| 13289 | uint32_t get_value() const volatile |
| 13290 | { |
| 13291 | uint32_t value = static_cast<uint32_t>(word0); |
| 13292 | return value; |
| 13293 | } |
| 13294 | CONSTEXPR revision_r &set_value(uint32_t value) |
| 13295 | { |
| 13296 | word0 = static_cast<uint32_t>(value); |
| 13297 | return *this; |
| 13298 | } |
| 13299 | #endif |
| 13300 | }; |
| 13301 | |
| 13302 | // pid4_r - Peripheral ID byte 4 (Arm=code 4) |
| 13303 | struct pid4_r |
| 13304 | { |
| 13305 | #ifndef __cplusplus |
| 13306 | union |
| 13307 | { |
| 13308 | struct |
| 13309 | { |
| 13310 | uint32_t PID4 : 32; // Byte 4 of Peripheral ID (Lower 8 bits valid) |
| 13311 | }; |
| 13312 | uint32_t word; |
| 13313 | }; |
| 13314 | #else |
| 13315 | private: |
| 13316 | uint32_t word0; |
| 13317 | |
| 13318 | public: |
| 13319 | CONSTEXPR pid4_r() : word0(4) {} |
| 13320 | CONSTEXPR pid4_r(uint32_t init) : word0(init) {} |
| 13321 | CONSTEXPR void operator=(uint32_t value) |
| 13322 | { |
| 13323 | word0 = value; |
| 13324 | } |
| 13325 | void operator=(uint32_t value) volatile |
| 13326 | { |
| 13327 | word0 = value; |
| 13328 | } |
| 13329 | CONSTEXPR operator uint32_t() |
| 13330 | { |
| 13331 | return word0; |
| 13332 | } |
| 13333 | operator uint32_t() volatile |
| 13334 | { |
| 13335 | return word0; |
| 13336 | } |
| 13337 | pid4_r copy() volatile |
| 13338 | { |
| 13339 | return *this; |
| 13340 | } |
| 13341 | CONSTEXPR uint32_t get_PID4() const |
| 13342 | { |
| 13343 | uint32_t value = static_cast<uint32_t>(word0); |
| 13344 | return value; |
| 13345 | } |
| 13346 | uint32_t get_PID4() const volatile |
| 13347 | { |
| 13348 | uint32_t value = static_cast<uint32_t>(word0); |
| 13349 | return value; |
| 13350 | } |
| 13351 | CONSTEXPR pid4_r &set_PID4(uint32_t value) |
| 13352 | { |
| 13353 | word0 = static_cast<uint32_t>(value); |
| 13354 | return *this; |
| 13355 | } |
| 13356 | #endif |
| 13357 | }; |
| 13358 | |
| 13359 | // pid5_r - Peripheral ID byte 5 (reserved) |
| 13360 | struct pid5_r |
| 13361 | { |
| 13362 | #ifndef __cplusplus |
| 13363 | union |
| 13364 | { |
| 13365 | struct |
| 13366 | { |
| 13367 | uint32_t PID5 : 32; // Byte 5 of Peripheral ID (Lower 8 bits valid) |
| 13368 | }; |
| 13369 | uint32_t word; |
| 13370 | }; |
| 13371 | #else |
| 13372 | private: |
| 13373 | uint32_t word0; |
| 13374 | |
| 13375 | public: |
| 13376 | CONSTEXPR pid5_r() : word0(0) {} |
| 13377 | CONSTEXPR pid5_r(uint32_t init) : word0(init) {} |
| 13378 | CONSTEXPR void operator=(uint32_t value) |
| 13379 | { |
| 13380 | word0 = value; |
| 13381 | } |
| 13382 | void operator=(uint32_t value) volatile |
| 13383 | { |
| 13384 | word0 = value; |
| 13385 | } |
| 13386 | CONSTEXPR operator uint32_t() |
| 13387 | { |
| 13388 | return word0; |
| 13389 | } |
| 13390 | operator uint32_t() volatile |
| 13391 | { |
| 13392 | return word0; |
| 13393 | } |
| 13394 | pid5_r copy() volatile |
| 13395 | { |
| 13396 | return *this; |
| 13397 | } |
| 13398 | CONSTEXPR uint32_t get_PID5() const |
| 13399 | { |
| 13400 | uint32_t value = static_cast<uint32_t>(word0); |
| 13401 | return value; |
| 13402 | } |
| 13403 | uint32_t get_PID5() const volatile |
| 13404 | { |
| 13405 | uint32_t value = static_cast<uint32_t>(word0); |
| 13406 | return value; |
| 13407 | } |
| 13408 | CONSTEXPR pid5_r &set_PID5(uint32_t value) |
| 13409 | { |
| 13410 | word0 = static_cast<uint32_t>(value); |
| 13411 | return *this; |
| 13412 | } |
| 13413 | #endif |
| 13414 | }; |
| 13415 | |
| 13416 | // pid6_r - Peripheral ID byte 6 (reserved) |
| 13417 | struct pid6_r |
| 13418 | { |
| 13419 | #ifndef __cplusplus |
| 13420 | union |
| 13421 | { |
| 13422 | struct |
| 13423 | { |
| 13424 | uint32_t PID6 : 32; // Byte 6 of Peripheral ID (Lower 8 bits valid) |
| 13425 | }; |
| 13426 | uint32_t word; |
| 13427 | }; |
| 13428 | #else |
| 13429 | private: |
| 13430 | uint32_t word0; |
| 13431 | |
| 13432 | public: |
| 13433 | CONSTEXPR pid6_r() : word0(0) {} |
| 13434 | CONSTEXPR pid6_r(uint32_t init) : word0(init) {} |
| 13435 | CONSTEXPR void operator=(uint32_t value) |
| 13436 | { |
| 13437 | word0 = value; |
| 13438 | } |
| 13439 | void operator=(uint32_t value) volatile |
| 13440 | { |
| 13441 | word0 = value; |
| 13442 | } |
| 13443 | CONSTEXPR operator uint32_t() |
| 13444 | { |
| 13445 | return word0; |
| 13446 | } |
| 13447 | operator uint32_t() volatile |
| 13448 | { |
| 13449 | return word0; |
| 13450 | } |
| 13451 | pid6_r copy() volatile |
| 13452 | { |
| 13453 | return *this; |
| 13454 | } |
| 13455 | CONSTEXPR uint32_t get_PID6() const |
| 13456 | { |
| 13457 | uint32_t value = static_cast<uint32_t>(word0); |
| 13458 | return value; |
| 13459 | } |
| 13460 | uint32_t get_PID6() const volatile |
| 13461 | { |
| 13462 | uint32_t value = static_cast<uint32_t>(word0); |
| 13463 | return value; |
| 13464 | } |
| 13465 | CONSTEXPR pid6_r &set_PID6(uint32_t value) |
| 13466 | { |
| 13467 | word0 = static_cast<uint32_t>(value); |
| 13468 | return *this; |
| 13469 | } |
| 13470 | #endif |
| 13471 | }; |
| 13472 | |
| 13473 | // pid7_r - Peripheral ID byte 7 (reserved) |
| 13474 | struct pid7_r |
| 13475 | { |
| 13476 | #ifndef __cplusplus |
| 13477 | union |
| 13478 | { |
| 13479 | struct |
| 13480 | { |
| 13481 | uint32_t PID7 : 32; // Byte 7 of Peripheral ID (Lower 8 bits valid) |
| 13482 | }; |
| 13483 | uint32_t word; |
| 13484 | }; |
| 13485 | #else |
| 13486 | private: |
| 13487 | uint32_t word0; |
| 13488 | |
| 13489 | public: |
| 13490 | CONSTEXPR pid7_r() : word0(0) {} |
| 13491 | CONSTEXPR pid7_r(uint32_t init) : word0(init) {} |
| 13492 | CONSTEXPR void operator=(uint32_t value) |
| 13493 | { |
| 13494 | word0 = value; |
| 13495 | } |
| 13496 | void operator=(uint32_t value) volatile |
| 13497 | { |
| 13498 | word0 = value; |
| 13499 | } |
| 13500 | CONSTEXPR operator uint32_t() |
| 13501 | { |
| 13502 | return word0; |
| 13503 | } |
| 13504 | operator uint32_t() volatile |
| 13505 | { |
| 13506 | return word0; |
| 13507 | } |
| 13508 | pid7_r copy() volatile |
| 13509 | { |
| 13510 | return *this; |
| 13511 | } |
| 13512 | CONSTEXPR uint32_t get_PID7() const |
| 13513 | { |
| 13514 | uint32_t value = static_cast<uint32_t>(word0); |
| 13515 | return value; |
| 13516 | } |
| 13517 | uint32_t get_PID7() const volatile |
| 13518 | { |
| 13519 | uint32_t value = static_cast<uint32_t>(word0); |
| 13520 | return value; |
| 13521 | } |
| 13522 | CONSTEXPR pid7_r &set_PID7(uint32_t value) |
| 13523 | { |
| 13524 | word0 = static_cast<uint32_t>(value); |
| 13525 | return *this; |
| 13526 | } |
| 13527 | #endif |
| 13528 | }; |
| 13529 | |
| 13530 | // pid0_r - Peripheral ID byte 0. This is bits[7:0] of the part number |
| 13531 | struct pid0_r |
| 13532 | { |
| 13533 | #ifndef __cplusplus |
| 13534 | union |
| 13535 | { |
| 13536 | struct |
| 13537 | { |
| 13538 | uint32_t PID0 : 32; // Byte 0 of Peripheral ID (Lower 8 bits valid) |
| 13539 | }; |
| 13540 | uint32_t word; |
| 13541 | }; |
| 13542 | #else |
| 13543 | private: |
| 13544 | uint32_t word0; |
| 13545 | |
| 13546 | public: |
| 13547 | CONSTEXPR pid0_r() : word0(129) {} |
| 13548 | CONSTEXPR pid0_r(uint32_t init) : word0(init) {} |
| 13549 | CONSTEXPR void operator=(uint32_t value) |
| 13550 | { |
| 13551 | word0 = value; |
| 13552 | } |
| 13553 | void operator=(uint32_t value) volatile |
| 13554 | { |
| 13555 | word0 = value; |
| 13556 | } |
| 13557 | CONSTEXPR operator uint32_t() |
| 13558 | { |
| 13559 | return word0; |
| 13560 | } |
| 13561 | operator uint32_t() volatile |
| 13562 | { |
| 13563 | return word0; |
| 13564 | } |
| 13565 | pid0_r copy() volatile |
| 13566 | { |
| 13567 | return *this; |
| 13568 | } |
| 13569 | CONSTEXPR uint32_t get_PID0() const |
| 13570 | { |
| 13571 | uint32_t value = static_cast<uint32_t>(word0); |
| 13572 | return value; |
| 13573 | } |
| 13574 | uint32_t get_PID0() const volatile |
| 13575 | { |
| 13576 | uint32_t value = static_cast<uint32_t>(word0); |
| 13577 | return value; |
| 13578 | } |
| 13579 | CONSTEXPR pid0_r &set_PID0(uint32_t value) |
| 13580 | { |
| 13581 | word0 = static_cast<uint32_t>(value); |
| 13582 | return *this; |
| 13583 | } |
| 13584 | #endif |
| 13585 | }; |
| 13586 | |
| 13587 | // pid1_r - Peripheral ID byte 1. This is bits[11:8] of the part number in bits[3:0], and bits[3:0] of the Arm ID in |
| 13588 | // bits[7:4] |
| 13589 | struct pid1_r |
| 13590 | { |
| 13591 | #ifndef __cplusplus |
| 13592 | union |
| 13593 | { |
| 13594 | struct |
| 13595 | { |
| 13596 | uint32_t PID1 : 32; // Byte 1 of Peripheral ID (Lower 8 bits valid) |
| 13597 | }; |
| 13598 | uint32_t word; |
| 13599 | }; |
| 13600 | #else |
| 13601 | private: |
| 13602 | uint32_t word0; |
| 13603 | |
| 13604 | public: |
| 13605 | CONSTEXPR pid1_r() : word0(181) {} |
| 13606 | CONSTEXPR pid1_r(uint32_t init) : word0(init) {} |
| 13607 | CONSTEXPR void operator=(uint32_t value) |
| 13608 | { |
| 13609 | word0 = value; |
| 13610 | } |
| 13611 | void operator=(uint32_t value) volatile |
| 13612 | { |
| 13613 | word0 = value; |
| 13614 | } |
| 13615 | CONSTEXPR operator uint32_t() |
| 13616 | { |
| 13617 | return word0; |
| 13618 | } |
| 13619 | operator uint32_t() volatile |
| 13620 | { |
| 13621 | return word0; |
| 13622 | } |
| 13623 | pid1_r copy() volatile |
| 13624 | { |
| 13625 | return *this; |
| 13626 | } |
| 13627 | CONSTEXPR uint32_t get_PID1() const |
| 13628 | { |
| 13629 | uint32_t value = static_cast<uint32_t>(word0); |
| 13630 | return value; |
| 13631 | } |
| 13632 | uint32_t get_PID1() const volatile |
| 13633 | { |
| 13634 | uint32_t value = static_cast<uint32_t>(word0); |
| 13635 | return value; |
| 13636 | } |
| 13637 | CONSTEXPR pid1_r &set_PID1(uint32_t value) |
| 13638 | { |
| 13639 | word0 = static_cast<uint32_t>(value); |
| 13640 | return *this; |
| 13641 | } |
| 13642 | #endif |
| 13643 | }; |
| 13644 | |
| 13645 | // pid2_r - Peripheral ID byte 2. This is bits[6:4] of the Arm ID in bits[2:0], and bit 3 indicates format B |
| 13646 | struct pid2_r |
| 13647 | { |
| 13648 | #ifndef __cplusplus |
| 13649 | union |
| 13650 | { |
| 13651 | struct |
| 13652 | { |
| 13653 | uint32_t PID2 : 32; // Byte 2 of Peripheral ID (Lower 8 bits valid) |
| 13654 | }; |
| 13655 | uint32_t word; |
| 13656 | }; |
| 13657 | #else |
| 13658 | private: |
| 13659 | uint32_t word0; |
| 13660 | |
| 13661 | public: |
| 13662 | CONSTEXPR pid2_r() : word0(11) {} |
| 13663 | CONSTEXPR pid2_r(uint32_t init) : word0(init) {} |
| 13664 | CONSTEXPR void operator=(uint32_t value) |
| 13665 | { |
| 13666 | word0 = value; |
| 13667 | } |
| 13668 | void operator=(uint32_t value) volatile |
| 13669 | { |
| 13670 | word0 = value; |
| 13671 | } |
| 13672 | CONSTEXPR operator uint32_t() |
| 13673 | { |
| 13674 | return word0; |
| 13675 | } |
| 13676 | operator uint32_t() volatile |
| 13677 | { |
| 13678 | return word0; |
| 13679 | } |
| 13680 | pid2_r copy() volatile |
| 13681 | { |
| 13682 | return *this; |
| 13683 | } |
| 13684 | CONSTEXPR uint32_t get_PID2() const |
| 13685 | { |
| 13686 | uint32_t value = static_cast<uint32_t>(word0); |
| 13687 | return value; |
| 13688 | } |
| 13689 | uint32_t get_PID2() const volatile |
| 13690 | { |
| 13691 | uint32_t value = static_cast<uint32_t>(word0); |
| 13692 | return value; |
| 13693 | } |
| 13694 | CONSTEXPR pid2_r &set_PID2(uint32_t value) |
| 13695 | { |
| 13696 | word0 = static_cast<uint32_t>(value); |
| 13697 | return *this; |
| 13698 | } |
| 13699 | #endif |
| 13700 | }; |
| 13701 | |
| 13702 | // pid3_r - Peripheral ID byte 3 |
| 13703 | struct pid3_r |
| 13704 | { |
| 13705 | #ifndef __cplusplus |
| 13706 | union |
| 13707 | { |
| 13708 | struct |
| 13709 | { |
| 13710 | uint32_t PID3 : 32; // Byte 1 of Peripheral ID (Lower 8 bits valid) |
| 13711 | }; |
| 13712 | uint32_t word; |
| 13713 | }; |
| 13714 | #else |
| 13715 | private: |
| 13716 | uint32_t word0; |
| 13717 | |
| 13718 | public: |
| 13719 | CONSTEXPR pid3_r() : word0(0) {} |
| 13720 | CONSTEXPR pid3_r(uint32_t init) : word0(init) {} |
| 13721 | CONSTEXPR void operator=(uint32_t value) |
| 13722 | { |
| 13723 | word0 = value; |
| 13724 | } |
| 13725 | void operator=(uint32_t value) volatile |
| 13726 | { |
| 13727 | word0 = value; |
| 13728 | } |
| 13729 | CONSTEXPR operator uint32_t() |
| 13730 | { |
| 13731 | return word0; |
| 13732 | } |
| 13733 | operator uint32_t() volatile |
| 13734 | { |
| 13735 | return word0; |
| 13736 | } |
| 13737 | pid3_r copy() volatile |
| 13738 | { |
| 13739 | return *this; |
| 13740 | } |
| 13741 | CONSTEXPR uint32_t get_PID3() const |
| 13742 | { |
| 13743 | uint32_t value = static_cast<uint32_t>(word0); |
| 13744 | return value; |
| 13745 | } |
| 13746 | uint32_t get_PID3() const volatile |
| 13747 | { |
| 13748 | uint32_t value = static_cast<uint32_t>(word0); |
| 13749 | return value; |
| 13750 | } |
| 13751 | CONSTEXPR pid3_r &set_PID3(uint32_t value) |
| 13752 | { |
| 13753 | word0 = static_cast<uint32_t>(value); |
| 13754 | return *this; |
| 13755 | } |
| 13756 | #endif |
| 13757 | }; |
| 13758 | |
| 13759 | // cid0_r - Component ID byte 0 |
| 13760 | struct cid0_r |
| 13761 | { |
| 13762 | #ifndef __cplusplus |
| 13763 | union |
| 13764 | { |
| 13765 | struct |
| 13766 | { |
| 13767 | uint32_t CID0 : 32; // Byte 0 of Component ID (Lower 8 bits valid) |
| 13768 | }; |
| 13769 | uint32_t word; |
| 13770 | }; |
| 13771 | #else |
| 13772 | private: |
| 13773 | uint32_t word0; |
| 13774 | |
| 13775 | public: |
| 13776 | CONSTEXPR cid0_r() : word0(13) {} |
| 13777 | CONSTEXPR cid0_r(uint32_t init) : word0(init) {} |
| 13778 | CONSTEXPR void operator=(uint32_t value) |
| 13779 | { |
| 13780 | word0 = value; |
| 13781 | } |
| 13782 | void operator=(uint32_t value) volatile |
| 13783 | { |
| 13784 | word0 = value; |
| 13785 | } |
| 13786 | CONSTEXPR operator uint32_t() |
| 13787 | { |
| 13788 | return word0; |
| 13789 | } |
| 13790 | operator uint32_t() volatile |
| 13791 | { |
| 13792 | return word0; |
| 13793 | } |
| 13794 | cid0_r copy() volatile |
| 13795 | { |
| 13796 | return *this; |
| 13797 | } |
| 13798 | CONSTEXPR uint32_t get_CID0() const |
| 13799 | { |
| 13800 | uint32_t value = static_cast<uint32_t>(word0); |
| 13801 | return value; |
| 13802 | } |
| 13803 | uint32_t get_CID0() const volatile |
| 13804 | { |
| 13805 | uint32_t value = static_cast<uint32_t>(word0); |
| 13806 | return value; |
| 13807 | } |
| 13808 | CONSTEXPR cid0_r &set_CID0(uint32_t value) |
| 13809 | { |
| 13810 | word0 = static_cast<uint32_t>(value); |
| 13811 | return *this; |
| 13812 | } |
| 13813 | #endif |
| 13814 | }; |
| 13815 | |
| 13816 | // cid1_r - Component ID byte 1 |
| 13817 | struct cid1_r |
| 13818 | { |
| 13819 | #ifndef __cplusplus |
| 13820 | union |
| 13821 | { |
| 13822 | struct |
| 13823 | { |
| 13824 | uint32_t CID1 : 32; // Byte 1 of Component ID (Lower 8 bits valid) |
| 13825 | }; |
| 13826 | uint32_t word; |
| 13827 | }; |
| 13828 | #else |
| 13829 | private: |
| 13830 | uint32_t word0; |
| 13831 | |
| 13832 | public: |
| 13833 | CONSTEXPR cid1_r() : word0(240) {} |
| 13834 | CONSTEXPR cid1_r(uint32_t init) : word0(init) {} |
| 13835 | CONSTEXPR void operator=(uint32_t value) |
| 13836 | { |
| 13837 | word0 = value; |
| 13838 | } |
| 13839 | void operator=(uint32_t value) volatile |
| 13840 | { |
| 13841 | word0 = value; |
| 13842 | } |
| 13843 | CONSTEXPR operator uint32_t() |
| 13844 | { |
| 13845 | return word0; |
| 13846 | } |
| 13847 | operator uint32_t() volatile |
| 13848 | { |
| 13849 | return word0; |
| 13850 | } |
| 13851 | cid1_r copy() volatile |
| 13852 | { |
| 13853 | return *this; |
| 13854 | } |
| 13855 | CONSTEXPR uint32_t get_CID1() const |
| 13856 | { |
| 13857 | uint32_t value = static_cast<uint32_t>(word0); |
| 13858 | return value; |
| 13859 | } |
| 13860 | uint32_t get_CID1() const volatile |
| 13861 | { |
| 13862 | uint32_t value = static_cast<uint32_t>(word0); |
| 13863 | return value; |
| 13864 | } |
| 13865 | CONSTEXPR cid1_r &set_CID1(uint32_t value) |
| 13866 | { |
| 13867 | word0 = static_cast<uint32_t>(value); |
| 13868 | return *this; |
| 13869 | } |
| 13870 | #endif |
| 13871 | }; |
| 13872 | |
| 13873 | // cid2_r - Component ID byte 2 |
| 13874 | struct cid2_r |
| 13875 | { |
| 13876 | #ifndef __cplusplus |
| 13877 | union |
| 13878 | { |
| 13879 | struct |
| 13880 | { |
| 13881 | uint32_t CID2 : 32; // Byte 2 of Component ID (Lower 8 bits valid) |
| 13882 | }; |
| 13883 | uint32_t word; |
| 13884 | }; |
| 13885 | #else |
| 13886 | private: |
| 13887 | uint32_t word0; |
| 13888 | |
| 13889 | public: |
| 13890 | CONSTEXPR cid2_r() : word0(5) {} |
| 13891 | CONSTEXPR cid2_r(uint32_t init) : word0(init) {} |
| 13892 | CONSTEXPR void operator=(uint32_t value) |
| 13893 | { |
| 13894 | word0 = value; |
| 13895 | } |
| 13896 | void operator=(uint32_t value) volatile |
| 13897 | { |
| 13898 | word0 = value; |
| 13899 | } |
| 13900 | CONSTEXPR operator uint32_t() |
| 13901 | { |
| 13902 | return word0; |
| 13903 | } |
| 13904 | operator uint32_t() volatile |
| 13905 | { |
| 13906 | return word0; |
| 13907 | } |
| 13908 | cid2_r copy() volatile |
| 13909 | { |
| 13910 | return *this; |
| 13911 | } |
| 13912 | CONSTEXPR uint32_t get_CID2() const |
| 13913 | { |
| 13914 | uint32_t value = static_cast<uint32_t>(word0); |
| 13915 | return value; |
| 13916 | } |
| 13917 | uint32_t get_CID2() const volatile |
| 13918 | { |
| 13919 | uint32_t value = static_cast<uint32_t>(word0); |
| 13920 | return value; |
| 13921 | } |
| 13922 | CONSTEXPR cid2_r &set_CID2(uint32_t value) |
| 13923 | { |
| 13924 | word0 = static_cast<uint32_t>(value); |
| 13925 | return *this; |
| 13926 | } |
| 13927 | #endif |
| 13928 | }; |
| 13929 | |
| 13930 | // cid3_r - Component ID byte 3 |
| 13931 | struct cid3_r |
| 13932 | { |
| 13933 | #ifndef __cplusplus |
| 13934 | union |
| 13935 | { |
| 13936 | struct |
| 13937 | { |
| 13938 | uint32_t CID3 : 32; // Byte 3 of Component ID (Lower 8 bits valid) |
| 13939 | }; |
| 13940 | uint32_t word; |
| 13941 | }; |
| 13942 | #else |
| 13943 | private: |
| 13944 | uint32_t word0; |
| 13945 | |
| 13946 | public: |
| 13947 | CONSTEXPR cid3_r() : word0(177) {} |
| 13948 | CONSTEXPR cid3_r(uint32_t init) : word0(init) {} |
| 13949 | CONSTEXPR void operator=(uint32_t value) |
| 13950 | { |
| 13951 | word0 = value; |
| 13952 | } |
| 13953 | void operator=(uint32_t value) volatile |
| 13954 | { |
| 13955 | word0 = value; |
| 13956 | } |
| 13957 | CONSTEXPR operator uint32_t() |
| 13958 | { |
| 13959 | return word0; |
| 13960 | } |
| 13961 | operator uint32_t() volatile |
| 13962 | { |
| 13963 | return word0; |
| 13964 | } |
| 13965 | cid3_r copy() volatile |
| 13966 | { |
| 13967 | return *this; |
| 13968 | } |
| 13969 | CONSTEXPR uint32_t get_CID3() const |
| 13970 | { |
| 13971 | uint32_t value = static_cast<uint32_t>(word0); |
| 13972 | return value; |
| 13973 | } |
| 13974 | uint32_t get_CID3() const volatile |
| 13975 | { |
| 13976 | uint32_t value = static_cast<uint32_t>(word0); |
| 13977 | return value; |
| 13978 | } |
| 13979 | CONSTEXPR cid3_r &set_CID3(uint32_t value) |
| 13980 | { |
| 13981 | word0 = static_cast<uint32_t>(value); |
| 13982 | return *this; |
| 13983 | } |
| 13984 | #endif |
| 13985 | }; |
| 13986 | |
| 13987 | struct NPU_REG |
| 13988 | { |
| 13989 | STRUCT id_r ID; // 0x0000 |
| 13990 | STRUCT status_r STATUS; // 0x0004 |
| 13991 | STRUCT cmd_r CMD; // 0x0008 |
| 13992 | STRUCT reset_r RESET; // 0x000C |
| 13993 | STRUCT qbase_r QBASE; // 0x0010 |
| 13994 | STRUCT qread_r QREAD; // 0x0018 |
| 13995 | STRUCT qconfig_r QCONFIG; // 0x001C |
| 13996 | STRUCT qsize_r QSIZE; // 0x0020 |
| 13997 | STRUCT prot_r PROT; // 0x0024 |
| 13998 | STRUCT config_r CONFIG; // 0x0028 |
| 13999 | STRUCT lock_r LOCK; // 0x002C |
| 14000 | uint32_t unused0[3]; |
| 14001 | STRUCT regioncfg_r REGIONCFG; // 0x003C |
| 14002 | STRUCT axi_limit0_r AXI_LIMIT0; // 0x0040 |
| 14003 | STRUCT axi_limit1_r AXI_LIMIT1; // 0x0044 |
| 14004 | STRUCT axi_limit2_r AXI_LIMIT2; // 0x0048 |
| 14005 | STRUCT axi_limit3_r AXI_LIMIT3; // 0x004C |
| 14006 | uint32_t unused1[12]; |
| 14007 | STRUCT basep_r BASEP[8]; // 0x0080 |
| 14008 | uint32_t unused2[16]; |
| 14009 | STRUCT wd_status_r WD_STATUS; // 0x0100 |
| 14010 | STRUCT mac_status_r MAC_STATUS; // 0x0104 |
| 14011 | STRUCT ao_status_r AO_STATUS; // 0x0108 |
| 14012 | uint32_t unused3[1]; |
| 14013 | STRUCT dma_status0_r DMA_STATUS0; // 0x0110 |
| 14014 | STRUCT dma_status1_r DMA_STATUS1; // 0x0114 |
| 14015 | uint32_t unused4[10]; |
| 14016 | STRUCT clkforce_r CLKFORCE; // 0x0140 |
| 14017 | STRUCT debug_address_r DEBUG_ADDRESS; // 0x0144 |
| 14018 | STRUCT debug_misc_r DEBUG_MISC; // 0x0148 |
| 14019 | STRUCT debugcore_r DEBUGCORE; // 0x014C |
| 14020 | STRUCT debug_block_r DEBUG_BLOCK; // 0x0150 |
| 14021 | uint32_t unused5[11]; |
| 14022 | STRUCT pmcr_r PMCR; // 0x0180 |
| 14023 | STRUCT pmcntenset_r PMCNTENSET; // 0x0184 |
| 14024 | STRUCT pmcntenclr_r PMCNTENCLR; // 0x0188 |
| 14025 | STRUCT pmovsset_r PMOVSSET; // 0x018C |
| 14026 | STRUCT pmovsclr_r PMOVSCLR; // 0x0190 |
| 14027 | STRUCT pmintset_r PMINTSET; // 0x0194 |
| 14028 | STRUCT pmintclr_r PMINTCLR; // 0x0198 |
| 14029 | uint32_t unused6[1]; |
| 14030 | STRUCT pmccntr_r PMCCNTR; // 0x01A0 |
| 14031 | STRUCT pmccntr_cfg_r PMCCNTR_CFG; // 0x01A8 |
| 14032 | STRUCT pmcaxi_chan_r PMCAXI_CHAN; // 0x01AC |
| 14033 | uint32_t unused7[20]; |
| 14034 | STRUCT kernel_x_r KERNEL_X; // 0x0200 |
| 14035 | STRUCT kernel_y_r KERNEL_Y; // 0x0204 |
| 14036 | STRUCT kernel_w_m1_r KERNEL_W_M1; // 0x0208 |
| 14037 | STRUCT kernel_h_m1_r KERNEL_H_M1; // 0x020C |
| 14038 | STRUCT ofm_cblk_width_m1_r OFM_CBLK_WIDTH_M1; // 0x0210 |
| 14039 | STRUCT ofm_cblk_height_m1_r OFM_CBLK_HEIGHT_M1; // 0x0214 |
| 14040 | STRUCT ofm_cblk_depth_m1_r OFM_CBLK_DEPTH_M1; // 0x0218 |
| 14041 | STRUCT ifm_cblk_depth_m1_r IFM_CBLK_DEPTH_M1; // 0x021C |
| 14042 | STRUCT ofm_x_r OFM_X; // 0x0220 |
| 14043 | STRUCT ofm_y_r OFM_Y; // 0x0224 |
| 14044 | STRUCT ofm_z_r OFM_Z; // 0x0228 |
| 14045 | STRUCT ifm_z_r IFM_Z; // 0x022C |
| 14046 | STRUCT pad_top_r PAD_TOP; // 0x0230 |
| 14047 | STRUCT pad_left_r PAD_LEFT; // 0x0234 |
| 14048 | STRUCT ifm_cblk_width_r IFM_CBLK_WIDTH; // 0x0238 |
| 14049 | STRUCT ifm_cblk_height_r IFM_CBLK_HEIGHT; // 0x023C |
| 14050 | STRUCT dma_ifm_src_r DMA_IFM_SRC; // 0x0240 |
| 14051 | STRUCT dma_ifm_dst_r DMA_IFM_DST; // 0x0248 |
| 14052 | STRUCT dma_ofm_src_r DMA_OFM_SRC; // 0x024C |
| 14053 | STRUCT dma_ofm_dst_r DMA_OFM_DST; // 0x0250 |
| 14054 | STRUCT dma_weight_src_r DMA_WEIGHT_SRC; // 0x0258 |
| 14055 | STRUCT dma_cmd_src_r DMA_CMD_SRC; // 0x0260 |
| 14056 | STRUCT dma_cmd_size_r DMA_CMD_SIZE; // 0x0268 |
| 14057 | STRUCT dma_m2m_src_r DMA_M2M_SRC; // 0x026C |
| 14058 | STRUCT dma_m2m_dst_r DMA_M2M_DST; // 0x0274 |
| 14059 | STRUCT current_qread_r CURRENT_QREAD; // 0x027C |
| 14060 | STRUCT dma_scale_src_r DMA_SCALE_SRC; // 0x0280 |
| 14061 | uint32_t unused8[11]; |
| 14062 | STRUCT current_block_r CURRENT_BLOCK; // 0x02B4 |
| 14063 | STRUCT current_op_r CURRENT_OP; // 0x02B8 |
| 14064 | STRUCT current_cmd_r CURRENT_CMD; // 0x02BC |
| 14065 | uint32_t unused9[16]; |
| 14066 | STRUCT pmevcntr_r PMEVCNTR[4]; // 0x0300 |
| 14067 | uint32_t unused10[28]; |
| 14068 | STRUCT pmevtyper_r PMEVTYPER[4]; // 0x0380 |
| 14069 | uint32_t unused11[28]; |
| 14070 | STRUCT shared_buffer_r SHARED_BUFFER[256]; // 0x0400 |
| 14071 | STRUCT ifm_pad_top_r IFM_PAD_TOP; // 0x0800 |
| 14072 | STRUCT ifm_pad_left_r IFM_PAD_LEFT; // 0x0804 |
| 14073 | STRUCT ifm_pad_right_r IFM_PAD_RIGHT; // 0x0808 |
| 14074 | STRUCT ifm_pad_bottom_r IFM_PAD_BOTTOM; // 0x080C |
| 14075 | STRUCT ifm_depth_m1_r IFM_DEPTH_M1; // 0x0810 |
| 14076 | STRUCT ifm_precision_r IFM_PRECISION; // 0x0814 |
| 14077 | uint32_t unused12[1]; |
| 14078 | STRUCT ifm_upscale_r IFM_UPSCALE; // 0x081C |
| 14079 | uint32_t unused13[1]; |
| 14080 | STRUCT ifm_zero_point_r IFM_ZERO_POINT; // 0x0824 |
| 14081 | STRUCT ifm_width0_m1_r IFM_WIDTH0_M1; // 0x0828 |
| 14082 | STRUCT ifm_height0_m1_r IFM_HEIGHT0_M1; // 0x082C |
| 14083 | STRUCT ifm_height1_m1_r IFM_HEIGHT1_M1; // 0x0830 |
| 14084 | STRUCT ifm_ib_end_r IFM_IB_END; // 0x0834 |
| 14085 | uint32_t unused14[1]; |
| 14086 | STRUCT ifm_region_r IFM_REGION; // 0x083C |
| 14087 | uint32_t unused15[1]; |
| 14088 | STRUCT ofm_width_m1_r OFM_WIDTH_M1; // 0x0844 |
| 14089 | STRUCT ofm_height_m1_r OFM_HEIGHT_M1; // 0x0848 |
| 14090 | STRUCT ofm_depth_m1_r OFM_DEPTH_M1; // 0x084C |
| 14091 | STRUCT ofm_precision_r OFM_PRECISION; // 0x0850 |
| 14092 | STRUCT ofm_blk_width_m1_r OFM_BLK_WIDTH_M1; // 0x0854 |
| 14093 | STRUCT ofm_blk_height_m1_r OFM_BLK_HEIGHT_M1; // 0x0858 |
| 14094 | STRUCT ofm_blk_depth_m1_r OFM_BLK_DEPTH_M1; // 0x085C |
| 14095 | STRUCT ofm_zero_point_r OFM_ZERO_POINT; // 0x0860 |
| 14096 | uint32_t unused16[1]; |
| 14097 | STRUCT ofm_width0_m1_r OFM_WIDTH0_M1; // 0x0868 |
| 14098 | STRUCT ofm_height0_m1_r OFM_HEIGHT0_M1; // 0x086C |
| 14099 | STRUCT ofm_height1_m1_r OFM_HEIGHT1_M1; // 0x0870 |
| 14100 | uint32_t unused17[2]; |
| 14101 | STRUCT ofm_region_r OFM_REGION; // 0x087C |
| 14102 | STRUCT kernel_width_m1_r KERNEL_WIDTH_M1; // 0x0880 |
| 14103 | STRUCT kernel_height_m1_r KERNEL_HEIGHT_M1; // 0x0884 |
| 14104 | STRUCT kernel_stride_r KERNEL_STRIDE; // 0x0888 |
| 14105 | STRUCT parallel_mode_r PARALLEL_MODE; // 0x088C |
| 14106 | STRUCT acc_format_r ACC_FORMAT; // 0x0890 |
| 14107 | STRUCT activation_r ACTIVATION; // 0x0894 |
| 14108 | STRUCT activation_min_r ACTIVATION_MIN; // 0x0898 |
| 14109 | STRUCT activation_max_r ACTIVATION_MAX; // 0x089C |
| 14110 | STRUCT weight_region_r WEIGHT_REGION; // 0x08A0 |
| 14111 | STRUCT scale_region_r SCALE_REGION; // 0x08A4 |
| 14112 | uint32_t unused18[3]; |
| 14113 | STRUCT ab_start_r AB_START; // 0x08B4 |
| 14114 | uint32_t unused19[1]; |
| 14115 | STRUCT blockdep_r BLOCKDEP; // 0x08BC |
| 14116 | STRUCT dma0_src_region_r DMA0_SRC_REGION; // 0x08C0 |
| 14117 | STRUCT dma0_dst_region_r DMA0_DST_REGION; // 0x08C4 |
| 14118 | STRUCT dma0_size0_r DMA0_SIZE0; // 0x08C8 |
| 14119 | STRUCT dma0_size1_r DMA0_SIZE1; // 0x08CC |
| 14120 | uint32_t unused20[12]; |
| 14121 | STRUCT ifm2_broadcast_r IFM2_BROADCAST; // 0x0900 |
| 14122 | STRUCT ifm2_scalar_r IFM2_SCALAR; // 0x0904 |
| 14123 | uint32_t unused21[3]; |
| 14124 | STRUCT ifm2_precision_r IFM2_PRECISION; // 0x0914 |
| 14125 | uint32_t unused22[3]; |
| 14126 | STRUCT ifm2_zero_point_r IFM2_ZERO_POINT; // 0x0924 |
| 14127 | STRUCT ifm2_width0_m1_r IFM2_WIDTH0_M1; // 0x0928 |
| 14128 | STRUCT ifm2_height0_m1_r IFM2_HEIGHT0_M1; // 0x092C |
| 14129 | STRUCT ifm2_height1_m1_r IFM2_HEIGHT1_M1; // 0x0930 |
| 14130 | STRUCT ifm2_ib_start_r IFM2_IB_START; // 0x0934 |
| 14131 | uint32_t unused23[1]; |
| 14132 | STRUCT ifm2_region_r IFM2_REGION; // 0x093C |
| 14133 | uint32_t unused24[48]; |
| 14134 | STRUCT ifm_base0_r IFM_BASE0; // 0x0A00 |
| 14135 | STRUCT ifm_base1_r IFM_BASE1; // 0x0A08 |
| 14136 | STRUCT ifm_base2_r IFM_BASE2; // 0x0A10 |
| 14137 | STRUCT ifm_base3_r IFM_BASE3; // 0x0A18 |
| 14138 | STRUCT ifm_stride_x_r IFM_STRIDE_X; // 0x0A20 |
| 14139 | STRUCT ifm_stride_y_r IFM_STRIDE_Y; // 0x0A28 |
| 14140 | STRUCT ifm_stride_c_r IFM_STRIDE_C; // 0x0A30 |
| 14141 | uint32_t unused25[2]; |
| 14142 | STRUCT ofm_base0_r OFM_BASE0; // 0x0A40 |
| 14143 | STRUCT ofm_base1_r OFM_BASE1; // 0x0A48 |
| 14144 | STRUCT ofm_base2_r OFM_BASE2; // 0x0A50 |
| 14145 | STRUCT ofm_base3_r OFM_BASE3; // 0x0A58 |
| 14146 | STRUCT ofm_stride_x_r OFM_STRIDE_X; // 0x0A60 |
| 14147 | STRUCT ofm_stride_y_r OFM_STRIDE_Y; // 0x0A68 |
| 14148 | STRUCT ofm_stride_c_r OFM_STRIDE_C; // 0x0A70 |
| 14149 | uint32_t unused26[2]; |
| 14150 | STRUCT weight_base_r WEIGHT_BASE; // 0x0A80 |
| 14151 | STRUCT weight_length_r WEIGHT_LENGTH; // 0x0A88 |
| 14152 | uint32_t unused27[1]; |
| 14153 | STRUCT scale_base_r SCALE_BASE; // 0x0A90 |
| 14154 | STRUCT scale_length_r SCALE_LENGTH; // 0x0A98 |
| 14155 | uint32_t unused28[1]; |
| 14156 | STRUCT ofm_scale_r OFM_SCALE; // 0x0AA0 |
| 14157 | STRUCT ofm_scale_shift_r OFM_SCALE_SHIFT; // 0x0AA4 |
| 14158 | STRUCT opa_scale_r OPA_SCALE; // 0x0AA8 |
| 14159 | STRUCT opa_scale_shift_r OPA_SCALE_SHIFT; // 0x0AAC |
| 14160 | STRUCT opb_scale_r OPB_SCALE; // 0x0AB0 |
| 14161 | uint32_t unused29[3]; |
| 14162 | STRUCT dma0_src_r DMA0_SRC; // 0x0AC0 |
| 14163 | STRUCT dma0_dst_r DMA0_DST; // 0x0AC8 |
| 14164 | STRUCT dma0_len_r DMA0_LEN; // 0x0AD0 |
| 14165 | STRUCT dma0_skip0_r DMA0_SKIP0; // 0x0AD8 |
| 14166 | STRUCT dma0_skip1_r DMA0_SKIP1; // 0x0AE0 |
| 14167 | uint32_t unused30[6]; |
| 14168 | STRUCT ifm2_base0_r IFM2_BASE0; // 0x0B00 |
| 14169 | STRUCT ifm2_base1_r IFM2_BASE1; // 0x0B08 |
| 14170 | STRUCT ifm2_base2_r IFM2_BASE2; // 0x0B10 |
| 14171 | STRUCT ifm2_base3_r IFM2_BASE3; // 0x0B18 |
| 14172 | STRUCT ifm2_stride_x_r IFM2_STRIDE_X; // 0x0B20 |
| 14173 | STRUCT ifm2_stride_y_r IFM2_STRIDE_Y; // 0x0B28 |
| 14174 | STRUCT ifm2_stride_c_r IFM2_STRIDE_C; // 0x0B30 |
| 14175 | uint32_t unused31[2]; |
| 14176 | STRUCT weight1_base_r WEIGHT1_BASE; // 0x0B40 |
| 14177 | STRUCT weight1_length_r WEIGHT1_LENGTH; // 0x0B48 |
| 14178 | uint32_t unused32[1]; |
| 14179 | STRUCT scale1_base_r SCALE1_BASE; // 0x0B50 |
| 14180 | STRUCT scale1_length_r SCALE1_LENGTH; // 0x0B58 |
| 14181 | uint32_t unused33[281]; |
| 14182 | STRUCT revision_r REVISION; // 0x0FC0 |
| 14183 | uint32_t unused34[3]; |
| 14184 | STRUCT pid4_r PID4; // 0x0FD0 |
| 14185 | STRUCT pid5_r PID5; // 0x0FD4 |
| 14186 | STRUCT pid6_r PID6; // 0x0FD8 |
| 14187 | STRUCT pid7_r PID7; // 0x0FDC |
| 14188 | STRUCT pid0_r PID0; // 0x0FE0 |
| 14189 | STRUCT pid1_r PID1; // 0x0FE4 |
| 14190 | STRUCT pid2_r PID2; // 0x0FE8 |
| 14191 | STRUCT pid3_r PID3; // 0x0FEC |
| 14192 | STRUCT cid0_r CID0; // 0x0FF0 |
| 14193 | STRUCT cid1_r CID1; // 0x0FF4 |
| 14194 | STRUCT cid2_r CID2; // 0x0FF8 |
| 14195 | STRUCT cid3_r CID3; // 0x0FFC |
| 14196 | |
| 14197 | #ifdef __cplusplus |
| 14198 | enum class access_type_t : uint8_t |
| 14199 | { |
| 14200 | RW, |
| 14201 | RO, |
| 14202 | WO |
| 14203 | }; |
| 14204 | NPU_REG() |
| 14205 | { |
| 14206 | reset(); |
| 14207 | } |
| 14208 | void reset() |
| 14209 | { |
| 14210 | ID = 268853249; |
| 14211 | STATUS = 8; |
| 14212 | CMD = 12; |
| 14213 | RESET = 0; |
| 14214 | QBASE = 0; |
| 14215 | QREAD = 0; |
| 14216 | QCONFIG = 0; |
| 14217 | QSIZE = 0; |
| 14218 | PROT = 0; |
| 14219 | CONFIG = 268435456; |
| 14220 | LOCK = 0; |
| 14221 | REGIONCFG = 0; |
| 14222 | AXI_LIMIT0 = 0; |
| 14223 | AXI_LIMIT1 = 0; |
| 14224 | AXI_LIMIT2 = 0; |
| 14225 | AXI_LIMIT3 = 0; |
| 14226 | for (size_t i = 0; i < (sizeof(BASEP) / sizeof(BASEP[0])); ++i) |
| 14227 | BASEP[i] = 0; |
| 14228 | WD_STATUS = 0; |
| 14229 | MAC_STATUS = 0; |
| 14230 | AO_STATUS = 0; |
| 14231 | DMA_STATUS0 = 0; |
| 14232 | DMA_STATUS1 = 0; |
| 14233 | CLKFORCE = 0; |
| 14234 | DEBUG_ADDRESS = 0; |
| 14235 | DEBUG_MISC = 0; |
| 14236 | DEBUGCORE = 0; |
| 14237 | DEBUG_BLOCK = 0; |
| 14238 | PMCR = 8192; |
| 14239 | PMCNTENSET = 0; |
| 14240 | PMCNTENCLR = 0; |
| 14241 | PMOVSSET = 0; |
| 14242 | PMOVSCLR = 0; |
| 14243 | PMINTSET = 0; |
| 14244 | PMINTCLR = 0; |
| 14245 | PMCCNTR = 0; |
| 14246 | PMCCNTR_CFG = 0; |
| 14247 | PMCAXI_CHAN = 0; |
| 14248 | KERNEL_X = 0; |
| 14249 | KERNEL_Y = 0; |
| 14250 | KERNEL_W_M1 = 0; |
| 14251 | KERNEL_H_M1 = 0; |
| 14252 | OFM_CBLK_WIDTH_M1 = 0; |
| 14253 | OFM_CBLK_HEIGHT_M1 = 0; |
| 14254 | OFM_CBLK_DEPTH_M1 = 0; |
| 14255 | IFM_CBLK_DEPTH_M1 = 0; |
| 14256 | OFM_X = 0; |
| 14257 | OFM_Y = 0; |
| 14258 | OFM_Z = 0; |
| 14259 | IFM_Z = 0; |
| 14260 | PAD_TOP = 0; |
| 14261 | PAD_LEFT = 0; |
| 14262 | IFM_CBLK_WIDTH = 0; |
| 14263 | IFM_CBLK_HEIGHT = 0; |
| 14264 | DMA_IFM_SRC = 0; |
| 14265 | DMA_IFM_DST = 0; |
| 14266 | DMA_OFM_SRC = 0; |
| 14267 | DMA_OFM_DST = 0; |
| 14268 | DMA_WEIGHT_SRC = 0; |
| 14269 | DMA_CMD_SRC = 0; |
| 14270 | DMA_CMD_SIZE = 0; |
| 14271 | DMA_M2M_SRC = 0; |
| 14272 | DMA_M2M_DST = 0; |
| 14273 | CURRENT_QREAD = 0; |
| 14274 | DMA_SCALE_SRC = 0; |
| 14275 | CURRENT_BLOCK = 0; |
| 14276 | CURRENT_OP = 0; |
| 14277 | CURRENT_CMD = 0; |
| 14278 | for (size_t i = 0; i < (sizeof(PMEVCNTR) / sizeof(PMEVCNTR[0])); ++i) |
| 14279 | PMEVCNTR[i] = 0; |
| 14280 | for (size_t i = 0; i < (sizeof(PMEVTYPER) / sizeof(PMEVTYPER[0])); ++i) |
| 14281 | PMEVTYPER[i] = 0; |
| 14282 | for (size_t i = 0; i < (sizeof(SHARED_BUFFER) / sizeof(SHARED_BUFFER[0])); ++i) |
| 14283 | SHARED_BUFFER[i] = 0; |
| 14284 | IFM_PAD_TOP = 0; |
| 14285 | IFM_PAD_LEFT = 0; |
| 14286 | IFM_PAD_RIGHT = 0; |
| 14287 | IFM_PAD_BOTTOM = 0; |
| 14288 | IFM_DEPTH_M1 = 0; |
| 14289 | IFM_PRECISION = 0; |
| 14290 | IFM_UPSCALE = 0; |
| 14291 | IFM_ZERO_POINT = 0; |
| 14292 | IFM_WIDTH0_M1 = 0; |
| 14293 | IFM_HEIGHT0_M1 = 0; |
| 14294 | IFM_HEIGHT1_M1 = 0; |
| 14295 | IFM_IB_END = 0; |
| 14296 | IFM_REGION = 0; |
| 14297 | OFM_WIDTH_M1 = 0; |
| 14298 | OFM_HEIGHT_M1 = 0; |
| 14299 | OFM_DEPTH_M1 = 0; |
| 14300 | OFM_PRECISION = 0; |
| 14301 | OFM_BLK_WIDTH_M1 = 0; |
| 14302 | OFM_BLK_HEIGHT_M1 = 0; |
| 14303 | OFM_BLK_DEPTH_M1 = 0; |
| 14304 | OFM_ZERO_POINT = 0; |
| 14305 | OFM_WIDTH0_M1 = 0; |
| 14306 | OFM_HEIGHT0_M1 = 0; |
| 14307 | OFM_HEIGHT1_M1 = 0; |
| 14308 | OFM_REGION = 0; |
| 14309 | KERNEL_WIDTH_M1 = 0; |
| 14310 | KERNEL_HEIGHT_M1 = 0; |
| 14311 | KERNEL_STRIDE = 0; |
| 14312 | PARALLEL_MODE = 0; |
| 14313 | ACC_FORMAT = 0; |
| 14314 | ACTIVATION = 0; |
| 14315 | ACTIVATION_MIN = 0; |
| 14316 | ACTIVATION_MAX = 0; |
| 14317 | WEIGHT_REGION = 0; |
| 14318 | SCALE_REGION = 0; |
| 14319 | AB_START = 0; |
| 14320 | BLOCKDEP = 0; |
| 14321 | DMA0_SRC_REGION = 0; |
| 14322 | DMA0_DST_REGION = 0; |
| 14323 | DMA0_SIZE0 = 0; |
| 14324 | DMA0_SIZE1 = 0; |
| 14325 | IFM2_BROADCAST = 0; |
| 14326 | IFM2_SCALAR = 0; |
| 14327 | IFM2_PRECISION = 0; |
| 14328 | IFM2_ZERO_POINT = 0; |
| 14329 | IFM2_WIDTH0_M1 = 0; |
| 14330 | IFM2_HEIGHT0_M1 = 0; |
| 14331 | IFM2_HEIGHT1_M1 = 0; |
| 14332 | IFM2_IB_START = 0; |
| 14333 | IFM2_REGION = 0; |
| 14334 | IFM_BASE0 = 0; |
| 14335 | IFM_BASE1 = 0; |
| 14336 | IFM_BASE2 = 0; |
| 14337 | IFM_BASE3 = 0; |
| 14338 | IFM_STRIDE_X = 0; |
| 14339 | IFM_STRIDE_Y = 0; |
| 14340 | IFM_STRIDE_C = 0; |
| 14341 | OFM_BASE0 = 0; |
| 14342 | OFM_BASE1 = 0; |
| 14343 | OFM_BASE2 = 0; |
| 14344 | OFM_BASE3 = 0; |
| 14345 | OFM_STRIDE_X = 0; |
| 14346 | OFM_STRIDE_Y = 0; |
| 14347 | OFM_STRIDE_C = 0; |
| 14348 | WEIGHT_BASE = 0; |
| 14349 | WEIGHT_LENGTH = 0; |
| 14350 | SCALE_BASE = 0; |
| 14351 | SCALE_LENGTH = 0; |
| 14352 | OFM_SCALE = 0; |
| 14353 | OFM_SCALE_SHIFT = 0; |
| 14354 | OPA_SCALE = 0; |
| 14355 | OPA_SCALE_SHIFT = 0; |
| 14356 | OPB_SCALE = 0; |
| 14357 | DMA0_SRC = 0; |
| 14358 | DMA0_DST = 0; |
| 14359 | DMA0_LEN = 0; |
| 14360 | DMA0_SKIP0 = 0; |
| 14361 | DMA0_SKIP1 = 0; |
| 14362 | IFM2_BASE0 = 0; |
| 14363 | IFM2_BASE1 = 0; |
| 14364 | IFM2_BASE2 = 0; |
| 14365 | IFM2_BASE3 = 0; |
| 14366 | IFM2_STRIDE_X = 0; |
| 14367 | IFM2_STRIDE_Y = 0; |
| 14368 | IFM2_STRIDE_C = 0; |
| 14369 | WEIGHT1_BASE = 0; |
| 14370 | WEIGHT1_LENGTH = 0; |
| 14371 | SCALE1_BASE = 0; |
| 14372 | SCALE1_LENGTH = 0; |
| 14373 | REVISION = 0; |
| 14374 | PID4 = 4; |
| 14375 | PID5 = 0; |
| 14376 | PID6 = 0; |
| 14377 | PID7 = 0; |
| 14378 | PID0 = 129; |
| 14379 | PID1 = 181; |
| 14380 | PID2 = 11; |
| 14381 | PID3 = 0; |
| 14382 | CID0 = 13; |
| 14383 | CID1 = 240; |
| 14384 | CID2 = 5; |
| 14385 | CID3 = 177; |
| 14386 | } |
| 14387 | uint32_t &operator[](const int addr_offset) |
| 14388 | { |
| 14389 | return reinterpret_cast<uint32_t *>(this)[addr_offset / 4]; |
| 14390 | } |
| 14391 | access_type_t get_access_type(uint32_t offset) |
| 14392 | { |
| 14393 | switch (offset) |
| 14394 | { |
| 14395 | case 0: |
| 14396 | return access_type_t::RO; |
| 14397 | case 4: |
| 14398 | return access_type_t::RO; |
| 14399 | case 8: |
| 14400 | return access_type_t::RW; |
| 14401 | case 12: |
| 14402 | return access_type_t::RW; |
| 14403 | case 16: |
| 14404 | return access_type_t::RW; |
| 14405 | case 24: |
| 14406 | return access_type_t::RO; |
| 14407 | case 28: |
| 14408 | return access_type_t::RW; |
| 14409 | case 32: |
| 14410 | return access_type_t::RW; |
| 14411 | case 36: |
| 14412 | return access_type_t::RO; |
| 14413 | case 40: |
| 14414 | return access_type_t::RO; |
| 14415 | case 44: |
| 14416 | return access_type_t::RW; |
| 14417 | case 60: |
| 14418 | return access_type_t::RW; |
| 14419 | case 64: |
| 14420 | return access_type_t::RW; |
| 14421 | case 68: |
| 14422 | return access_type_t::RW; |
| 14423 | case 72: |
| 14424 | return access_type_t::RW; |
| 14425 | case 76: |
| 14426 | return access_type_t::RW; |
| 14427 | case 128: |
| 14428 | return access_type_t::RW; |
| 14429 | case 136: |
| 14430 | return access_type_t::RW; |
| 14431 | case 144: |
| 14432 | return access_type_t::RW; |
| 14433 | case 152: |
| 14434 | return access_type_t::RW; |
| 14435 | case 160: |
| 14436 | return access_type_t::RW; |
| 14437 | case 168: |
| 14438 | return access_type_t::RW; |
| 14439 | case 176: |
| 14440 | return access_type_t::RW; |
| 14441 | case 184: |
| 14442 | return access_type_t::RW; |
| 14443 | case 256: |
| 14444 | return access_type_t::RO; |
| 14445 | case 260: |
| 14446 | return access_type_t::RO; |
| 14447 | case 264: |
| 14448 | return access_type_t::RO; |
| 14449 | case 272: |
| 14450 | return access_type_t::RO; |
| 14451 | case 276: |
| 14452 | return access_type_t::RO; |
| 14453 | case 320: |
| 14454 | return access_type_t::RW; |
| 14455 | case 324: |
| 14456 | return access_type_t::RW; |
| 14457 | case 328: |
| 14458 | return access_type_t::RW; |
| 14459 | case 332: |
| 14460 | return access_type_t::RW; |
| 14461 | case 336: |
| 14462 | return access_type_t::RW; |
| 14463 | case 384: |
| 14464 | return access_type_t::RW; |
| 14465 | case 388: |
| 14466 | return access_type_t::RW; |
| 14467 | case 392: |
| 14468 | return access_type_t::RW; |
| 14469 | case 396: |
| 14470 | return access_type_t::RW; |
| 14471 | case 400: |
| 14472 | return access_type_t::RW; |
| 14473 | case 404: |
| 14474 | return access_type_t::RW; |
| 14475 | case 408: |
| 14476 | return access_type_t::RW; |
| 14477 | case 416: |
| 14478 | return access_type_t::RW; |
| 14479 | case 424: |
| 14480 | return access_type_t::RW; |
| 14481 | case 428: |
| 14482 | return access_type_t::RW; |
| 14483 | case 512: |
| 14484 | return access_type_t::RO; |
| 14485 | case 516: |
| 14486 | return access_type_t::RO; |
| 14487 | case 520: |
| 14488 | return access_type_t::RO; |
| 14489 | case 524: |
| 14490 | return access_type_t::RO; |
| 14491 | case 528: |
| 14492 | return access_type_t::RO; |
| 14493 | case 532: |
| 14494 | return access_type_t::RO; |
| 14495 | case 536: |
| 14496 | return access_type_t::RO; |
| 14497 | case 540: |
| 14498 | return access_type_t::RO; |
| 14499 | case 544: |
| 14500 | return access_type_t::RO; |
| 14501 | case 548: |
| 14502 | return access_type_t::RO; |
| 14503 | case 552: |
| 14504 | return access_type_t::RO; |
| 14505 | case 556: |
| 14506 | return access_type_t::RO; |
| 14507 | case 560: |
| 14508 | return access_type_t::RO; |
| 14509 | case 564: |
| 14510 | return access_type_t::RO; |
| 14511 | case 568: |
| 14512 | return access_type_t::RO; |
| 14513 | case 572: |
| 14514 | return access_type_t::RO; |
| 14515 | case 576: |
| 14516 | return access_type_t::RO; |
| 14517 | case 584: |
| 14518 | return access_type_t::RO; |
| 14519 | case 588: |
| 14520 | return access_type_t::RO; |
| 14521 | case 592: |
| 14522 | return access_type_t::RO; |
| 14523 | case 600: |
| 14524 | return access_type_t::RO; |
| 14525 | case 608: |
| 14526 | return access_type_t::RO; |
| 14527 | case 616: |
| 14528 | return access_type_t::RO; |
| 14529 | case 620: |
| 14530 | return access_type_t::RO; |
| 14531 | case 628: |
| 14532 | return access_type_t::RO; |
| 14533 | case 636: |
| 14534 | return access_type_t::RO; |
| 14535 | case 640: |
| 14536 | return access_type_t::RO; |
| 14537 | case 692: |
| 14538 | return access_type_t::RO; |
| 14539 | case 696: |
| 14540 | return access_type_t::RO; |
| 14541 | case 700: |
| 14542 | return access_type_t::RO; |
| 14543 | case 768: |
| 14544 | return access_type_t::RW; |
| 14545 | case 772: |
| 14546 | return access_type_t::RW; |
| 14547 | case 776: |
| 14548 | return access_type_t::RW; |
| 14549 | case 780: |
| 14550 | return access_type_t::RW; |
| 14551 | case 896: |
| 14552 | return access_type_t::RW; |
| 14553 | case 900: |
| 14554 | return access_type_t::RW; |
| 14555 | case 904: |
| 14556 | return access_type_t::RW; |
| 14557 | case 908: |
| 14558 | return access_type_t::RW; |
| 14559 | case 1024: |
| 14560 | return access_type_t::RW; |
| 14561 | case 1028: |
| 14562 | return access_type_t::RW; |
| 14563 | case 1032: |
| 14564 | return access_type_t::RW; |
| 14565 | case 1036: |
| 14566 | return access_type_t::RW; |
| 14567 | case 1040: |
| 14568 | return access_type_t::RW; |
| 14569 | case 1044: |
| 14570 | return access_type_t::RW; |
| 14571 | case 1048: |
| 14572 | return access_type_t::RW; |
| 14573 | case 1052: |
| 14574 | return access_type_t::RW; |
| 14575 | case 1056: |
| 14576 | return access_type_t::RW; |
| 14577 | case 1060: |
| 14578 | return access_type_t::RW; |
| 14579 | case 1064: |
| 14580 | return access_type_t::RW; |
| 14581 | case 1068: |
| 14582 | return access_type_t::RW; |
| 14583 | case 1072: |
| 14584 | return access_type_t::RW; |
| 14585 | case 1076: |
| 14586 | return access_type_t::RW; |
| 14587 | case 1080: |
| 14588 | return access_type_t::RW; |
| 14589 | case 1084: |
| 14590 | return access_type_t::RW; |
| 14591 | case 1088: |
| 14592 | return access_type_t::RW; |
| 14593 | case 1092: |
| 14594 | return access_type_t::RW; |
| 14595 | case 1096: |
| 14596 | return access_type_t::RW; |
| 14597 | case 1100: |
| 14598 | return access_type_t::RW; |
| 14599 | case 1104: |
| 14600 | return access_type_t::RW; |
| 14601 | case 1108: |
| 14602 | return access_type_t::RW; |
| 14603 | case 1112: |
| 14604 | return access_type_t::RW; |
| 14605 | case 1116: |
| 14606 | return access_type_t::RW; |
| 14607 | case 1120: |
| 14608 | return access_type_t::RW; |
| 14609 | case 1124: |
| 14610 | return access_type_t::RW; |
| 14611 | case 1128: |
| 14612 | return access_type_t::RW; |
| 14613 | case 1132: |
| 14614 | return access_type_t::RW; |
| 14615 | case 1136: |
| 14616 | return access_type_t::RW; |
| 14617 | case 1140: |
| 14618 | return access_type_t::RW; |
| 14619 | case 1144: |
| 14620 | return access_type_t::RW; |
| 14621 | case 1148: |
| 14622 | return access_type_t::RW; |
| 14623 | case 1152: |
| 14624 | return access_type_t::RW; |
| 14625 | case 1156: |
| 14626 | return access_type_t::RW; |
| 14627 | case 1160: |
| 14628 | return access_type_t::RW; |
| 14629 | case 1164: |
| 14630 | return access_type_t::RW; |
| 14631 | case 1168: |
| 14632 | return access_type_t::RW; |
| 14633 | case 1172: |
| 14634 | return access_type_t::RW; |
| 14635 | case 1176: |
| 14636 | return access_type_t::RW; |
| 14637 | case 1180: |
| 14638 | return access_type_t::RW; |
| 14639 | case 1184: |
| 14640 | return access_type_t::RW; |
| 14641 | case 1188: |
| 14642 | return access_type_t::RW; |
| 14643 | case 1192: |
| 14644 | return access_type_t::RW; |
| 14645 | case 1196: |
| 14646 | return access_type_t::RW; |
| 14647 | case 1200: |
| 14648 | return access_type_t::RW; |
| 14649 | case 1204: |
| 14650 | return access_type_t::RW; |
| 14651 | case 1208: |
| 14652 | return access_type_t::RW; |
| 14653 | case 1212: |
| 14654 | return access_type_t::RW; |
| 14655 | case 1216: |
| 14656 | return access_type_t::RW; |
| 14657 | case 1220: |
| 14658 | return access_type_t::RW; |
| 14659 | case 1224: |
| 14660 | return access_type_t::RW; |
| 14661 | case 1228: |
| 14662 | return access_type_t::RW; |
| 14663 | case 1232: |
| 14664 | return access_type_t::RW; |
| 14665 | case 1236: |
| 14666 | return access_type_t::RW; |
| 14667 | case 1240: |
| 14668 | return access_type_t::RW; |
| 14669 | case 1244: |
| 14670 | return access_type_t::RW; |
| 14671 | case 1248: |
| 14672 | return access_type_t::RW; |
| 14673 | case 1252: |
| 14674 | return access_type_t::RW; |
| 14675 | case 1256: |
| 14676 | return access_type_t::RW; |
| 14677 | case 1260: |
| 14678 | return access_type_t::RW; |
| 14679 | case 1264: |
| 14680 | return access_type_t::RW; |
| 14681 | case 1268: |
| 14682 | return access_type_t::RW; |
| 14683 | case 1272: |
| 14684 | return access_type_t::RW; |
| 14685 | case 1276: |
| 14686 | return access_type_t::RW; |
| 14687 | case 1280: |
| 14688 | return access_type_t::RW; |
| 14689 | case 1284: |
| 14690 | return access_type_t::RW; |
| 14691 | case 1288: |
| 14692 | return access_type_t::RW; |
| 14693 | case 1292: |
| 14694 | return access_type_t::RW; |
| 14695 | case 1296: |
| 14696 | return access_type_t::RW; |
| 14697 | case 1300: |
| 14698 | return access_type_t::RW; |
| 14699 | case 1304: |
| 14700 | return access_type_t::RW; |
| 14701 | case 1308: |
| 14702 | return access_type_t::RW; |
| 14703 | case 1312: |
| 14704 | return access_type_t::RW; |
| 14705 | case 1316: |
| 14706 | return access_type_t::RW; |
| 14707 | case 1320: |
| 14708 | return access_type_t::RW; |
| 14709 | case 1324: |
| 14710 | return access_type_t::RW; |
| 14711 | case 1328: |
| 14712 | return access_type_t::RW; |
| 14713 | case 1332: |
| 14714 | return access_type_t::RW; |
| 14715 | case 1336: |
| 14716 | return access_type_t::RW; |
| 14717 | case 1340: |
| 14718 | return access_type_t::RW; |
| 14719 | case 1344: |
| 14720 | return access_type_t::RW; |
| 14721 | case 1348: |
| 14722 | return access_type_t::RW; |
| 14723 | case 1352: |
| 14724 | return access_type_t::RW; |
| 14725 | case 1356: |
| 14726 | return access_type_t::RW; |
| 14727 | case 1360: |
| 14728 | return access_type_t::RW; |
| 14729 | case 1364: |
| 14730 | return access_type_t::RW; |
| 14731 | case 1368: |
| 14732 | return access_type_t::RW; |
| 14733 | case 1372: |
| 14734 | return access_type_t::RW; |
| 14735 | case 1376: |
| 14736 | return access_type_t::RW; |
| 14737 | case 1380: |
| 14738 | return access_type_t::RW; |
| 14739 | case 1384: |
| 14740 | return access_type_t::RW; |
| 14741 | case 1388: |
| 14742 | return access_type_t::RW; |
| 14743 | case 1392: |
| 14744 | return access_type_t::RW; |
| 14745 | case 1396: |
| 14746 | return access_type_t::RW; |
| 14747 | case 1400: |
| 14748 | return access_type_t::RW; |
| 14749 | case 1404: |
| 14750 | return access_type_t::RW; |
| 14751 | case 1408: |
| 14752 | return access_type_t::RW; |
| 14753 | case 1412: |
| 14754 | return access_type_t::RW; |
| 14755 | case 1416: |
| 14756 | return access_type_t::RW; |
| 14757 | case 1420: |
| 14758 | return access_type_t::RW; |
| 14759 | case 1424: |
| 14760 | return access_type_t::RW; |
| 14761 | case 1428: |
| 14762 | return access_type_t::RW; |
| 14763 | case 1432: |
| 14764 | return access_type_t::RW; |
| 14765 | case 1436: |
| 14766 | return access_type_t::RW; |
| 14767 | case 1440: |
| 14768 | return access_type_t::RW; |
| 14769 | case 1444: |
| 14770 | return access_type_t::RW; |
| 14771 | case 1448: |
| 14772 | return access_type_t::RW; |
| 14773 | case 1452: |
| 14774 | return access_type_t::RW; |
| 14775 | case 1456: |
| 14776 | return access_type_t::RW; |
| 14777 | case 1460: |
| 14778 | return access_type_t::RW; |
| 14779 | case 1464: |
| 14780 | return access_type_t::RW; |
| 14781 | case 1468: |
| 14782 | return access_type_t::RW; |
| 14783 | case 1472: |
| 14784 | return access_type_t::RW; |
| 14785 | case 1476: |
| 14786 | return access_type_t::RW; |
| 14787 | case 1480: |
| 14788 | return access_type_t::RW; |
| 14789 | case 1484: |
| 14790 | return access_type_t::RW; |
| 14791 | case 1488: |
| 14792 | return access_type_t::RW; |
| 14793 | case 1492: |
| 14794 | return access_type_t::RW; |
| 14795 | case 1496: |
| 14796 | return access_type_t::RW; |
| 14797 | case 1500: |
| 14798 | return access_type_t::RW; |
| 14799 | case 1504: |
| 14800 | return access_type_t::RW; |
| 14801 | case 1508: |
| 14802 | return access_type_t::RW; |
| 14803 | case 1512: |
| 14804 | return access_type_t::RW; |
| 14805 | case 1516: |
| 14806 | return access_type_t::RW; |
| 14807 | case 1520: |
| 14808 | return access_type_t::RW; |
| 14809 | case 1524: |
| 14810 | return access_type_t::RW; |
| 14811 | case 1528: |
| 14812 | return access_type_t::RW; |
| 14813 | case 1532: |
| 14814 | return access_type_t::RW; |
| 14815 | case 1536: |
| 14816 | return access_type_t::RW; |
| 14817 | case 1540: |
| 14818 | return access_type_t::RW; |
| 14819 | case 1544: |
| 14820 | return access_type_t::RW; |
| 14821 | case 1548: |
| 14822 | return access_type_t::RW; |
| 14823 | case 1552: |
| 14824 | return access_type_t::RW; |
| 14825 | case 1556: |
| 14826 | return access_type_t::RW; |
| 14827 | case 1560: |
| 14828 | return access_type_t::RW; |
| 14829 | case 1564: |
| 14830 | return access_type_t::RW; |
| 14831 | case 1568: |
| 14832 | return access_type_t::RW; |
| 14833 | case 1572: |
| 14834 | return access_type_t::RW; |
| 14835 | case 1576: |
| 14836 | return access_type_t::RW; |
| 14837 | case 1580: |
| 14838 | return access_type_t::RW; |
| 14839 | case 1584: |
| 14840 | return access_type_t::RW; |
| 14841 | case 1588: |
| 14842 | return access_type_t::RW; |
| 14843 | case 1592: |
| 14844 | return access_type_t::RW; |
| 14845 | case 1596: |
| 14846 | return access_type_t::RW; |
| 14847 | case 1600: |
| 14848 | return access_type_t::RW; |
| 14849 | case 1604: |
| 14850 | return access_type_t::RW; |
| 14851 | case 1608: |
| 14852 | return access_type_t::RW; |
| 14853 | case 1612: |
| 14854 | return access_type_t::RW; |
| 14855 | case 1616: |
| 14856 | return access_type_t::RW; |
| 14857 | case 1620: |
| 14858 | return access_type_t::RW; |
| 14859 | case 1624: |
| 14860 | return access_type_t::RW; |
| 14861 | case 1628: |
| 14862 | return access_type_t::RW; |
| 14863 | case 1632: |
| 14864 | return access_type_t::RW; |
| 14865 | case 1636: |
| 14866 | return access_type_t::RW; |
| 14867 | case 1640: |
| 14868 | return access_type_t::RW; |
| 14869 | case 1644: |
| 14870 | return access_type_t::RW; |
| 14871 | case 1648: |
| 14872 | return access_type_t::RW; |
| 14873 | case 1652: |
| 14874 | return access_type_t::RW; |
| 14875 | case 1656: |
| 14876 | return access_type_t::RW; |
| 14877 | case 1660: |
| 14878 | return access_type_t::RW; |
| 14879 | case 1664: |
| 14880 | return access_type_t::RW; |
| 14881 | case 1668: |
| 14882 | return access_type_t::RW; |
| 14883 | case 1672: |
| 14884 | return access_type_t::RW; |
| 14885 | case 1676: |
| 14886 | return access_type_t::RW; |
| 14887 | case 1680: |
| 14888 | return access_type_t::RW; |
| 14889 | case 1684: |
| 14890 | return access_type_t::RW; |
| 14891 | case 1688: |
| 14892 | return access_type_t::RW; |
| 14893 | case 1692: |
| 14894 | return access_type_t::RW; |
| 14895 | case 1696: |
| 14896 | return access_type_t::RW; |
| 14897 | case 1700: |
| 14898 | return access_type_t::RW; |
| 14899 | case 1704: |
| 14900 | return access_type_t::RW; |
| 14901 | case 1708: |
| 14902 | return access_type_t::RW; |
| 14903 | case 1712: |
| 14904 | return access_type_t::RW; |
| 14905 | case 1716: |
| 14906 | return access_type_t::RW; |
| 14907 | case 1720: |
| 14908 | return access_type_t::RW; |
| 14909 | case 1724: |
| 14910 | return access_type_t::RW; |
| 14911 | case 1728: |
| 14912 | return access_type_t::RW; |
| 14913 | case 1732: |
| 14914 | return access_type_t::RW; |
| 14915 | case 1736: |
| 14916 | return access_type_t::RW; |
| 14917 | case 1740: |
| 14918 | return access_type_t::RW; |
| 14919 | case 1744: |
| 14920 | return access_type_t::RW; |
| 14921 | case 1748: |
| 14922 | return access_type_t::RW; |
| 14923 | case 1752: |
| 14924 | return access_type_t::RW; |
| 14925 | case 1756: |
| 14926 | return access_type_t::RW; |
| 14927 | case 1760: |
| 14928 | return access_type_t::RW; |
| 14929 | case 1764: |
| 14930 | return access_type_t::RW; |
| 14931 | case 1768: |
| 14932 | return access_type_t::RW; |
| 14933 | case 1772: |
| 14934 | return access_type_t::RW; |
| 14935 | case 1776: |
| 14936 | return access_type_t::RW; |
| 14937 | case 1780: |
| 14938 | return access_type_t::RW; |
| 14939 | case 1784: |
| 14940 | return access_type_t::RW; |
| 14941 | case 1788: |
| 14942 | return access_type_t::RW; |
| 14943 | case 1792: |
| 14944 | return access_type_t::RW; |
| 14945 | case 1796: |
| 14946 | return access_type_t::RW; |
| 14947 | case 1800: |
| 14948 | return access_type_t::RW; |
| 14949 | case 1804: |
| 14950 | return access_type_t::RW; |
| 14951 | case 1808: |
| 14952 | return access_type_t::RW; |
| 14953 | case 1812: |
| 14954 | return access_type_t::RW; |
| 14955 | case 1816: |
| 14956 | return access_type_t::RW; |
| 14957 | case 1820: |
| 14958 | return access_type_t::RW; |
| 14959 | case 1824: |
| 14960 | return access_type_t::RW; |
| 14961 | case 1828: |
| 14962 | return access_type_t::RW; |
| 14963 | case 1832: |
| 14964 | return access_type_t::RW; |
| 14965 | case 1836: |
| 14966 | return access_type_t::RW; |
| 14967 | case 1840: |
| 14968 | return access_type_t::RW; |
| 14969 | case 1844: |
| 14970 | return access_type_t::RW; |
| 14971 | case 1848: |
| 14972 | return access_type_t::RW; |
| 14973 | case 1852: |
| 14974 | return access_type_t::RW; |
| 14975 | case 1856: |
| 14976 | return access_type_t::RW; |
| 14977 | case 1860: |
| 14978 | return access_type_t::RW; |
| 14979 | case 1864: |
| 14980 | return access_type_t::RW; |
| 14981 | case 1868: |
| 14982 | return access_type_t::RW; |
| 14983 | case 1872: |
| 14984 | return access_type_t::RW; |
| 14985 | case 1876: |
| 14986 | return access_type_t::RW; |
| 14987 | case 1880: |
| 14988 | return access_type_t::RW; |
| 14989 | case 1884: |
| 14990 | return access_type_t::RW; |
| 14991 | case 1888: |
| 14992 | return access_type_t::RW; |
| 14993 | case 1892: |
| 14994 | return access_type_t::RW; |
| 14995 | case 1896: |
| 14996 | return access_type_t::RW; |
| 14997 | case 1900: |
| 14998 | return access_type_t::RW; |
| 14999 | case 1904: |
| 15000 | return access_type_t::RW; |
| 15001 | case 1908: |
| 15002 | return access_type_t::RW; |
| 15003 | case 1912: |
| 15004 | return access_type_t::RW; |
| 15005 | case 1916: |
| 15006 | return access_type_t::RW; |
| 15007 | case 1920: |
| 15008 | return access_type_t::RW; |
| 15009 | case 1924: |
| 15010 | return access_type_t::RW; |
| 15011 | case 1928: |
| 15012 | return access_type_t::RW; |
| 15013 | case 1932: |
| 15014 | return access_type_t::RW; |
| 15015 | case 1936: |
| 15016 | return access_type_t::RW; |
| 15017 | case 1940: |
| 15018 | return access_type_t::RW; |
| 15019 | case 1944: |
| 15020 | return access_type_t::RW; |
| 15021 | case 1948: |
| 15022 | return access_type_t::RW; |
| 15023 | case 1952: |
| 15024 | return access_type_t::RW; |
| 15025 | case 1956: |
| 15026 | return access_type_t::RW; |
| 15027 | case 1960: |
| 15028 | return access_type_t::RW; |
| 15029 | case 1964: |
| 15030 | return access_type_t::RW; |
| 15031 | case 1968: |
| 15032 | return access_type_t::RW; |
| 15033 | case 1972: |
| 15034 | return access_type_t::RW; |
| 15035 | case 1976: |
| 15036 | return access_type_t::RW; |
| 15037 | case 1980: |
| 15038 | return access_type_t::RW; |
| 15039 | case 1984: |
| 15040 | return access_type_t::RW; |
| 15041 | case 1988: |
| 15042 | return access_type_t::RW; |
| 15043 | case 1992: |
| 15044 | return access_type_t::RW; |
| 15045 | case 1996: |
| 15046 | return access_type_t::RW; |
| 15047 | case 2000: |
| 15048 | return access_type_t::RW; |
| 15049 | case 2004: |
| 15050 | return access_type_t::RW; |
| 15051 | case 2008: |
| 15052 | return access_type_t::RW; |
| 15053 | case 2012: |
| 15054 | return access_type_t::RW; |
| 15055 | case 2016: |
| 15056 | return access_type_t::RW; |
| 15057 | case 2020: |
| 15058 | return access_type_t::RW; |
| 15059 | case 2024: |
| 15060 | return access_type_t::RW; |
| 15061 | case 2028: |
| 15062 | return access_type_t::RW; |
| 15063 | case 2032: |
| 15064 | return access_type_t::RW; |
| 15065 | case 2036: |
| 15066 | return access_type_t::RW; |
| 15067 | case 2040: |
| 15068 | return access_type_t::RW; |
| 15069 | case 2044: |
| 15070 | return access_type_t::RW; |
| 15071 | case 2048: |
| 15072 | return access_type_t::RW; |
| 15073 | case 2052: |
| 15074 | return access_type_t::RW; |
| 15075 | case 2056: |
| 15076 | return access_type_t::RW; |
| 15077 | case 2060: |
| 15078 | return access_type_t::RW; |
| 15079 | case 2064: |
| 15080 | return access_type_t::RW; |
| 15081 | case 2068: |
| 15082 | return access_type_t::RW; |
| 15083 | case 2076: |
| 15084 | return access_type_t::RW; |
| 15085 | case 2084: |
| 15086 | return access_type_t::RW; |
| 15087 | case 2088: |
| 15088 | return access_type_t::RW; |
| 15089 | case 2092: |
| 15090 | return access_type_t::RW; |
| 15091 | case 2096: |
| 15092 | return access_type_t::RW; |
| 15093 | case 2100: |
| 15094 | return access_type_t::RW; |
| 15095 | case 2108: |
| 15096 | return access_type_t::RW; |
| 15097 | case 2116: |
| 15098 | return access_type_t::RW; |
| 15099 | case 2120: |
| 15100 | return access_type_t::RW; |
| 15101 | case 2124: |
| 15102 | return access_type_t::RW; |
| 15103 | case 2128: |
| 15104 | return access_type_t::RW; |
| 15105 | case 2132: |
| 15106 | return access_type_t::RW; |
| 15107 | case 2136: |
| 15108 | return access_type_t::RW; |
| 15109 | case 2140: |
| 15110 | return access_type_t::RW; |
| 15111 | case 2144: |
| 15112 | return access_type_t::RW; |
| 15113 | case 2152: |
| 15114 | return access_type_t::RW; |
| 15115 | case 2156: |
| 15116 | return access_type_t::RW; |
| 15117 | case 2160: |
| 15118 | return access_type_t::RW; |
| 15119 | case 2172: |
| 15120 | return access_type_t::RW; |
| 15121 | case 2176: |
| 15122 | return access_type_t::RW; |
| 15123 | case 2180: |
| 15124 | return access_type_t::RW; |
| 15125 | case 2184: |
| 15126 | return access_type_t::RW; |
| 15127 | case 2188: |
| 15128 | return access_type_t::RW; |
| 15129 | case 2192: |
| 15130 | return access_type_t::RW; |
| 15131 | case 2196: |
| 15132 | return access_type_t::RW; |
| 15133 | case 2200: |
| 15134 | return access_type_t::RW; |
| 15135 | case 2204: |
| 15136 | return access_type_t::RW; |
| 15137 | case 2208: |
| 15138 | return access_type_t::RW; |
| 15139 | case 2212: |
| 15140 | return access_type_t::RW; |
| 15141 | case 2228: |
| 15142 | return access_type_t::RW; |
| 15143 | case 2236: |
| 15144 | return access_type_t::RW; |
| 15145 | case 2240: |
| 15146 | return access_type_t::RW; |
| 15147 | case 2244: |
| 15148 | return access_type_t::RW; |
| 15149 | case 2248: |
| 15150 | return access_type_t::RW; |
| 15151 | case 2252: |
| 15152 | return access_type_t::RW; |
| 15153 | case 2304: |
| 15154 | return access_type_t::RW; |
| 15155 | case 2308: |
| 15156 | return access_type_t::RW; |
| 15157 | case 2324: |
| 15158 | return access_type_t::RW; |
| 15159 | case 2340: |
| 15160 | return access_type_t::RW; |
| 15161 | case 2344: |
| 15162 | return access_type_t::RW; |
| 15163 | case 2348: |
| 15164 | return access_type_t::RW; |
| 15165 | case 2352: |
| 15166 | return access_type_t::RW; |
| 15167 | case 2356: |
| 15168 | return access_type_t::RW; |
| 15169 | case 2364: |
| 15170 | return access_type_t::RW; |
| 15171 | case 2560: |
| 15172 | return access_type_t::RW; |
| 15173 | case 2568: |
| 15174 | return access_type_t::RW; |
| 15175 | case 2576: |
| 15176 | return access_type_t::RW; |
| 15177 | case 2584: |
| 15178 | return access_type_t::RW; |
| 15179 | case 2592: |
| 15180 | return access_type_t::RW; |
| 15181 | case 2600: |
| 15182 | return access_type_t::RW; |
| 15183 | case 2608: |
| 15184 | return access_type_t::RW; |
| 15185 | case 2624: |
| 15186 | return access_type_t::RW; |
| 15187 | case 2632: |
| 15188 | return access_type_t::RW; |
| 15189 | case 2640: |
| 15190 | return access_type_t::RW; |
| 15191 | case 2648: |
| 15192 | return access_type_t::RW; |
| 15193 | case 2656: |
| 15194 | return access_type_t::RW; |
| 15195 | case 2664: |
| 15196 | return access_type_t::RW; |
| 15197 | case 2672: |
| 15198 | return access_type_t::RW; |
| 15199 | case 2688: |
| 15200 | return access_type_t::RW; |
| 15201 | case 2696: |
| 15202 | return access_type_t::RW; |
| 15203 | case 2704: |
| 15204 | return access_type_t::RW; |
| 15205 | case 2712: |
| 15206 | return access_type_t::RW; |
| 15207 | case 2720: |
| 15208 | return access_type_t::RW; |
| 15209 | case 2724: |
| 15210 | return access_type_t::RW; |
| 15211 | case 2728: |
| 15212 | return access_type_t::RW; |
| 15213 | case 2732: |
| 15214 | return access_type_t::RW; |
| 15215 | case 2736: |
| 15216 | return access_type_t::RW; |
| 15217 | case 2752: |
| 15218 | return access_type_t::RW; |
| 15219 | case 2760: |
| 15220 | return access_type_t::RW; |
| 15221 | case 2768: |
| 15222 | return access_type_t::RW; |
| 15223 | case 2776: |
| 15224 | return access_type_t::RW; |
| 15225 | case 2784: |
| 15226 | return access_type_t::RW; |
| 15227 | case 2816: |
| 15228 | return access_type_t::RW; |
| 15229 | case 2824: |
| 15230 | return access_type_t::RW; |
| 15231 | case 2832: |
| 15232 | return access_type_t::RW; |
| 15233 | case 2840: |
| 15234 | return access_type_t::RW; |
| 15235 | case 2848: |
| 15236 | return access_type_t::RW; |
| 15237 | case 2856: |
| 15238 | return access_type_t::RW; |
| 15239 | case 2864: |
| 15240 | return access_type_t::RW; |
| 15241 | case 2880: |
| 15242 | return access_type_t::RW; |
| 15243 | case 2888: |
| 15244 | return access_type_t::RW; |
| 15245 | case 2896: |
| 15246 | return access_type_t::RW; |
| 15247 | case 2904: |
| 15248 | return access_type_t::RW; |
| 15249 | case 4032: |
| 15250 | return access_type_t::RO; |
| 15251 | case 4048: |
| 15252 | return access_type_t::RO; |
| 15253 | case 4052: |
| 15254 | return access_type_t::RO; |
| 15255 | case 4056: |
| 15256 | return access_type_t::RO; |
| 15257 | case 4060: |
| 15258 | return access_type_t::RO; |
| 15259 | case 4064: |
| 15260 | return access_type_t::RO; |
| 15261 | case 4068: |
| 15262 | return access_type_t::RO; |
| 15263 | case 4072: |
| 15264 | return access_type_t::RO; |
| 15265 | case 4076: |
| 15266 | return access_type_t::RO; |
| 15267 | case 4080: |
| 15268 | return access_type_t::RO; |
| 15269 | case 4084: |
| 15270 | return access_type_t::RO; |
| 15271 | case 4088: |
| 15272 | return access_type_t::RO; |
| 15273 | case 4092: |
| 15274 | return access_type_t::RO; |
| 15275 | default: |
| 15276 | return access_type_t::RO; |
| 15277 | } |
| 15278 | } |
| 15279 | #endif |
| 15280 | }; |
| 15281 | |
| 15282 | #ifdef __cplusplus |
| 15283 | struct isa |
| 15284 | { |
| 15285 | #ifdef NPU_DISASSEMBLE |
| 15286 | static int disassemble(const uint32_t *in, |
| 15287 | std::string &op, |
| 15288 | std::vector<std::pair<std::string, std::string>> &fields) |
| 15289 | { |
| 15290 | switch (*in & 0xffff) |
| 15291 | { |
| 15292 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15293 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP): |
| 15294 | { |
| 15295 | const npu_op_stop_t &v = *reinterpret_cast<const npu_op_stop_t *>(in); |
| 15296 | op = "NPU_OP_STOP"; |
| 15297 | v.disassemble(fields); |
| 15298 | break; |
| 15299 | } |
| 15300 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15301 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ): |
| 15302 | { |
| 15303 | const npu_op_irq_t &v = *reinterpret_cast<const npu_op_irq_t *>(in); |
| 15304 | op = "NPU_OP_IRQ"; |
| 15305 | v.disassemble(fields); |
| 15306 | break; |
| 15307 | } |
| 15308 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15309 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV): |
| 15310 | { |
| 15311 | const npu_op_conv_t &v = *reinterpret_cast<const npu_op_conv_t *>(in); |
| 15312 | op = "NPU_OP_CONV"; |
| 15313 | v.disassemble(fields); |
| 15314 | break; |
| 15315 | } |
| 15316 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15317 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE): |
| 15318 | { |
| 15319 | const npu_op_depthwise_t &v = *reinterpret_cast<const npu_op_depthwise_t *>(in); |
| 15320 | op = "NPU_OP_DEPTHWISE"; |
| 15321 | v.disassemble(fields); |
| 15322 | break; |
| 15323 | } |
| 15324 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15325 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL): |
| 15326 | { |
| 15327 | const npu_op_pool_t &v = *reinterpret_cast<const npu_op_pool_t *>(in); |
| 15328 | op = "NPU_OP_POOL"; |
| 15329 | v.disassemble(fields); |
| 15330 | break; |
| 15331 | } |
| 15332 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15333 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE): |
| 15334 | { |
| 15335 | const npu_op_elementwise_t &v = *reinterpret_cast<const npu_op_elementwise_t *>(in); |
| 15336 | op = "NPU_OP_ELEMENTWISE"; |
| 15337 | v.disassemble(fields); |
| 15338 | break; |
| 15339 | } |
| 15340 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15341 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START): |
| 15342 | { |
| 15343 | const npu_op_dma_start_t &v = *reinterpret_cast<const npu_op_dma_start_t *>(in); |
| 15344 | op = "NPU_OP_DMA_START"; |
| 15345 | v.disassemble(fields); |
| 15346 | break; |
| 15347 | } |
| 15348 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15349 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT): |
| 15350 | { |
| 15351 | const npu_op_dma_wait_t &v = *reinterpret_cast<const npu_op_dma_wait_t *>(in); |
| 15352 | op = "NPU_OP_DMA_WAIT"; |
| 15353 | v.disassemble(fields); |
| 15354 | break; |
| 15355 | } |
| 15356 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15357 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT): |
| 15358 | { |
| 15359 | const npu_op_kernel_wait_t &v = *reinterpret_cast<const npu_op_kernel_wait_t *>(in); |
| 15360 | op = "NPU_OP_KERNEL_WAIT"; |
| 15361 | v.disassemble(fields); |
| 15362 | break; |
| 15363 | } |
| 15364 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15365 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK): |
| 15366 | { |
| 15367 | const npu_op_pmu_mask_t &v = *reinterpret_cast<const npu_op_pmu_mask_t *>(in); |
| 15368 | op = "NPU_OP_PMU_MASK"; |
| 15369 | v.disassemble(fields); |
| 15370 | break; |
| 15371 | } |
| 15372 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15373 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP): |
| 15374 | { |
| 15375 | const npu_set_ifm_pad_top_t &v = *reinterpret_cast<const npu_set_ifm_pad_top_t *>(in); |
| 15376 | op = "NPU_SET_IFM_PAD_TOP"; |
| 15377 | v.disassemble(fields); |
| 15378 | break; |
| 15379 | } |
| 15380 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15381 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT): |
| 15382 | { |
| 15383 | const npu_set_ifm_pad_left_t &v = *reinterpret_cast<const npu_set_ifm_pad_left_t *>(in); |
| 15384 | op = "NPU_SET_IFM_PAD_LEFT"; |
| 15385 | v.disassemble(fields); |
| 15386 | break; |
| 15387 | } |
| 15388 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15389 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT): |
| 15390 | { |
| 15391 | const npu_set_ifm_pad_right_t &v = *reinterpret_cast<const npu_set_ifm_pad_right_t *>(in); |
| 15392 | op = "NPU_SET_IFM_PAD_RIGHT"; |
| 15393 | v.disassemble(fields); |
| 15394 | break; |
| 15395 | } |
| 15396 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15397 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM): |
| 15398 | { |
| 15399 | const npu_set_ifm_pad_bottom_t &v = *reinterpret_cast<const npu_set_ifm_pad_bottom_t *>(in); |
| 15400 | op = "NPU_SET_IFM_PAD_BOTTOM"; |
| 15401 | v.disassemble(fields); |
| 15402 | break; |
| 15403 | } |
| 15404 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15405 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1): |
| 15406 | { |
| 15407 | const npu_set_ifm_depth_m1_t &v = *reinterpret_cast<const npu_set_ifm_depth_m1_t *>(in); |
| 15408 | op = "NPU_SET_IFM_DEPTH_M1"; |
| 15409 | v.disassemble(fields); |
| 15410 | break; |
| 15411 | } |
| 15412 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15413 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION): |
| 15414 | { |
| 15415 | const npu_set_ifm_precision_t &v = *reinterpret_cast<const npu_set_ifm_precision_t *>(in); |
| 15416 | op = "NPU_SET_IFM_PRECISION"; |
| 15417 | v.disassemble(fields); |
| 15418 | break; |
| 15419 | } |
| 15420 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15421 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE): |
| 15422 | { |
| 15423 | const npu_set_ifm_upscale_t &v = *reinterpret_cast<const npu_set_ifm_upscale_t *>(in); |
| 15424 | op = "NPU_SET_IFM_UPSCALE"; |
| 15425 | v.disassemble(fields); |
| 15426 | break; |
| 15427 | } |
| 15428 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15429 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT): |
| 15430 | { |
| 15431 | const npu_set_ifm_zero_point_t &v = *reinterpret_cast<const npu_set_ifm_zero_point_t *>(in); |
| 15432 | op = "NPU_SET_IFM_ZERO_POINT"; |
| 15433 | v.disassemble(fields); |
| 15434 | break; |
| 15435 | } |
| 15436 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15437 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1): |
| 15438 | { |
| 15439 | const npu_set_ifm_width0_m1_t &v = *reinterpret_cast<const npu_set_ifm_width0_m1_t *>(in); |
| 15440 | op = "NPU_SET_IFM_WIDTH0_M1"; |
| 15441 | v.disassemble(fields); |
| 15442 | break; |
| 15443 | } |
| 15444 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15445 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1): |
| 15446 | { |
| 15447 | const npu_set_ifm_height0_m1_t &v = *reinterpret_cast<const npu_set_ifm_height0_m1_t *>(in); |
| 15448 | op = "NPU_SET_IFM_HEIGHT0_M1"; |
| 15449 | v.disassemble(fields); |
| 15450 | break; |
| 15451 | } |
| 15452 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15453 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1): |
| 15454 | { |
| 15455 | const npu_set_ifm_height1_m1_t &v = *reinterpret_cast<const npu_set_ifm_height1_m1_t *>(in); |
| 15456 | op = "NPU_SET_IFM_HEIGHT1_M1"; |
| 15457 | v.disassemble(fields); |
| 15458 | break; |
| 15459 | } |
| 15460 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15461 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END): |
| 15462 | { |
| 15463 | const npu_set_ifm_ib_end_t &v = *reinterpret_cast<const npu_set_ifm_ib_end_t *>(in); |
| 15464 | op = "NPU_SET_IFM_IB_END"; |
| 15465 | v.disassemble(fields); |
| 15466 | break; |
| 15467 | } |
| 15468 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15469 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION): |
| 15470 | { |
| 15471 | const npu_set_ifm_region_t &v = *reinterpret_cast<const npu_set_ifm_region_t *>(in); |
| 15472 | op = "NPU_SET_IFM_REGION"; |
| 15473 | v.disassemble(fields); |
| 15474 | break; |
| 15475 | } |
| 15476 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15477 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1): |
| 15478 | { |
| 15479 | const npu_set_ofm_width_m1_t &v = *reinterpret_cast<const npu_set_ofm_width_m1_t *>(in); |
| 15480 | op = "NPU_SET_OFM_WIDTH_M1"; |
| 15481 | v.disassemble(fields); |
| 15482 | break; |
| 15483 | } |
| 15484 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15485 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1): |
| 15486 | { |
| 15487 | const npu_set_ofm_height_m1_t &v = *reinterpret_cast<const npu_set_ofm_height_m1_t *>(in); |
| 15488 | op = "NPU_SET_OFM_HEIGHT_M1"; |
| 15489 | v.disassemble(fields); |
| 15490 | break; |
| 15491 | } |
| 15492 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15493 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1): |
| 15494 | { |
| 15495 | const npu_set_ofm_depth_m1_t &v = *reinterpret_cast<const npu_set_ofm_depth_m1_t *>(in); |
| 15496 | op = "NPU_SET_OFM_DEPTH_M1"; |
| 15497 | v.disassemble(fields); |
| 15498 | break; |
| 15499 | } |
| 15500 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15501 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION): |
| 15502 | { |
| 15503 | const npu_set_ofm_precision_t &v = *reinterpret_cast<const npu_set_ofm_precision_t *>(in); |
| 15504 | op = "NPU_SET_OFM_PRECISION"; |
| 15505 | v.disassemble(fields); |
| 15506 | break; |
| 15507 | } |
| 15508 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15509 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1): |
| 15510 | { |
| 15511 | const npu_set_ofm_blk_width_m1_t &v = *reinterpret_cast<const npu_set_ofm_blk_width_m1_t *>(in); |
| 15512 | op = "NPU_SET_OFM_BLK_WIDTH_M1"; |
| 15513 | v.disassemble(fields); |
| 15514 | break; |
| 15515 | } |
| 15516 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15517 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1): |
| 15518 | { |
| 15519 | const npu_set_ofm_blk_height_m1_t &v = *reinterpret_cast<const npu_set_ofm_blk_height_m1_t *>(in); |
| 15520 | op = "NPU_SET_OFM_BLK_HEIGHT_M1"; |
| 15521 | v.disassemble(fields); |
| 15522 | break; |
| 15523 | } |
| 15524 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15525 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1): |
| 15526 | { |
| 15527 | const npu_set_ofm_blk_depth_m1_t &v = *reinterpret_cast<const npu_set_ofm_blk_depth_m1_t *>(in); |
| 15528 | op = "NPU_SET_OFM_BLK_DEPTH_M1"; |
| 15529 | v.disassemble(fields); |
| 15530 | break; |
| 15531 | } |
| 15532 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15533 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT): |
| 15534 | { |
| 15535 | const npu_set_ofm_zero_point_t &v = *reinterpret_cast<const npu_set_ofm_zero_point_t *>(in); |
| 15536 | op = "NPU_SET_OFM_ZERO_POINT"; |
| 15537 | v.disassemble(fields); |
| 15538 | break; |
| 15539 | } |
| 15540 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15541 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1): |
| 15542 | { |
| 15543 | const npu_set_ofm_width0_m1_t &v = *reinterpret_cast<const npu_set_ofm_width0_m1_t *>(in); |
| 15544 | op = "NPU_SET_OFM_WIDTH0_M1"; |
| 15545 | v.disassemble(fields); |
| 15546 | break; |
| 15547 | } |
| 15548 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15549 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1): |
| 15550 | { |
| 15551 | const npu_set_ofm_height0_m1_t &v = *reinterpret_cast<const npu_set_ofm_height0_m1_t *>(in); |
| 15552 | op = "NPU_SET_OFM_HEIGHT0_M1"; |
| 15553 | v.disassemble(fields); |
| 15554 | break; |
| 15555 | } |
| 15556 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15557 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1): |
| 15558 | { |
| 15559 | const npu_set_ofm_height1_m1_t &v = *reinterpret_cast<const npu_set_ofm_height1_m1_t *>(in); |
| 15560 | op = "NPU_SET_OFM_HEIGHT1_M1"; |
| 15561 | v.disassemble(fields); |
| 15562 | break; |
| 15563 | } |
| 15564 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15565 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION): |
| 15566 | { |
| 15567 | const npu_set_ofm_region_t &v = *reinterpret_cast<const npu_set_ofm_region_t *>(in); |
| 15568 | op = "NPU_SET_OFM_REGION"; |
| 15569 | v.disassemble(fields); |
| 15570 | break; |
| 15571 | } |
| 15572 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15573 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1): |
| 15574 | { |
| 15575 | const npu_set_kernel_width_m1_t &v = *reinterpret_cast<const npu_set_kernel_width_m1_t *>(in); |
| 15576 | op = "NPU_SET_KERNEL_WIDTH_M1"; |
| 15577 | v.disassemble(fields); |
| 15578 | break; |
| 15579 | } |
| 15580 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15581 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1): |
| 15582 | { |
| 15583 | const npu_set_kernel_height_m1_t &v = *reinterpret_cast<const npu_set_kernel_height_m1_t *>(in); |
| 15584 | op = "NPU_SET_KERNEL_HEIGHT_M1"; |
| 15585 | v.disassemble(fields); |
| 15586 | break; |
| 15587 | } |
| 15588 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15589 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE): |
| 15590 | { |
| 15591 | const npu_set_kernel_stride_t &v = *reinterpret_cast<const npu_set_kernel_stride_t *>(in); |
| 15592 | op = "NPU_SET_KERNEL_STRIDE"; |
| 15593 | v.disassemble(fields); |
| 15594 | break; |
| 15595 | } |
| 15596 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15597 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE): |
| 15598 | { |
| 15599 | const npu_set_parallel_mode_t &v = *reinterpret_cast<const npu_set_parallel_mode_t *>(in); |
| 15600 | op = "NPU_SET_PARALLEL_MODE"; |
| 15601 | v.disassemble(fields); |
| 15602 | break; |
| 15603 | } |
| 15604 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15605 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT): |
| 15606 | { |
| 15607 | const npu_set_acc_format_t &v = *reinterpret_cast<const npu_set_acc_format_t *>(in); |
| 15608 | op = "NPU_SET_ACC_FORMAT"; |
| 15609 | v.disassemble(fields); |
| 15610 | break; |
| 15611 | } |
| 15612 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15613 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION): |
| 15614 | { |
| 15615 | const npu_set_activation_t &v = *reinterpret_cast<const npu_set_activation_t *>(in); |
| 15616 | op = "NPU_SET_ACTIVATION"; |
| 15617 | v.disassemble(fields); |
| 15618 | break; |
| 15619 | } |
| 15620 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15621 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN): |
| 15622 | { |
| 15623 | const npu_set_activation_min_t &v = *reinterpret_cast<const npu_set_activation_min_t *>(in); |
| 15624 | op = "NPU_SET_ACTIVATION_MIN"; |
| 15625 | v.disassemble(fields); |
| 15626 | break; |
| 15627 | } |
| 15628 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15629 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX): |
| 15630 | { |
| 15631 | const npu_set_activation_max_t &v = *reinterpret_cast<const npu_set_activation_max_t *>(in); |
| 15632 | op = "NPU_SET_ACTIVATION_MAX"; |
| 15633 | v.disassemble(fields); |
| 15634 | break; |
| 15635 | } |
| 15636 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15637 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION): |
| 15638 | { |
| 15639 | const npu_set_weight_region_t &v = *reinterpret_cast<const npu_set_weight_region_t *>(in); |
| 15640 | op = "NPU_SET_WEIGHT_REGION"; |
| 15641 | v.disassemble(fields); |
| 15642 | break; |
| 15643 | } |
| 15644 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15645 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION): |
| 15646 | { |
| 15647 | const npu_set_scale_region_t &v = *reinterpret_cast<const npu_set_scale_region_t *>(in); |
| 15648 | op = "NPU_SET_SCALE_REGION"; |
| 15649 | v.disassemble(fields); |
| 15650 | break; |
| 15651 | } |
| 15652 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15653 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START): |
| 15654 | { |
| 15655 | const npu_set_ab_start_t &v = *reinterpret_cast<const npu_set_ab_start_t *>(in); |
| 15656 | op = "NPU_SET_AB_START"; |
| 15657 | v.disassemble(fields); |
| 15658 | break; |
| 15659 | } |
| 15660 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15661 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP): |
| 15662 | { |
| 15663 | const npu_set_blockdep_t &v = *reinterpret_cast<const npu_set_blockdep_t *>(in); |
| 15664 | op = "NPU_SET_BLOCKDEP"; |
| 15665 | v.disassemble(fields); |
| 15666 | break; |
| 15667 | } |
| 15668 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15669 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION): |
| 15670 | { |
| 15671 | const npu_set_dma0_src_region_t &v = *reinterpret_cast<const npu_set_dma0_src_region_t *>(in); |
| 15672 | op = "NPU_SET_DMA0_SRC_REGION"; |
| 15673 | v.disassemble(fields); |
| 15674 | break; |
| 15675 | } |
| 15676 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15677 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION): |
| 15678 | { |
| 15679 | const npu_set_dma0_dst_region_t &v = *reinterpret_cast<const npu_set_dma0_dst_region_t *>(in); |
| 15680 | op = "NPU_SET_DMA0_DST_REGION"; |
| 15681 | v.disassemble(fields); |
| 15682 | break; |
| 15683 | } |
| 15684 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15685 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0): |
| 15686 | { |
| 15687 | const npu_set_dma0_size0_t &v = *reinterpret_cast<const npu_set_dma0_size0_t *>(in); |
| 15688 | op = "NPU_SET_DMA0_SIZE0"; |
| 15689 | v.disassemble(fields); |
| 15690 | break; |
| 15691 | } |
| 15692 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15693 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1): |
| 15694 | { |
| 15695 | const npu_set_dma0_size1_t &v = *reinterpret_cast<const npu_set_dma0_size1_t *>(in); |
| 15696 | op = "NPU_SET_DMA0_SIZE1"; |
| 15697 | v.disassemble(fields); |
| 15698 | break; |
| 15699 | } |
| 15700 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15701 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST): |
| 15702 | { |
| 15703 | const npu_set_ifm2_broadcast_t &v = *reinterpret_cast<const npu_set_ifm2_broadcast_t *>(in); |
| 15704 | op = "NPU_SET_IFM2_BROADCAST"; |
| 15705 | v.disassemble(fields); |
| 15706 | break; |
| 15707 | } |
| 15708 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15709 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR): |
| 15710 | { |
| 15711 | const npu_set_ifm2_scalar_t &v = *reinterpret_cast<const npu_set_ifm2_scalar_t *>(in); |
| 15712 | op = "NPU_SET_IFM2_SCALAR"; |
| 15713 | v.disassemble(fields); |
| 15714 | break; |
| 15715 | } |
| 15716 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15717 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION): |
| 15718 | { |
| 15719 | const npu_set_ifm2_precision_t &v = *reinterpret_cast<const npu_set_ifm2_precision_t *>(in); |
| 15720 | op = "NPU_SET_IFM2_PRECISION"; |
| 15721 | v.disassemble(fields); |
| 15722 | break; |
| 15723 | } |
| 15724 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15725 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT): |
| 15726 | { |
| 15727 | const npu_set_ifm2_zero_point_t &v = *reinterpret_cast<const npu_set_ifm2_zero_point_t *>(in); |
| 15728 | op = "NPU_SET_IFM2_ZERO_POINT"; |
| 15729 | v.disassemble(fields); |
| 15730 | break; |
| 15731 | } |
| 15732 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15733 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1): |
| 15734 | { |
| 15735 | const npu_set_ifm2_width0_m1_t &v = *reinterpret_cast<const npu_set_ifm2_width0_m1_t *>(in); |
| 15736 | op = "NPU_SET_IFM2_WIDTH0_M1"; |
| 15737 | v.disassemble(fields); |
| 15738 | break; |
| 15739 | } |
| 15740 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15741 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1): |
| 15742 | { |
| 15743 | const npu_set_ifm2_height0_m1_t &v = *reinterpret_cast<const npu_set_ifm2_height0_m1_t *>(in); |
| 15744 | op = "NPU_SET_IFM2_HEIGHT0_M1"; |
| 15745 | v.disassemble(fields); |
| 15746 | break; |
| 15747 | } |
| 15748 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15749 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1): |
| 15750 | { |
| 15751 | const npu_set_ifm2_height1_m1_t &v = *reinterpret_cast<const npu_set_ifm2_height1_m1_t *>(in); |
| 15752 | op = "NPU_SET_IFM2_HEIGHT1_M1"; |
| 15753 | v.disassemble(fields); |
| 15754 | break; |
| 15755 | } |
| 15756 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15757 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START): |
| 15758 | { |
| 15759 | const npu_set_ifm2_ib_start_t &v = *reinterpret_cast<const npu_set_ifm2_ib_start_t *>(in); |
| 15760 | op = "NPU_SET_IFM2_IB_START"; |
| 15761 | v.disassemble(fields); |
| 15762 | break; |
| 15763 | } |
| 15764 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL) << 14) | |
| 15765 | static_cast<uint32_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION): |
| 15766 | { |
| 15767 | const npu_set_ifm2_region_t &v = *reinterpret_cast<const npu_set_ifm2_region_t *>(in); |
| 15768 | op = "NPU_SET_IFM2_REGION"; |
| 15769 | v.disassemble(fields); |
| 15770 | break; |
| 15771 | } |
| 15772 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15773 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0): |
| 15774 | { |
| 15775 | const npu_set_ifm_base0_t &v = *reinterpret_cast<const npu_set_ifm_base0_t *>(in); |
| 15776 | op = "NPU_SET_IFM_BASE0"; |
| 15777 | v.disassemble(fields); |
| 15778 | break; |
| 15779 | } |
| 15780 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15781 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1): |
| 15782 | { |
| 15783 | const npu_set_ifm_base1_t &v = *reinterpret_cast<const npu_set_ifm_base1_t *>(in); |
| 15784 | op = "NPU_SET_IFM_BASE1"; |
| 15785 | v.disassemble(fields); |
| 15786 | break; |
| 15787 | } |
| 15788 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15789 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2): |
| 15790 | { |
| 15791 | const npu_set_ifm_base2_t &v = *reinterpret_cast<const npu_set_ifm_base2_t *>(in); |
| 15792 | op = "NPU_SET_IFM_BASE2"; |
| 15793 | v.disassemble(fields); |
| 15794 | break; |
| 15795 | } |
| 15796 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15797 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3): |
| 15798 | { |
| 15799 | const npu_set_ifm_base3_t &v = *reinterpret_cast<const npu_set_ifm_base3_t *>(in); |
| 15800 | op = "NPU_SET_IFM_BASE3"; |
| 15801 | v.disassemble(fields); |
| 15802 | break; |
| 15803 | } |
| 15804 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15805 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X): |
| 15806 | { |
| 15807 | const npu_set_ifm_stride_x_t &v = *reinterpret_cast<const npu_set_ifm_stride_x_t *>(in); |
| 15808 | op = "NPU_SET_IFM_STRIDE_X"; |
| 15809 | v.disassemble(fields); |
| 15810 | break; |
| 15811 | } |
| 15812 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15813 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y): |
| 15814 | { |
| 15815 | const npu_set_ifm_stride_y_t &v = *reinterpret_cast<const npu_set_ifm_stride_y_t *>(in); |
| 15816 | op = "NPU_SET_IFM_STRIDE_Y"; |
| 15817 | v.disassemble(fields); |
| 15818 | break; |
| 15819 | } |
| 15820 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15821 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C): |
| 15822 | { |
| 15823 | const npu_set_ifm_stride_c_t &v = *reinterpret_cast<const npu_set_ifm_stride_c_t *>(in); |
| 15824 | op = "NPU_SET_IFM_STRIDE_C"; |
| 15825 | v.disassemble(fields); |
| 15826 | break; |
| 15827 | } |
| 15828 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15829 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0): |
| 15830 | { |
| 15831 | const npu_set_ofm_base0_t &v = *reinterpret_cast<const npu_set_ofm_base0_t *>(in); |
| 15832 | op = "NPU_SET_OFM_BASE0"; |
| 15833 | v.disassemble(fields); |
| 15834 | break; |
| 15835 | } |
| 15836 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15837 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1): |
| 15838 | { |
| 15839 | const npu_set_ofm_base1_t &v = *reinterpret_cast<const npu_set_ofm_base1_t *>(in); |
| 15840 | op = "NPU_SET_OFM_BASE1"; |
| 15841 | v.disassemble(fields); |
| 15842 | break; |
| 15843 | } |
| 15844 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15845 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2): |
| 15846 | { |
| 15847 | const npu_set_ofm_base2_t &v = *reinterpret_cast<const npu_set_ofm_base2_t *>(in); |
| 15848 | op = "NPU_SET_OFM_BASE2"; |
| 15849 | v.disassemble(fields); |
| 15850 | break; |
| 15851 | } |
| 15852 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15853 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3): |
| 15854 | { |
| 15855 | const npu_set_ofm_base3_t &v = *reinterpret_cast<const npu_set_ofm_base3_t *>(in); |
| 15856 | op = "NPU_SET_OFM_BASE3"; |
| 15857 | v.disassemble(fields); |
| 15858 | break; |
| 15859 | } |
| 15860 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15861 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X): |
| 15862 | { |
| 15863 | const npu_set_ofm_stride_x_t &v = *reinterpret_cast<const npu_set_ofm_stride_x_t *>(in); |
| 15864 | op = "NPU_SET_OFM_STRIDE_X"; |
| 15865 | v.disassemble(fields); |
| 15866 | break; |
| 15867 | } |
| 15868 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15869 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y): |
| 15870 | { |
| 15871 | const npu_set_ofm_stride_y_t &v = *reinterpret_cast<const npu_set_ofm_stride_y_t *>(in); |
| 15872 | op = "NPU_SET_OFM_STRIDE_Y"; |
| 15873 | v.disassemble(fields); |
| 15874 | break; |
| 15875 | } |
| 15876 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15877 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C): |
| 15878 | { |
| 15879 | const npu_set_ofm_stride_c_t &v = *reinterpret_cast<const npu_set_ofm_stride_c_t *>(in); |
| 15880 | op = "NPU_SET_OFM_STRIDE_C"; |
| 15881 | v.disassemble(fields); |
| 15882 | break; |
| 15883 | } |
| 15884 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15885 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE): |
| 15886 | { |
| 15887 | const npu_set_weight_base_t &v = *reinterpret_cast<const npu_set_weight_base_t *>(in); |
| 15888 | op = "NPU_SET_WEIGHT_BASE"; |
| 15889 | v.disassemble(fields); |
| 15890 | break; |
| 15891 | } |
| 15892 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15893 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH): |
| 15894 | { |
| 15895 | const npu_set_weight_length_t &v = *reinterpret_cast<const npu_set_weight_length_t *>(in); |
| 15896 | op = "NPU_SET_WEIGHT_LENGTH"; |
| 15897 | v.disassemble(fields); |
| 15898 | break; |
| 15899 | } |
| 15900 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15901 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE): |
| 15902 | { |
| 15903 | const npu_set_scale_base_t &v = *reinterpret_cast<const npu_set_scale_base_t *>(in); |
| 15904 | op = "NPU_SET_SCALE_BASE"; |
| 15905 | v.disassemble(fields); |
| 15906 | break; |
| 15907 | } |
| 15908 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15909 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH): |
| 15910 | { |
| 15911 | const npu_set_scale_length_t &v = *reinterpret_cast<const npu_set_scale_length_t *>(in); |
| 15912 | op = "NPU_SET_SCALE_LENGTH"; |
| 15913 | v.disassemble(fields); |
| 15914 | break; |
| 15915 | } |
| 15916 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15917 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE): |
| 15918 | { |
| 15919 | const npu_set_ofm_scale_t &v = *reinterpret_cast<const npu_set_ofm_scale_t *>(in); |
| 15920 | op = "NPU_SET_OFM_SCALE"; |
| 15921 | v.disassemble(fields); |
| 15922 | break; |
| 15923 | } |
| 15924 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15925 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE): |
| 15926 | { |
| 15927 | const npu_set_opa_scale_t &v = *reinterpret_cast<const npu_set_opa_scale_t *>(in); |
| 15928 | op = "NPU_SET_OPA_SCALE"; |
| 15929 | v.disassemble(fields); |
| 15930 | break; |
| 15931 | } |
| 15932 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15933 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE): |
| 15934 | { |
| 15935 | const npu_set_opb_scale_t &v = *reinterpret_cast<const npu_set_opb_scale_t *>(in); |
| 15936 | op = "NPU_SET_OPB_SCALE"; |
| 15937 | v.disassemble(fields); |
| 15938 | break; |
| 15939 | } |
| 15940 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15941 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC): |
| 15942 | { |
| 15943 | const npu_set_dma0_src_t &v = *reinterpret_cast<const npu_set_dma0_src_t *>(in); |
| 15944 | op = "NPU_SET_DMA0_SRC"; |
| 15945 | v.disassemble(fields); |
| 15946 | break; |
| 15947 | } |
| 15948 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15949 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST): |
| 15950 | { |
| 15951 | const npu_set_dma0_dst_t &v = *reinterpret_cast<const npu_set_dma0_dst_t *>(in); |
| 15952 | op = "NPU_SET_DMA0_DST"; |
| 15953 | v.disassemble(fields); |
| 15954 | break; |
| 15955 | } |
| 15956 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15957 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN): |
| 15958 | { |
| 15959 | const npu_set_dma0_len_t &v = *reinterpret_cast<const npu_set_dma0_len_t *>(in); |
| 15960 | op = "NPU_SET_DMA0_LEN"; |
| 15961 | v.disassemble(fields); |
| 15962 | break; |
| 15963 | } |
| 15964 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15965 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0): |
| 15966 | { |
| 15967 | const npu_set_dma0_skip0_t &v = *reinterpret_cast<const npu_set_dma0_skip0_t *>(in); |
| 15968 | op = "NPU_SET_DMA0_SKIP0"; |
| 15969 | v.disassemble(fields); |
| 15970 | break; |
| 15971 | } |
| 15972 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15973 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1): |
| 15974 | { |
| 15975 | const npu_set_dma0_skip1_t &v = *reinterpret_cast<const npu_set_dma0_skip1_t *>(in); |
| 15976 | op = "NPU_SET_DMA0_SKIP1"; |
| 15977 | v.disassemble(fields); |
| 15978 | break; |
| 15979 | } |
| 15980 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15981 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0): |
| 15982 | { |
| 15983 | const npu_set_ifm2_base0_t &v = *reinterpret_cast<const npu_set_ifm2_base0_t *>(in); |
| 15984 | op = "NPU_SET_IFM2_BASE0"; |
| 15985 | v.disassemble(fields); |
| 15986 | break; |
| 15987 | } |
| 15988 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15989 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1): |
| 15990 | { |
| 15991 | const npu_set_ifm2_base1_t &v = *reinterpret_cast<const npu_set_ifm2_base1_t *>(in); |
| 15992 | op = "NPU_SET_IFM2_BASE1"; |
| 15993 | v.disassemble(fields); |
| 15994 | break; |
| 15995 | } |
| 15996 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 15997 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2): |
| 15998 | { |
| 15999 | const npu_set_ifm2_base2_t &v = *reinterpret_cast<const npu_set_ifm2_base2_t *>(in); |
| 16000 | op = "NPU_SET_IFM2_BASE2"; |
| 16001 | v.disassemble(fields); |
| 16002 | break; |
| 16003 | } |
| 16004 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 16005 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3): |
| 16006 | { |
| 16007 | const npu_set_ifm2_base3_t &v = *reinterpret_cast<const npu_set_ifm2_base3_t *>(in); |
| 16008 | op = "NPU_SET_IFM2_BASE3"; |
| 16009 | v.disassemble(fields); |
| 16010 | break; |
| 16011 | } |
| 16012 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 16013 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X): |
| 16014 | { |
| 16015 | const npu_set_ifm2_stride_x_t &v = *reinterpret_cast<const npu_set_ifm2_stride_x_t *>(in); |
| 16016 | op = "NPU_SET_IFM2_STRIDE_X"; |
| 16017 | v.disassemble(fields); |
| 16018 | break; |
| 16019 | } |
| 16020 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 16021 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y): |
| 16022 | { |
| 16023 | const npu_set_ifm2_stride_y_t &v = *reinterpret_cast<const npu_set_ifm2_stride_y_t *>(in); |
| 16024 | op = "NPU_SET_IFM2_STRIDE_Y"; |
| 16025 | v.disassemble(fields); |
| 16026 | break; |
| 16027 | } |
| 16028 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 16029 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C): |
| 16030 | { |
| 16031 | const npu_set_ifm2_stride_c_t &v = *reinterpret_cast<const npu_set_ifm2_stride_c_t *>(in); |
| 16032 | op = "NPU_SET_IFM2_STRIDE_C"; |
| 16033 | v.disassemble(fields); |
| 16034 | break; |
| 16035 | } |
| 16036 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 16037 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE): |
| 16038 | { |
| 16039 | const npu_set_weight1_base_t &v = *reinterpret_cast<const npu_set_weight1_base_t *>(in); |
| 16040 | op = "NPU_SET_WEIGHT1_BASE"; |
| 16041 | v.disassemble(fields); |
| 16042 | break; |
| 16043 | } |
| 16044 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 16045 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH): |
| 16046 | { |
| 16047 | const npu_set_weight1_length_t &v = *reinterpret_cast<const npu_set_weight1_length_t *>(in); |
| 16048 | op = "NPU_SET_WEIGHT1_LENGTH"; |
| 16049 | v.disassemble(fields); |
| 16050 | break; |
| 16051 | } |
| 16052 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 16053 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE): |
| 16054 | { |
| 16055 | const npu_set_scale1_base_t &v = *reinterpret_cast<const npu_set_scale1_base_t *>(in); |
| 16056 | op = "NPU_SET_SCALE1_BASE"; |
| 16057 | v.disassemble(fields); |
| 16058 | break; |
| 16059 | } |
| 16060 | case (static_cast<uint32_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL) << 14) | |
| 16061 | static_cast<uint32_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH): |
| 16062 | { |
| 16063 | const npu_set_scale1_length_t &v = *reinterpret_cast<const npu_set_scale1_length_t *>(in); |
| 16064 | op = "NPU_SET_SCALE1_LENGTH"; |
| 16065 | v.disassemble(fields); |
| 16066 | break; |
| 16067 | } |
| 16068 | } |
| 16069 | return (*in & (3 << 14)) != 0 ? 2 : 1; |
| 16070 | } |
| 16071 | #endif |
| 16072 | #endif |
| 16073 | // Signal the end of command stream |
| 16074 | struct npu_op_stop_t |
| 16075 | { |
| 16076 | #ifdef __cplusplus |
| 16077 | private: |
| 16078 | #endif |
| 16079 | uint32_t opcode : 10; // opcode |
| 16080 | uint32_t reserved0 : 4; |
| 16081 | uint32_t control : 2; // control |
| 16082 | uint32_t mask : 16; // Encoding for 16-bit mask value |
| 16083 | #ifdef __cplusplus |
| 16084 | public: |
| 16085 | npu_op_stop_t(uint32_t _mask) : |
| 16086 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP)), reserved0(0), |
| 16087 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16088 | mask(static_cast<uint16_t>(_mask) & ((1U << 16) - 1)) |
| 16089 | { |
| 16090 | } |
| 16091 | CONSTEXPR npu_op_stop_t() : |
| 16092 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP)), reserved0(0), |
| 16093 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), mask(0) |
| 16094 | { |
| 16095 | } |
| 16096 | CONSTEXPR bool valid() const |
| 16097 | { |
| 16098 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP) && |
| 16099 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16100 | } |
| 16101 | CONSTEXPR void init() |
| 16102 | { |
| 16103 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_STOP); |
| 16104 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16105 | } |
| 16106 | operator uint32_t() |
| 16107 | { |
| 16108 | uint32_t word; |
| 16109 | std::memcpy(&word, this, sizeof(word)); |
| 16110 | return word; |
| 16111 | } |
| 16112 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16113 | { |
| 16114 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16115 | } |
| 16116 | CONSTEXPR npu_op_stop_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16117 | { |
| 16118 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16119 | return *this; |
| 16120 | } |
| 16121 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16122 | { |
| 16123 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16124 | } |
| 16125 | CONSTEXPR npu_op_stop_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16126 | { |
| 16127 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16128 | return *this; |
| 16129 | } |
| 16130 | CONSTEXPR uint32_t get_mask() const |
| 16131 | { |
| 16132 | return static_cast<uint32_t>(mask); |
| 16133 | } |
| 16134 | CONSTEXPR npu_op_stop_t &set_mask(uint32_t value) |
| 16135 | { |
| 16136 | mask = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 16137 | return *this; |
| 16138 | } |
| 16139 | #ifdef NPU_DISASSEMBLE |
| 16140 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16141 | { |
| 16142 | fields.push_back(std::make_pair<std::string, std::string>("mask", std::to_string(mask))); |
| 16143 | } |
| 16144 | #endif |
| 16145 | #endif |
| 16146 | }; |
| 16147 | // Raises an IRQ to the host |
| 16148 | struct npu_op_irq_t |
| 16149 | { |
| 16150 | #ifdef __cplusplus |
| 16151 | private: |
| 16152 | #endif |
| 16153 | uint32_t opcode : 10; // opcode |
| 16154 | uint32_t reserved0 : 4; |
| 16155 | uint32_t control : 2; // control |
| 16156 | uint32_t mask : 16; // Encoding for 16-bit mask value |
| 16157 | #ifdef __cplusplus |
| 16158 | public: |
| 16159 | npu_op_irq_t(uint32_t _mask) : |
| 16160 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ)), reserved0(0), |
| 16161 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16162 | mask(static_cast<uint16_t>(_mask) & ((1U << 16) - 1)) |
| 16163 | { |
| 16164 | } |
| 16165 | CONSTEXPR npu_op_irq_t() : |
| 16166 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ)), reserved0(0), |
| 16167 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), mask(0) |
| 16168 | { |
| 16169 | } |
| 16170 | CONSTEXPR bool valid() const |
| 16171 | { |
| 16172 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ) && |
| 16173 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16174 | } |
| 16175 | CONSTEXPR void init() |
| 16176 | { |
| 16177 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_IRQ); |
| 16178 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16179 | } |
| 16180 | operator uint32_t() |
| 16181 | { |
| 16182 | uint32_t word; |
| 16183 | std::memcpy(&word, this, sizeof(word)); |
| 16184 | return word; |
| 16185 | } |
| 16186 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16187 | { |
| 16188 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16189 | } |
| 16190 | CONSTEXPR npu_op_irq_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16191 | { |
| 16192 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16193 | return *this; |
| 16194 | } |
| 16195 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16196 | { |
| 16197 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16198 | } |
| 16199 | CONSTEXPR npu_op_irq_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16200 | { |
| 16201 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16202 | return *this; |
| 16203 | } |
| 16204 | CONSTEXPR uint32_t get_mask() const |
| 16205 | { |
| 16206 | return static_cast<uint32_t>(mask); |
| 16207 | } |
| 16208 | CONSTEXPR npu_op_irq_t &set_mask(uint32_t value) |
| 16209 | { |
| 16210 | mask = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 16211 | return *this; |
| 16212 | } |
| 16213 | #ifdef NPU_DISASSEMBLE |
| 16214 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16215 | { |
| 16216 | fields.push_back(std::make_pair<std::string, std::string>("mask", std::to_string(mask))); |
| 16217 | } |
| 16218 | #endif |
| 16219 | #endif |
| 16220 | }; |
| 16221 | // 2D convolution |
| 16222 | struct npu_op_conv_t |
| 16223 | { |
| 16224 | #ifdef __cplusplus |
| 16225 | private: |
| 16226 | #endif |
| 16227 | uint32_t opcode : 10; // opcode |
| 16228 | uint32_t reserved0 : 4; |
| 16229 | uint32_t control : 2; // control |
| 16230 | uint32_t reserved1 : 16; |
| 16231 | #ifdef __cplusplus |
| 16232 | public: |
| 16233 | CONSTEXPR npu_op_conv_t() : |
| 16234 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV)), reserved0(0), |
| 16235 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), reserved1(0) |
| 16236 | { |
| 16237 | } |
| 16238 | CONSTEXPR bool valid() const |
| 16239 | { |
| 16240 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV) && |
| 16241 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16242 | } |
| 16243 | CONSTEXPR void init() |
| 16244 | { |
| 16245 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_CONV); |
| 16246 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16247 | } |
| 16248 | operator uint32_t() |
| 16249 | { |
| 16250 | uint32_t word; |
| 16251 | std::memcpy(&word, this, sizeof(word)); |
| 16252 | return word; |
| 16253 | } |
| 16254 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16255 | { |
| 16256 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16257 | } |
| 16258 | CONSTEXPR npu_op_conv_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16259 | { |
| 16260 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16261 | return *this; |
| 16262 | } |
| 16263 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16264 | { |
| 16265 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16266 | } |
| 16267 | CONSTEXPR npu_op_conv_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16268 | { |
| 16269 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16270 | return *this; |
| 16271 | } |
| 16272 | #ifdef NPU_DISASSEMBLE |
| 16273 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const {} |
| 16274 | #endif |
| 16275 | #endif |
| 16276 | }; |
| 16277 | // Depth-wise 2D convolution |
| 16278 | struct npu_op_depthwise_t |
| 16279 | { |
| 16280 | #ifdef __cplusplus |
| 16281 | private: |
| 16282 | #endif |
| 16283 | uint32_t opcode : 10; // opcode |
| 16284 | uint32_t reserved0 : 4; |
| 16285 | uint32_t control : 2; // control |
| 16286 | uint32_t reserved1 : 16; |
| 16287 | #ifdef __cplusplus |
| 16288 | public: |
| 16289 | CONSTEXPR npu_op_depthwise_t() : |
| 16290 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE)), reserved0(0), |
| 16291 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), reserved1(0) |
| 16292 | { |
| 16293 | } |
| 16294 | CONSTEXPR bool valid() const |
| 16295 | { |
| 16296 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE) && |
| 16297 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16298 | } |
| 16299 | CONSTEXPR void init() |
| 16300 | { |
| 16301 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DEPTHWISE); |
| 16302 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16303 | } |
| 16304 | operator uint32_t() |
| 16305 | { |
| 16306 | uint32_t word; |
| 16307 | std::memcpy(&word, this, sizeof(word)); |
| 16308 | return word; |
| 16309 | } |
| 16310 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16311 | { |
| 16312 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16313 | } |
| 16314 | CONSTEXPR npu_op_depthwise_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16315 | { |
| 16316 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16317 | return *this; |
| 16318 | } |
| 16319 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16320 | { |
| 16321 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16322 | } |
| 16323 | CONSTEXPR npu_op_depthwise_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16324 | { |
| 16325 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16326 | return *this; |
| 16327 | } |
| 16328 | #ifdef NPU_DISASSEMBLE |
| 16329 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const {} |
| 16330 | #endif |
| 16331 | #endif |
| 16332 | }; |
| 16333 | // Pooling |
| 16334 | struct npu_op_pool_t |
| 16335 | { |
| 16336 | #ifdef __cplusplus |
| 16337 | private: |
| 16338 | #endif |
| 16339 | uint32_t opcode : 10; // opcode |
| 16340 | uint32_t reserved0 : 4; |
| 16341 | uint32_t control : 2; // control |
| 16342 | uint32_t pooling_mode : 3; // Pooling mode |
| 16343 | uint32_t reserved1 : 13; |
| 16344 | #ifdef __cplusplus |
| 16345 | public: |
| 16346 | npu_op_pool_t(NPU_NAMESPACE::pooling_mode _pooling_mode) : |
| 16347 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL)), reserved0(0), |
| 16348 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16349 | pooling_mode(static_cast<uint8_t>(_pooling_mode) & ((1U << 3) - 1)), reserved1(0) |
| 16350 | { |
| 16351 | } |
| 16352 | CONSTEXPR npu_op_pool_t() : |
| 16353 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL)), reserved0(0), |
| 16354 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pooling_mode(0), reserved1(0) |
| 16355 | { |
| 16356 | } |
| 16357 | CONSTEXPR bool valid() const |
| 16358 | { |
| 16359 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL) && |
| 16360 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16361 | } |
| 16362 | CONSTEXPR void init() |
| 16363 | { |
| 16364 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_POOL); |
| 16365 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16366 | } |
| 16367 | operator uint32_t() |
| 16368 | { |
| 16369 | uint32_t word; |
| 16370 | std::memcpy(&word, this, sizeof(word)); |
| 16371 | return word; |
| 16372 | } |
| 16373 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16374 | { |
| 16375 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16376 | } |
| 16377 | CONSTEXPR npu_op_pool_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16378 | { |
| 16379 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16380 | return *this; |
| 16381 | } |
| 16382 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16383 | { |
| 16384 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16385 | } |
| 16386 | CONSTEXPR npu_op_pool_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16387 | { |
| 16388 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16389 | return *this; |
| 16390 | } |
| 16391 | CONSTEXPR NPU_NAMESPACE::pooling_mode get_pooling_mode() const |
| 16392 | { |
| 16393 | return static_cast<NPU_NAMESPACE::pooling_mode>(pooling_mode); |
| 16394 | } |
| 16395 | CONSTEXPR npu_op_pool_t &set_pooling_mode(NPU_NAMESPACE::pooling_mode value) |
| 16396 | { |
| 16397 | pooling_mode = static_cast<uint8_t>(value) & ((1U << 3) - 1); |
| 16398 | return *this; |
| 16399 | } |
| 16400 | #ifdef NPU_DISASSEMBLE |
| 16401 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16402 | { |
| 16403 | fields.push_back(std::make_pair<std::string, std::string>( |
| 16404 | "pooling_mode", |
| 16405 | (pooling_mode < (sizeof(pooling_mode_str) / sizeof(pooling_mode_str[0])) ? |
| 16406 | pooling_mode_str[pooling_mode] : |
| 16407 | "****"))); |
| 16408 | } |
| 16409 | #endif |
| 16410 | #endif |
| 16411 | }; |
| 16412 | // Elementwise operation |
| 16413 | struct npu_op_elementwise_t |
| 16414 | { |
| 16415 | #ifdef __cplusplus |
| 16416 | private: |
| 16417 | #endif |
| 16418 | uint32_t opcode : 10; // opcode |
| 16419 | uint32_t reserved0 : 4; |
| 16420 | uint32_t control : 2; // control |
| 16421 | uint32_t elementwise_mode : 6; // Elementwise mode |
| 16422 | uint32_t reserved1 : 10; |
| 16423 | #ifdef __cplusplus |
| 16424 | public: |
| 16425 | npu_op_elementwise_t(NPU_NAMESPACE::elementwise_mode _elementwise_mode) : |
| 16426 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE)), reserved0(0), |
| 16427 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16428 | elementwise_mode(static_cast<uint8_t>(_elementwise_mode) & ((1U << 6) - 1)), reserved1(0) |
| 16429 | { |
| 16430 | } |
| 16431 | CONSTEXPR npu_op_elementwise_t() : |
| 16432 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE)), reserved0(0), |
| 16433 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), elementwise_mode(0), reserved1(0) |
| 16434 | { |
| 16435 | } |
| 16436 | CONSTEXPR bool valid() const |
| 16437 | { |
| 16438 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE) && |
| 16439 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16440 | } |
| 16441 | CONSTEXPR void init() |
| 16442 | { |
| 16443 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_ELEMENTWISE); |
| 16444 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16445 | } |
| 16446 | operator uint32_t() |
| 16447 | { |
| 16448 | uint32_t word; |
| 16449 | std::memcpy(&word, this, sizeof(word)); |
| 16450 | return word; |
| 16451 | } |
| 16452 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16453 | { |
| 16454 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16455 | } |
| 16456 | CONSTEXPR npu_op_elementwise_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16457 | { |
| 16458 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16459 | return *this; |
| 16460 | } |
| 16461 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16462 | { |
| 16463 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16464 | } |
| 16465 | CONSTEXPR npu_op_elementwise_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16466 | { |
| 16467 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16468 | return *this; |
| 16469 | } |
| 16470 | CONSTEXPR NPU_NAMESPACE::elementwise_mode get_elementwise_mode() const |
| 16471 | { |
| 16472 | return static_cast<NPU_NAMESPACE::elementwise_mode>(elementwise_mode); |
| 16473 | } |
| 16474 | CONSTEXPR npu_op_elementwise_t &set_elementwise_mode(NPU_NAMESPACE::elementwise_mode value) |
| 16475 | { |
| 16476 | elementwise_mode = static_cast<uint8_t>(value) & ((1U << 6) - 1); |
| 16477 | return *this; |
| 16478 | } |
| 16479 | #ifdef NPU_DISASSEMBLE |
| 16480 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16481 | { |
| 16482 | fields.push_back(std::make_pair<std::string, std::string>( |
| 16483 | "elementwise_mode", |
| 16484 | (elementwise_mode < (sizeof(elementwise_mode_str) / sizeof(elementwise_mode_str[0])) ? |
| 16485 | elementwise_mode_str[elementwise_mode] : |
| 16486 | "****"))); |
| 16487 | } |
| 16488 | #endif |
| 16489 | #endif |
| 16490 | }; |
| 16491 | // Queue new DMA for the given channel |
| 16492 | struct npu_op_dma_start_t |
| 16493 | { |
| 16494 | #ifdef __cplusplus |
| 16495 | private: |
| 16496 | #endif |
| 16497 | uint32_t opcode : 10; // opcode |
| 16498 | uint32_t reserved0 : 4; |
| 16499 | uint32_t control : 2; // control |
| 16500 | uint32_t reserved1 : 16; |
| 16501 | #ifdef __cplusplus |
| 16502 | public: |
| 16503 | CONSTEXPR npu_op_dma_start_t() : |
| 16504 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START)), reserved0(0), |
| 16505 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), reserved1(0) |
| 16506 | { |
| 16507 | } |
| 16508 | CONSTEXPR bool valid() const |
| 16509 | { |
| 16510 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START) && |
| 16511 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16512 | } |
| 16513 | CONSTEXPR void init() |
| 16514 | { |
| 16515 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_START); |
| 16516 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16517 | } |
| 16518 | operator uint32_t() |
| 16519 | { |
| 16520 | uint32_t word; |
| 16521 | std::memcpy(&word, this, sizeof(word)); |
| 16522 | return word; |
| 16523 | } |
| 16524 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16525 | { |
| 16526 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16527 | } |
| 16528 | CONSTEXPR npu_op_dma_start_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16529 | { |
| 16530 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16531 | return *this; |
| 16532 | } |
| 16533 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16534 | { |
| 16535 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16536 | } |
| 16537 | CONSTEXPR npu_op_dma_start_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16538 | { |
| 16539 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16540 | return *this; |
| 16541 | } |
| 16542 | #ifdef NPU_DISASSEMBLE |
| 16543 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const {} |
| 16544 | #endif |
| 16545 | #endif |
| 16546 | }; |
| 16547 | // Wait for the DMA channel to have k or fewer active descriptors outstanding |
| 16548 | struct npu_op_dma_wait_t |
| 16549 | { |
| 16550 | #ifdef __cplusplus |
| 16551 | private: |
| 16552 | #endif |
| 16553 | uint32_t opcode : 10; // opcode |
| 16554 | uint32_t reserved0 : 4; |
| 16555 | uint32_t control : 2; // control |
| 16556 | uint32_t k : 4; // Number of outstanding descriptors |
| 16557 | uint32_t reserved1 : 12; |
| 16558 | #ifdef __cplusplus |
| 16559 | public: |
| 16560 | npu_op_dma_wait_t(uint32_t _k) : |
| 16561 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT)), reserved0(0), |
| 16562 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16563 | k(static_cast<uint8_t>(_k) & ((1U << 4) - 1)), reserved1(0) |
| 16564 | { |
| 16565 | } |
| 16566 | CONSTEXPR npu_op_dma_wait_t() : |
| 16567 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT)), reserved0(0), |
| 16568 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), k(0), reserved1(0) |
| 16569 | { |
| 16570 | } |
| 16571 | CONSTEXPR bool valid() const |
| 16572 | { |
| 16573 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT) && |
| 16574 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16575 | } |
| 16576 | CONSTEXPR void init() |
| 16577 | { |
| 16578 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_DMA_WAIT); |
| 16579 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16580 | } |
| 16581 | operator uint32_t() |
| 16582 | { |
| 16583 | uint32_t word; |
| 16584 | std::memcpy(&word, this, sizeof(word)); |
| 16585 | return word; |
| 16586 | } |
| 16587 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16588 | { |
| 16589 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16590 | } |
| 16591 | CONSTEXPR npu_op_dma_wait_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16592 | { |
| 16593 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16594 | return *this; |
| 16595 | } |
| 16596 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16597 | { |
| 16598 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16599 | } |
| 16600 | CONSTEXPR npu_op_dma_wait_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16601 | { |
| 16602 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16603 | return *this; |
| 16604 | } |
| 16605 | CONSTEXPR uint32_t get_k() const |
| 16606 | { |
| 16607 | return static_cast<uint32_t>(k); |
| 16608 | } |
| 16609 | CONSTEXPR npu_op_dma_wait_t &set_k(uint32_t value) |
| 16610 | { |
| 16611 | k = static_cast<uint8_t>(value) & ((1U << 4) - 1); |
| 16612 | return *this; |
| 16613 | } |
| 16614 | #ifdef NPU_DISASSEMBLE |
| 16615 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16616 | { |
| 16617 | fields.push_back(std::make_pair<std::string, std::string>("k", std::to_string(k))); |
| 16618 | } |
| 16619 | #endif |
| 16620 | #endif |
| 16621 | }; |
| 16622 | // Wait for n or fewer kernel operations to be remaining |
| 16623 | struct npu_op_kernel_wait_t |
| 16624 | { |
| 16625 | #ifdef __cplusplus |
| 16626 | private: |
| 16627 | #endif |
| 16628 | uint32_t opcode : 10; // opcode |
| 16629 | uint32_t reserved0 : 4; |
| 16630 | uint32_t control : 2; // control |
| 16631 | uint32_t n : 2; // Number of kernel operations in range 0-3 |
| 16632 | uint32_t reserved1 : 14; |
| 16633 | #ifdef __cplusplus |
| 16634 | public: |
| 16635 | npu_op_kernel_wait_t(uint32_t _n) : |
| 16636 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT)), reserved0(0), |
| 16637 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16638 | n(static_cast<uint8_t>(_n) & ((1U << 2) - 1)), reserved1(0) |
| 16639 | { |
| 16640 | } |
| 16641 | CONSTEXPR npu_op_kernel_wait_t() : |
| 16642 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT)), reserved0(0), |
| 16643 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), n(0), reserved1(0) |
| 16644 | { |
| 16645 | } |
| 16646 | CONSTEXPR bool valid() const |
| 16647 | { |
| 16648 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT) && |
| 16649 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16650 | } |
| 16651 | CONSTEXPR void init() |
| 16652 | { |
| 16653 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_KERNEL_WAIT); |
| 16654 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16655 | } |
| 16656 | operator uint32_t() |
| 16657 | { |
| 16658 | uint32_t word; |
| 16659 | std::memcpy(&word, this, sizeof(word)); |
| 16660 | return word; |
| 16661 | } |
| 16662 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16663 | { |
| 16664 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16665 | } |
| 16666 | CONSTEXPR npu_op_kernel_wait_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16667 | { |
| 16668 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16669 | return *this; |
| 16670 | } |
| 16671 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16672 | { |
| 16673 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16674 | } |
| 16675 | CONSTEXPR npu_op_kernel_wait_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16676 | { |
| 16677 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16678 | return *this; |
| 16679 | } |
| 16680 | CONSTEXPR uint32_t get_n() const |
| 16681 | { |
| 16682 | return static_cast<uint32_t>(n); |
| 16683 | } |
| 16684 | CONSTEXPR npu_op_kernel_wait_t &set_n(uint32_t value) |
| 16685 | { |
| 16686 | n = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16687 | return *this; |
| 16688 | } |
| 16689 | #ifdef NPU_DISASSEMBLE |
| 16690 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16691 | { |
| 16692 | fields.push_back(std::make_pair<std::string, std::string>("n", std::to_string(n))); |
| 16693 | } |
| 16694 | #endif |
| 16695 | #endif |
| 16696 | }; |
| 16697 | // Enable or disable PMU counting (debug feature only) |
| 16698 | struct npu_op_pmu_mask_t |
| 16699 | { |
| 16700 | #ifdef __cplusplus |
| 16701 | private: |
| 16702 | #endif |
| 16703 | uint32_t opcode : 10; // opcode |
| 16704 | uint32_t reserved0 : 4; |
| 16705 | uint32_t control : 2; // control |
| 16706 | uint32_t enable : 1; // Enable or disable PMU mask |
| 16707 | uint32_t reserved1 : 15; |
| 16708 | #ifdef __cplusplus |
| 16709 | public: |
| 16710 | npu_op_pmu_mask_t(uint32_t _enable) : |
| 16711 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK)), reserved0(0), |
| 16712 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16713 | enable(static_cast<uint8_t>(_enable) & ((1U << 1) - 1)), reserved1(0) |
| 16714 | { |
| 16715 | } |
| 16716 | CONSTEXPR npu_op_pmu_mask_t() : |
| 16717 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK)), reserved0(0), |
| 16718 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), enable(0), reserved1(0) |
| 16719 | { |
| 16720 | } |
| 16721 | CONSTEXPR bool valid() const |
| 16722 | { |
| 16723 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK) && |
| 16724 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16725 | } |
| 16726 | CONSTEXPR void init() |
| 16727 | { |
| 16728 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_OP_PMU_MASK); |
| 16729 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16730 | } |
| 16731 | operator uint32_t() |
| 16732 | { |
| 16733 | uint32_t word; |
| 16734 | std::memcpy(&word, this, sizeof(word)); |
| 16735 | return word; |
| 16736 | } |
| 16737 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16738 | { |
| 16739 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16740 | } |
| 16741 | CONSTEXPR npu_op_pmu_mask_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16742 | { |
| 16743 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16744 | return *this; |
| 16745 | } |
| 16746 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16747 | { |
| 16748 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16749 | } |
| 16750 | CONSTEXPR npu_op_pmu_mask_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16751 | { |
| 16752 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16753 | return *this; |
| 16754 | } |
| 16755 | CONSTEXPR uint32_t get_enable() const |
| 16756 | { |
| 16757 | return static_cast<uint32_t>(enable); |
| 16758 | } |
| 16759 | CONSTEXPR npu_op_pmu_mask_t &set_enable(uint32_t value) |
| 16760 | { |
| 16761 | enable = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 16762 | return *this; |
| 16763 | } |
| 16764 | #ifdef NPU_DISASSEMBLE |
| 16765 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16766 | { |
| 16767 | fields.push_back(std::make_pair<std::string, std::string>("enable", std::to_string(enable))); |
| 16768 | } |
| 16769 | #endif |
| 16770 | #endif |
| 16771 | }; |
| 16772 | // IFM top pad |
| 16773 | struct npu_set_ifm_pad_top_t |
| 16774 | { |
| 16775 | #ifdef __cplusplus |
| 16776 | private: |
| 16777 | #endif |
| 16778 | uint32_t opcode : 10; // opcode |
| 16779 | uint32_t reserved0 : 4; |
| 16780 | uint32_t control : 2; // control |
| 16781 | uint32_t pad : 7; // IFM top pad |
| 16782 | uint32_t reserved1 : 9; |
| 16783 | #ifdef __cplusplus |
| 16784 | public: |
| 16785 | npu_set_ifm_pad_top_t(uint32_t _pad) : |
| 16786 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP)), reserved0(0), |
| 16787 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16788 | pad(static_cast<uint8_t>(_pad) & ((1U << 7) - 1)), reserved1(0) |
| 16789 | { |
| 16790 | } |
| 16791 | CONSTEXPR npu_set_ifm_pad_top_t() : |
| 16792 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP)), reserved0(0), |
| 16793 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0) |
| 16794 | { |
| 16795 | } |
| 16796 | CONSTEXPR bool valid() const |
| 16797 | { |
| 16798 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP) && |
| 16799 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16800 | } |
| 16801 | CONSTEXPR void init() |
| 16802 | { |
| 16803 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_TOP); |
| 16804 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16805 | } |
| 16806 | operator uint32_t() |
| 16807 | { |
| 16808 | uint32_t word; |
| 16809 | std::memcpy(&word, this, sizeof(word)); |
| 16810 | return word; |
| 16811 | } |
| 16812 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16813 | { |
| 16814 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16815 | } |
| 16816 | CONSTEXPR npu_set_ifm_pad_top_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16817 | { |
| 16818 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16819 | return *this; |
| 16820 | } |
| 16821 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16822 | { |
| 16823 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16824 | } |
| 16825 | CONSTEXPR npu_set_ifm_pad_top_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16826 | { |
| 16827 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16828 | return *this; |
| 16829 | } |
| 16830 | CONSTEXPR uint32_t get_pad() const |
| 16831 | { |
| 16832 | return static_cast<uint32_t>(pad); |
| 16833 | } |
| 16834 | CONSTEXPR npu_set_ifm_pad_top_t &set_pad(uint32_t value) |
| 16835 | { |
| 16836 | pad = static_cast<uint8_t>(value) & ((1U << 7) - 1); |
| 16837 | return *this; |
| 16838 | } |
| 16839 | #ifdef NPU_DISASSEMBLE |
| 16840 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16841 | { |
| 16842 | fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad))); |
| 16843 | } |
| 16844 | #endif |
| 16845 | #endif |
| 16846 | }; |
| 16847 | // IFM left pad |
| 16848 | struct npu_set_ifm_pad_left_t |
| 16849 | { |
| 16850 | #ifdef __cplusplus |
| 16851 | private: |
| 16852 | #endif |
| 16853 | uint32_t opcode : 10; // opcode |
| 16854 | uint32_t reserved0 : 4; |
| 16855 | uint32_t control : 2; // control |
| 16856 | uint32_t pad : 7; // IFM left pad |
| 16857 | uint32_t reserved1 : 9; |
| 16858 | #ifdef __cplusplus |
| 16859 | public: |
| 16860 | npu_set_ifm_pad_left_t(uint32_t _pad) : |
| 16861 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT)), reserved0(0), |
| 16862 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16863 | pad(static_cast<uint8_t>(_pad) & ((1U << 7) - 1)), reserved1(0) |
| 16864 | { |
| 16865 | } |
| 16866 | CONSTEXPR npu_set_ifm_pad_left_t() : |
| 16867 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT)), reserved0(0), |
| 16868 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0) |
| 16869 | { |
| 16870 | } |
| 16871 | CONSTEXPR bool valid() const |
| 16872 | { |
| 16873 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT) && |
| 16874 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16875 | } |
| 16876 | CONSTEXPR void init() |
| 16877 | { |
| 16878 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_LEFT); |
| 16879 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16880 | } |
| 16881 | operator uint32_t() |
| 16882 | { |
| 16883 | uint32_t word; |
| 16884 | std::memcpy(&word, this, sizeof(word)); |
| 16885 | return word; |
| 16886 | } |
| 16887 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16888 | { |
| 16889 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16890 | } |
| 16891 | CONSTEXPR npu_set_ifm_pad_left_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16892 | { |
| 16893 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16894 | return *this; |
| 16895 | } |
| 16896 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16897 | { |
| 16898 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16899 | } |
| 16900 | CONSTEXPR npu_set_ifm_pad_left_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16901 | { |
| 16902 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16903 | return *this; |
| 16904 | } |
| 16905 | CONSTEXPR uint32_t get_pad() const |
| 16906 | { |
| 16907 | return static_cast<uint32_t>(pad); |
| 16908 | } |
| 16909 | CONSTEXPR npu_set_ifm_pad_left_t &set_pad(uint32_t value) |
| 16910 | { |
| 16911 | pad = static_cast<uint8_t>(value) & ((1U << 7) - 1); |
| 16912 | return *this; |
| 16913 | } |
| 16914 | #ifdef NPU_DISASSEMBLE |
| 16915 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16916 | { |
| 16917 | fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad))); |
| 16918 | } |
| 16919 | #endif |
| 16920 | #endif |
| 16921 | }; |
| 16922 | // IFM right pad |
| 16923 | struct npu_set_ifm_pad_right_t |
| 16924 | { |
| 16925 | #ifdef __cplusplus |
| 16926 | private: |
| 16927 | #endif |
| 16928 | uint32_t opcode : 10; // opcode |
| 16929 | uint32_t reserved0 : 4; |
| 16930 | uint32_t control : 2; // control |
| 16931 | uint32_t pad : 8; // IFM right pad. Max value is 128 |
| 16932 | uint32_t reserved1 : 8; |
| 16933 | #ifdef __cplusplus |
| 16934 | public: |
| 16935 | npu_set_ifm_pad_right_t(uint32_t _pad) : |
| 16936 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT)), reserved0(0), |
| 16937 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 16938 | pad(static_cast<uint8_t>(_pad) & ((1U << 8) - 1)), reserved1(0) |
| 16939 | { |
| 16940 | } |
| 16941 | CONSTEXPR npu_set_ifm_pad_right_t() : |
| 16942 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT)), reserved0(0), |
| 16943 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0) |
| 16944 | { |
| 16945 | } |
| 16946 | CONSTEXPR bool valid() const |
| 16947 | { |
| 16948 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT) && |
| 16949 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16950 | } |
| 16951 | CONSTEXPR void init() |
| 16952 | { |
| 16953 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_RIGHT); |
| 16954 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 16955 | } |
| 16956 | operator uint32_t() |
| 16957 | { |
| 16958 | uint32_t word; |
| 16959 | std::memcpy(&word, this, sizeof(word)); |
| 16960 | return word; |
| 16961 | } |
| 16962 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 16963 | { |
| 16964 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 16965 | } |
| 16966 | CONSTEXPR npu_set_ifm_pad_right_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 16967 | { |
| 16968 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 16969 | return *this; |
| 16970 | } |
| 16971 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 16972 | { |
| 16973 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 16974 | } |
| 16975 | CONSTEXPR npu_set_ifm_pad_right_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 16976 | { |
| 16977 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 16978 | return *this; |
| 16979 | } |
| 16980 | CONSTEXPR uint32_t get_pad() const |
| 16981 | { |
| 16982 | return static_cast<uint32_t>(pad); |
| 16983 | } |
| 16984 | CONSTEXPR npu_set_ifm_pad_right_t &set_pad(uint32_t value) |
| 16985 | { |
| 16986 | pad = static_cast<uint8_t>(value) & ((1U << 8) - 1); |
| 16987 | return *this; |
| 16988 | } |
| 16989 | #ifdef NPU_DISASSEMBLE |
| 16990 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 16991 | { |
| 16992 | fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad))); |
| 16993 | } |
| 16994 | #endif |
| 16995 | #endif |
| 16996 | }; |
| 16997 | // IFM bottom pad |
| 16998 | struct npu_set_ifm_pad_bottom_t |
| 16999 | { |
| 17000 | #ifdef __cplusplus |
| 17001 | private: |
| 17002 | #endif |
| 17003 | uint32_t opcode : 10; // opcode |
| 17004 | uint32_t reserved0 : 4; |
| 17005 | uint32_t control : 2; // control |
| 17006 | uint32_t pad : 8; // IFM bottom pad. Max value is 128 |
| 17007 | uint32_t reserved1 : 8; |
| 17008 | #ifdef __cplusplus |
| 17009 | public: |
| 17010 | npu_set_ifm_pad_bottom_t(uint32_t _pad) : |
| 17011 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM)), reserved0(0), |
| 17012 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17013 | pad(static_cast<uint8_t>(_pad) & ((1U << 8) - 1)), reserved1(0) |
| 17014 | { |
| 17015 | } |
| 17016 | CONSTEXPR npu_set_ifm_pad_bottom_t() : |
| 17017 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM)), reserved0(0), |
| 17018 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), pad(0), reserved1(0) |
| 17019 | { |
| 17020 | } |
| 17021 | CONSTEXPR bool valid() const |
| 17022 | { |
| 17023 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM) && |
| 17024 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17025 | } |
| 17026 | CONSTEXPR void init() |
| 17027 | { |
| 17028 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PAD_BOTTOM); |
| 17029 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17030 | } |
| 17031 | operator uint32_t() |
| 17032 | { |
| 17033 | uint32_t word; |
| 17034 | std::memcpy(&word, this, sizeof(word)); |
| 17035 | return word; |
| 17036 | } |
| 17037 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17038 | { |
| 17039 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17040 | } |
| 17041 | CONSTEXPR npu_set_ifm_pad_bottom_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17042 | { |
| 17043 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17044 | return *this; |
| 17045 | } |
| 17046 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17047 | { |
| 17048 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17049 | } |
| 17050 | CONSTEXPR npu_set_ifm_pad_bottom_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17051 | { |
| 17052 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17053 | return *this; |
| 17054 | } |
| 17055 | CONSTEXPR uint32_t get_pad() const |
| 17056 | { |
| 17057 | return static_cast<uint32_t>(pad); |
| 17058 | } |
| 17059 | CONSTEXPR npu_set_ifm_pad_bottom_t &set_pad(uint32_t value) |
| 17060 | { |
| 17061 | pad = static_cast<uint8_t>(value) & ((1U << 8) - 1); |
| 17062 | return *this; |
| 17063 | } |
| 17064 | #ifdef NPU_DISASSEMBLE |
| 17065 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17066 | { |
| 17067 | fields.push_back(std::make_pair<std::string, std::string>("pad", std::to_string(pad))); |
| 17068 | } |
| 17069 | #endif |
| 17070 | #endif |
| 17071 | }; |
| 17072 | // Number of input channels for convolution |
| 17073 | struct npu_set_ifm_depth_m1_t |
| 17074 | { |
| 17075 | #ifdef __cplusplus |
| 17076 | private: |
| 17077 | #endif |
| 17078 | uint32_t opcode : 10; // opcode |
| 17079 | uint32_t reserved0 : 4; |
| 17080 | uint32_t control : 2; // control |
| 17081 | uint32_t depth_m1 : 16; // Number of input channels for convolution |
| 17082 | #ifdef __cplusplus |
| 17083 | public: |
| 17084 | npu_set_ifm_depth_m1_t(uint32_t _depth_m1) : |
| 17085 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1)), reserved0(0), |
| 17086 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17087 | depth_m1(static_cast<uint16_t>(_depth_m1) & ((1U << 16) - 1)) |
| 17088 | { |
| 17089 | } |
| 17090 | CONSTEXPR npu_set_ifm_depth_m1_t() : |
| 17091 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1)), reserved0(0), |
| 17092 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), depth_m1(0) |
| 17093 | { |
| 17094 | } |
| 17095 | CONSTEXPR bool valid() const |
| 17096 | { |
| 17097 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1) && |
| 17098 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17099 | } |
| 17100 | CONSTEXPR void init() |
| 17101 | { |
| 17102 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_DEPTH_M1); |
| 17103 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17104 | } |
| 17105 | operator uint32_t() |
| 17106 | { |
| 17107 | uint32_t word; |
| 17108 | std::memcpy(&word, this, sizeof(word)); |
| 17109 | return word; |
| 17110 | } |
| 17111 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17112 | { |
| 17113 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17114 | } |
| 17115 | CONSTEXPR npu_set_ifm_depth_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17116 | { |
| 17117 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17118 | return *this; |
| 17119 | } |
| 17120 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17121 | { |
| 17122 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17123 | } |
| 17124 | CONSTEXPR npu_set_ifm_depth_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17125 | { |
| 17126 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17127 | return *this; |
| 17128 | } |
| 17129 | CONSTEXPR uint32_t get_depth_m1() const |
| 17130 | { |
| 17131 | return static_cast<uint32_t>(depth_m1); |
| 17132 | } |
| 17133 | CONSTEXPR npu_set_ifm_depth_m1_t &set_depth_m1(uint32_t value) |
| 17134 | { |
| 17135 | depth_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 17136 | return *this; |
| 17137 | } |
| 17138 | #ifdef NPU_DISASSEMBLE |
| 17139 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17140 | { |
| 17141 | fields.push_back(std::make_pair<std::string, std::string>("depth_m1", std::to_string(depth_m1))); |
| 17142 | } |
| 17143 | #endif |
| 17144 | #endif |
| 17145 | }; |
| 17146 | // IFM Precision |
| 17147 | struct npu_set_ifm_precision_t |
| 17148 | { |
| 17149 | #ifdef __cplusplus |
| 17150 | private: |
| 17151 | #endif |
| 17152 | uint32_t opcode : 10; // opcode |
| 17153 | uint32_t reserved0 : 4; |
| 17154 | uint32_t control : 2; // control |
| 17155 | uint32_t activation_type : 1; // IFM type |
| 17156 | uint32_t reserved1 : 1; |
| 17157 | uint32_t activation_precision : 2; // IFM precision |
| 17158 | uint32_t reserved2 : 2; |
| 17159 | uint32_t activation_format : 2; // IFM format |
| 17160 | uint32_t scale_mode : 2; // IFM scale mode |
| 17161 | uint32_t reserved3 : 4; |
| 17162 | uint32_t round_mode : 2; // IFM round mode |
| 17163 | #ifdef __cplusplus |
| 17164 | public: |
| 17165 | npu_set_ifm_precision_t(NPU_NAMESPACE::activation_type _activation_type, |
| 17166 | NPU_NAMESPACE::activation_precision _activation_precision, |
| 17167 | NPU_NAMESPACE::activation_format _activation_format, |
| 17168 | NPU_NAMESPACE::ifm_scale_mode _scale_mode, |
| 17169 | NPU_NAMESPACE::round_mode _round_mode) : |
| 17170 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION)), |
| 17171 | reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17172 | activation_type(static_cast<uint8_t>(_activation_type) & ((1U << 1) - 1)), reserved1(0), |
| 17173 | activation_precision(static_cast<uint8_t>(_activation_precision) & ((1U << 2) - 1)), reserved2(0), |
| 17174 | activation_format(static_cast<uint8_t>(_activation_format) & ((1U << 2) - 1)), |
| 17175 | scale_mode(static_cast<uint8_t>(_scale_mode) & ((1U << 2) - 1)), reserved3(0), |
| 17176 | round_mode(static_cast<uint8_t>(_round_mode) & ((1U << 2) - 1)) |
| 17177 | { |
| 17178 | } |
| 17179 | CONSTEXPR npu_set_ifm_precision_t() : |
| 17180 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION)), reserved0(0), |
| 17181 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_type(0), reserved1(0), |
| 17182 | activation_precision(0), reserved2(0), activation_format(0), scale_mode(0), reserved3(0), round_mode(0) |
| 17183 | { |
| 17184 | } |
| 17185 | CONSTEXPR bool valid() const |
| 17186 | { |
| 17187 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION) && |
| 17188 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17189 | } |
| 17190 | CONSTEXPR void init() |
| 17191 | { |
| 17192 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_PRECISION); |
| 17193 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17194 | } |
| 17195 | operator uint32_t() |
| 17196 | { |
| 17197 | uint32_t word; |
| 17198 | std::memcpy(&word, this, sizeof(word)); |
| 17199 | return word; |
| 17200 | } |
| 17201 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17202 | { |
| 17203 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17204 | } |
| 17205 | CONSTEXPR npu_set_ifm_precision_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17206 | { |
| 17207 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17208 | return *this; |
| 17209 | } |
| 17210 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17211 | { |
| 17212 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17213 | } |
| 17214 | CONSTEXPR npu_set_ifm_precision_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17215 | { |
| 17216 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17217 | return *this; |
| 17218 | } |
| 17219 | CONSTEXPR NPU_NAMESPACE::activation_type get_activation_type() const |
| 17220 | { |
| 17221 | return static_cast<NPU_NAMESPACE::activation_type>(activation_type); |
| 17222 | } |
| 17223 | CONSTEXPR npu_set_ifm_precision_t &set_activation_type(NPU_NAMESPACE::activation_type value) |
| 17224 | { |
| 17225 | activation_type = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 17226 | return *this; |
| 17227 | } |
| 17228 | CONSTEXPR NPU_NAMESPACE::activation_precision get_activation_precision() const |
| 17229 | { |
| 17230 | return static_cast<NPU_NAMESPACE::activation_precision>(activation_precision); |
| 17231 | } |
| 17232 | CONSTEXPR npu_set_ifm_precision_t &set_activation_precision(NPU_NAMESPACE::activation_precision value) |
| 17233 | { |
| 17234 | activation_precision = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17235 | return *this; |
| 17236 | } |
| 17237 | CONSTEXPR NPU_NAMESPACE::activation_format get_activation_format() const |
| 17238 | { |
| 17239 | return static_cast<NPU_NAMESPACE::activation_format>(activation_format); |
| 17240 | } |
| 17241 | CONSTEXPR npu_set_ifm_precision_t &set_activation_format(NPU_NAMESPACE::activation_format value) |
| 17242 | { |
| 17243 | activation_format = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17244 | return *this; |
| 17245 | } |
| 17246 | CONSTEXPR NPU_NAMESPACE::ifm_scale_mode get_scale_mode() const |
| 17247 | { |
| 17248 | return static_cast<NPU_NAMESPACE::ifm_scale_mode>(scale_mode); |
| 17249 | } |
| 17250 | CONSTEXPR npu_set_ifm_precision_t &set_scale_mode(NPU_NAMESPACE::ifm_scale_mode value) |
| 17251 | { |
| 17252 | scale_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17253 | return *this; |
| 17254 | } |
| 17255 | CONSTEXPR NPU_NAMESPACE::round_mode get_round_mode() const |
| 17256 | { |
| 17257 | return static_cast<NPU_NAMESPACE::round_mode>(round_mode); |
| 17258 | } |
| 17259 | CONSTEXPR npu_set_ifm_precision_t &set_round_mode(NPU_NAMESPACE::round_mode value) |
| 17260 | { |
| 17261 | round_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17262 | return *this; |
| 17263 | } |
| 17264 | #ifdef NPU_DISASSEMBLE |
| 17265 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17266 | { |
| 17267 | fields.push_back(std::make_pair<std::string, std::string>( |
| 17268 | "activation_type", |
| 17269 | (activation_type < (sizeof(activation_type_str) / sizeof(activation_type_str[0])) ? |
| 17270 | activation_type_str[activation_type] : |
| 17271 | "****"))); |
| 17272 | fields.push_back(std::make_pair<std::string, std::string>( |
| 17273 | "activation_precision", |
| 17274 | (activation_precision < (sizeof(activation_precision_str) / sizeof(activation_precision_str[0])) ? |
| 17275 | activation_precision_str[activation_precision] : |
| 17276 | "****"))); |
| 17277 | fields.push_back(std::make_pair<std::string, std::string>( |
| 17278 | "activation_format", |
| 17279 | (activation_format < (sizeof(activation_format_str) / sizeof(activation_format_str[0])) ? |
| 17280 | activation_format_str[activation_format] : |
| 17281 | "****"))); |
| 17282 | fields.push_back(std::make_pair<std::string, std::string>( |
| 17283 | "scale_mode", |
| 17284 | (scale_mode < (sizeof(ifm_scale_mode_str) / sizeof(ifm_scale_mode_str[0])) ? |
| 17285 | ifm_scale_mode_str[scale_mode] : |
| 17286 | "****"))); |
| 17287 | fields.push_back(std::make_pair<std::string, std::string>( |
| 17288 | "round_mode", |
| 17289 | (round_mode < (sizeof(round_mode_str) / sizeof(round_mode_str[0])) ? round_mode_str[round_mode] : |
| 17290 | "****"))); |
| 17291 | } |
| 17292 | #endif |
| 17293 | #endif |
| 17294 | }; |
| 17295 | // IFM upscale mode |
| 17296 | struct npu_set_ifm_upscale_t |
| 17297 | { |
| 17298 | #ifdef __cplusplus |
| 17299 | private: |
| 17300 | #endif |
| 17301 | uint32_t opcode : 10; // opcode |
| 17302 | uint32_t reserved0 : 4; |
| 17303 | uint32_t control : 2; // control |
| 17304 | uint32_t mode : 2; // IFM upscale mode |
| 17305 | uint32_t reserved1 : 14; |
| 17306 | #ifdef __cplusplus |
| 17307 | public: |
| 17308 | npu_set_ifm_upscale_t(NPU_NAMESPACE::ifm_upscale_mode _mode) : |
| 17309 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE)), reserved0(0), |
| 17310 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17311 | mode(static_cast<uint8_t>(_mode) & ((1U << 2) - 1)), reserved1(0) |
| 17312 | { |
| 17313 | } |
| 17314 | CONSTEXPR npu_set_ifm_upscale_t() : |
| 17315 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE)), reserved0(0), |
| 17316 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), mode(0), reserved1(0) |
| 17317 | { |
| 17318 | } |
| 17319 | CONSTEXPR bool valid() const |
| 17320 | { |
| 17321 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE) && |
| 17322 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17323 | } |
| 17324 | CONSTEXPR void init() |
| 17325 | { |
| 17326 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_UPSCALE); |
| 17327 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17328 | } |
| 17329 | operator uint32_t() |
| 17330 | { |
| 17331 | uint32_t word; |
| 17332 | std::memcpy(&word, this, sizeof(word)); |
| 17333 | return word; |
| 17334 | } |
| 17335 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17336 | { |
| 17337 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17338 | } |
| 17339 | CONSTEXPR npu_set_ifm_upscale_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17340 | { |
| 17341 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17342 | return *this; |
| 17343 | } |
| 17344 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17345 | { |
| 17346 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17347 | } |
| 17348 | CONSTEXPR npu_set_ifm_upscale_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17349 | { |
| 17350 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17351 | return *this; |
| 17352 | } |
| 17353 | CONSTEXPR NPU_NAMESPACE::ifm_upscale_mode get_mode() const |
| 17354 | { |
| 17355 | return static_cast<NPU_NAMESPACE::ifm_upscale_mode>(mode); |
| 17356 | } |
| 17357 | CONSTEXPR npu_set_ifm_upscale_t &set_mode(NPU_NAMESPACE::ifm_upscale_mode value) |
| 17358 | { |
| 17359 | mode = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17360 | return *this; |
| 17361 | } |
| 17362 | #ifdef NPU_DISASSEMBLE |
| 17363 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17364 | { |
| 17365 | fields.push_back(std::make_pair<std::string, std::string>( |
| 17366 | "mode", |
| 17367 | (mode < (sizeof(ifm_upscale_mode_str) / sizeof(ifm_upscale_mode_str[0])) ? ifm_upscale_mode_str[mode] : |
| 17368 | "****"))); |
| 17369 | } |
| 17370 | #endif |
| 17371 | #endif |
| 17372 | }; |
| 17373 | // IFM zero point |
| 17374 | struct npu_set_ifm_zero_point_t |
| 17375 | { |
| 17376 | #ifdef __cplusplus |
| 17377 | private: |
| 17378 | #endif |
| 17379 | uint32_t opcode : 10; // opcode |
| 17380 | uint32_t reserved0 : 4; |
| 17381 | uint32_t control : 2; // control |
| 17382 | uint32_t zero_point : 16; // Zero point offset |
| 17383 | #ifdef __cplusplus |
| 17384 | public: |
| 17385 | npu_set_ifm_zero_point_t(uint32_t _zero_point) : |
| 17386 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT)), reserved0(0), |
| 17387 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17388 | zero_point(static_cast<uint16_t>(_zero_point) & ((1U << 16) - 1)) |
| 17389 | { |
| 17390 | } |
| 17391 | CONSTEXPR npu_set_ifm_zero_point_t() : |
| 17392 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT)), reserved0(0), |
| 17393 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), zero_point(0) |
| 17394 | { |
| 17395 | } |
| 17396 | CONSTEXPR bool valid() const |
| 17397 | { |
| 17398 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT) && |
| 17399 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17400 | } |
| 17401 | CONSTEXPR void init() |
| 17402 | { |
| 17403 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_ZERO_POINT); |
| 17404 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17405 | } |
| 17406 | operator uint32_t() |
| 17407 | { |
| 17408 | uint32_t word; |
| 17409 | std::memcpy(&word, this, sizeof(word)); |
| 17410 | return word; |
| 17411 | } |
| 17412 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17413 | { |
| 17414 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17415 | } |
| 17416 | CONSTEXPR npu_set_ifm_zero_point_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17417 | { |
| 17418 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17419 | return *this; |
| 17420 | } |
| 17421 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17422 | { |
| 17423 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17424 | } |
| 17425 | CONSTEXPR npu_set_ifm_zero_point_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17426 | { |
| 17427 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17428 | return *this; |
| 17429 | } |
| 17430 | CONSTEXPR uint32_t get_zero_point() const |
| 17431 | { |
| 17432 | return static_cast<uint32_t>(zero_point); |
| 17433 | } |
| 17434 | CONSTEXPR npu_set_ifm_zero_point_t &set_zero_point(uint32_t value) |
| 17435 | { |
| 17436 | zero_point = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 17437 | return *this; |
| 17438 | } |
| 17439 | #ifdef NPU_DISASSEMBLE |
| 17440 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17441 | { |
| 17442 | fields.push_back(std::make_pair<std::string, std::string>("zero_point", std::to_string(zero_point))); |
| 17443 | } |
| 17444 | #endif |
| 17445 | #endif |
| 17446 | }; |
| 17447 | // IFM Tile 0 and tile 2 width |
| 17448 | struct npu_set_ifm_width0_m1_t |
| 17449 | { |
| 17450 | #ifdef __cplusplus |
| 17451 | private: |
| 17452 | #endif |
| 17453 | uint32_t opcode : 10; // opcode |
| 17454 | uint32_t reserved0 : 4; |
| 17455 | uint32_t control : 2; // control |
| 17456 | uint32_t width_m1 : 16; // IFM Tile 0 and tile 2 width |
| 17457 | #ifdef __cplusplus |
| 17458 | public: |
| 17459 | npu_set_ifm_width0_m1_t(uint32_t _width_m1) : |
| 17460 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1)), reserved0(0), |
| 17461 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17462 | width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1)) |
| 17463 | { |
| 17464 | } |
| 17465 | CONSTEXPR npu_set_ifm_width0_m1_t() : |
| 17466 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1)), reserved0(0), |
| 17467 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0) |
| 17468 | { |
| 17469 | } |
| 17470 | CONSTEXPR bool valid() const |
| 17471 | { |
| 17472 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1) && |
| 17473 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17474 | } |
| 17475 | CONSTEXPR void init() |
| 17476 | { |
| 17477 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_WIDTH0_M1); |
| 17478 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17479 | } |
| 17480 | operator uint32_t() |
| 17481 | { |
| 17482 | uint32_t word; |
| 17483 | std::memcpy(&word, this, sizeof(word)); |
| 17484 | return word; |
| 17485 | } |
| 17486 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17487 | { |
| 17488 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17489 | } |
| 17490 | CONSTEXPR npu_set_ifm_width0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17491 | { |
| 17492 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17493 | return *this; |
| 17494 | } |
| 17495 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17496 | { |
| 17497 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17498 | } |
| 17499 | CONSTEXPR npu_set_ifm_width0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17500 | { |
| 17501 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17502 | return *this; |
| 17503 | } |
| 17504 | CONSTEXPR uint32_t get_width_m1() const |
| 17505 | { |
| 17506 | return static_cast<uint32_t>(width_m1); |
| 17507 | } |
| 17508 | CONSTEXPR npu_set_ifm_width0_m1_t &set_width_m1(uint32_t value) |
| 17509 | { |
| 17510 | width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 17511 | return *this; |
| 17512 | } |
| 17513 | #ifdef NPU_DISASSEMBLE |
| 17514 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17515 | { |
| 17516 | fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1))); |
| 17517 | } |
| 17518 | #endif |
| 17519 | #endif |
| 17520 | }; |
| 17521 | // IFM Tile 0 height |
| 17522 | struct npu_set_ifm_height0_m1_t |
| 17523 | { |
| 17524 | #ifdef __cplusplus |
| 17525 | private: |
| 17526 | #endif |
| 17527 | uint32_t opcode : 10; // opcode |
| 17528 | uint32_t reserved0 : 4; |
| 17529 | uint32_t control : 2; // control |
| 17530 | uint32_t height_m1 : 16; // IFM Tile 0 height |
| 17531 | #ifdef __cplusplus |
| 17532 | public: |
| 17533 | npu_set_ifm_height0_m1_t(uint32_t _height_m1) : |
| 17534 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1)), reserved0(0), |
| 17535 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17536 | height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1)) |
| 17537 | { |
| 17538 | } |
| 17539 | CONSTEXPR npu_set_ifm_height0_m1_t() : |
| 17540 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1)), reserved0(0), |
| 17541 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0) |
| 17542 | { |
| 17543 | } |
| 17544 | CONSTEXPR bool valid() const |
| 17545 | { |
| 17546 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1) && |
| 17547 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17548 | } |
| 17549 | CONSTEXPR void init() |
| 17550 | { |
| 17551 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT0_M1); |
| 17552 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17553 | } |
| 17554 | operator uint32_t() |
| 17555 | { |
| 17556 | uint32_t word; |
| 17557 | std::memcpy(&word, this, sizeof(word)); |
| 17558 | return word; |
| 17559 | } |
| 17560 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17561 | { |
| 17562 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17563 | } |
| 17564 | CONSTEXPR npu_set_ifm_height0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17565 | { |
| 17566 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17567 | return *this; |
| 17568 | } |
| 17569 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17570 | { |
| 17571 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17572 | } |
| 17573 | CONSTEXPR npu_set_ifm_height0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17574 | { |
| 17575 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17576 | return *this; |
| 17577 | } |
| 17578 | CONSTEXPR uint32_t get_height_m1() const |
| 17579 | { |
| 17580 | return static_cast<uint32_t>(height_m1); |
| 17581 | } |
| 17582 | CONSTEXPR npu_set_ifm_height0_m1_t &set_height_m1(uint32_t value) |
| 17583 | { |
| 17584 | height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 17585 | return *this; |
| 17586 | } |
| 17587 | #ifdef NPU_DISASSEMBLE |
| 17588 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17589 | { |
| 17590 | fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1))); |
| 17591 | } |
| 17592 | #endif |
| 17593 | #endif |
| 17594 | }; |
| 17595 | // IFM Tile 1 height |
| 17596 | struct npu_set_ifm_height1_m1_t |
| 17597 | { |
| 17598 | #ifdef __cplusplus |
| 17599 | private: |
| 17600 | #endif |
| 17601 | uint32_t opcode : 10; // opcode |
| 17602 | uint32_t reserved0 : 4; |
| 17603 | uint32_t control : 2; // control |
| 17604 | uint32_t height_m1 : 16; // IFM Tile 1 height |
| 17605 | #ifdef __cplusplus |
| 17606 | public: |
| 17607 | npu_set_ifm_height1_m1_t(uint32_t _height_m1) : |
| 17608 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1)), reserved0(0), |
| 17609 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17610 | height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1)) |
| 17611 | { |
| 17612 | } |
| 17613 | CONSTEXPR npu_set_ifm_height1_m1_t() : |
| 17614 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1)), reserved0(0), |
| 17615 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0) |
| 17616 | { |
| 17617 | } |
| 17618 | CONSTEXPR bool valid() const |
| 17619 | { |
| 17620 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1) && |
| 17621 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17622 | } |
| 17623 | CONSTEXPR void init() |
| 17624 | { |
| 17625 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_HEIGHT1_M1); |
| 17626 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17627 | } |
| 17628 | operator uint32_t() |
| 17629 | { |
| 17630 | uint32_t word; |
| 17631 | std::memcpy(&word, this, sizeof(word)); |
| 17632 | return word; |
| 17633 | } |
| 17634 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17635 | { |
| 17636 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17637 | } |
| 17638 | CONSTEXPR npu_set_ifm_height1_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17639 | { |
| 17640 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17641 | return *this; |
| 17642 | } |
| 17643 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17644 | { |
| 17645 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17646 | } |
| 17647 | CONSTEXPR npu_set_ifm_height1_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17648 | { |
| 17649 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17650 | return *this; |
| 17651 | } |
| 17652 | CONSTEXPR uint32_t get_height_m1() const |
| 17653 | { |
| 17654 | return static_cast<uint32_t>(height_m1); |
| 17655 | } |
| 17656 | CONSTEXPR npu_set_ifm_height1_m1_t &set_height_m1(uint32_t value) |
| 17657 | { |
| 17658 | height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 17659 | return *this; |
| 17660 | } |
| 17661 | #ifdef NPU_DISASSEMBLE |
| 17662 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17663 | { |
| 17664 | fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1))); |
| 17665 | } |
| 17666 | #endif |
| 17667 | #endif |
| 17668 | }; |
| 17669 | // End of IB0,IB1 buffers |
| 17670 | struct npu_set_ifm_ib_end_t |
| 17671 | { |
| 17672 | #ifdef __cplusplus |
| 17673 | private: |
| 17674 | #endif |
| 17675 | uint32_t opcode : 10; // opcode |
| 17676 | uint32_t reserved0 : 4; |
| 17677 | uint32_t control : 2; // control |
| 17678 | uint32_t ib_end : 6; // End of IB0,IB1 buffers in the SHRAM in KB units. Multiple of 2 |
| 17679 | uint32_t reserved1 : 10; |
| 17680 | #ifdef __cplusplus |
| 17681 | public: |
| 17682 | npu_set_ifm_ib_end_t(uint32_t _ib_end) : |
| 17683 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END)), reserved0(0), |
| 17684 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17685 | ib_end(static_cast<uint8_t>(_ib_end) & ((1U << 6) - 1)), reserved1(0) |
| 17686 | { |
| 17687 | } |
| 17688 | CONSTEXPR npu_set_ifm_ib_end_t() : |
| 17689 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END)), reserved0(0), |
| 17690 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), ib_end(0), reserved1(0) |
| 17691 | { |
| 17692 | } |
| 17693 | CONSTEXPR bool valid() const |
| 17694 | { |
| 17695 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END) && |
| 17696 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17697 | } |
| 17698 | CONSTEXPR void init() |
| 17699 | { |
| 17700 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_IB_END); |
| 17701 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17702 | } |
| 17703 | operator uint32_t() |
| 17704 | { |
| 17705 | uint32_t word; |
| 17706 | std::memcpy(&word, this, sizeof(word)); |
| 17707 | return word; |
| 17708 | } |
| 17709 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17710 | { |
| 17711 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17712 | } |
| 17713 | CONSTEXPR npu_set_ifm_ib_end_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17714 | { |
| 17715 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17716 | return *this; |
| 17717 | } |
| 17718 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17719 | { |
| 17720 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17721 | } |
| 17722 | CONSTEXPR npu_set_ifm_ib_end_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17723 | { |
| 17724 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17725 | return *this; |
| 17726 | } |
| 17727 | CONSTEXPR uint32_t get_ib_end() const |
| 17728 | { |
| 17729 | return static_cast<uint32_t>(ib_end); |
| 17730 | } |
| 17731 | CONSTEXPR npu_set_ifm_ib_end_t &set_ib_end(uint32_t value) |
| 17732 | { |
| 17733 | ib_end = static_cast<uint8_t>(value) & ((1U << 6) - 1); |
| 17734 | return *this; |
| 17735 | } |
| 17736 | #ifdef NPU_DISASSEMBLE |
| 17737 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17738 | { |
| 17739 | fields.push_back(std::make_pair<std::string, std::string>("ib_end", std::to_string(ib_end))); |
| 17740 | } |
| 17741 | #endif |
| 17742 | #endif |
| 17743 | }; |
| 17744 | // Index n for IFM access |
| 17745 | struct npu_set_ifm_region_t |
| 17746 | { |
| 17747 | #ifdef __cplusplus |
| 17748 | private: |
| 17749 | #endif |
| 17750 | uint32_t opcode : 10; // opcode |
| 17751 | uint32_t reserved0 : 4; |
| 17752 | uint32_t control : 2; // control |
| 17753 | uint32_t region : 3; // Region number n |
| 17754 | uint32_t reserved1 : 13; |
| 17755 | #ifdef __cplusplus |
| 17756 | public: |
| 17757 | npu_set_ifm_region_t(uint32_t _region) : |
| 17758 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION)), reserved0(0), |
| 17759 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17760 | region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0) |
| 17761 | { |
| 17762 | } |
| 17763 | CONSTEXPR npu_set_ifm_region_t() : |
| 17764 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION)), reserved0(0), |
| 17765 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0) |
| 17766 | { |
| 17767 | } |
| 17768 | CONSTEXPR bool valid() const |
| 17769 | { |
| 17770 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION) && |
| 17771 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17772 | } |
| 17773 | CONSTEXPR void init() |
| 17774 | { |
| 17775 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM_REGION); |
| 17776 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17777 | } |
| 17778 | operator uint32_t() |
| 17779 | { |
| 17780 | uint32_t word; |
| 17781 | std::memcpy(&word, this, sizeof(word)); |
| 17782 | return word; |
| 17783 | } |
| 17784 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17785 | { |
| 17786 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17787 | } |
| 17788 | CONSTEXPR npu_set_ifm_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17789 | { |
| 17790 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17791 | return *this; |
| 17792 | } |
| 17793 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17794 | { |
| 17795 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17796 | } |
| 17797 | CONSTEXPR npu_set_ifm_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17798 | { |
| 17799 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17800 | return *this; |
| 17801 | } |
| 17802 | CONSTEXPR uint32_t get_region() const |
| 17803 | { |
| 17804 | return static_cast<uint32_t>(region); |
| 17805 | } |
| 17806 | CONSTEXPR npu_set_ifm_region_t &set_region(uint32_t value) |
| 17807 | { |
| 17808 | region = static_cast<uint8_t>(value) & ((1U << 3) - 1); |
| 17809 | return *this; |
| 17810 | } |
| 17811 | #ifdef NPU_DISASSEMBLE |
| 17812 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17813 | { |
| 17814 | fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region))); |
| 17815 | } |
| 17816 | #endif |
| 17817 | #endif |
| 17818 | }; |
| 17819 | // Output feature map width |
| 17820 | struct npu_set_ofm_width_m1_t |
| 17821 | { |
| 17822 | #ifdef __cplusplus |
| 17823 | private: |
| 17824 | #endif |
| 17825 | uint32_t opcode : 10; // opcode |
| 17826 | uint32_t reserved0 : 4; |
| 17827 | uint32_t control : 2; // control |
| 17828 | uint32_t width_m1 : 16; // Output feature map width |
| 17829 | #ifdef __cplusplus |
| 17830 | public: |
| 17831 | npu_set_ofm_width_m1_t(uint32_t _width_m1) : |
| 17832 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1)), reserved0(0), |
| 17833 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17834 | width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1)) |
| 17835 | { |
| 17836 | } |
| 17837 | CONSTEXPR npu_set_ofm_width_m1_t() : |
| 17838 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1)), reserved0(0), |
| 17839 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0) |
| 17840 | { |
| 17841 | } |
| 17842 | CONSTEXPR bool valid() const |
| 17843 | { |
| 17844 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1) && |
| 17845 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17846 | } |
| 17847 | CONSTEXPR void init() |
| 17848 | { |
| 17849 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH_M1); |
| 17850 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17851 | } |
| 17852 | operator uint32_t() |
| 17853 | { |
| 17854 | uint32_t word; |
| 17855 | std::memcpy(&word, this, sizeof(word)); |
| 17856 | return word; |
| 17857 | } |
| 17858 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17859 | { |
| 17860 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17861 | } |
| 17862 | CONSTEXPR npu_set_ofm_width_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17863 | { |
| 17864 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17865 | return *this; |
| 17866 | } |
| 17867 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17868 | { |
| 17869 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17870 | } |
| 17871 | CONSTEXPR npu_set_ofm_width_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17872 | { |
| 17873 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17874 | return *this; |
| 17875 | } |
| 17876 | CONSTEXPR uint32_t get_width_m1() const |
| 17877 | { |
| 17878 | return static_cast<uint32_t>(width_m1); |
| 17879 | } |
| 17880 | CONSTEXPR npu_set_ofm_width_m1_t &set_width_m1(uint32_t value) |
| 17881 | { |
| 17882 | width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 17883 | return *this; |
| 17884 | } |
| 17885 | #ifdef NPU_DISASSEMBLE |
| 17886 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17887 | { |
| 17888 | fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1))); |
| 17889 | } |
| 17890 | #endif |
| 17891 | #endif |
| 17892 | }; |
| 17893 | // Output feature map height |
| 17894 | struct npu_set_ofm_height_m1_t |
| 17895 | { |
| 17896 | #ifdef __cplusplus |
| 17897 | private: |
| 17898 | #endif |
| 17899 | uint32_t opcode : 10; // opcode |
| 17900 | uint32_t reserved0 : 4; |
| 17901 | uint32_t control : 2; // control |
| 17902 | uint32_t height_m1 : 16; // Output feature map height |
| 17903 | #ifdef __cplusplus |
| 17904 | public: |
| 17905 | npu_set_ofm_height_m1_t(uint32_t _height_m1) : |
| 17906 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1)), reserved0(0), |
| 17907 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17908 | height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1)) |
| 17909 | { |
| 17910 | } |
| 17911 | CONSTEXPR npu_set_ofm_height_m1_t() : |
| 17912 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1)), reserved0(0), |
| 17913 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0) |
| 17914 | { |
| 17915 | } |
| 17916 | CONSTEXPR bool valid() const |
| 17917 | { |
| 17918 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1) && |
| 17919 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17920 | } |
| 17921 | CONSTEXPR void init() |
| 17922 | { |
| 17923 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT_M1); |
| 17924 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17925 | } |
| 17926 | operator uint32_t() |
| 17927 | { |
| 17928 | uint32_t word; |
| 17929 | std::memcpy(&word, this, sizeof(word)); |
| 17930 | return word; |
| 17931 | } |
| 17932 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 17933 | { |
| 17934 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 17935 | } |
| 17936 | CONSTEXPR npu_set_ofm_height_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 17937 | { |
| 17938 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 17939 | return *this; |
| 17940 | } |
| 17941 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 17942 | { |
| 17943 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 17944 | } |
| 17945 | CONSTEXPR npu_set_ofm_height_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 17946 | { |
| 17947 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 17948 | return *this; |
| 17949 | } |
| 17950 | CONSTEXPR uint32_t get_height_m1() const |
| 17951 | { |
| 17952 | return static_cast<uint32_t>(height_m1); |
| 17953 | } |
| 17954 | CONSTEXPR npu_set_ofm_height_m1_t &set_height_m1(uint32_t value) |
| 17955 | { |
| 17956 | height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 17957 | return *this; |
| 17958 | } |
| 17959 | #ifdef NPU_DISASSEMBLE |
| 17960 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 17961 | { |
| 17962 | fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1))); |
| 17963 | } |
| 17964 | #endif |
| 17965 | #endif |
| 17966 | }; |
| 17967 | // Output feature map depth |
| 17968 | struct npu_set_ofm_depth_m1_t |
| 17969 | { |
| 17970 | #ifdef __cplusplus |
| 17971 | private: |
| 17972 | #endif |
| 17973 | uint32_t opcode : 10; // opcode |
| 17974 | uint32_t reserved0 : 4; |
| 17975 | uint32_t control : 2; // control |
| 17976 | uint32_t depth_m1 : 16; // Output feature map depth |
| 17977 | #ifdef __cplusplus |
| 17978 | public: |
| 17979 | npu_set_ofm_depth_m1_t(uint32_t _depth_m1) : |
| 17980 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1)), reserved0(0), |
| 17981 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 17982 | depth_m1(static_cast<uint16_t>(_depth_m1) & ((1U << 16) - 1)) |
| 17983 | { |
| 17984 | } |
| 17985 | CONSTEXPR npu_set_ofm_depth_m1_t() : |
| 17986 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1)), reserved0(0), |
| 17987 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), depth_m1(0) |
| 17988 | { |
| 17989 | } |
| 17990 | CONSTEXPR bool valid() const |
| 17991 | { |
| 17992 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1) && |
| 17993 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17994 | } |
| 17995 | CONSTEXPR void init() |
| 17996 | { |
| 17997 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_DEPTH_M1); |
| 17998 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 17999 | } |
| 18000 | operator uint32_t() |
| 18001 | { |
| 18002 | uint32_t word; |
| 18003 | std::memcpy(&word, this, sizeof(word)); |
| 18004 | return word; |
| 18005 | } |
| 18006 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18007 | { |
| 18008 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18009 | } |
| 18010 | CONSTEXPR npu_set_ofm_depth_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18011 | { |
| 18012 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18013 | return *this; |
| 18014 | } |
| 18015 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18016 | { |
| 18017 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18018 | } |
| 18019 | CONSTEXPR npu_set_ofm_depth_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18020 | { |
| 18021 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18022 | return *this; |
| 18023 | } |
| 18024 | CONSTEXPR uint32_t get_depth_m1() const |
| 18025 | { |
| 18026 | return static_cast<uint32_t>(depth_m1); |
| 18027 | } |
| 18028 | CONSTEXPR npu_set_ofm_depth_m1_t &set_depth_m1(uint32_t value) |
| 18029 | { |
| 18030 | depth_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 18031 | return *this; |
| 18032 | } |
| 18033 | #ifdef NPU_DISASSEMBLE |
| 18034 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18035 | { |
| 18036 | fields.push_back(std::make_pair<std::string, std::string>("depth_m1", std::to_string(depth_m1))); |
| 18037 | } |
| 18038 | #endif |
| 18039 | #endif |
| 18040 | }; |
| 18041 | // OFM Precision |
| 18042 | struct npu_set_ofm_precision_t |
| 18043 | { |
| 18044 | #ifdef __cplusplus |
| 18045 | private: |
| 18046 | #endif |
| 18047 | uint32_t opcode : 10; // opcode |
| 18048 | uint32_t reserved0 : 4; |
| 18049 | uint32_t control : 2; // control |
| 18050 | uint32_t activation_type : 1; // OFM type |
| 18051 | uint32_t activation_precision : 2; // OFM precision |
| 18052 | uint32_t reserved1 : 3; |
| 18053 | uint32_t activation_format : 2; // OFM format |
| 18054 | uint32_t scale_mode : 1; // OFM scale mode |
| 18055 | uint32_t reserved2 : 5; |
| 18056 | uint32_t round_mode : 2; // OFM round mode |
| 18057 | #ifdef __cplusplus |
| 18058 | public: |
| 18059 | npu_set_ofm_precision_t(NPU_NAMESPACE::activation_type _activation_type, |
| 18060 | NPU_NAMESPACE::activation_precision _activation_precision, |
| 18061 | NPU_NAMESPACE::activation_format _activation_format, |
| 18062 | NPU_NAMESPACE::ofm_scale_mode _scale_mode, |
| 18063 | NPU_NAMESPACE::round_mode _round_mode) : |
| 18064 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION)), |
| 18065 | reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18066 | activation_type(static_cast<uint8_t>(_activation_type) & ((1U << 1) - 1)), |
| 18067 | activation_precision(static_cast<uint8_t>(_activation_precision) & ((1U << 2) - 1)), reserved1(0), |
| 18068 | activation_format(static_cast<uint8_t>(_activation_format) & ((1U << 2) - 1)), |
| 18069 | scale_mode(static_cast<uint8_t>(_scale_mode) & ((1U << 1) - 1)), reserved2(0), |
| 18070 | round_mode(static_cast<uint8_t>(_round_mode) & ((1U << 2) - 1)) |
| 18071 | { |
| 18072 | } |
| 18073 | CONSTEXPR npu_set_ofm_precision_t() : |
| 18074 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION)), reserved0(0), |
| 18075 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_type(0), |
| 18076 | activation_precision(0), reserved1(0), activation_format(0), scale_mode(0), reserved2(0), round_mode(0) |
| 18077 | { |
| 18078 | } |
| 18079 | CONSTEXPR bool valid() const |
| 18080 | { |
| 18081 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION) && |
| 18082 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18083 | } |
| 18084 | CONSTEXPR void init() |
| 18085 | { |
| 18086 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_PRECISION); |
| 18087 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18088 | } |
| 18089 | operator uint32_t() |
| 18090 | { |
| 18091 | uint32_t word; |
| 18092 | std::memcpy(&word, this, sizeof(word)); |
| 18093 | return word; |
| 18094 | } |
| 18095 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18096 | { |
| 18097 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18098 | } |
| 18099 | CONSTEXPR npu_set_ofm_precision_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18100 | { |
| 18101 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18102 | return *this; |
| 18103 | } |
| 18104 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18105 | { |
| 18106 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18107 | } |
| 18108 | CONSTEXPR npu_set_ofm_precision_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18109 | { |
| 18110 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18111 | return *this; |
| 18112 | } |
| 18113 | CONSTEXPR NPU_NAMESPACE::activation_type get_activation_type() const |
| 18114 | { |
| 18115 | return static_cast<NPU_NAMESPACE::activation_type>(activation_type); |
| 18116 | } |
| 18117 | CONSTEXPR npu_set_ofm_precision_t &set_activation_type(NPU_NAMESPACE::activation_type value) |
| 18118 | { |
| 18119 | activation_type = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 18120 | return *this; |
| 18121 | } |
| 18122 | CONSTEXPR NPU_NAMESPACE::activation_precision get_activation_precision() const |
| 18123 | { |
| 18124 | return static_cast<NPU_NAMESPACE::activation_precision>(activation_precision); |
| 18125 | } |
| 18126 | CONSTEXPR npu_set_ofm_precision_t &set_activation_precision(NPU_NAMESPACE::activation_precision value) |
| 18127 | { |
| 18128 | activation_precision = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18129 | return *this; |
| 18130 | } |
| 18131 | CONSTEXPR NPU_NAMESPACE::activation_format get_activation_format() const |
| 18132 | { |
| 18133 | return static_cast<NPU_NAMESPACE::activation_format>(activation_format); |
| 18134 | } |
| 18135 | CONSTEXPR npu_set_ofm_precision_t &set_activation_format(NPU_NAMESPACE::activation_format value) |
| 18136 | { |
| 18137 | activation_format = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18138 | return *this; |
| 18139 | } |
| 18140 | CONSTEXPR NPU_NAMESPACE::ofm_scale_mode get_scale_mode() const |
| 18141 | { |
| 18142 | return static_cast<NPU_NAMESPACE::ofm_scale_mode>(scale_mode); |
| 18143 | } |
| 18144 | CONSTEXPR npu_set_ofm_precision_t &set_scale_mode(NPU_NAMESPACE::ofm_scale_mode value) |
| 18145 | { |
| 18146 | scale_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 18147 | return *this; |
| 18148 | } |
| 18149 | CONSTEXPR NPU_NAMESPACE::round_mode get_round_mode() const |
| 18150 | { |
| 18151 | return static_cast<NPU_NAMESPACE::round_mode>(round_mode); |
| 18152 | } |
| 18153 | CONSTEXPR npu_set_ofm_precision_t &set_round_mode(NPU_NAMESPACE::round_mode value) |
| 18154 | { |
| 18155 | round_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18156 | return *this; |
| 18157 | } |
| 18158 | #ifdef NPU_DISASSEMBLE |
| 18159 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18160 | { |
| 18161 | fields.push_back(std::make_pair<std::string, std::string>( |
| 18162 | "activation_type", |
| 18163 | (activation_type < (sizeof(activation_type_str) / sizeof(activation_type_str[0])) ? |
| 18164 | activation_type_str[activation_type] : |
| 18165 | "****"))); |
| 18166 | fields.push_back(std::make_pair<std::string, std::string>( |
| 18167 | "activation_precision", |
| 18168 | (activation_precision < (sizeof(activation_precision_str) / sizeof(activation_precision_str[0])) ? |
| 18169 | activation_precision_str[activation_precision] : |
| 18170 | "****"))); |
| 18171 | fields.push_back(std::make_pair<std::string, std::string>( |
| 18172 | "activation_format", |
| 18173 | (activation_format < (sizeof(activation_format_str) / sizeof(activation_format_str[0])) ? |
| 18174 | activation_format_str[activation_format] : |
| 18175 | "****"))); |
| 18176 | fields.push_back(std::make_pair<std::string, std::string>( |
| 18177 | "scale_mode", |
| 18178 | (scale_mode < (sizeof(ofm_scale_mode_str) / sizeof(ofm_scale_mode_str[0])) ? |
| 18179 | ofm_scale_mode_str[scale_mode] : |
| 18180 | "****"))); |
| 18181 | fields.push_back(std::make_pair<std::string, std::string>( |
| 18182 | "round_mode", |
| 18183 | (round_mode < (sizeof(round_mode_str) / sizeof(round_mode_str[0])) ? round_mode_str[round_mode] : |
| 18184 | "****"))); |
| 18185 | } |
| 18186 | #endif |
| 18187 | #endif |
| 18188 | }; |
| 18189 | // OFM block width |
| 18190 | struct npu_set_ofm_blk_width_m1_t |
| 18191 | { |
| 18192 | #ifdef __cplusplus |
| 18193 | private: |
| 18194 | #endif |
| 18195 | uint32_t opcode : 10; // opcode |
| 18196 | uint32_t reserved0 : 4; |
| 18197 | uint32_t control : 2; // control |
| 18198 | uint32_t width_m1 : 6; // OFM block width |
| 18199 | uint32_t reserved1 : 10; |
| 18200 | #ifdef __cplusplus |
| 18201 | public: |
| 18202 | npu_set_ofm_blk_width_m1_t(uint32_t _width_m1) : |
| 18203 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1)), reserved0(0), |
| 18204 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18205 | width_m1(static_cast<uint8_t>(_width_m1) & ((1U << 6) - 1)), reserved1(0) |
| 18206 | { |
| 18207 | } |
| 18208 | CONSTEXPR npu_set_ofm_blk_width_m1_t() : |
| 18209 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1)), reserved0(0), |
| 18210 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0), reserved1(0) |
| 18211 | { |
| 18212 | } |
| 18213 | CONSTEXPR bool valid() const |
| 18214 | { |
| 18215 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1) && |
| 18216 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18217 | } |
| 18218 | CONSTEXPR void init() |
| 18219 | { |
| 18220 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_WIDTH_M1); |
| 18221 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18222 | } |
| 18223 | operator uint32_t() |
| 18224 | { |
| 18225 | uint32_t word; |
| 18226 | std::memcpy(&word, this, sizeof(word)); |
| 18227 | return word; |
| 18228 | } |
| 18229 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18230 | { |
| 18231 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18232 | } |
| 18233 | CONSTEXPR npu_set_ofm_blk_width_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18234 | { |
| 18235 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18236 | return *this; |
| 18237 | } |
| 18238 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18239 | { |
| 18240 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18241 | } |
| 18242 | CONSTEXPR npu_set_ofm_blk_width_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18243 | { |
| 18244 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18245 | return *this; |
| 18246 | } |
| 18247 | CONSTEXPR uint32_t get_width_m1() const |
| 18248 | { |
| 18249 | return static_cast<uint32_t>(width_m1); |
| 18250 | } |
| 18251 | CONSTEXPR npu_set_ofm_blk_width_m1_t &set_width_m1(uint32_t value) |
| 18252 | { |
| 18253 | width_m1 = static_cast<uint8_t>(value) & ((1U << 6) - 1); |
| 18254 | return *this; |
| 18255 | } |
| 18256 | #ifdef NPU_DISASSEMBLE |
| 18257 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18258 | { |
| 18259 | fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1))); |
| 18260 | } |
| 18261 | #endif |
| 18262 | #endif |
| 18263 | }; |
| 18264 | // OFM block height |
| 18265 | struct npu_set_ofm_blk_height_m1_t |
| 18266 | { |
| 18267 | #ifdef __cplusplus |
| 18268 | private: |
| 18269 | #endif |
| 18270 | uint32_t opcode : 10; // opcode |
| 18271 | uint32_t reserved0 : 4; |
| 18272 | uint32_t control : 2; // control |
| 18273 | uint32_t height_m1 : 5; // OFM block height |
| 18274 | uint32_t reserved1 : 11; |
| 18275 | #ifdef __cplusplus |
| 18276 | public: |
| 18277 | npu_set_ofm_blk_height_m1_t(uint32_t _height_m1) : |
| 18278 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1)), reserved0(0), |
| 18279 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18280 | height_m1(static_cast<uint8_t>(_height_m1) & ((1U << 5) - 1)), reserved1(0) |
| 18281 | { |
| 18282 | } |
| 18283 | CONSTEXPR npu_set_ofm_blk_height_m1_t() : |
| 18284 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1)), reserved0(0), |
| 18285 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0), reserved1(0) |
| 18286 | { |
| 18287 | } |
| 18288 | CONSTEXPR bool valid() const |
| 18289 | { |
| 18290 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1) && |
| 18291 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18292 | } |
| 18293 | CONSTEXPR void init() |
| 18294 | { |
| 18295 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_HEIGHT_M1); |
| 18296 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18297 | } |
| 18298 | operator uint32_t() |
| 18299 | { |
| 18300 | uint32_t word; |
| 18301 | std::memcpy(&word, this, sizeof(word)); |
| 18302 | return word; |
| 18303 | } |
| 18304 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18305 | { |
| 18306 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18307 | } |
| 18308 | CONSTEXPR npu_set_ofm_blk_height_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18309 | { |
| 18310 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18311 | return *this; |
| 18312 | } |
| 18313 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18314 | { |
| 18315 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18316 | } |
| 18317 | CONSTEXPR npu_set_ofm_blk_height_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18318 | { |
| 18319 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18320 | return *this; |
| 18321 | } |
| 18322 | CONSTEXPR uint32_t get_height_m1() const |
| 18323 | { |
| 18324 | return static_cast<uint32_t>(height_m1); |
| 18325 | } |
| 18326 | CONSTEXPR npu_set_ofm_blk_height_m1_t &set_height_m1(uint32_t value) |
| 18327 | { |
| 18328 | height_m1 = static_cast<uint8_t>(value) & ((1U << 5) - 1); |
| 18329 | return *this; |
| 18330 | } |
| 18331 | #ifdef NPU_DISASSEMBLE |
| 18332 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18333 | { |
| 18334 | fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1))); |
| 18335 | } |
| 18336 | #endif |
| 18337 | #endif |
| 18338 | }; |
| 18339 | // OFM block depth |
| 18340 | struct npu_set_ofm_blk_depth_m1_t |
| 18341 | { |
| 18342 | #ifdef __cplusplus |
| 18343 | private: |
| 18344 | #endif |
| 18345 | uint32_t opcode : 10; // opcode |
| 18346 | uint32_t reserved0 : 4; |
| 18347 | uint32_t control : 2; // control |
| 18348 | uint32_t depth_m1 : 7; // OFM block depth |
| 18349 | uint32_t reserved1 : 9; |
| 18350 | #ifdef __cplusplus |
| 18351 | public: |
| 18352 | npu_set_ofm_blk_depth_m1_t(uint32_t _depth_m1) : |
| 18353 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1)), reserved0(0), |
| 18354 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18355 | depth_m1(static_cast<uint8_t>(_depth_m1) & ((1U << 7) - 1)), reserved1(0) |
| 18356 | { |
| 18357 | } |
| 18358 | CONSTEXPR npu_set_ofm_blk_depth_m1_t() : |
| 18359 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1)), reserved0(0), |
| 18360 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), depth_m1(0), reserved1(0) |
| 18361 | { |
| 18362 | } |
| 18363 | CONSTEXPR bool valid() const |
| 18364 | { |
| 18365 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1) && |
| 18366 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18367 | } |
| 18368 | CONSTEXPR void init() |
| 18369 | { |
| 18370 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_BLK_DEPTH_M1); |
| 18371 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18372 | } |
| 18373 | operator uint32_t() |
| 18374 | { |
| 18375 | uint32_t word; |
| 18376 | std::memcpy(&word, this, sizeof(word)); |
| 18377 | return word; |
| 18378 | } |
| 18379 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18380 | { |
| 18381 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18382 | } |
| 18383 | CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18384 | { |
| 18385 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18386 | return *this; |
| 18387 | } |
| 18388 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18389 | { |
| 18390 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18391 | } |
| 18392 | CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18393 | { |
| 18394 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18395 | return *this; |
| 18396 | } |
| 18397 | CONSTEXPR uint32_t get_depth_m1() const |
| 18398 | { |
| 18399 | return static_cast<uint32_t>(depth_m1); |
| 18400 | } |
| 18401 | CONSTEXPR npu_set_ofm_blk_depth_m1_t &set_depth_m1(uint32_t value) |
| 18402 | { |
| 18403 | depth_m1 = static_cast<uint8_t>(value) & ((1U << 7) - 1); |
| 18404 | return *this; |
| 18405 | } |
| 18406 | #ifdef NPU_DISASSEMBLE |
| 18407 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18408 | { |
| 18409 | fields.push_back(std::make_pair<std::string, std::string>("depth_m1", std::to_string(depth_m1))); |
| 18410 | } |
| 18411 | #endif |
| 18412 | #endif |
| 18413 | }; |
| 18414 | // OFM zero point |
| 18415 | struct npu_set_ofm_zero_point_t |
| 18416 | { |
| 18417 | #ifdef __cplusplus |
| 18418 | private: |
| 18419 | #endif |
| 18420 | uint32_t opcode : 10; // opcode |
| 18421 | uint32_t reserved0 : 4; |
| 18422 | uint32_t control : 2; // control |
| 18423 | uint32_t zero_point : 16; // Zero point offset |
| 18424 | #ifdef __cplusplus |
| 18425 | public: |
| 18426 | npu_set_ofm_zero_point_t(uint32_t _zero_point) : |
| 18427 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT)), reserved0(0), |
| 18428 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18429 | zero_point(static_cast<uint16_t>(_zero_point) & ((1U << 16) - 1)) |
| 18430 | { |
| 18431 | } |
| 18432 | CONSTEXPR npu_set_ofm_zero_point_t() : |
| 18433 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT)), reserved0(0), |
| 18434 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), zero_point(0) |
| 18435 | { |
| 18436 | } |
| 18437 | CONSTEXPR bool valid() const |
| 18438 | { |
| 18439 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT) && |
| 18440 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18441 | } |
| 18442 | CONSTEXPR void init() |
| 18443 | { |
| 18444 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_ZERO_POINT); |
| 18445 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18446 | } |
| 18447 | operator uint32_t() |
| 18448 | { |
| 18449 | uint32_t word; |
| 18450 | std::memcpy(&word, this, sizeof(word)); |
| 18451 | return word; |
| 18452 | } |
| 18453 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18454 | { |
| 18455 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18456 | } |
| 18457 | CONSTEXPR npu_set_ofm_zero_point_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18458 | { |
| 18459 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18460 | return *this; |
| 18461 | } |
| 18462 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18463 | { |
| 18464 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18465 | } |
| 18466 | CONSTEXPR npu_set_ofm_zero_point_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18467 | { |
| 18468 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18469 | return *this; |
| 18470 | } |
| 18471 | CONSTEXPR uint32_t get_zero_point() const |
| 18472 | { |
| 18473 | return static_cast<uint32_t>(zero_point); |
| 18474 | } |
| 18475 | CONSTEXPR npu_set_ofm_zero_point_t &set_zero_point(uint32_t value) |
| 18476 | { |
| 18477 | zero_point = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 18478 | return *this; |
| 18479 | } |
| 18480 | #ifdef NPU_DISASSEMBLE |
| 18481 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18482 | { |
| 18483 | fields.push_back(std::make_pair<std::string, std::string>("zero_point", std::to_string(zero_point))); |
| 18484 | } |
| 18485 | #endif |
| 18486 | #endif |
| 18487 | }; |
| 18488 | // OFM Tile 0 and tile 2 width |
| 18489 | struct npu_set_ofm_width0_m1_t |
| 18490 | { |
| 18491 | #ifdef __cplusplus |
| 18492 | private: |
| 18493 | #endif |
| 18494 | uint32_t opcode : 10; // opcode |
| 18495 | uint32_t reserved0 : 4; |
| 18496 | uint32_t control : 2; // control |
| 18497 | uint32_t width_m1 : 16; // OFM Tile 0 and tile 2 width |
| 18498 | #ifdef __cplusplus |
| 18499 | public: |
| 18500 | npu_set_ofm_width0_m1_t(uint32_t _width_m1) : |
| 18501 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1)), reserved0(0), |
| 18502 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18503 | width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1)) |
| 18504 | { |
| 18505 | } |
| 18506 | CONSTEXPR npu_set_ofm_width0_m1_t() : |
| 18507 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1)), reserved0(0), |
| 18508 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0) |
| 18509 | { |
| 18510 | } |
| 18511 | CONSTEXPR bool valid() const |
| 18512 | { |
| 18513 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1) && |
| 18514 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18515 | } |
| 18516 | CONSTEXPR void init() |
| 18517 | { |
| 18518 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_WIDTH0_M1); |
| 18519 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18520 | } |
| 18521 | operator uint32_t() |
| 18522 | { |
| 18523 | uint32_t word; |
| 18524 | std::memcpy(&word, this, sizeof(word)); |
| 18525 | return word; |
| 18526 | } |
| 18527 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18528 | { |
| 18529 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18530 | } |
| 18531 | CONSTEXPR npu_set_ofm_width0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18532 | { |
| 18533 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18534 | return *this; |
| 18535 | } |
| 18536 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18537 | { |
| 18538 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18539 | } |
| 18540 | CONSTEXPR npu_set_ofm_width0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18541 | { |
| 18542 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18543 | return *this; |
| 18544 | } |
| 18545 | CONSTEXPR uint32_t get_width_m1() const |
| 18546 | { |
| 18547 | return static_cast<uint32_t>(width_m1); |
| 18548 | } |
| 18549 | CONSTEXPR npu_set_ofm_width0_m1_t &set_width_m1(uint32_t value) |
| 18550 | { |
| 18551 | width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 18552 | return *this; |
| 18553 | } |
| 18554 | #ifdef NPU_DISASSEMBLE |
| 18555 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18556 | { |
| 18557 | fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1))); |
| 18558 | } |
| 18559 | #endif |
| 18560 | #endif |
| 18561 | }; |
| 18562 | // OFM Tile 0 height |
| 18563 | struct npu_set_ofm_height0_m1_t |
| 18564 | { |
| 18565 | #ifdef __cplusplus |
| 18566 | private: |
| 18567 | #endif |
| 18568 | uint32_t opcode : 10; // opcode |
| 18569 | uint32_t reserved0 : 4; |
| 18570 | uint32_t control : 2; // control |
| 18571 | uint32_t height_m1 : 16; // OFM Tile 0 height |
| 18572 | #ifdef __cplusplus |
| 18573 | public: |
| 18574 | npu_set_ofm_height0_m1_t(uint32_t _height_m1) : |
| 18575 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1)), reserved0(0), |
| 18576 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18577 | height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1)) |
| 18578 | { |
| 18579 | } |
| 18580 | CONSTEXPR npu_set_ofm_height0_m1_t() : |
| 18581 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1)), reserved0(0), |
| 18582 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0) |
| 18583 | { |
| 18584 | } |
| 18585 | CONSTEXPR bool valid() const |
| 18586 | { |
| 18587 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1) && |
| 18588 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18589 | } |
| 18590 | CONSTEXPR void init() |
| 18591 | { |
| 18592 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT0_M1); |
| 18593 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18594 | } |
| 18595 | operator uint32_t() |
| 18596 | { |
| 18597 | uint32_t word; |
| 18598 | std::memcpy(&word, this, sizeof(word)); |
| 18599 | return word; |
| 18600 | } |
| 18601 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18602 | { |
| 18603 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18604 | } |
| 18605 | CONSTEXPR npu_set_ofm_height0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18606 | { |
| 18607 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18608 | return *this; |
| 18609 | } |
| 18610 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18611 | { |
| 18612 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18613 | } |
| 18614 | CONSTEXPR npu_set_ofm_height0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18615 | { |
| 18616 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18617 | return *this; |
| 18618 | } |
| 18619 | CONSTEXPR uint32_t get_height_m1() const |
| 18620 | { |
| 18621 | return static_cast<uint32_t>(height_m1); |
| 18622 | } |
| 18623 | CONSTEXPR npu_set_ofm_height0_m1_t &set_height_m1(uint32_t value) |
| 18624 | { |
| 18625 | height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 18626 | return *this; |
| 18627 | } |
| 18628 | #ifdef NPU_DISASSEMBLE |
| 18629 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18630 | { |
| 18631 | fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1))); |
| 18632 | } |
| 18633 | #endif |
| 18634 | #endif |
| 18635 | }; |
| 18636 | // OFM Tile 1 height |
| 18637 | struct npu_set_ofm_height1_m1_t |
| 18638 | { |
| 18639 | #ifdef __cplusplus |
| 18640 | private: |
| 18641 | #endif |
| 18642 | uint32_t opcode : 10; // opcode |
| 18643 | uint32_t reserved0 : 4; |
| 18644 | uint32_t control : 2; // control |
| 18645 | uint32_t height_m1 : 16; // OFM Tile 1 height |
| 18646 | #ifdef __cplusplus |
| 18647 | public: |
| 18648 | npu_set_ofm_height1_m1_t(uint32_t _height_m1) : |
| 18649 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1)), reserved0(0), |
| 18650 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18651 | height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1)) |
| 18652 | { |
| 18653 | } |
| 18654 | CONSTEXPR npu_set_ofm_height1_m1_t() : |
| 18655 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1)), reserved0(0), |
| 18656 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0) |
| 18657 | { |
| 18658 | } |
| 18659 | CONSTEXPR bool valid() const |
| 18660 | { |
| 18661 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1) && |
| 18662 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18663 | } |
| 18664 | CONSTEXPR void init() |
| 18665 | { |
| 18666 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_HEIGHT1_M1); |
| 18667 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18668 | } |
| 18669 | operator uint32_t() |
| 18670 | { |
| 18671 | uint32_t word; |
| 18672 | std::memcpy(&word, this, sizeof(word)); |
| 18673 | return word; |
| 18674 | } |
| 18675 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18676 | { |
| 18677 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18678 | } |
| 18679 | CONSTEXPR npu_set_ofm_height1_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18680 | { |
| 18681 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18682 | return *this; |
| 18683 | } |
| 18684 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18685 | { |
| 18686 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18687 | } |
| 18688 | CONSTEXPR npu_set_ofm_height1_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18689 | { |
| 18690 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18691 | return *this; |
| 18692 | } |
| 18693 | CONSTEXPR uint32_t get_height_m1() const |
| 18694 | { |
| 18695 | return static_cast<uint32_t>(height_m1); |
| 18696 | } |
| 18697 | CONSTEXPR npu_set_ofm_height1_m1_t &set_height_m1(uint32_t value) |
| 18698 | { |
| 18699 | height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 18700 | return *this; |
| 18701 | } |
| 18702 | #ifdef NPU_DISASSEMBLE |
| 18703 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18704 | { |
| 18705 | fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1))); |
| 18706 | } |
| 18707 | #endif |
| 18708 | #endif |
| 18709 | }; |
| 18710 | // Index n for OFM access |
| 18711 | struct npu_set_ofm_region_t |
| 18712 | { |
| 18713 | #ifdef __cplusplus |
| 18714 | private: |
| 18715 | #endif |
| 18716 | uint32_t opcode : 10; // opcode |
| 18717 | uint32_t reserved0 : 4; |
| 18718 | uint32_t control : 2; // control |
| 18719 | uint32_t region : 3; // Index n for OFM access |
| 18720 | uint32_t reserved1 : 13; |
| 18721 | #ifdef __cplusplus |
| 18722 | public: |
| 18723 | npu_set_ofm_region_t(uint32_t _region) : |
| 18724 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION)), reserved0(0), |
| 18725 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18726 | region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0) |
| 18727 | { |
| 18728 | } |
| 18729 | CONSTEXPR npu_set_ofm_region_t() : |
| 18730 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION)), reserved0(0), |
| 18731 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0) |
| 18732 | { |
| 18733 | } |
| 18734 | CONSTEXPR bool valid() const |
| 18735 | { |
| 18736 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION) && |
| 18737 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18738 | } |
| 18739 | CONSTEXPR void init() |
| 18740 | { |
| 18741 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_OFM_REGION); |
| 18742 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18743 | } |
| 18744 | operator uint32_t() |
| 18745 | { |
| 18746 | uint32_t word; |
| 18747 | std::memcpy(&word, this, sizeof(word)); |
| 18748 | return word; |
| 18749 | } |
| 18750 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18751 | { |
| 18752 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18753 | } |
| 18754 | CONSTEXPR npu_set_ofm_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18755 | { |
| 18756 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18757 | return *this; |
| 18758 | } |
| 18759 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18760 | { |
| 18761 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18762 | } |
| 18763 | CONSTEXPR npu_set_ofm_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18764 | { |
| 18765 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18766 | return *this; |
| 18767 | } |
| 18768 | CONSTEXPR uint32_t get_region() const |
| 18769 | { |
| 18770 | return static_cast<uint32_t>(region); |
| 18771 | } |
| 18772 | CONSTEXPR npu_set_ofm_region_t &set_region(uint32_t value) |
| 18773 | { |
| 18774 | region = static_cast<uint8_t>(value) & ((1U << 3) - 1); |
| 18775 | return *this; |
| 18776 | } |
| 18777 | #ifdef NPU_DISASSEMBLE |
| 18778 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18779 | { |
| 18780 | fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region))); |
| 18781 | } |
| 18782 | #endif |
| 18783 | #endif |
| 18784 | }; |
| 18785 | // Kernel width |
| 18786 | struct npu_set_kernel_width_m1_t |
| 18787 | { |
| 18788 | #ifdef __cplusplus |
| 18789 | private: |
| 18790 | #endif |
| 18791 | uint32_t opcode : 10; // opcode |
| 18792 | uint32_t reserved0 : 4; |
| 18793 | uint32_t control : 2; // control |
| 18794 | uint32_t width_m1 : 16; // Kernel width |
| 18795 | #ifdef __cplusplus |
| 18796 | public: |
| 18797 | npu_set_kernel_width_m1_t(uint32_t _width_m1) : |
| 18798 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1)), reserved0(0), |
| 18799 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18800 | width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1)) |
| 18801 | { |
| 18802 | } |
| 18803 | CONSTEXPR npu_set_kernel_width_m1_t() : |
| 18804 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1)), reserved0(0), |
| 18805 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0) |
| 18806 | { |
| 18807 | } |
| 18808 | CONSTEXPR bool valid() const |
| 18809 | { |
| 18810 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1) && |
| 18811 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18812 | } |
| 18813 | CONSTEXPR void init() |
| 18814 | { |
| 18815 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_WIDTH_M1); |
| 18816 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18817 | } |
| 18818 | operator uint32_t() |
| 18819 | { |
| 18820 | uint32_t word; |
| 18821 | std::memcpy(&word, this, sizeof(word)); |
| 18822 | return word; |
| 18823 | } |
| 18824 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18825 | { |
| 18826 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18827 | } |
| 18828 | CONSTEXPR npu_set_kernel_width_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18829 | { |
| 18830 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18831 | return *this; |
| 18832 | } |
| 18833 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18834 | { |
| 18835 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18836 | } |
| 18837 | CONSTEXPR npu_set_kernel_width_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18838 | { |
| 18839 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18840 | return *this; |
| 18841 | } |
| 18842 | CONSTEXPR uint32_t get_width_m1() const |
| 18843 | { |
| 18844 | return static_cast<uint32_t>(width_m1); |
| 18845 | } |
| 18846 | CONSTEXPR npu_set_kernel_width_m1_t &set_width_m1(uint32_t value) |
| 18847 | { |
| 18848 | width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 18849 | return *this; |
| 18850 | } |
| 18851 | #ifdef NPU_DISASSEMBLE |
| 18852 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18853 | { |
| 18854 | fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1))); |
| 18855 | } |
| 18856 | #endif |
| 18857 | #endif |
| 18858 | }; |
| 18859 | // Kernel height |
| 18860 | struct npu_set_kernel_height_m1_t |
| 18861 | { |
| 18862 | #ifdef __cplusplus |
| 18863 | private: |
| 18864 | #endif |
| 18865 | uint32_t opcode : 10; // opcode |
| 18866 | uint32_t reserved0 : 4; |
| 18867 | uint32_t control : 2; // control |
| 18868 | uint32_t height_m1 : 16; // Kernel height |
| 18869 | #ifdef __cplusplus |
| 18870 | public: |
| 18871 | npu_set_kernel_height_m1_t(uint32_t _height_m1) : |
| 18872 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1)), reserved0(0), |
| 18873 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18874 | height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1)) |
| 18875 | { |
| 18876 | } |
| 18877 | CONSTEXPR npu_set_kernel_height_m1_t() : |
| 18878 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1)), reserved0(0), |
| 18879 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0) |
| 18880 | { |
| 18881 | } |
| 18882 | CONSTEXPR bool valid() const |
| 18883 | { |
| 18884 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1) && |
| 18885 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18886 | } |
| 18887 | CONSTEXPR void init() |
| 18888 | { |
| 18889 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_HEIGHT_M1); |
| 18890 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18891 | } |
| 18892 | operator uint32_t() |
| 18893 | { |
| 18894 | uint32_t word; |
| 18895 | std::memcpy(&word, this, sizeof(word)); |
| 18896 | return word; |
| 18897 | } |
| 18898 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18899 | { |
| 18900 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 18901 | } |
| 18902 | CONSTEXPR npu_set_kernel_height_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 18903 | { |
| 18904 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 18905 | return *this; |
| 18906 | } |
| 18907 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 18908 | { |
| 18909 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 18910 | } |
| 18911 | CONSTEXPR npu_set_kernel_height_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 18912 | { |
| 18913 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 18914 | return *this; |
| 18915 | } |
| 18916 | CONSTEXPR uint32_t get_height_m1() const |
| 18917 | { |
| 18918 | return static_cast<uint32_t>(height_m1); |
| 18919 | } |
| 18920 | CONSTEXPR npu_set_kernel_height_m1_t &set_height_m1(uint32_t value) |
| 18921 | { |
| 18922 | height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 18923 | return *this; |
| 18924 | } |
| 18925 | #ifdef NPU_DISASSEMBLE |
| 18926 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 18927 | { |
| 18928 | fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1))); |
| 18929 | } |
| 18930 | #endif |
| 18931 | #endif |
| 18932 | }; |
| 18933 | // Kernel stride |
| 18934 | struct npu_set_kernel_stride_t |
| 18935 | { |
| 18936 | #ifdef __cplusplus |
| 18937 | private: |
| 18938 | #endif |
| 18939 | uint32_t opcode : 10; // opcode |
| 18940 | uint32_t reserved0 : 4; |
| 18941 | uint32_t control : 2; // control |
| 18942 | uint32_t stride_x_lsb : 1; // Stride x LSB. (kernel_x_stride - 1)[0] |
| 18943 | uint32_t stride_y_lsb : 1; // Stride y LSB. (kernel_y_stride - 1)[0] |
| 18944 | uint32_t weight_order : 1; // Weight ordering mode |
| 18945 | uint32_t dilation_x : 1; // Kernel x dilation |
| 18946 | uint32_t dilation_y : 1; // Kernel y dilation |
| 18947 | uint32_t decomposition : 1; // Kernel decomposition |
| 18948 | uint32_t stride_x_msb : 1; // Stride x MSB. (kernel_x_stride - 1) >> 1 |
| 18949 | uint32_t reserved1 : 2; |
| 18950 | uint32_t stride_y_msb : 1; // Stride y MSB. (kernel_y_stride - 1) >> 1 |
| 18951 | uint32_t reserved2 : 6; |
| 18952 | #ifdef __cplusplus |
| 18953 | public: |
| 18954 | npu_set_kernel_stride_t(uint32_t _stride_x_lsb, |
| 18955 | uint32_t _stride_y_lsb, |
| 18956 | NPU_NAMESPACE::weight_order _weight_order, |
| 18957 | NPU_NAMESPACE::kernel_dilation _dilation_x, |
| 18958 | NPU_NAMESPACE::kernel_dilation _dilation_y, |
| 18959 | NPU_NAMESPACE::kernel_decomposition _decomposition, |
| 18960 | uint32_t _stride_x_msb, |
| 18961 | uint32_t _stride_y_msb) : |
| 18962 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE)), |
| 18963 | reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 18964 | stride_x_lsb(static_cast<uint8_t>(_stride_x_lsb) & ((1U << 1) - 1)), |
| 18965 | stride_y_lsb(static_cast<uint8_t>(_stride_y_lsb) & ((1U << 1) - 1)), |
| 18966 | weight_order(static_cast<uint8_t>(_weight_order) & ((1U << 1) - 1)), |
| 18967 | dilation_x(static_cast<uint8_t>(_dilation_x) & ((1U << 1) - 1)), |
| 18968 | dilation_y(static_cast<uint8_t>(_dilation_y) & ((1U << 1) - 1)), |
| 18969 | decomposition(static_cast<uint8_t>(_decomposition) & ((1U << 1) - 1)), |
| 18970 | stride_x_msb(static_cast<uint8_t>(_stride_x_msb) & ((1U << 1) - 1)), reserved1(0), |
| 18971 | stride_y_msb(static_cast<uint8_t>(_stride_y_msb) & ((1U << 1) - 1)), reserved2(0) |
| 18972 | { |
| 18973 | } |
| 18974 | CONSTEXPR npu_set_kernel_stride_t() : |
| 18975 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE)), reserved0(0), |
| 18976 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), stride_x_lsb(0), stride_y_lsb(0), |
| 18977 | weight_order(0), dilation_x(0), dilation_y(0), decomposition(0), stride_x_msb(0), reserved1(0), |
| 18978 | stride_y_msb(0), reserved2(0) |
| 18979 | { |
| 18980 | } |
| 18981 | CONSTEXPR bool valid() const |
| 18982 | { |
| 18983 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE) && |
| 18984 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18985 | } |
| 18986 | CONSTEXPR void init() |
| 18987 | { |
| 18988 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_KERNEL_STRIDE); |
| 18989 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 18990 | } |
| 18991 | operator uint32_t() |
| 18992 | { |
| 18993 | uint32_t word; |
| 18994 | std::memcpy(&word, this, sizeof(word)); |
| 18995 | return word; |
| 18996 | } |
| 18997 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 18998 | { |
| 18999 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19000 | } |
| 19001 | CONSTEXPR npu_set_kernel_stride_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19002 | { |
| 19003 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19004 | return *this; |
| 19005 | } |
| 19006 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19007 | { |
| 19008 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19009 | } |
| 19010 | CONSTEXPR npu_set_kernel_stride_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19011 | { |
| 19012 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19013 | return *this; |
| 19014 | } |
| 19015 | CONSTEXPR uint32_t get_stride_x_lsb() const |
| 19016 | { |
| 19017 | return static_cast<uint32_t>(stride_x_lsb); |
| 19018 | } |
| 19019 | CONSTEXPR npu_set_kernel_stride_t &set_stride_x_lsb(uint32_t value) |
| 19020 | { |
| 19021 | stride_x_lsb = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19022 | return *this; |
| 19023 | } |
| 19024 | CONSTEXPR uint32_t get_stride_y_lsb() const |
| 19025 | { |
| 19026 | return static_cast<uint32_t>(stride_y_lsb); |
| 19027 | } |
| 19028 | CONSTEXPR npu_set_kernel_stride_t &set_stride_y_lsb(uint32_t value) |
| 19029 | { |
| 19030 | stride_y_lsb = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19031 | return *this; |
| 19032 | } |
| 19033 | CONSTEXPR NPU_NAMESPACE::weight_order get_weight_order() const |
| 19034 | { |
| 19035 | return static_cast<NPU_NAMESPACE::weight_order>(weight_order); |
| 19036 | } |
| 19037 | CONSTEXPR npu_set_kernel_stride_t &set_weight_order(NPU_NAMESPACE::weight_order value) |
| 19038 | { |
| 19039 | weight_order = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19040 | return *this; |
| 19041 | } |
| 19042 | CONSTEXPR NPU_NAMESPACE::kernel_dilation get_dilation_x() const |
| 19043 | { |
| 19044 | return static_cast<NPU_NAMESPACE::kernel_dilation>(dilation_x); |
| 19045 | } |
| 19046 | CONSTEXPR npu_set_kernel_stride_t &set_dilation_x(NPU_NAMESPACE::kernel_dilation value) |
| 19047 | { |
| 19048 | dilation_x = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19049 | return *this; |
| 19050 | } |
| 19051 | CONSTEXPR NPU_NAMESPACE::kernel_dilation get_dilation_y() const |
| 19052 | { |
| 19053 | return static_cast<NPU_NAMESPACE::kernel_dilation>(dilation_y); |
| 19054 | } |
| 19055 | CONSTEXPR npu_set_kernel_stride_t &set_dilation_y(NPU_NAMESPACE::kernel_dilation value) |
| 19056 | { |
| 19057 | dilation_y = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19058 | return *this; |
| 19059 | } |
| 19060 | CONSTEXPR NPU_NAMESPACE::kernel_decomposition get_decomposition() const |
| 19061 | { |
| 19062 | return static_cast<NPU_NAMESPACE::kernel_decomposition>(decomposition); |
| 19063 | } |
| 19064 | CONSTEXPR npu_set_kernel_stride_t &set_decomposition(NPU_NAMESPACE::kernel_decomposition value) |
| 19065 | { |
| 19066 | decomposition = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19067 | return *this; |
| 19068 | } |
| 19069 | CONSTEXPR uint32_t get_stride_x_msb() const |
| 19070 | { |
| 19071 | return static_cast<uint32_t>(stride_x_msb); |
| 19072 | } |
| 19073 | CONSTEXPR npu_set_kernel_stride_t &set_stride_x_msb(uint32_t value) |
| 19074 | { |
| 19075 | stride_x_msb = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19076 | return *this; |
| 19077 | } |
| 19078 | CONSTEXPR uint32_t get_stride_y_msb() const |
| 19079 | { |
| 19080 | return static_cast<uint32_t>(stride_y_msb); |
| 19081 | } |
| 19082 | CONSTEXPR npu_set_kernel_stride_t &set_stride_y_msb(uint32_t value) |
| 19083 | { |
| 19084 | stride_y_msb = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19085 | return *this; |
| 19086 | } |
| 19087 | #ifdef NPU_DISASSEMBLE |
| 19088 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19089 | { |
| 19090 | fields.push_back(std::make_pair<std::string, std::string>("stride_x_lsb", std::to_string(stride_x_lsb))); |
| 19091 | fields.push_back(std::make_pair<std::string, std::string>("stride_y_lsb", std::to_string(stride_y_lsb))); |
| 19092 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19093 | "weight_order", |
| 19094 | (weight_order < (sizeof(weight_order_str) / sizeof(weight_order_str[0])) ? |
| 19095 | weight_order_str[weight_order] : |
| 19096 | "****"))); |
| 19097 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19098 | "dilation_x", |
| 19099 | (dilation_x < (sizeof(kernel_dilation_str) / sizeof(kernel_dilation_str[0])) ? |
| 19100 | kernel_dilation_str[dilation_x] : |
| 19101 | "****"))); |
| 19102 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19103 | "dilation_y", |
| 19104 | (dilation_y < (sizeof(kernel_dilation_str) / sizeof(kernel_dilation_str[0])) ? |
| 19105 | kernel_dilation_str[dilation_y] : |
| 19106 | "****"))); |
| 19107 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19108 | "decomposition", |
| 19109 | (decomposition < (sizeof(kernel_decomposition_str) / sizeof(kernel_decomposition_str[0])) ? |
| 19110 | kernel_decomposition_str[decomposition] : |
| 19111 | "****"))); |
| 19112 | fields.push_back(std::make_pair<std::string, std::string>("stride_x_msb", std::to_string(stride_x_msb))); |
| 19113 | fields.push_back(std::make_pair<std::string, std::string>("stride_y_msb", std::to_string(stride_y_msb))); |
| 19114 | } |
| 19115 | #endif |
| 19116 | #endif |
| 19117 | }; |
| 19118 | // Multi-core parallel mode |
| 19119 | struct npu_set_parallel_mode_t |
| 19120 | { |
| 19121 | #ifdef __cplusplus |
| 19122 | private: |
| 19123 | #endif |
| 19124 | uint32_t opcode : 10; // opcode |
| 19125 | uint32_t reserved0 : 4; |
| 19126 | uint32_t control : 2; // control |
| 19127 | uint32_t parallel_mode : 1; // Multi-core parallel mode |
| 19128 | uint32_t reserved1 : 15; |
| 19129 | #ifdef __cplusplus |
| 19130 | public: |
| 19131 | npu_set_parallel_mode_t(NPU_NAMESPACE::parallel_mode _parallel_mode) : |
| 19132 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE)), reserved0(0), |
| 19133 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19134 | parallel_mode(static_cast<uint8_t>(_parallel_mode) & ((1U << 1) - 1)), reserved1(0) |
| 19135 | { |
| 19136 | } |
| 19137 | CONSTEXPR npu_set_parallel_mode_t() : |
| 19138 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE)), reserved0(0), |
| 19139 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), parallel_mode(0), reserved1(0) |
| 19140 | { |
| 19141 | } |
| 19142 | CONSTEXPR bool valid() const |
| 19143 | { |
| 19144 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE) && |
| 19145 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19146 | } |
| 19147 | CONSTEXPR void init() |
| 19148 | { |
| 19149 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_PARALLEL_MODE); |
| 19150 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19151 | } |
| 19152 | operator uint32_t() |
| 19153 | { |
| 19154 | uint32_t word; |
| 19155 | std::memcpy(&word, this, sizeof(word)); |
| 19156 | return word; |
| 19157 | } |
| 19158 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19159 | { |
| 19160 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19161 | } |
| 19162 | CONSTEXPR npu_set_parallel_mode_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19163 | { |
| 19164 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19165 | return *this; |
| 19166 | } |
| 19167 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19168 | { |
| 19169 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19170 | } |
| 19171 | CONSTEXPR npu_set_parallel_mode_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19172 | { |
| 19173 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19174 | return *this; |
| 19175 | } |
| 19176 | CONSTEXPR NPU_NAMESPACE::parallel_mode get_parallel_mode() const |
| 19177 | { |
| 19178 | return static_cast<NPU_NAMESPACE::parallel_mode>(parallel_mode); |
| 19179 | } |
| 19180 | CONSTEXPR npu_set_parallel_mode_t &set_parallel_mode(NPU_NAMESPACE::parallel_mode value) |
| 19181 | { |
| 19182 | parallel_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19183 | return *this; |
| 19184 | } |
| 19185 | #ifdef NPU_DISASSEMBLE |
| 19186 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19187 | { |
| 19188 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19189 | "parallel_mode", |
| 19190 | (parallel_mode < (sizeof(parallel_mode_str) / sizeof(parallel_mode_str[0])) ? |
| 19191 | parallel_mode_str[parallel_mode] : |
| 19192 | "****"))); |
| 19193 | } |
| 19194 | #endif |
| 19195 | #endif |
| 19196 | }; |
| 19197 | // Accumulator format |
| 19198 | struct npu_set_acc_format_t |
| 19199 | { |
| 19200 | #ifdef __cplusplus |
| 19201 | private: |
| 19202 | #endif |
| 19203 | uint32_t opcode : 10; // opcode |
| 19204 | uint32_t reserved0 : 4; |
| 19205 | uint32_t control : 2; // control |
| 19206 | uint32_t acc_format : 2; // Accumulator format |
| 19207 | uint32_t reserved1 : 14; |
| 19208 | #ifdef __cplusplus |
| 19209 | public: |
| 19210 | npu_set_acc_format_t(NPU_NAMESPACE::acc_format _acc_format) : |
| 19211 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT)), reserved0(0), |
| 19212 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19213 | acc_format(static_cast<uint8_t>(_acc_format) & ((1U << 2) - 1)), reserved1(0) |
| 19214 | { |
| 19215 | } |
| 19216 | CONSTEXPR npu_set_acc_format_t() : |
| 19217 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT)), reserved0(0), |
| 19218 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), acc_format(0), reserved1(0) |
| 19219 | { |
| 19220 | } |
| 19221 | CONSTEXPR bool valid() const |
| 19222 | { |
| 19223 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT) && |
| 19224 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19225 | } |
| 19226 | CONSTEXPR void init() |
| 19227 | { |
| 19228 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACC_FORMAT); |
| 19229 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19230 | } |
| 19231 | operator uint32_t() |
| 19232 | { |
| 19233 | uint32_t word; |
| 19234 | std::memcpy(&word, this, sizeof(word)); |
| 19235 | return word; |
| 19236 | } |
| 19237 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19238 | { |
| 19239 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19240 | } |
| 19241 | CONSTEXPR npu_set_acc_format_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19242 | { |
| 19243 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19244 | return *this; |
| 19245 | } |
| 19246 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19247 | { |
| 19248 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19249 | } |
| 19250 | CONSTEXPR npu_set_acc_format_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19251 | { |
| 19252 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19253 | return *this; |
| 19254 | } |
| 19255 | CONSTEXPR NPU_NAMESPACE::acc_format get_acc_format() const |
| 19256 | { |
| 19257 | return static_cast<NPU_NAMESPACE::acc_format>(acc_format); |
| 19258 | } |
| 19259 | CONSTEXPR npu_set_acc_format_t &set_acc_format(NPU_NAMESPACE::acc_format value) |
| 19260 | { |
| 19261 | acc_format = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19262 | return *this; |
| 19263 | } |
| 19264 | #ifdef NPU_DISASSEMBLE |
| 19265 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19266 | { |
| 19267 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19268 | "acc_format", |
| 19269 | (acc_format < (sizeof(acc_format_str) / sizeof(acc_format_str[0])) ? acc_format_str[acc_format] : |
| 19270 | "****"))); |
| 19271 | } |
| 19272 | #endif |
| 19273 | #endif |
| 19274 | }; |
| 19275 | // Activation function and clip range |
| 19276 | struct npu_set_activation_t |
| 19277 | { |
| 19278 | #ifdef __cplusplus |
| 19279 | private: |
| 19280 | #endif |
| 19281 | uint32_t opcode : 10; // opcode |
| 19282 | uint32_t reserved0 : 4; |
| 19283 | uint32_t control : 2; // control |
| 19284 | uint32_t activation_function : 5; // Activation function (before table lookup) |
| 19285 | uint32_t reserved1 : 7; |
| 19286 | uint32_t activation_clip_range : 3; // Activation clip range. This must be set to 0 if table lookup is not used |
| 19287 | uint32_t reserved2 : 1; |
| 19288 | #ifdef __cplusplus |
| 19289 | public: |
| 19290 | npu_set_activation_t(NPU_NAMESPACE::activation_function _activation_function, |
| 19291 | NPU_NAMESPACE::activation_clip_range _activation_clip_range) : |
| 19292 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION)), |
| 19293 | reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19294 | activation_function(static_cast<uint8_t>(_activation_function) & ((1U << 5) - 1)), reserved1(0), |
| 19295 | activation_clip_range(static_cast<uint8_t>(_activation_clip_range) & ((1U << 3) - 1)), reserved2(0) |
| 19296 | { |
| 19297 | } |
| 19298 | CONSTEXPR npu_set_activation_t() : |
| 19299 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION)), reserved0(0), |
| 19300 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_function(0), reserved1(0), |
| 19301 | activation_clip_range(0), reserved2(0) |
| 19302 | { |
| 19303 | } |
| 19304 | CONSTEXPR bool valid() const |
| 19305 | { |
| 19306 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION) && |
| 19307 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19308 | } |
| 19309 | CONSTEXPR void init() |
| 19310 | { |
| 19311 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION); |
| 19312 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19313 | } |
| 19314 | operator uint32_t() |
| 19315 | { |
| 19316 | uint32_t word; |
| 19317 | std::memcpy(&word, this, sizeof(word)); |
| 19318 | return word; |
| 19319 | } |
| 19320 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19321 | { |
| 19322 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19323 | } |
| 19324 | CONSTEXPR npu_set_activation_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19325 | { |
| 19326 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19327 | return *this; |
| 19328 | } |
| 19329 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19330 | { |
| 19331 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19332 | } |
| 19333 | CONSTEXPR npu_set_activation_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19334 | { |
| 19335 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19336 | return *this; |
| 19337 | } |
| 19338 | CONSTEXPR NPU_NAMESPACE::activation_function get_activation_function() const |
| 19339 | { |
| 19340 | return static_cast<NPU_NAMESPACE::activation_function>(activation_function); |
| 19341 | } |
| 19342 | CONSTEXPR npu_set_activation_t &set_activation_function(NPU_NAMESPACE::activation_function value) |
| 19343 | { |
| 19344 | activation_function = static_cast<uint8_t>(value) & ((1U << 5) - 1); |
| 19345 | return *this; |
| 19346 | } |
| 19347 | CONSTEXPR NPU_NAMESPACE::activation_clip_range get_activation_clip_range() const |
| 19348 | { |
| 19349 | return static_cast<NPU_NAMESPACE::activation_clip_range>(activation_clip_range); |
| 19350 | } |
| 19351 | CONSTEXPR npu_set_activation_t &set_activation_clip_range(NPU_NAMESPACE::activation_clip_range value) |
| 19352 | { |
| 19353 | activation_clip_range = static_cast<uint8_t>(value) & ((1U << 3) - 1); |
| 19354 | return *this; |
| 19355 | } |
| 19356 | #ifdef NPU_DISASSEMBLE |
| 19357 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19358 | { |
| 19359 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19360 | "activation_function", |
| 19361 | (activation_function < (sizeof(activation_function_str) / sizeof(activation_function_str[0])) ? |
| 19362 | activation_function_str[activation_function] : |
| 19363 | "****"))); |
| 19364 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19365 | "activation_clip_range", |
| 19366 | (activation_clip_range < (sizeof(activation_clip_range_str) / sizeof(activation_clip_range_str[0])) ? |
| 19367 | activation_clip_range_str[activation_clip_range] : |
| 19368 | "****"))); |
| 19369 | } |
| 19370 | #endif |
| 19371 | #endif |
| 19372 | }; |
| 19373 | // Lower bound clip |
| 19374 | struct npu_set_activation_min_t |
| 19375 | { |
| 19376 | #ifdef __cplusplus |
| 19377 | private: |
| 19378 | #endif |
| 19379 | uint32_t opcode : 10; // opcode |
| 19380 | uint32_t reserved0 : 4; |
| 19381 | uint32_t control : 2; // control |
| 19382 | uint32_t clip_boundary : 16; // Clip boundary for OFM activations |
| 19383 | #ifdef __cplusplus |
| 19384 | public: |
| 19385 | npu_set_activation_min_t(uint32_t _clip_boundary) : |
| 19386 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN)), reserved0(0), |
| 19387 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19388 | clip_boundary(static_cast<uint16_t>(_clip_boundary) & ((1U << 16) - 1)) |
| 19389 | { |
| 19390 | } |
| 19391 | CONSTEXPR npu_set_activation_min_t() : |
| 19392 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN)), reserved0(0), |
| 19393 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), clip_boundary(0) |
| 19394 | { |
| 19395 | } |
| 19396 | CONSTEXPR bool valid() const |
| 19397 | { |
| 19398 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN) && |
| 19399 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19400 | } |
| 19401 | CONSTEXPR void init() |
| 19402 | { |
| 19403 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MIN); |
| 19404 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19405 | } |
| 19406 | operator uint32_t() |
| 19407 | { |
| 19408 | uint32_t word; |
| 19409 | std::memcpy(&word, this, sizeof(word)); |
| 19410 | return word; |
| 19411 | } |
| 19412 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19413 | { |
| 19414 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19415 | } |
| 19416 | CONSTEXPR npu_set_activation_min_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19417 | { |
| 19418 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19419 | return *this; |
| 19420 | } |
| 19421 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19422 | { |
| 19423 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19424 | } |
| 19425 | CONSTEXPR npu_set_activation_min_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19426 | { |
| 19427 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19428 | return *this; |
| 19429 | } |
| 19430 | CONSTEXPR uint32_t get_clip_boundary() const |
| 19431 | { |
| 19432 | return static_cast<uint32_t>(clip_boundary); |
| 19433 | } |
| 19434 | CONSTEXPR npu_set_activation_min_t &set_clip_boundary(uint32_t value) |
| 19435 | { |
| 19436 | clip_boundary = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 19437 | return *this; |
| 19438 | } |
| 19439 | #ifdef NPU_DISASSEMBLE |
| 19440 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19441 | { |
| 19442 | fields.push_back(std::make_pair<std::string, std::string>("clip_boundary", std::to_string(clip_boundary))); |
| 19443 | } |
| 19444 | #endif |
| 19445 | #endif |
| 19446 | }; |
| 19447 | // Upper bound clip |
| 19448 | struct npu_set_activation_max_t |
| 19449 | { |
| 19450 | #ifdef __cplusplus |
| 19451 | private: |
| 19452 | #endif |
| 19453 | uint32_t opcode : 10; // opcode |
| 19454 | uint32_t reserved0 : 4; |
| 19455 | uint32_t control : 2; // control |
| 19456 | uint32_t clip_boundary : 16; // Clip boundary for OFM activations |
| 19457 | #ifdef __cplusplus |
| 19458 | public: |
| 19459 | npu_set_activation_max_t(uint32_t _clip_boundary) : |
| 19460 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX)), reserved0(0), |
| 19461 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19462 | clip_boundary(static_cast<uint16_t>(_clip_boundary) & ((1U << 16) - 1)) |
| 19463 | { |
| 19464 | } |
| 19465 | CONSTEXPR npu_set_activation_max_t() : |
| 19466 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX)), reserved0(0), |
| 19467 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), clip_boundary(0) |
| 19468 | { |
| 19469 | } |
| 19470 | CONSTEXPR bool valid() const |
| 19471 | { |
| 19472 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX) && |
| 19473 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19474 | } |
| 19475 | CONSTEXPR void init() |
| 19476 | { |
| 19477 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_ACTIVATION_MAX); |
| 19478 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19479 | } |
| 19480 | operator uint32_t() |
| 19481 | { |
| 19482 | uint32_t word; |
| 19483 | std::memcpy(&word, this, sizeof(word)); |
| 19484 | return word; |
| 19485 | } |
| 19486 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19487 | { |
| 19488 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19489 | } |
| 19490 | CONSTEXPR npu_set_activation_max_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19491 | { |
| 19492 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19493 | return *this; |
| 19494 | } |
| 19495 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19496 | { |
| 19497 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19498 | } |
| 19499 | CONSTEXPR npu_set_activation_max_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19500 | { |
| 19501 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19502 | return *this; |
| 19503 | } |
| 19504 | CONSTEXPR uint32_t get_clip_boundary() const |
| 19505 | { |
| 19506 | return static_cast<uint32_t>(clip_boundary); |
| 19507 | } |
| 19508 | CONSTEXPR npu_set_activation_max_t &set_clip_boundary(uint32_t value) |
| 19509 | { |
| 19510 | clip_boundary = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 19511 | return *this; |
| 19512 | } |
| 19513 | #ifdef NPU_DISASSEMBLE |
| 19514 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19515 | { |
| 19516 | fields.push_back(std::make_pair<std::string, std::string>("clip_boundary", std::to_string(clip_boundary))); |
| 19517 | } |
| 19518 | #endif |
| 19519 | #endif |
| 19520 | }; |
| 19521 | // Index n for weight stream access |
| 19522 | struct npu_set_weight_region_t |
| 19523 | { |
| 19524 | #ifdef __cplusplus |
| 19525 | private: |
| 19526 | #endif |
| 19527 | uint32_t opcode : 10; // opcode |
| 19528 | uint32_t reserved0 : 4; |
| 19529 | uint32_t control : 2; // control |
| 19530 | uint32_t region : 3; // Index n for weight stream access |
| 19531 | uint32_t reserved1 : 13; |
| 19532 | #ifdef __cplusplus |
| 19533 | public: |
| 19534 | npu_set_weight_region_t(uint32_t _region) : |
| 19535 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION)), reserved0(0), |
| 19536 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19537 | region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0) |
| 19538 | { |
| 19539 | } |
| 19540 | CONSTEXPR npu_set_weight_region_t() : |
| 19541 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION)), reserved0(0), |
| 19542 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0) |
| 19543 | { |
| 19544 | } |
| 19545 | CONSTEXPR bool valid() const |
| 19546 | { |
| 19547 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION) && |
| 19548 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19549 | } |
| 19550 | CONSTEXPR void init() |
| 19551 | { |
| 19552 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_WEIGHT_REGION); |
| 19553 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19554 | } |
| 19555 | operator uint32_t() |
| 19556 | { |
| 19557 | uint32_t word; |
| 19558 | std::memcpy(&word, this, sizeof(word)); |
| 19559 | return word; |
| 19560 | } |
| 19561 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19562 | { |
| 19563 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19564 | } |
| 19565 | CONSTEXPR npu_set_weight_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19566 | { |
| 19567 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19568 | return *this; |
| 19569 | } |
| 19570 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19571 | { |
| 19572 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19573 | } |
| 19574 | CONSTEXPR npu_set_weight_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19575 | { |
| 19576 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19577 | return *this; |
| 19578 | } |
| 19579 | CONSTEXPR uint32_t get_region() const |
| 19580 | { |
| 19581 | return static_cast<uint32_t>(region); |
| 19582 | } |
| 19583 | CONSTEXPR npu_set_weight_region_t &set_region(uint32_t value) |
| 19584 | { |
| 19585 | region = static_cast<uint8_t>(value) & ((1U << 3) - 1); |
| 19586 | return *this; |
| 19587 | } |
| 19588 | #ifdef NPU_DISASSEMBLE |
| 19589 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19590 | { |
| 19591 | fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region))); |
| 19592 | } |
| 19593 | #endif |
| 19594 | #endif |
| 19595 | }; |
| 19596 | // Index n for scale stream access |
| 19597 | struct npu_set_scale_region_t |
| 19598 | { |
| 19599 | #ifdef __cplusplus |
| 19600 | private: |
| 19601 | #endif |
| 19602 | uint32_t opcode : 10; // opcode |
| 19603 | uint32_t reserved0 : 4; |
| 19604 | uint32_t control : 2; // control |
| 19605 | uint32_t region : 3; // Index n for scale stream access |
| 19606 | uint32_t reserved1 : 13; |
| 19607 | #ifdef __cplusplus |
| 19608 | public: |
| 19609 | npu_set_scale_region_t(uint32_t _region) : |
| 19610 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION)), reserved0(0), |
| 19611 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19612 | region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0) |
| 19613 | { |
| 19614 | } |
| 19615 | CONSTEXPR npu_set_scale_region_t() : |
| 19616 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION)), reserved0(0), |
| 19617 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0) |
| 19618 | { |
| 19619 | } |
| 19620 | CONSTEXPR bool valid() const |
| 19621 | { |
| 19622 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION) && |
| 19623 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19624 | } |
| 19625 | CONSTEXPR void init() |
| 19626 | { |
| 19627 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_SCALE_REGION); |
| 19628 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19629 | } |
| 19630 | operator uint32_t() |
| 19631 | { |
| 19632 | uint32_t word; |
| 19633 | std::memcpy(&word, this, sizeof(word)); |
| 19634 | return word; |
| 19635 | } |
| 19636 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19637 | { |
| 19638 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19639 | } |
| 19640 | CONSTEXPR npu_set_scale_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19641 | { |
| 19642 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19643 | return *this; |
| 19644 | } |
| 19645 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19646 | { |
| 19647 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19648 | } |
| 19649 | CONSTEXPR npu_set_scale_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19650 | { |
| 19651 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19652 | return *this; |
| 19653 | } |
| 19654 | CONSTEXPR uint32_t get_region() const |
| 19655 | { |
| 19656 | return static_cast<uint32_t>(region); |
| 19657 | } |
| 19658 | CONSTEXPR npu_set_scale_region_t &set_region(uint32_t value) |
| 19659 | { |
| 19660 | region = static_cast<uint8_t>(value) & ((1U << 3) - 1); |
| 19661 | return *this; |
| 19662 | } |
| 19663 | #ifdef NPU_DISASSEMBLE |
| 19664 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19665 | { |
| 19666 | fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region))); |
| 19667 | } |
| 19668 | #endif |
| 19669 | #endif |
| 19670 | }; |
| 19671 | // Start of ACC0,ACC1 buffers |
| 19672 | struct npu_set_ab_start_t |
| 19673 | { |
| 19674 | #ifdef __cplusplus |
| 19675 | private: |
| 19676 | #endif |
| 19677 | uint32_t opcode : 10; // opcode |
| 19678 | uint32_t reserved0 : 4; |
| 19679 | uint32_t control : 2; // control |
| 19680 | uint32_t ab_start : 6; // Start of ACC0,ACC1 buffers in the SHRAM in KB units. Multiple of 2 |
| 19681 | uint32_t reserved1 : 10; |
| 19682 | #ifdef __cplusplus |
| 19683 | public: |
| 19684 | npu_set_ab_start_t(uint32_t _ab_start) : |
| 19685 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START)), reserved0(0), |
| 19686 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19687 | ab_start(static_cast<uint8_t>(_ab_start) & ((1U << 6) - 1)), reserved1(0) |
| 19688 | { |
| 19689 | } |
| 19690 | CONSTEXPR npu_set_ab_start_t() : |
| 19691 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START)), reserved0(0), |
| 19692 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), ab_start(0), reserved1(0) |
| 19693 | { |
| 19694 | } |
| 19695 | CONSTEXPR bool valid() const |
| 19696 | { |
| 19697 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START) && |
| 19698 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19699 | } |
| 19700 | CONSTEXPR void init() |
| 19701 | { |
| 19702 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_AB_START); |
| 19703 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19704 | } |
| 19705 | operator uint32_t() |
| 19706 | { |
| 19707 | uint32_t word; |
| 19708 | std::memcpy(&word, this, sizeof(word)); |
| 19709 | return word; |
| 19710 | } |
| 19711 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19712 | { |
| 19713 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19714 | } |
| 19715 | CONSTEXPR npu_set_ab_start_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19716 | { |
| 19717 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19718 | return *this; |
| 19719 | } |
| 19720 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19721 | { |
| 19722 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19723 | } |
| 19724 | CONSTEXPR npu_set_ab_start_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19725 | { |
| 19726 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19727 | return *this; |
| 19728 | } |
| 19729 | CONSTEXPR uint32_t get_ab_start() const |
| 19730 | { |
| 19731 | return static_cast<uint32_t>(ab_start); |
| 19732 | } |
| 19733 | CONSTEXPR npu_set_ab_start_t &set_ab_start(uint32_t value) |
| 19734 | { |
| 19735 | ab_start = static_cast<uint8_t>(value) & ((1U << 6) - 1); |
| 19736 | return *this; |
| 19737 | } |
| 19738 | #ifdef NPU_DISASSEMBLE |
| 19739 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19740 | { |
| 19741 | fields.push_back(std::make_pair<std::string, std::string>("ab_start", std::to_string(ab_start))); |
| 19742 | } |
| 19743 | #endif |
| 19744 | #endif |
| 19745 | }; |
| 19746 | // Block number of blocks dependency |
| 19747 | struct npu_set_blockdep_t |
| 19748 | { |
| 19749 | #ifdef __cplusplus |
| 19750 | private: |
| 19751 | #endif |
| 19752 | uint32_t opcode : 10; // opcode |
| 19753 | uint32_t reserved0 : 4; |
| 19754 | uint32_t control : 2; // control |
| 19755 | uint32_t blockdep : 2; // Block number of blocks dependency between kernel operations |
| 19756 | uint32_t reserved1 : 14; |
| 19757 | #ifdef __cplusplus |
| 19758 | public: |
| 19759 | npu_set_blockdep_t(uint32_t _blockdep) : |
| 19760 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP)), reserved0(0), |
| 19761 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19762 | blockdep(static_cast<uint8_t>(_blockdep) & ((1U << 2) - 1)), reserved1(0) |
| 19763 | { |
| 19764 | } |
| 19765 | CONSTEXPR npu_set_blockdep_t() : |
| 19766 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP)), reserved0(0), |
| 19767 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), blockdep(0), reserved1(0) |
| 19768 | { |
| 19769 | } |
| 19770 | CONSTEXPR bool valid() const |
| 19771 | { |
| 19772 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP) && |
| 19773 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19774 | } |
| 19775 | CONSTEXPR void init() |
| 19776 | { |
| 19777 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_BLOCKDEP); |
| 19778 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19779 | } |
| 19780 | operator uint32_t() |
| 19781 | { |
| 19782 | uint32_t word; |
| 19783 | std::memcpy(&word, this, sizeof(word)); |
| 19784 | return word; |
| 19785 | } |
| 19786 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19787 | { |
| 19788 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19789 | } |
| 19790 | CONSTEXPR npu_set_blockdep_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19791 | { |
| 19792 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19793 | return *this; |
| 19794 | } |
| 19795 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19796 | { |
| 19797 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19798 | } |
| 19799 | CONSTEXPR npu_set_blockdep_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19800 | { |
| 19801 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19802 | return *this; |
| 19803 | } |
| 19804 | CONSTEXPR uint32_t get_blockdep() const |
| 19805 | { |
| 19806 | return static_cast<uint32_t>(blockdep); |
| 19807 | } |
| 19808 | CONSTEXPR npu_set_blockdep_t &set_blockdep(uint32_t value) |
| 19809 | { |
| 19810 | blockdep = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19811 | return *this; |
| 19812 | } |
| 19813 | #ifdef NPU_DISASSEMBLE |
| 19814 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19815 | { |
| 19816 | fields.push_back(std::make_pair<std::string, std::string>("blockdep", std::to_string(blockdep))); |
| 19817 | } |
| 19818 | #endif |
| 19819 | #endif |
| 19820 | }; |
| 19821 | // DMA0 source region |
| 19822 | struct npu_set_dma0_src_region_t |
| 19823 | { |
| 19824 | #ifdef __cplusplus |
| 19825 | private: |
| 19826 | #endif |
| 19827 | uint32_t opcode : 10; // opcode |
| 19828 | uint32_t reserved0 : 4; |
| 19829 | uint32_t control : 2; // control |
| 19830 | uint32_t region : 3; // Region number |
| 19831 | uint32_t reserved1 : 5; |
| 19832 | uint32_t region_mode : 1; // Region mode |
| 19833 | uint32_t stride_mode : 2; // Stride mode |
| 19834 | uint32_t reserved2 : 5; |
| 19835 | #ifdef __cplusplus |
| 19836 | public: |
| 19837 | npu_set_dma0_src_region_t(uint32_t _region, |
| 19838 | NPU_NAMESPACE::dma_region_mode _region_mode, |
| 19839 | NPU_NAMESPACE::dma_stride_mode _stride_mode) : |
| 19840 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION)), |
| 19841 | reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19842 | region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0), |
| 19843 | region_mode(static_cast<uint8_t>(_region_mode) & ((1U << 1) - 1)), |
| 19844 | stride_mode(static_cast<uint8_t>(_stride_mode) & ((1U << 2) - 1)), reserved2(0) |
| 19845 | { |
| 19846 | } |
| 19847 | CONSTEXPR npu_set_dma0_src_region_t() : |
| 19848 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION)), reserved0(0), |
| 19849 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), region_mode(0), |
| 19850 | stride_mode(0), reserved2(0) |
| 19851 | { |
| 19852 | } |
| 19853 | CONSTEXPR bool valid() const |
| 19854 | { |
| 19855 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION) && |
| 19856 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19857 | } |
| 19858 | CONSTEXPR void init() |
| 19859 | { |
| 19860 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SRC_REGION); |
| 19861 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19862 | } |
| 19863 | operator uint32_t() |
| 19864 | { |
| 19865 | uint32_t word; |
| 19866 | std::memcpy(&word, this, sizeof(word)); |
| 19867 | return word; |
| 19868 | } |
| 19869 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19870 | { |
| 19871 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19872 | } |
| 19873 | CONSTEXPR npu_set_dma0_src_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19874 | { |
| 19875 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19876 | return *this; |
| 19877 | } |
| 19878 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19879 | { |
| 19880 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19881 | } |
| 19882 | CONSTEXPR npu_set_dma0_src_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19883 | { |
| 19884 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19885 | return *this; |
| 19886 | } |
| 19887 | CONSTEXPR uint32_t get_region() const |
| 19888 | { |
| 19889 | return static_cast<uint32_t>(region); |
| 19890 | } |
| 19891 | CONSTEXPR npu_set_dma0_src_region_t &set_region(uint32_t value) |
| 19892 | { |
| 19893 | region = static_cast<uint8_t>(value) & ((1U << 3) - 1); |
| 19894 | return *this; |
| 19895 | } |
| 19896 | CONSTEXPR NPU_NAMESPACE::dma_region_mode get_region_mode() const |
| 19897 | { |
| 19898 | return static_cast<NPU_NAMESPACE::dma_region_mode>(region_mode); |
| 19899 | } |
| 19900 | CONSTEXPR npu_set_dma0_src_region_t &set_region_mode(NPU_NAMESPACE::dma_region_mode value) |
| 19901 | { |
| 19902 | region_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 19903 | return *this; |
| 19904 | } |
| 19905 | CONSTEXPR NPU_NAMESPACE::dma_stride_mode get_stride_mode() const |
| 19906 | { |
| 19907 | return static_cast<NPU_NAMESPACE::dma_stride_mode>(stride_mode); |
| 19908 | } |
| 19909 | CONSTEXPR npu_set_dma0_src_region_t &set_stride_mode(NPU_NAMESPACE::dma_stride_mode value) |
| 19910 | { |
| 19911 | stride_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19912 | return *this; |
| 19913 | } |
| 19914 | #ifdef NPU_DISASSEMBLE |
| 19915 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 19916 | { |
| 19917 | fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region))); |
| 19918 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19919 | "region_mode", |
| 19920 | (region_mode < (sizeof(dma_region_mode_str) / sizeof(dma_region_mode_str[0])) ? |
| 19921 | dma_region_mode_str[region_mode] : |
| 19922 | "****"))); |
| 19923 | fields.push_back(std::make_pair<std::string, std::string>( |
| 19924 | "stride_mode", |
| 19925 | (stride_mode < (sizeof(dma_stride_mode_str) / sizeof(dma_stride_mode_str[0])) ? |
| 19926 | dma_stride_mode_str[stride_mode] : |
| 19927 | "****"))); |
| 19928 | } |
| 19929 | #endif |
| 19930 | #endif |
| 19931 | }; |
| 19932 | // DMA0 destination region |
| 19933 | struct npu_set_dma0_dst_region_t |
| 19934 | { |
| 19935 | #ifdef __cplusplus |
| 19936 | private: |
| 19937 | #endif |
| 19938 | uint32_t opcode : 10; // opcode |
| 19939 | uint32_t reserved0 : 4; |
| 19940 | uint32_t control : 2; // control |
| 19941 | uint32_t region : 3; // Region number if region_mode is region_mode_external. Else core mask to write to (bit k |
| 19942 | // set for core k=0,1) |
| 19943 | uint32_t reserved1 : 5; |
| 19944 | uint32_t region_mode : 1; // Region mode |
| 19945 | uint32_t stride_mode : 2; // Stride mode |
| 19946 | uint32_t reserved2 : 5; |
| 19947 | #ifdef __cplusplus |
| 19948 | public: |
| 19949 | npu_set_dma0_dst_region_t(uint32_t _region, |
| 19950 | NPU_NAMESPACE::dma_region_mode _region_mode, |
| 19951 | NPU_NAMESPACE::dma_stride_mode _stride_mode) : |
| 19952 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION)), |
| 19953 | reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 19954 | region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0), |
| 19955 | region_mode(static_cast<uint8_t>(_region_mode) & ((1U << 1) - 1)), |
| 19956 | stride_mode(static_cast<uint8_t>(_stride_mode) & ((1U << 2) - 1)), reserved2(0) |
| 19957 | { |
| 19958 | } |
| 19959 | CONSTEXPR npu_set_dma0_dst_region_t() : |
| 19960 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION)), reserved0(0), |
| 19961 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0), region_mode(0), |
| 19962 | stride_mode(0), reserved2(0) |
| 19963 | { |
| 19964 | } |
| 19965 | CONSTEXPR bool valid() const |
| 19966 | { |
| 19967 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION) && |
| 19968 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19969 | } |
| 19970 | CONSTEXPR void init() |
| 19971 | { |
| 19972 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_DST_REGION); |
| 19973 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 19974 | } |
| 19975 | operator uint32_t() |
| 19976 | { |
| 19977 | uint32_t word; |
| 19978 | std::memcpy(&word, this, sizeof(word)); |
| 19979 | return word; |
| 19980 | } |
| 19981 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 19982 | { |
| 19983 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 19984 | } |
| 19985 | CONSTEXPR npu_set_dma0_dst_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 19986 | { |
| 19987 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 19988 | return *this; |
| 19989 | } |
| 19990 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 19991 | { |
| 19992 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 19993 | } |
| 19994 | CONSTEXPR npu_set_dma0_dst_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 19995 | { |
| 19996 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 19997 | return *this; |
| 19998 | } |
| 19999 | CONSTEXPR uint32_t get_region() const |
| 20000 | { |
| 20001 | return static_cast<uint32_t>(region); |
| 20002 | } |
| 20003 | CONSTEXPR npu_set_dma0_dst_region_t &set_region(uint32_t value) |
| 20004 | { |
| 20005 | region = static_cast<uint8_t>(value) & ((1U << 3) - 1); |
| 20006 | return *this; |
| 20007 | } |
| 20008 | CONSTEXPR NPU_NAMESPACE::dma_region_mode get_region_mode() const |
| 20009 | { |
| 20010 | return static_cast<NPU_NAMESPACE::dma_region_mode>(region_mode); |
| 20011 | } |
| 20012 | CONSTEXPR npu_set_dma0_dst_region_t &set_region_mode(NPU_NAMESPACE::dma_region_mode value) |
| 20013 | { |
| 20014 | region_mode = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 20015 | return *this; |
| 20016 | } |
| 20017 | CONSTEXPR NPU_NAMESPACE::dma_stride_mode get_stride_mode() const |
| 20018 | { |
| 20019 | return static_cast<NPU_NAMESPACE::dma_stride_mode>(stride_mode); |
| 20020 | } |
| 20021 | CONSTEXPR npu_set_dma0_dst_region_t &set_stride_mode(NPU_NAMESPACE::dma_stride_mode value) |
| 20022 | { |
| 20023 | stride_mode = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20024 | return *this; |
| 20025 | } |
| 20026 | #ifdef NPU_DISASSEMBLE |
| 20027 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20028 | { |
| 20029 | fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region))); |
| 20030 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20031 | "region_mode", |
| 20032 | (region_mode < (sizeof(dma_region_mode_str) / sizeof(dma_region_mode_str[0])) ? |
| 20033 | dma_region_mode_str[region_mode] : |
| 20034 | "****"))); |
| 20035 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20036 | "stride_mode", |
| 20037 | (stride_mode < (sizeof(dma_stride_mode_str) / sizeof(dma_stride_mode_str[0])) ? |
| 20038 | dma_stride_mode_str[stride_mode] : |
| 20039 | "****"))); |
| 20040 | } |
| 20041 | #endif |
| 20042 | #endif |
| 20043 | }; |
| 20044 | // Size of second dimension for 2D/3D transfers |
| 20045 | struct npu_set_dma0_size0_t |
| 20046 | { |
| 20047 | #ifdef __cplusplus |
| 20048 | private: |
| 20049 | #endif |
| 20050 | uint32_t opcode : 10; // opcode |
| 20051 | uint32_t reserved0 : 4; |
| 20052 | uint32_t control : 2; // control |
| 20053 | uint32_t size : 16; // Size of second dimension for 2D/3D transfers |
| 20054 | #ifdef __cplusplus |
| 20055 | public: |
| 20056 | npu_set_dma0_size0_t(uint32_t _size) : |
| 20057 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0)), reserved0(0), |
| 20058 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20059 | size(static_cast<uint16_t>(_size) & ((1U << 16) - 1)) |
| 20060 | { |
| 20061 | } |
| 20062 | CONSTEXPR npu_set_dma0_size0_t() : |
| 20063 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0)), reserved0(0), |
| 20064 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), size(0) |
| 20065 | { |
| 20066 | } |
| 20067 | CONSTEXPR bool valid() const |
| 20068 | { |
| 20069 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0) && |
| 20070 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20071 | } |
| 20072 | CONSTEXPR void init() |
| 20073 | { |
| 20074 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE0); |
| 20075 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20076 | } |
| 20077 | operator uint32_t() |
| 20078 | { |
| 20079 | uint32_t word; |
| 20080 | std::memcpy(&word, this, sizeof(word)); |
| 20081 | return word; |
| 20082 | } |
| 20083 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20084 | { |
| 20085 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20086 | } |
| 20087 | CONSTEXPR npu_set_dma0_size0_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20088 | { |
| 20089 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20090 | return *this; |
| 20091 | } |
| 20092 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20093 | { |
| 20094 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20095 | } |
| 20096 | CONSTEXPR npu_set_dma0_size0_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20097 | { |
| 20098 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20099 | return *this; |
| 20100 | } |
| 20101 | CONSTEXPR uint32_t get_size() const |
| 20102 | { |
| 20103 | return static_cast<uint32_t>(size); |
| 20104 | } |
| 20105 | CONSTEXPR npu_set_dma0_size0_t &set_size(uint32_t value) |
| 20106 | { |
| 20107 | size = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 20108 | return *this; |
| 20109 | } |
| 20110 | #ifdef NPU_DISASSEMBLE |
| 20111 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20112 | { |
| 20113 | fields.push_back(std::make_pair<std::string, std::string>("size", std::to_string(size))); |
| 20114 | } |
| 20115 | #endif |
| 20116 | #endif |
| 20117 | }; |
| 20118 | // Size of third dimension for 3D transfers |
| 20119 | struct npu_set_dma0_size1_t |
| 20120 | { |
| 20121 | #ifdef __cplusplus |
| 20122 | private: |
| 20123 | #endif |
| 20124 | uint32_t opcode : 10; // opcode |
| 20125 | uint32_t reserved0 : 4; |
| 20126 | uint32_t control : 2; // control |
| 20127 | uint32_t size : 16; // Size of third dimension for 3D transfers |
| 20128 | #ifdef __cplusplus |
| 20129 | public: |
| 20130 | npu_set_dma0_size1_t(uint32_t _size) : |
| 20131 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1)), reserved0(0), |
| 20132 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20133 | size(static_cast<uint16_t>(_size) & ((1U << 16) - 1)) |
| 20134 | { |
| 20135 | } |
| 20136 | CONSTEXPR npu_set_dma0_size1_t() : |
| 20137 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1)), reserved0(0), |
| 20138 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), size(0) |
| 20139 | { |
| 20140 | } |
| 20141 | CONSTEXPR bool valid() const |
| 20142 | { |
| 20143 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1) && |
| 20144 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20145 | } |
| 20146 | CONSTEXPR void init() |
| 20147 | { |
| 20148 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_DMA0_SIZE1); |
| 20149 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20150 | } |
| 20151 | operator uint32_t() |
| 20152 | { |
| 20153 | uint32_t word; |
| 20154 | std::memcpy(&word, this, sizeof(word)); |
| 20155 | return word; |
| 20156 | } |
| 20157 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20158 | { |
| 20159 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20160 | } |
| 20161 | CONSTEXPR npu_set_dma0_size1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20162 | { |
| 20163 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20164 | return *this; |
| 20165 | } |
| 20166 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20167 | { |
| 20168 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20169 | } |
| 20170 | CONSTEXPR npu_set_dma0_size1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20171 | { |
| 20172 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20173 | return *this; |
| 20174 | } |
| 20175 | CONSTEXPR uint32_t get_size() const |
| 20176 | { |
| 20177 | return static_cast<uint32_t>(size); |
| 20178 | } |
| 20179 | CONSTEXPR npu_set_dma0_size1_t &set_size(uint32_t value) |
| 20180 | { |
| 20181 | size = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 20182 | return *this; |
| 20183 | } |
| 20184 | #ifdef NPU_DISASSEMBLE |
| 20185 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20186 | { |
| 20187 | fields.push_back(std::make_pair<std::string, std::string>("size", std::to_string(size))); |
| 20188 | } |
| 20189 | #endif |
| 20190 | #endif |
| 20191 | }; |
| 20192 | // IFM2 broadcast configuration |
| 20193 | struct npu_set_ifm2_broadcast_t |
| 20194 | { |
| 20195 | #ifdef __cplusplus |
| 20196 | private: |
| 20197 | #endif |
| 20198 | uint32_t opcode : 10; // opcode |
| 20199 | uint32_t reserved0 : 4; |
| 20200 | uint32_t control : 2; // control |
| 20201 | uint32_t |
| 20202 | broadcast_h : 1; // Broadcast H dimension (if set then any accesses to IFM2 sets y=0 and IFM2 height=1) |
| 20203 | uint32_t broadcast_w : 1; // Broadcast W dimension (if set then any accesses to IFM2 sets x=0 and IFM2 width=1) |
| 20204 | uint32_t broadcast_c : 1; // Broadcast C dimension (if set then any accesses to IFM2 sets c=0 and IFM2 depth=1) |
| 20205 | uint32_t reserved1 : 3; |
| 20206 | uint32_t operand_order : 1; // Operand order |
| 20207 | uint32_t broadcast_constant : 1; // Broadcast constant given by NPU_SET_IFM2_SCALAR and so ignore BH, BW and BC |
| 20208 | uint32_t reserved2 : 8; |
| 20209 | #ifdef __cplusplus |
| 20210 | public: |
| 20211 | npu_set_ifm2_broadcast_t(NPU_NAMESPACE::broadcast_mode _broadcast_h, |
| 20212 | NPU_NAMESPACE::broadcast_mode _broadcast_w, |
| 20213 | NPU_NAMESPACE::broadcast_mode _broadcast_c, |
| 20214 | NPU_NAMESPACE::ifm2_operand_order _operand_order, |
| 20215 | NPU_NAMESPACE::broadcast_mode _broadcast_constant) : |
| 20216 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST)), |
| 20217 | reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20218 | broadcast_h(static_cast<uint8_t>(_broadcast_h) & ((1U << 1) - 1)), |
| 20219 | broadcast_w(static_cast<uint8_t>(_broadcast_w) & ((1U << 1) - 1)), |
| 20220 | broadcast_c(static_cast<uint8_t>(_broadcast_c) & ((1U << 1) - 1)), reserved1(0), |
| 20221 | operand_order(static_cast<uint8_t>(_operand_order) & ((1U << 1) - 1)), |
| 20222 | broadcast_constant(static_cast<uint8_t>(_broadcast_constant) & ((1U << 1) - 1)), reserved2(0) |
| 20223 | { |
| 20224 | } |
| 20225 | CONSTEXPR npu_set_ifm2_broadcast_t() : |
| 20226 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST)), reserved0(0), |
| 20227 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), broadcast_h(0), broadcast_w(0), |
| 20228 | broadcast_c(0), reserved1(0), operand_order(0), broadcast_constant(0), reserved2(0) |
| 20229 | { |
| 20230 | } |
| 20231 | CONSTEXPR bool valid() const |
| 20232 | { |
| 20233 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST) && |
| 20234 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20235 | } |
| 20236 | CONSTEXPR void init() |
| 20237 | { |
| 20238 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_BROADCAST); |
| 20239 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20240 | } |
| 20241 | operator uint32_t() |
| 20242 | { |
| 20243 | uint32_t word; |
| 20244 | std::memcpy(&word, this, sizeof(word)); |
| 20245 | return word; |
| 20246 | } |
| 20247 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20248 | { |
| 20249 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20250 | } |
| 20251 | CONSTEXPR npu_set_ifm2_broadcast_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20252 | { |
| 20253 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20254 | return *this; |
| 20255 | } |
| 20256 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20257 | { |
| 20258 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20259 | } |
| 20260 | CONSTEXPR npu_set_ifm2_broadcast_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20261 | { |
| 20262 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20263 | return *this; |
| 20264 | } |
| 20265 | CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_h() const |
| 20266 | { |
| 20267 | return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_h); |
| 20268 | } |
| 20269 | CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_h(NPU_NAMESPACE::broadcast_mode value) |
| 20270 | { |
| 20271 | broadcast_h = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 20272 | return *this; |
| 20273 | } |
| 20274 | CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_w() const |
| 20275 | { |
| 20276 | return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_w); |
| 20277 | } |
| 20278 | CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_w(NPU_NAMESPACE::broadcast_mode value) |
| 20279 | { |
| 20280 | broadcast_w = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 20281 | return *this; |
| 20282 | } |
| 20283 | CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_c() const |
| 20284 | { |
| 20285 | return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_c); |
| 20286 | } |
| 20287 | CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_c(NPU_NAMESPACE::broadcast_mode value) |
| 20288 | { |
| 20289 | broadcast_c = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 20290 | return *this; |
| 20291 | } |
| 20292 | CONSTEXPR NPU_NAMESPACE::ifm2_operand_order get_operand_order() const |
| 20293 | { |
| 20294 | return static_cast<NPU_NAMESPACE::ifm2_operand_order>(operand_order); |
| 20295 | } |
| 20296 | CONSTEXPR npu_set_ifm2_broadcast_t &set_operand_order(NPU_NAMESPACE::ifm2_operand_order value) |
| 20297 | { |
| 20298 | operand_order = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 20299 | return *this; |
| 20300 | } |
| 20301 | CONSTEXPR NPU_NAMESPACE::broadcast_mode get_broadcast_constant() const |
| 20302 | { |
| 20303 | return static_cast<NPU_NAMESPACE::broadcast_mode>(broadcast_constant); |
| 20304 | } |
| 20305 | CONSTEXPR npu_set_ifm2_broadcast_t &set_broadcast_constant(NPU_NAMESPACE::broadcast_mode value) |
| 20306 | { |
| 20307 | broadcast_constant = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 20308 | return *this; |
| 20309 | } |
| 20310 | #ifdef NPU_DISASSEMBLE |
| 20311 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20312 | { |
| 20313 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20314 | "broadcast_h", |
| 20315 | (broadcast_h < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ? |
| 20316 | broadcast_mode_str[broadcast_h] : |
| 20317 | "****"))); |
| 20318 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20319 | "broadcast_w", |
| 20320 | (broadcast_w < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ? |
| 20321 | broadcast_mode_str[broadcast_w] : |
| 20322 | "****"))); |
| 20323 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20324 | "broadcast_c", |
| 20325 | (broadcast_c < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ? |
| 20326 | broadcast_mode_str[broadcast_c] : |
| 20327 | "****"))); |
| 20328 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20329 | "operand_order", |
| 20330 | (operand_order < (sizeof(ifm2_operand_order_str) / sizeof(ifm2_operand_order_str[0])) ? |
| 20331 | ifm2_operand_order_str[operand_order] : |
| 20332 | "****"))); |
| 20333 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20334 | "broadcast_constant", |
| 20335 | (broadcast_constant < (sizeof(broadcast_mode_str) / sizeof(broadcast_mode_str[0])) ? |
| 20336 | broadcast_mode_str[broadcast_constant] : |
| 20337 | "****"))); |
| 20338 | } |
| 20339 | #endif |
| 20340 | #endif |
| 20341 | }; |
| 20342 | // IFM2 scalar value |
| 20343 | struct npu_set_ifm2_scalar_t |
| 20344 | { |
| 20345 | #ifdef __cplusplus |
| 20346 | private: |
| 20347 | #endif |
| 20348 | uint32_t opcode : 10; // opcode |
| 20349 | uint32_t reserved0 : 4; |
| 20350 | uint32_t control : 2; // control |
| 20351 | uint32_t scalar : 16; // int16 or uint16 depending on ifm2_precision.type |
| 20352 | #ifdef __cplusplus |
| 20353 | public: |
| 20354 | npu_set_ifm2_scalar_t(uint32_t _scalar) : |
| 20355 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR)), reserved0(0), |
| 20356 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20357 | scalar(static_cast<uint16_t>(_scalar) & ((1U << 16) - 1)) |
| 20358 | { |
| 20359 | } |
| 20360 | CONSTEXPR npu_set_ifm2_scalar_t() : |
| 20361 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR)), reserved0(0), |
| 20362 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), scalar(0) |
| 20363 | { |
| 20364 | } |
| 20365 | CONSTEXPR bool valid() const |
| 20366 | { |
| 20367 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR) && |
| 20368 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20369 | } |
| 20370 | CONSTEXPR void init() |
| 20371 | { |
| 20372 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_SCALAR); |
| 20373 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20374 | } |
| 20375 | operator uint32_t() |
| 20376 | { |
| 20377 | uint32_t word; |
| 20378 | std::memcpy(&word, this, sizeof(word)); |
| 20379 | return word; |
| 20380 | } |
| 20381 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20382 | { |
| 20383 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20384 | } |
| 20385 | CONSTEXPR npu_set_ifm2_scalar_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20386 | { |
| 20387 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20388 | return *this; |
| 20389 | } |
| 20390 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20391 | { |
| 20392 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20393 | } |
| 20394 | CONSTEXPR npu_set_ifm2_scalar_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20395 | { |
| 20396 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20397 | return *this; |
| 20398 | } |
| 20399 | CONSTEXPR uint32_t get_scalar() const |
| 20400 | { |
| 20401 | return static_cast<uint32_t>(scalar); |
| 20402 | } |
| 20403 | CONSTEXPR npu_set_ifm2_scalar_t &set_scalar(uint32_t value) |
| 20404 | { |
| 20405 | scalar = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 20406 | return *this; |
| 20407 | } |
| 20408 | #ifdef NPU_DISASSEMBLE |
| 20409 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20410 | { |
| 20411 | fields.push_back(std::make_pair<std::string, std::string>("scalar", std::to_string(scalar))); |
| 20412 | } |
| 20413 | #endif |
| 20414 | #endif |
| 20415 | }; |
| 20416 | // IFM2 Precision |
| 20417 | struct npu_set_ifm2_precision_t |
| 20418 | { |
| 20419 | #ifdef __cplusplus |
| 20420 | private: |
| 20421 | #endif |
| 20422 | uint32_t opcode : 10; // opcode |
| 20423 | uint32_t reserved0 : 4; |
| 20424 | uint32_t control : 2; // control |
| 20425 | uint32_t activation_type : 1; // IFM type - MUST MATCH IFM |
| 20426 | uint32_t reserved1 : 1; |
| 20427 | uint32_t activation_precision : 2; // IFM precision - MUST MATCH IFM |
| 20428 | uint32_t reserved2 : 2; |
| 20429 | uint32_t activation_format : 2; // IFM format |
| 20430 | uint32_t reserved3 : 8; |
| 20431 | #ifdef __cplusplus |
| 20432 | public: |
| 20433 | npu_set_ifm2_precision_t(NPU_NAMESPACE::activation_type _activation_type, |
| 20434 | NPU_NAMESPACE::activation_precision _activation_precision, |
| 20435 | NPU_NAMESPACE::activation_format _activation_format) : |
| 20436 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION)), |
| 20437 | reserved0(0), control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20438 | activation_type(static_cast<uint8_t>(_activation_type) & ((1U << 1) - 1)), reserved1(0), |
| 20439 | activation_precision(static_cast<uint8_t>(_activation_precision) & ((1U << 2) - 1)), reserved2(0), |
| 20440 | activation_format(static_cast<uint8_t>(_activation_format) & ((1U << 2) - 1)), reserved3(0) |
| 20441 | { |
| 20442 | } |
| 20443 | CONSTEXPR npu_set_ifm2_precision_t() : |
| 20444 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION)), reserved0(0), |
| 20445 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), activation_type(0), reserved1(0), |
| 20446 | activation_precision(0), reserved2(0), activation_format(0), reserved3(0) |
| 20447 | { |
| 20448 | } |
| 20449 | CONSTEXPR bool valid() const |
| 20450 | { |
| 20451 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION) && |
| 20452 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20453 | } |
| 20454 | CONSTEXPR void init() |
| 20455 | { |
| 20456 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_PRECISION); |
| 20457 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20458 | } |
| 20459 | operator uint32_t() |
| 20460 | { |
| 20461 | uint32_t word; |
| 20462 | std::memcpy(&word, this, sizeof(word)); |
| 20463 | return word; |
| 20464 | } |
| 20465 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20466 | { |
| 20467 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20468 | } |
| 20469 | CONSTEXPR npu_set_ifm2_precision_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20470 | { |
| 20471 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20472 | return *this; |
| 20473 | } |
| 20474 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20475 | { |
| 20476 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20477 | } |
| 20478 | CONSTEXPR npu_set_ifm2_precision_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20479 | { |
| 20480 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20481 | return *this; |
| 20482 | } |
| 20483 | CONSTEXPR NPU_NAMESPACE::activation_type get_activation_type() const |
| 20484 | { |
| 20485 | return static_cast<NPU_NAMESPACE::activation_type>(activation_type); |
| 20486 | } |
| 20487 | CONSTEXPR npu_set_ifm2_precision_t &set_activation_type(NPU_NAMESPACE::activation_type value) |
| 20488 | { |
| 20489 | activation_type = static_cast<uint8_t>(value) & ((1U << 1) - 1); |
| 20490 | return *this; |
| 20491 | } |
| 20492 | CONSTEXPR NPU_NAMESPACE::activation_precision get_activation_precision() const |
| 20493 | { |
| 20494 | return static_cast<NPU_NAMESPACE::activation_precision>(activation_precision); |
| 20495 | } |
| 20496 | CONSTEXPR npu_set_ifm2_precision_t &set_activation_precision(NPU_NAMESPACE::activation_precision value) |
| 20497 | { |
| 20498 | activation_precision = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20499 | return *this; |
| 20500 | } |
| 20501 | CONSTEXPR NPU_NAMESPACE::activation_format get_activation_format() const |
| 20502 | { |
| 20503 | return static_cast<NPU_NAMESPACE::activation_format>(activation_format); |
| 20504 | } |
| 20505 | CONSTEXPR npu_set_ifm2_precision_t &set_activation_format(NPU_NAMESPACE::activation_format value) |
| 20506 | { |
| 20507 | activation_format = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20508 | return *this; |
| 20509 | } |
| 20510 | #ifdef NPU_DISASSEMBLE |
| 20511 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20512 | { |
| 20513 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20514 | "activation_type", |
| 20515 | (activation_type < (sizeof(activation_type_str) / sizeof(activation_type_str[0])) ? |
| 20516 | activation_type_str[activation_type] : |
| 20517 | "****"))); |
| 20518 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20519 | "activation_precision", |
| 20520 | (activation_precision < (sizeof(activation_precision_str) / sizeof(activation_precision_str[0])) ? |
| 20521 | activation_precision_str[activation_precision] : |
| 20522 | "****"))); |
| 20523 | fields.push_back(std::make_pair<std::string, std::string>( |
| 20524 | "activation_format", |
| 20525 | (activation_format < (sizeof(activation_format_str) / sizeof(activation_format_str[0])) ? |
| 20526 | activation_format_str[activation_format] : |
| 20527 | "****"))); |
| 20528 | } |
| 20529 | #endif |
| 20530 | #endif |
| 20531 | }; |
| 20532 | // IFM2 zero point |
| 20533 | struct npu_set_ifm2_zero_point_t |
| 20534 | { |
| 20535 | #ifdef __cplusplus |
| 20536 | private: |
| 20537 | #endif |
| 20538 | uint32_t opcode : 10; // opcode |
| 20539 | uint32_t reserved0 : 4; |
| 20540 | uint32_t control : 2; // control |
| 20541 | uint32_t zero_point : 16; // Zero point offset |
| 20542 | #ifdef __cplusplus |
| 20543 | public: |
| 20544 | npu_set_ifm2_zero_point_t(uint32_t _zero_point) : |
| 20545 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT)), reserved0(0), |
| 20546 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20547 | zero_point(static_cast<uint16_t>(_zero_point) & ((1U << 16) - 1)) |
| 20548 | { |
| 20549 | } |
| 20550 | CONSTEXPR npu_set_ifm2_zero_point_t() : |
| 20551 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT)), reserved0(0), |
| 20552 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), zero_point(0) |
| 20553 | { |
| 20554 | } |
| 20555 | CONSTEXPR bool valid() const |
| 20556 | { |
| 20557 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT) && |
| 20558 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20559 | } |
| 20560 | CONSTEXPR void init() |
| 20561 | { |
| 20562 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_ZERO_POINT); |
| 20563 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20564 | } |
| 20565 | operator uint32_t() |
| 20566 | { |
| 20567 | uint32_t word; |
| 20568 | std::memcpy(&word, this, sizeof(word)); |
| 20569 | return word; |
| 20570 | } |
| 20571 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20572 | { |
| 20573 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20574 | } |
| 20575 | CONSTEXPR npu_set_ifm2_zero_point_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20576 | { |
| 20577 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20578 | return *this; |
| 20579 | } |
| 20580 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20581 | { |
| 20582 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20583 | } |
| 20584 | CONSTEXPR npu_set_ifm2_zero_point_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20585 | { |
| 20586 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20587 | return *this; |
| 20588 | } |
| 20589 | CONSTEXPR uint32_t get_zero_point() const |
| 20590 | { |
| 20591 | return static_cast<uint32_t>(zero_point); |
| 20592 | } |
| 20593 | CONSTEXPR npu_set_ifm2_zero_point_t &set_zero_point(uint32_t value) |
| 20594 | { |
| 20595 | zero_point = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 20596 | return *this; |
| 20597 | } |
| 20598 | #ifdef NPU_DISASSEMBLE |
| 20599 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20600 | { |
| 20601 | fields.push_back(std::make_pair<std::string, std::string>("zero_point", std::to_string(zero_point))); |
| 20602 | } |
| 20603 | #endif |
| 20604 | #endif |
| 20605 | }; |
| 20606 | // IFM2 Tile 0 and tile 2 width |
| 20607 | struct npu_set_ifm2_width0_m1_t |
| 20608 | { |
| 20609 | #ifdef __cplusplus |
| 20610 | private: |
| 20611 | #endif |
| 20612 | uint32_t opcode : 10; // opcode |
| 20613 | uint32_t reserved0 : 4; |
| 20614 | uint32_t control : 2; // control |
| 20615 | uint32_t width_m1 : 16; // IFM2 Tile 0 and tile 2 width |
| 20616 | #ifdef __cplusplus |
| 20617 | public: |
| 20618 | npu_set_ifm2_width0_m1_t(uint32_t _width_m1) : |
| 20619 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1)), reserved0(0), |
| 20620 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20621 | width_m1(static_cast<uint16_t>(_width_m1) & ((1U << 16) - 1)) |
| 20622 | { |
| 20623 | } |
| 20624 | CONSTEXPR npu_set_ifm2_width0_m1_t() : |
| 20625 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1)), reserved0(0), |
| 20626 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), width_m1(0) |
| 20627 | { |
| 20628 | } |
| 20629 | CONSTEXPR bool valid() const |
| 20630 | { |
| 20631 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1) && |
| 20632 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20633 | } |
| 20634 | CONSTEXPR void init() |
| 20635 | { |
| 20636 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_WIDTH0_M1); |
| 20637 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20638 | } |
| 20639 | operator uint32_t() |
| 20640 | { |
| 20641 | uint32_t word; |
| 20642 | std::memcpy(&word, this, sizeof(word)); |
| 20643 | return word; |
| 20644 | } |
| 20645 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20646 | { |
| 20647 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20648 | } |
| 20649 | CONSTEXPR npu_set_ifm2_width0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20650 | { |
| 20651 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20652 | return *this; |
| 20653 | } |
| 20654 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20655 | { |
| 20656 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20657 | } |
| 20658 | CONSTEXPR npu_set_ifm2_width0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20659 | { |
| 20660 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20661 | return *this; |
| 20662 | } |
| 20663 | CONSTEXPR uint32_t get_width_m1() const |
| 20664 | { |
| 20665 | return static_cast<uint32_t>(width_m1); |
| 20666 | } |
| 20667 | CONSTEXPR npu_set_ifm2_width0_m1_t &set_width_m1(uint32_t value) |
| 20668 | { |
| 20669 | width_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 20670 | return *this; |
| 20671 | } |
| 20672 | #ifdef NPU_DISASSEMBLE |
| 20673 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20674 | { |
| 20675 | fields.push_back(std::make_pair<std::string, std::string>("width_m1", std::to_string(width_m1))); |
| 20676 | } |
| 20677 | #endif |
| 20678 | #endif |
| 20679 | }; |
| 20680 | // IFM2 Tile 0 height |
| 20681 | struct npu_set_ifm2_height0_m1_t |
| 20682 | { |
| 20683 | #ifdef __cplusplus |
| 20684 | private: |
| 20685 | #endif |
| 20686 | uint32_t opcode : 10; // opcode |
| 20687 | uint32_t reserved0 : 4; |
| 20688 | uint32_t control : 2; // control |
| 20689 | uint32_t height_m1 : 16; // IFM2 Tile 0 height |
| 20690 | #ifdef __cplusplus |
| 20691 | public: |
| 20692 | npu_set_ifm2_height0_m1_t(uint32_t _height_m1) : |
| 20693 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1)), reserved0(0), |
| 20694 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20695 | height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1)) |
| 20696 | { |
| 20697 | } |
| 20698 | CONSTEXPR npu_set_ifm2_height0_m1_t() : |
| 20699 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1)), reserved0(0), |
| 20700 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0) |
| 20701 | { |
| 20702 | } |
| 20703 | CONSTEXPR bool valid() const |
| 20704 | { |
| 20705 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1) && |
| 20706 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20707 | } |
| 20708 | CONSTEXPR void init() |
| 20709 | { |
| 20710 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT0_M1); |
| 20711 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20712 | } |
| 20713 | operator uint32_t() |
| 20714 | { |
| 20715 | uint32_t word; |
| 20716 | std::memcpy(&word, this, sizeof(word)); |
| 20717 | return word; |
| 20718 | } |
| 20719 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20720 | { |
| 20721 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20722 | } |
| 20723 | CONSTEXPR npu_set_ifm2_height0_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20724 | { |
| 20725 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20726 | return *this; |
| 20727 | } |
| 20728 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20729 | { |
| 20730 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20731 | } |
| 20732 | CONSTEXPR npu_set_ifm2_height0_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20733 | { |
| 20734 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20735 | return *this; |
| 20736 | } |
| 20737 | CONSTEXPR uint32_t get_height_m1() const |
| 20738 | { |
| 20739 | return static_cast<uint32_t>(height_m1); |
| 20740 | } |
| 20741 | CONSTEXPR npu_set_ifm2_height0_m1_t &set_height_m1(uint32_t value) |
| 20742 | { |
| 20743 | height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 20744 | return *this; |
| 20745 | } |
| 20746 | #ifdef NPU_DISASSEMBLE |
| 20747 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20748 | { |
| 20749 | fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1))); |
| 20750 | } |
| 20751 | #endif |
| 20752 | #endif |
| 20753 | }; |
| 20754 | // IFM2 Tile 1 height |
| 20755 | struct npu_set_ifm2_height1_m1_t |
| 20756 | { |
| 20757 | #ifdef __cplusplus |
| 20758 | private: |
| 20759 | #endif |
| 20760 | uint32_t opcode : 10; // opcode |
| 20761 | uint32_t reserved0 : 4; |
| 20762 | uint32_t control : 2; // control |
| 20763 | uint32_t height_m1 : 16; // IFM2 Tile 1 height |
| 20764 | #ifdef __cplusplus |
| 20765 | public: |
| 20766 | npu_set_ifm2_height1_m1_t(uint32_t _height_m1) : |
| 20767 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1)), reserved0(0), |
| 20768 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20769 | height_m1(static_cast<uint16_t>(_height_m1) & ((1U << 16) - 1)) |
| 20770 | { |
| 20771 | } |
| 20772 | CONSTEXPR npu_set_ifm2_height1_m1_t() : |
| 20773 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1)), reserved0(0), |
| 20774 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), height_m1(0) |
| 20775 | { |
| 20776 | } |
| 20777 | CONSTEXPR bool valid() const |
| 20778 | { |
| 20779 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1) && |
| 20780 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20781 | } |
| 20782 | CONSTEXPR void init() |
| 20783 | { |
| 20784 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_HEIGHT1_M1); |
| 20785 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20786 | } |
| 20787 | operator uint32_t() |
| 20788 | { |
| 20789 | uint32_t word; |
| 20790 | std::memcpy(&word, this, sizeof(word)); |
| 20791 | return word; |
| 20792 | } |
| 20793 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20794 | { |
| 20795 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20796 | } |
| 20797 | CONSTEXPR npu_set_ifm2_height1_m1_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20798 | { |
| 20799 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20800 | return *this; |
| 20801 | } |
| 20802 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20803 | { |
| 20804 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20805 | } |
| 20806 | CONSTEXPR npu_set_ifm2_height1_m1_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20807 | { |
| 20808 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20809 | return *this; |
| 20810 | } |
| 20811 | CONSTEXPR uint32_t get_height_m1() const |
| 20812 | { |
| 20813 | return static_cast<uint32_t>(height_m1); |
| 20814 | } |
| 20815 | CONSTEXPR npu_set_ifm2_height1_m1_t &set_height_m1(uint32_t value) |
| 20816 | { |
| 20817 | height_m1 = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 20818 | return *this; |
| 20819 | } |
| 20820 | #ifdef NPU_DISASSEMBLE |
| 20821 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20822 | { |
| 20823 | fields.push_back(std::make_pair<std::string, std::string>("height_m1", std::to_string(height_m1))); |
| 20824 | } |
| 20825 | #endif |
| 20826 | #endif |
| 20827 | }; |
| 20828 | // Start of IB0,IB1 buffers for IFM2 |
| 20829 | struct npu_set_ifm2_ib_start_t |
| 20830 | { |
| 20831 | #ifdef __cplusplus |
| 20832 | private: |
| 20833 | #endif |
| 20834 | uint32_t opcode : 10; // opcode |
| 20835 | uint32_t reserved0 : 4; |
| 20836 | uint32_t control : 2; // control |
| 20837 | uint32_t ib_start : 6; // Start of IB0,IB1 buffers for IFM2 in the SHRAM in KB units. Multiple of 2 |
| 20838 | uint32_t reserved1 : 10; |
| 20839 | #ifdef __cplusplus |
| 20840 | public: |
| 20841 | npu_set_ifm2_ib_start_t(uint32_t _ib_start) : |
| 20842 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START)), reserved0(0), |
| 20843 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20844 | ib_start(static_cast<uint8_t>(_ib_start) & ((1U << 6) - 1)), reserved1(0) |
| 20845 | { |
| 20846 | } |
| 20847 | CONSTEXPR npu_set_ifm2_ib_start_t() : |
| 20848 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START)), reserved0(0), |
| 20849 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), ib_start(0), reserved1(0) |
| 20850 | { |
| 20851 | } |
| 20852 | CONSTEXPR bool valid() const |
| 20853 | { |
| 20854 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START) && |
| 20855 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20856 | } |
| 20857 | CONSTEXPR void init() |
| 20858 | { |
| 20859 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_IB_START); |
| 20860 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20861 | } |
| 20862 | operator uint32_t() |
| 20863 | { |
| 20864 | uint32_t word; |
| 20865 | std::memcpy(&word, this, sizeof(word)); |
| 20866 | return word; |
| 20867 | } |
| 20868 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20869 | { |
| 20870 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20871 | } |
| 20872 | CONSTEXPR npu_set_ifm2_ib_start_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20873 | { |
| 20874 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20875 | return *this; |
| 20876 | } |
| 20877 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20878 | { |
| 20879 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20880 | } |
| 20881 | CONSTEXPR npu_set_ifm2_ib_start_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20882 | { |
| 20883 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20884 | return *this; |
| 20885 | } |
| 20886 | CONSTEXPR uint32_t get_ib_start() const |
| 20887 | { |
| 20888 | return static_cast<uint32_t>(ib_start); |
| 20889 | } |
| 20890 | CONSTEXPR npu_set_ifm2_ib_start_t &set_ib_start(uint32_t value) |
| 20891 | { |
| 20892 | ib_start = static_cast<uint8_t>(value) & ((1U << 6) - 1); |
| 20893 | return *this; |
| 20894 | } |
| 20895 | #ifdef NPU_DISASSEMBLE |
| 20896 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20897 | { |
| 20898 | fields.push_back(std::make_pair<std::string, std::string>("ib_start", std::to_string(ib_start))); |
| 20899 | } |
| 20900 | #endif |
| 20901 | #endif |
| 20902 | }; |
| 20903 | // Index n for IFM2 access |
| 20904 | struct npu_set_ifm2_region_t |
| 20905 | { |
| 20906 | #ifdef __cplusplus |
| 20907 | private: |
| 20908 | #endif |
| 20909 | uint32_t opcode : 10; // opcode |
| 20910 | uint32_t reserved0 : 4; |
| 20911 | uint32_t control : 2; // control |
| 20912 | uint32_t region : 3; // Index n for IFM2 access |
| 20913 | uint32_t reserved1 : 13; |
| 20914 | #ifdef __cplusplus |
| 20915 | public: |
| 20916 | npu_set_ifm2_region_t(uint32_t _region) : |
| 20917 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION)), reserved0(0), |
| 20918 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), |
| 20919 | region(static_cast<uint8_t>(_region) & ((1U << 3) - 1)), reserved1(0) |
| 20920 | { |
| 20921 | } |
| 20922 | CONSTEXPR npu_set_ifm2_region_t() : |
| 20923 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION)), reserved0(0), |
| 20924 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL)), region(0), reserved1(0) |
| 20925 | { |
| 20926 | } |
| 20927 | CONSTEXPR bool valid() const |
| 20928 | { |
| 20929 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION) && |
| 20930 | control == static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20931 | } |
| 20932 | CONSTEXPR void init() |
| 20933 | { |
| 20934 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd0_opcode::NPU_SET_IFM2_REGION); |
| 20935 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD0_CTRL); |
| 20936 | } |
| 20937 | operator uint32_t() |
| 20938 | { |
| 20939 | uint32_t word; |
| 20940 | std::memcpy(&word, this, sizeof(word)); |
| 20941 | return word; |
| 20942 | } |
| 20943 | CONSTEXPR NPU_NAMESPACE::cmd0_opcode get_opcode() const |
| 20944 | { |
| 20945 | return static_cast<NPU_NAMESPACE::cmd0_opcode>(opcode); |
| 20946 | } |
| 20947 | CONSTEXPR npu_set_ifm2_region_t &set_opcode(NPU_NAMESPACE::cmd0_opcode value) |
| 20948 | { |
| 20949 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 20950 | return *this; |
| 20951 | } |
| 20952 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 20953 | { |
| 20954 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 20955 | } |
| 20956 | CONSTEXPR npu_set_ifm2_region_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 20957 | { |
| 20958 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 20959 | return *this; |
| 20960 | } |
| 20961 | CONSTEXPR uint32_t get_region() const |
| 20962 | { |
| 20963 | return static_cast<uint32_t>(region); |
| 20964 | } |
| 20965 | CONSTEXPR npu_set_ifm2_region_t &set_region(uint32_t value) |
| 20966 | { |
| 20967 | region = static_cast<uint8_t>(value) & ((1U << 3) - 1); |
| 20968 | return *this; |
| 20969 | } |
| 20970 | #ifdef NPU_DISASSEMBLE |
| 20971 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 20972 | { |
| 20973 | fields.push_back(std::make_pair<std::string, std::string>("region", std::to_string(region))); |
| 20974 | } |
| 20975 | #endif |
| 20976 | #endif |
| 20977 | }; |
| 20978 | // IFM Tile 0 address |
| 20979 | struct npu_set_ifm_base0_t |
| 20980 | { |
| 20981 | #ifdef __cplusplus |
| 20982 | private: |
| 20983 | #endif |
| 20984 | uint32_t opcode : 10; // opcode |
| 20985 | uint32_t reserved0 : 4; |
| 20986 | uint32_t control : 2; // control |
| 20987 | uint32_t addr_hi : 8; // address extension |
| 20988 | uint32_t reserved1 : 8; |
| 20989 | uint32_t addr_lo : 32; // address offset |
| 20990 | #ifdef __cplusplus |
| 20991 | public: |
| 20992 | npu_set_ifm_base0_t(uint64_t _addr) : |
| 20993 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0)), reserved0(0), |
| 20994 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 20995 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 20996 | reserved1(0), |
| 20997 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 20998 | { |
| 20999 | } |
| 21000 | CONSTEXPR npu_set_ifm_base0_t() : |
| 21001 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0)), reserved0(0), |
| 21002 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21003 | { |
| 21004 | } |
| 21005 | CONSTEXPR bool valid() const |
| 21006 | { |
| 21007 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0) && control >= 1 && |
| 21008 | control <= 2; |
| 21009 | } |
| 21010 | CONSTEXPR void init() |
| 21011 | { |
| 21012 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE0); |
| 21013 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21014 | } |
| 21015 | operator uint64_t() |
| 21016 | { |
| 21017 | uint64_t word; |
| 21018 | std::memcpy(&word, this, sizeof(word)); |
| 21019 | return word; |
| 21020 | } |
| 21021 | CONSTEXPR uint64_t get_addr() const |
| 21022 | { |
| 21023 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21024 | } |
| 21025 | CONSTEXPR npu_set_ifm_base0_t &set_addr(uint64_t value) |
| 21026 | { |
| 21027 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21028 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21029 | return *this; |
| 21030 | } |
| 21031 | #ifdef NPU_DISASSEMBLE |
| 21032 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21033 | { |
| 21034 | std::stringstream saddr; |
| 21035 | saddr << std::hex << "0x" << get_addr(); |
| 21036 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21037 | } |
| 21038 | #endif |
| 21039 | #endif |
| 21040 | }; |
| 21041 | // IFM Tile 1 address |
| 21042 | struct npu_set_ifm_base1_t |
| 21043 | { |
| 21044 | #ifdef __cplusplus |
| 21045 | private: |
| 21046 | #endif |
| 21047 | uint32_t opcode : 10; // opcode |
| 21048 | uint32_t reserved0 : 4; |
| 21049 | uint32_t control : 2; // control |
| 21050 | uint32_t addr_hi : 8; // address extension |
| 21051 | uint32_t reserved1 : 8; |
| 21052 | uint32_t addr_lo : 32; // address offset |
| 21053 | #ifdef __cplusplus |
| 21054 | public: |
| 21055 | npu_set_ifm_base1_t(uint64_t _addr) : |
| 21056 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1)), reserved0(0), |
| 21057 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21058 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21059 | reserved1(0), |
| 21060 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21061 | { |
| 21062 | } |
| 21063 | CONSTEXPR npu_set_ifm_base1_t() : |
| 21064 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1)), reserved0(0), |
| 21065 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21066 | { |
| 21067 | } |
| 21068 | CONSTEXPR bool valid() const |
| 21069 | { |
| 21070 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1) && control >= 1 && |
| 21071 | control <= 2; |
| 21072 | } |
| 21073 | CONSTEXPR void init() |
| 21074 | { |
| 21075 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE1); |
| 21076 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21077 | } |
| 21078 | operator uint64_t() |
| 21079 | { |
| 21080 | uint64_t word; |
| 21081 | std::memcpy(&word, this, sizeof(word)); |
| 21082 | return word; |
| 21083 | } |
| 21084 | CONSTEXPR uint64_t get_addr() const |
| 21085 | { |
| 21086 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21087 | } |
| 21088 | CONSTEXPR npu_set_ifm_base1_t &set_addr(uint64_t value) |
| 21089 | { |
| 21090 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21091 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21092 | return *this; |
| 21093 | } |
| 21094 | #ifdef NPU_DISASSEMBLE |
| 21095 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21096 | { |
| 21097 | std::stringstream saddr; |
| 21098 | saddr << std::hex << "0x" << get_addr(); |
| 21099 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21100 | } |
| 21101 | #endif |
| 21102 | #endif |
| 21103 | }; |
| 21104 | // IFM Tile 2 address |
| 21105 | struct npu_set_ifm_base2_t |
| 21106 | { |
| 21107 | #ifdef __cplusplus |
| 21108 | private: |
| 21109 | #endif |
| 21110 | uint32_t opcode : 10; // opcode |
| 21111 | uint32_t reserved0 : 4; |
| 21112 | uint32_t control : 2; // control |
| 21113 | uint32_t addr_hi : 8; // address extension |
| 21114 | uint32_t reserved1 : 8; |
| 21115 | uint32_t addr_lo : 32; // address offset |
| 21116 | #ifdef __cplusplus |
| 21117 | public: |
| 21118 | npu_set_ifm_base2_t(uint64_t _addr) : |
| 21119 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2)), reserved0(0), |
| 21120 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21121 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21122 | reserved1(0), |
| 21123 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21124 | { |
| 21125 | } |
| 21126 | CONSTEXPR npu_set_ifm_base2_t() : |
| 21127 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2)), reserved0(0), |
| 21128 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21129 | { |
| 21130 | } |
| 21131 | CONSTEXPR bool valid() const |
| 21132 | { |
| 21133 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2) && control >= 1 && |
| 21134 | control <= 2; |
| 21135 | } |
| 21136 | CONSTEXPR void init() |
| 21137 | { |
| 21138 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE2); |
| 21139 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21140 | } |
| 21141 | operator uint64_t() |
| 21142 | { |
| 21143 | uint64_t word; |
| 21144 | std::memcpy(&word, this, sizeof(word)); |
| 21145 | return word; |
| 21146 | } |
| 21147 | CONSTEXPR uint64_t get_addr() const |
| 21148 | { |
| 21149 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21150 | } |
| 21151 | CONSTEXPR npu_set_ifm_base2_t &set_addr(uint64_t value) |
| 21152 | { |
| 21153 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21154 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21155 | return *this; |
| 21156 | } |
| 21157 | #ifdef NPU_DISASSEMBLE |
| 21158 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21159 | { |
| 21160 | std::stringstream saddr; |
| 21161 | saddr << std::hex << "0x" << get_addr(); |
| 21162 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21163 | } |
| 21164 | #endif |
| 21165 | #endif |
| 21166 | }; |
| 21167 | // IFM Tile 3 address |
| 21168 | struct npu_set_ifm_base3_t |
| 21169 | { |
| 21170 | #ifdef __cplusplus |
| 21171 | private: |
| 21172 | #endif |
| 21173 | uint32_t opcode : 10; // opcode |
| 21174 | uint32_t reserved0 : 4; |
| 21175 | uint32_t control : 2; // control |
| 21176 | uint32_t addr_hi : 8; // address extension |
| 21177 | uint32_t reserved1 : 8; |
| 21178 | uint32_t addr_lo : 32; // address offset |
| 21179 | #ifdef __cplusplus |
| 21180 | public: |
| 21181 | npu_set_ifm_base3_t(uint64_t _addr) : |
| 21182 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3)), reserved0(0), |
| 21183 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21184 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21185 | reserved1(0), |
| 21186 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21187 | { |
| 21188 | } |
| 21189 | CONSTEXPR npu_set_ifm_base3_t() : |
| 21190 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3)), reserved0(0), |
| 21191 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21192 | { |
| 21193 | } |
| 21194 | CONSTEXPR bool valid() const |
| 21195 | { |
| 21196 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3) && control >= 1 && |
| 21197 | control <= 2; |
| 21198 | } |
| 21199 | CONSTEXPR void init() |
| 21200 | { |
| 21201 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_BASE3); |
| 21202 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21203 | } |
| 21204 | operator uint64_t() |
| 21205 | { |
| 21206 | uint64_t word; |
| 21207 | std::memcpy(&word, this, sizeof(word)); |
| 21208 | return word; |
| 21209 | } |
| 21210 | CONSTEXPR uint64_t get_addr() const |
| 21211 | { |
| 21212 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21213 | } |
| 21214 | CONSTEXPR npu_set_ifm_base3_t &set_addr(uint64_t value) |
| 21215 | { |
| 21216 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21217 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21218 | return *this; |
| 21219 | } |
| 21220 | #ifdef NPU_DISASSEMBLE |
| 21221 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21222 | { |
| 21223 | std::stringstream saddr; |
| 21224 | saddr << std::hex << "0x" << get_addr(); |
| 21225 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21226 | } |
| 21227 | #endif |
| 21228 | #endif |
| 21229 | }; |
| 21230 | // IFM byte stride between horizontal values |
| 21231 | struct npu_set_ifm_stride_x_t |
| 21232 | { |
| 21233 | #ifdef __cplusplus |
| 21234 | private: |
| 21235 | #endif |
| 21236 | uint32_t opcode : 10; // opcode |
| 21237 | uint32_t reserved0 : 4; |
| 21238 | uint32_t control : 2; // control |
| 21239 | uint32_t addr_hi : 8; // address extension |
| 21240 | uint32_t reserved1 : 8; |
| 21241 | uint32_t addr_lo : 32; // address offset |
| 21242 | #ifdef __cplusplus |
| 21243 | public: |
| 21244 | npu_set_ifm_stride_x_t(uint64_t _addr) : |
| 21245 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X)), reserved0(0), |
| 21246 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21247 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21248 | reserved1(0), |
| 21249 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21250 | { |
| 21251 | } |
| 21252 | CONSTEXPR npu_set_ifm_stride_x_t() : |
| 21253 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X)), reserved0(0), |
| 21254 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21255 | { |
| 21256 | } |
| 21257 | CONSTEXPR bool valid() const |
| 21258 | { |
| 21259 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X) && control >= 1 && |
| 21260 | control <= 2; |
| 21261 | } |
| 21262 | CONSTEXPR void init() |
| 21263 | { |
| 21264 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_X); |
| 21265 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21266 | } |
| 21267 | operator uint64_t() |
| 21268 | { |
| 21269 | uint64_t word; |
| 21270 | std::memcpy(&word, this, sizeof(word)); |
| 21271 | return word; |
| 21272 | } |
| 21273 | CONSTEXPR uint64_t get_addr() const |
| 21274 | { |
| 21275 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21276 | } |
| 21277 | CONSTEXPR npu_set_ifm_stride_x_t &set_addr(uint64_t value) |
| 21278 | { |
| 21279 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21280 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21281 | return *this; |
| 21282 | } |
| 21283 | #ifdef NPU_DISASSEMBLE |
| 21284 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21285 | { |
| 21286 | std::stringstream saddr; |
| 21287 | saddr << std::hex << "0x" << get_addr(); |
| 21288 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21289 | } |
| 21290 | #endif |
| 21291 | #endif |
| 21292 | }; |
| 21293 | // IFM byte stride between vertical values |
| 21294 | struct npu_set_ifm_stride_y_t |
| 21295 | { |
| 21296 | #ifdef __cplusplus |
| 21297 | private: |
| 21298 | #endif |
| 21299 | uint32_t opcode : 10; // opcode |
| 21300 | uint32_t reserved0 : 4; |
| 21301 | uint32_t control : 2; // control |
| 21302 | uint32_t addr_hi : 8; // address extension |
| 21303 | uint32_t reserved1 : 8; |
| 21304 | uint32_t addr_lo : 32; // address offset |
| 21305 | #ifdef __cplusplus |
| 21306 | public: |
| 21307 | npu_set_ifm_stride_y_t(uint64_t _addr) : |
| 21308 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y)), reserved0(0), |
| 21309 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21310 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21311 | reserved1(0), |
| 21312 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21313 | { |
| 21314 | } |
| 21315 | CONSTEXPR npu_set_ifm_stride_y_t() : |
| 21316 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y)), reserved0(0), |
| 21317 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21318 | { |
| 21319 | } |
| 21320 | CONSTEXPR bool valid() const |
| 21321 | { |
| 21322 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y) && control >= 1 && |
| 21323 | control <= 2; |
| 21324 | } |
| 21325 | CONSTEXPR void init() |
| 21326 | { |
| 21327 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_Y); |
| 21328 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21329 | } |
| 21330 | operator uint64_t() |
| 21331 | { |
| 21332 | uint64_t word; |
| 21333 | std::memcpy(&word, this, sizeof(word)); |
| 21334 | return word; |
| 21335 | } |
| 21336 | CONSTEXPR uint64_t get_addr() const |
| 21337 | { |
| 21338 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21339 | } |
| 21340 | CONSTEXPR npu_set_ifm_stride_y_t &set_addr(uint64_t value) |
| 21341 | { |
| 21342 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21343 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21344 | return *this; |
| 21345 | } |
| 21346 | #ifdef NPU_DISASSEMBLE |
| 21347 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21348 | { |
| 21349 | std::stringstream saddr; |
| 21350 | saddr << std::hex << "0x" << get_addr(); |
| 21351 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21352 | } |
| 21353 | #endif |
| 21354 | #endif |
| 21355 | }; |
| 21356 | // IFM byte stride between channel blocks (of 16 bytes each block) |
| 21357 | struct npu_set_ifm_stride_c_t |
| 21358 | { |
| 21359 | #ifdef __cplusplus |
| 21360 | private: |
| 21361 | #endif |
| 21362 | uint32_t opcode : 10; // opcode |
| 21363 | uint32_t reserved0 : 4; |
| 21364 | uint32_t control : 2; // control |
| 21365 | uint32_t addr_hi : 8; // address extension |
| 21366 | uint32_t reserved1 : 8; |
| 21367 | uint32_t addr_lo : 32; // address offset |
| 21368 | #ifdef __cplusplus |
| 21369 | public: |
| 21370 | npu_set_ifm_stride_c_t(uint64_t _addr) : |
| 21371 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C)), reserved0(0), |
| 21372 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21373 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21374 | reserved1(0), |
| 21375 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21376 | { |
| 21377 | } |
| 21378 | CONSTEXPR npu_set_ifm_stride_c_t() : |
| 21379 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C)), reserved0(0), |
| 21380 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21381 | { |
| 21382 | } |
| 21383 | CONSTEXPR bool valid() const |
| 21384 | { |
| 21385 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C) && control >= 1 && |
| 21386 | control <= 2; |
| 21387 | } |
| 21388 | CONSTEXPR void init() |
| 21389 | { |
| 21390 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM_STRIDE_C); |
| 21391 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21392 | } |
| 21393 | operator uint64_t() |
| 21394 | { |
| 21395 | uint64_t word; |
| 21396 | std::memcpy(&word, this, sizeof(word)); |
| 21397 | return word; |
| 21398 | } |
| 21399 | CONSTEXPR uint64_t get_addr() const |
| 21400 | { |
| 21401 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21402 | } |
| 21403 | CONSTEXPR npu_set_ifm_stride_c_t &set_addr(uint64_t value) |
| 21404 | { |
| 21405 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21406 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21407 | return *this; |
| 21408 | } |
| 21409 | #ifdef NPU_DISASSEMBLE |
| 21410 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21411 | { |
| 21412 | std::stringstream saddr; |
| 21413 | saddr << std::hex << "0x" << get_addr(); |
| 21414 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21415 | } |
| 21416 | #endif |
| 21417 | #endif |
| 21418 | }; |
| 21419 | // OFM Tile 0 address |
| 21420 | struct npu_set_ofm_base0_t |
| 21421 | { |
| 21422 | #ifdef __cplusplus |
| 21423 | private: |
| 21424 | #endif |
| 21425 | uint32_t opcode : 10; // opcode |
| 21426 | uint32_t reserved0 : 4; |
| 21427 | uint32_t control : 2; // control |
| 21428 | uint32_t addr_hi : 8; // address extension |
| 21429 | uint32_t reserved1 : 8; |
| 21430 | uint32_t addr_lo : 32; // address offset |
| 21431 | #ifdef __cplusplus |
| 21432 | public: |
| 21433 | npu_set_ofm_base0_t(uint64_t _addr) : |
| 21434 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0)), reserved0(0), |
| 21435 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21436 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21437 | reserved1(0), |
| 21438 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21439 | { |
| 21440 | } |
| 21441 | CONSTEXPR npu_set_ofm_base0_t() : |
| 21442 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0)), reserved0(0), |
| 21443 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21444 | { |
| 21445 | } |
| 21446 | CONSTEXPR bool valid() const |
| 21447 | { |
| 21448 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0) && control >= 1 && |
| 21449 | control <= 2; |
| 21450 | } |
| 21451 | CONSTEXPR void init() |
| 21452 | { |
| 21453 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE0); |
| 21454 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21455 | } |
| 21456 | operator uint64_t() |
| 21457 | { |
| 21458 | uint64_t word; |
| 21459 | std::memcpy(&word, this, sizeof(word)); |
| 21460 | return word; |
| 21461 | } |
| 21462 | CONSTEXPR uint64_t get_addr() const |
| 21463 | { |
| 21464 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21465 | } |
| 21466 | CONSTEXPR npu_set_ofm_base0_t &set_addr(uint64_t value) |
| 21467 | { |
| 21468 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21469 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21470 | return *this; |
| 21471 | } |
| 21472 | #ifdef NPU_DISASSEMBLE |
| 21473 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21474 | { |
| 21475 | std::stringstream saddr; |
| 21476 | saddr << std::hex << "0x" << get_addr(); |
| 21477 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21478 | } |
| 21479 | #endif |
| 21480 | #endif |
| 21481 | }; |
| 21482 | // OFM Tile 1 address |
| 21483 | struct npu_set_ofm_base1_t |
| 21484 | { |
| 21485 | #ifdef __cplusplus |
| 21486 | private: |
| 21487 | #endif |
| 21488 | uint32_t opcode : 10; // opcode |
| 21489 | uint32_t reserved0 : 4; |
| 21490 | uint32_t control : 2; // control |
| 21491 | uint32_t addr_hi : 8; // address extension |
| 21492 | uint32_t reserved1 : 8; |
| 21493 | uint32_t addr_lo : 32; // address offset |
| 21494 | #ifdef __cplusplus |
| 21495 | public: |
| 21496 | npu_set_ofm_base1_t(uint64_t _addr) : |
| 21497 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1)), reserved0(0), |
| 21498 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21499 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21500 | reserved1(0), |
| 21501 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21502 | { |
| 21503 | } |
| 21504 | CONSTEXPR npu_set_ofm_base1_t() : |
| 21505 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1)), reserved0(0), |
| 21506 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21507 | { |
| 21508 | } |
| 21509 | CONSTEXPR bool valid() const |
| 21510 | { |
| 21511 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1) && control >= 1 && |
| 21512 | control <= 2; |
| 21513 | } |
| 21514 | CONSTEXPR void init() |
| 21515 | { |
| 21516 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE1); |
| 21517 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21518 | } |
| 21519 | operator uint64_t() |
| 21520 | { |
| 21521 | uint64_t word; |
| 21522 | std::memcpy(&word, this, sizeof(word)); |
| 21523 | return word; |
| 21524 | } |
| 21525 | CONSTEXPR uint64_t get_addr() const |
| 21526 | { |
| 21527 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21528 | } |
| 21529 | CONSTEXPR npu_set_ofm_base1_t &set_addr(uint64_t value) |
| 21530 | { |
| 21531 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21532 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21533 | return *this; |
| 21534 | } |
| 21535 | #ifdef NPU_DISASSEMBLE |
| 21536 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21537 | { |
| 21538 | std::stringstream saddr; |
| 21539 | saddr << std::hex << "0x" << get_addr(); |
| 21540 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21541 | } |
| 21542 | #endif |
| 21543 | #endif |
| 21544 | }; |
| 21545 | // OFM Tile 2 address |
| 21546 | struct npu_set_ofm_base2_t |
| 21547 | { |
| 21548 | #ifdef __cplusplus |
| 21549 | private: |
| 21550 | #endif |
| 21551 | uint32_t opcode : 10; // opcode |
| 21552 | uint32_t reserved0 : 4; |
| 21553 | uint32_t control : 2; // control |
| 21554 | uint32_t addr_hi : 8; // address extension |
| 21555 | uint32_t reserved1 : 8; |
| 21556 | uint32_t addr_lo : 32; // address offset |
| 21557 | #ifdef __cplusplus |
| 21558 | public: |
| 21559 | npu_set_ofm_base2_t(uint64_t _addr) : |
| 21560 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2)), reserved0(0), |
| 21561 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21562 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21563 | reserved1(0), |
| 21564 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21565 | { |
| 21566 | } |
| 21567 | CONSTEXPR npu_set_ofm_base2_t() : |
| 21568 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2)), reserved0(0), |
| 21569 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21570 | { |
| 21571 | } |
| 21572 | CONSTEXPR bool valid() const |
| 21573 | { |
| 21574 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2) && control >= 1 && |
| 21575 | control <= 2; |
| 21576 | } |
| 21577 | CONSTEXPR void init() |
| 21578 | { |
| 21579 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE2); |
| 21580 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21581 | } |
| 21582 | operator uint64_t() |
| 21583 | { |
| 21584 | uint64_t word; |
| 21585 | std::memcpy(&word, this, sizeof(word)); |
| 21586 | return word; |
| 21587 | } |
| 21588 | CONSTEXPR uint64_t get_addr() const |
| 21589 | { |
| 21590 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21591 | } |
| 21592 | CONSTEXPR npu_set_ofm_base2_t &set_addr(uint64_t value) |
| 21593 | { |
| 21594 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21595 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21596 | return *this; |
| 21597 | } |
| 21598 | #ifdef NPU_DISASSEMBLE |
| 21599 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21600 | { |
| 21601 | std::stringstream saddr; |
| 21602 | saddr << std::hex << "0x" << get_addr(); |
| 21603 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21604 | } |
| 21605 | #endif |
| 21606 | #endif |
| 21607 | }; |
| 21608 | // OFM Tile 3 address |
| 21609 | struct npu_set_ofm_base3_t |
| 21610 | { |
| 21611 | #ifdef __cplusplus |
| 21612 | private: |
| 21613 | #endif |
| 21614 | uint32_t opcode : 10; // opcode |
| 21615 | uint32_t reserved0 : 4; |
| 21616 | uint32_t control : 2; // control |
| 21617 | uint32_t addr_hi : 8; // address extension |
| 21618 | uint32_t reserved1 : 8; |
| 21619 | uint32_t addr_lo : 32; // address offset |
| 21620 | #ifdef __cplusplus |
| 21621 | public: |
| 21622 | npu_set_ofm_base3_t(uint64_t _addr) : |
| 21623 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3)), reserved0(0), |
| 21624 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21625 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21626 | reserved1(0), |
| 21627 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21628 | { |
| 21629 | } |
| 21630 | CONSTEXPR npu_set_ofm_base3_t() : |
| 21631 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3)), reserved0(0), |
| 21632 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21633 | { |
| 21634 | } |
| 21635 | CONSTEXPR bool valid() const |
| 21636 | { |
| 21637 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3) && control >= 1 && |
| 21638 | control <= 2; |
| 21639 | } |
| 21640 | CONSTEXPR void init() |
| 21641 | { |
| 21642 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_BASE3); |
| 21643 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21644 | } |
| 21645 | operator uint64_t() |
| 21646 | { |
| 21647 | uint64_t word; |
| 21648 | std::memcpy(&word, this, sizeof(word)); |
| 21649 | return word; |
| 21650 | } |
| 21651 | CONSTEXPR uint64_t get_addr() const |
| 21652 | { |
| 21653 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21654 | } |
| 21655 | CONSTEXPR npu_set_ofm_base3_t &set_addr(uint64_t value) |
| 21656 | { |
| 21657 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21658 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21659 | return *this; |
| 21660 | } |
| 21661 | #ifdef NPU_DISASSEMBLE |
| 21662 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21663 | { |
| 21664 | std::stringstream saddr; |
| 21665 | saddr << std::hex << "0x" << get_addr(); |
| 21666 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21667 | } |
| 21668 | #endif |
| 21669 | #endif |
| 21670 | }; |
| 21671 | // OFM byte stride between horizontal values |
| 21672 | struct npu_set_ofm_stride_x_t |
| 21673 | { |
| 21674 | #ifdef __cplusplus |
| 21675 | private: |
| 21676 | #endif |
| 21677 | uint32_t opcode : 10; // opcode |
| 21678 | uint32_t reserved0 : 4; |
| 21679 | uint32_t control : 2; // control |
| 21680 | uint32_t addr_hi : 8; // address extension |
| 21681 | uint32_t reserved1 : 8; |
| 21682 | uint32_t addr_lo : 32; // address offset |
| 21683 | #ifdef __cplusplus |
| 21684 | public: |
| 21685 | npu_set_ofm_stride_x_t(uint64_t _addr) : |
| 21686 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X)), reserved0(0), |
| 21687 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21688 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21689 | reserved1(0), |
| 21690 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21691 | { |
| 21692 | } |
| 21693 | CONSTEXPR npu_set_ofm_stride_x_t() : |
| 21694 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X)), reserved0(0), |
| 21695 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21696 | { |
| 21697 | } |
| 21698 | CONSTEXPR bool valid() const |
| 21699 | { |
| 21700 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X) && control >= 1 && |
| 21701 | control <= 2; |
| 21702 | } |
| 21703 | CONSTEXPR void init() |
| 21704 | { |
| 21705 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_X); |
| 21706 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21707 | } |
| 21708 | operator uint64_t() |
| 21709 | { |
| 21710 | uint64_t word; |
| 21711 | std::memcpy(&word, this, sizeof(word)); |
| 21712 | return word; |
| 21713 | } |
| 21714 | CONSTEXPR uint64_t get_addr() const |
| 21715 | { |
| 21716 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21717 | } |
| 21718 | CONSTEXPR npu_set_ofm_stride_x_t &set_addr(uint64_t value) |
| 21719 | { |
| 21720 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21721 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21722 | return *this; |
| 21723 | } |
| 21724 | #ifdef NPU_DISASSEMBLE |
| 21725 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21726 | { |
| 21727 | std::stringstream saddr; |
| 21728 | saddr << std::hex << "0x" << get_addr(); |
| 21729 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21730 | } |
| 21731 | #endif |
| 21732 | #endif |
| 21733 | }; |
| 21734 | // OFM byte stride between vertical values |
| 21735 | struct npu_set_ofm_stride_y_t |
| 21736 | { |
| 21737 | #ifdef __cplusplus |
| 21738 | private: |
| 21739 | #endif |
| 21740 | uint32_t opcode : 10; // opcode |
| 21741 | uint32_t reserved0 : 4; |
| 21742 | uint32_t control : 2; // control |
| 21743 | uint32_t addr_hi : 8; // address extension |
| 21744 | uint32_t reserved1 : 8; |
| 21745 | uint32_t addr_lo : 32; // address offset |
| 21746 | #ifdef __cplusplus |
| 21747 | public: |
| 21748 | npu_set_ofm_stride_y_t(uint64_t _addr) : |
| 21749 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y)), reserved0(0), |
| 21750 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21751 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21752 | reserved1(0), |
| 21753 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21754 | { |
| 21755 | } |
| 21756 | CONSTEXPR npu_set_ofm_stride_y_t() : |
| 21757 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y)), reserved0(0), |
| 21758 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21759 | { |
| 21760 | } |
| 21761 | CONSTEXPR bool valid() const |
| 21762 | { |
| 21763 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y) && control >= 1 && |
| 21764 | control <= 2; |
| 21765 | } |
| 21766 | CONSTEXPR void init() |
| 21767 | { |
| 21768 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_Y); |
| 21769 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21770 | } |
| 21771 | operator uint64_t() |
| 21772 | { |
| 21773 | uint64_t word; |
| 21774 | std::memcpy(&word, this, sizeof(word)); |
| 21775 | return word; |
| 21776 | } |
| 21777 | CONSTEXPR uint64_t get_addr() const |
| 21778 | { |
| 21779 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21780 | } |
| 21781 | CONSTEXPR npu_set_ofm_stride_y_t &set_addr(uint64_t value) |
| 21782 | { |
| 21783 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21784 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21785 | return *this; |
| 21786 | } |
| 21787 | #ifdef NPU_DISASSEMBLE |
| 21788 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21789 | { |
| 21790 | std::stringstream saddr; |
| 21791 | saddr << std::hex << "0x" << get_addr(); |
| 21792 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21793 | } |
| 21794 | #endif |
| 21795 | #endif |
| 21796 | }; |
| 21797 | // OFM byte stride between channel blocks (of 16 bytes each block) |
| 21798 | struct npu_set_ofm_stride_c_t |
| 21799 | { |
| 21800 | #ifdef __cplusplus |
| 21801 | private: |
| 21802 | #endif |
| 21803 | uint32_t opcode : 10; // opcode |
| 21804 | uint32_t reserved0 : 4; |
| 21805 | uint32_t control : 2; // control |
| 21806 | uint32_t addr_hi : 8; // address extension |
| 21807 | uint32_t reserved1 : 8; |
| 21808 | uint32_t addr_lo : 32; // address offset |
| 21809 | #ifdef __cplusplus |
| 21810 | public: |
| 21811 | npu_set_ofm_stride_c_t(uint64_t _addr) : |
| 21812 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C)), reserved0(0), |
| 21813 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21814 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21815 | reserved1(0), |
| 21816 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21817 | { |
| 21818 | } |
| 21819 | CONSTEXPR npu_set_ofm_stride_c_t() : |
| 21820 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C)), reserved0(0), |
| 21821 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21822 | { |
| 21823 | } |
| 21824 | CONSTEXPR bool valid() const |
| 21825 | { |
| 21826 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C) && control >= 1 && |
| 21827 | control <= 2; |
| 21828 | } |
| 21829 | CONSTEXPR void init() |
| 21830 | { |
| 21831 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_STRIDE_C); |
| 21832 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21833 | } |
| 21834 | operator uint64_t() |
| 21835 | { |
| 21836 | uint64_t word; |
| 21837 | std::memcpy(&word, this, sizeof(word)); |
| 21838 | return word; |
| 21839 | } |
| 21840 | CONSTEXPR uint64_t get_addr() const |
| 21841 | { |
| 21842 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21843 | } |
| 21844 | CONSTEXPR npu_set_ofm_stride_c_t &set_addr(uint64_t value) |
| 21845 | { |
| 21846 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21847 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21848 | return *this; |
| 21849 | } |
| 21850 | #ifdef NPU_DISASSEMBLE |
| 21851 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21852 | { |
| 21853 | std::stringstream saddr; |
| 21854 | saddr << std::hex << "0x" << get_addr(); |
| 21855 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21856 | } |
| 21857 | #endif |
| 21858 | #endif |
| 21859 | }; |
| 21860 | // Weight stream byte offset in WEIGHT_REGION |
| 21861 | struct npu_set_weight_base_t |
| 21862 | { |
| 21863 | #ifdef __cplusplus |
| 21864 | private: |
| 21865 | #endif |
| 21866 | uint32_t opcode : 10; // opcode |
| 21867 | uint32_t reserved0 : 4; |
| 21868 | uint32_t control : 2; // control |
| 21869 | uint32_t addr_hi : 8; // address extension |
| 21870 | uint32_t reserved1 : 8; |
| 21871 | uint32_t addr_lo : 32; // address offset |
| 21872 | #ifdef __cplusplus |
| 21873 | public: |
| 21874 | npu_set_weight_base_t(uint64_t _addr) : |
| 21875 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE)), reserved0(0), |
| 21876 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 21877 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 21878 | reserved1(0), |
| 21879 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 21880 | { |
| 21881 | } |
| 21882 | CONSTEXPR npu_set_weight_base_t() : |
| 21883 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE)), reserved0(0), |
| 21884 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 21885 | { |
| 21886 | } |
| 21887 | CONSTEXPR bool valid() const |
| 21888 | { |
| 21889 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE) && control >= 1 && |
| 21890 | control <= 2; |
| 21891 | } |
| 21892 | CONSTEXPR void init() |
| 21893 | { |
| 21894 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_BASE); |
| 21895 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21896 | } |
| 21897 | operator uint64_t() |
| 21898 | { |
| 21899 | uint64_t word; |
| 21900 | std::memcpy(&word, this, sizeof(word)); |
| 21901 | return word; |
| 21902 | } |
| 21903 | CONSTEXPR uint64_t get_addr() const |
| 21904 | { |
| 21905 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 21906 | } |
| 21907 | CONSTEXPR npu_set_weight_base_t &set_addr(uint64_t value) |
| 21908 | { |
| 21909 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21910 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 21911 | return *this; |
| 21912 | } |
| 21913 | #ifdef NPU_DISASSEMBLE |
| 21914 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21915 | { |
| 21916 | std::stringstream saddr; |
| 21917 | saddr << std::hex << "0x" << get_addr(); |
| 21918 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 21919 | } |
| 21920 | #endif |
| 21921 | #endif |
| 21922 | }; |
| 21923 | // Weight stream byte length |
| 21924 | struct npu_set_weight_length_t |
| 21925 | { |
| 21926 | #ifdef __cplusplus |
| 21927 | private: |
| 21928 | #endif |
| 21929 | uint32_t opcode : 10; // opcode |
| 21930 | uint32_t reserved0 : 4; |
| 21931 | uint32_t control : 2; // control |
| 21932 | uint32_t reserved1 : 16; |
| 21933 | uint32_t length : 32; // Weight stream byte length |
| 21934 | #ifdef __cplusplus |
| 21935 | public: |
| 21936 | npu_set_weight_length_t(uint32_t _length) : |
| 21937 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH)), reserved0(0), |
| 21938 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), |
| 21939 | length(static_cast<uint32_t>(_length)) |
| 21940 | { |
| 21941 | } |
| 21942 | CONSTEXPR npu_set_weight_length_t() : |
| 21943 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH)), reserved0(0), |
| 21944 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0) |
| 21945 | { |
| 21946 | } |
| 21947 | CONSTEXPR bool valid() const |
| 21948 | { |
| 21949 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH) && control >= 1 && |
| 21950 | control <= 2; |
| 21951 | } |
| 21952 | CONSTEXPR void init() |
| 21953 | { |
| 21954 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT_LENGTH); |
| 21955 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 21956 | } |
| 21957 | operator uint64_t() |
| 21958 | { |
| 21959 | uint64_t word; |
| 21960 | std::memcpy(&word, this, sizeof(word)); |
| 21961 | return word; |
| 21962 | } |
| 21963 | CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const |
| 21964 | { |
| 21965 | return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode); |
| 21966 | } |
| 21967 | CONSTEXPR npu_set_weight_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value) |
| 21968 | { |
| 21969 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 21970 | return *this; |
| 21971 | } |
| 21972 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 21973 | { |
| 21974 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 21975 | } |
| 21976 | CONSTEXPR npu_set_weight_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 21977 | { |
| 21978 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 21979 | return *this; |
| 21980 | } |
| 21981 | CONSTEXPR uint32_t get_length() const |
| 21982 | { |
| 21983 | return static_cast<uint32_t>(length); |
| 21984 | } |
| 21985 | CONSTEXPR npu_set_weight_length_t &set_length(uint32_t value) |
| 21986 | { |
| 21987 | length = static_cast<uint32_t>(value); |
| 21988 | return *this; |
| 21989 | } |
| 21990 | #ifdef NPU_DISASSEMBLE |
| 21991 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 21992 | { |
| 21993 | fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length))); |
| 21994 | } |
| 21995 | #endif |
| 21996 | #endif |
| 21997 | }; |
| 21998 | // Scale and bias stream input byte offset from SCALE_REGION |
| 21999 | struct npu_set_scale_base_t |
| 22000 | { |
| 22001 | #ifdef __cplusplus |
| 22002 | private: |
| 22003 | #endif |
| 22004 | uint32_t opcode : 10; // opcode |
| 22005 | uint32_t reserved0 : 4; |
| 22006 | uint32_t control : 2; // control |
| 22007 | uint32_t addr_hi : 8; // address extension |
| 22008 | uint32_t reserved1 : 8; |
| 22009 | uint32_t addr_lo : 32; // address offset |
| 22010 | #ifdef __cplusplus |
| 22011 | public: |
| 22012 | npu_set_scale_base_t(uint64_t _addr) : |
| 22013 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE)), reserved0(0), |
| 22014 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22015 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22016 | reserved1(0), |
| 22017 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22018 | { |
| 22019 | } |
| 22020 | CONSTEXPR npu_set_scale_base_t() : |
| 22021 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE)), reserved0(0), |
| 22022 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22023 | { |
| 22024 | } |
| 22025 | CONSTEXPR bool valid() const |
| 22026 | { |
| 22027 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE) && control >= 1 && |
| 22028 | control <= 2; |
| 22029 | } |
| 22030 | CONSTEXPR void init() |
| 22031 | { |
| 22032 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_BASE); |
| 22033 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22034 | } |
| 22035 | operator uint64_t() |
| 22036 | { |
| 22037 | uint64_t word; |
| 22038 | std::memcpy(&word, this, sizeof(word)); |
| 22039 | return word; |
| 22040 | } |
| 22041 | CONSTEXPR uint64_t get_addr() const |
| 22042 | { |
| 22043 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22044 | } |
| 22045 | CONSTEXPR npu_set_scale_base_t &set_addr(uint64_t value) |
| 22046 | { |
| 22047 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22048 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22049 | return *this; |
| 22050 | } |
| 22051 | #ifdef NPU_DISASSEMBLE |
| 22052 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22053 | { |
| 22054 | std::stringstream saddr; |
| 22055 | saddr << std::hex << "0x" << get_addr(); |
| 22056 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22057 | } |
| 22058 | #endif |
| 22059 | #endif |
| 22060 | }; |
| 22061 | // Scale and bias stream input byte length |
| 22062 | struct npu_set_scale_length_t |
| 22063 | { |
| 22064 | #ifdef __cplusplus |
| 22065 | private: |
| 22066 | #endif |
| 22067 | uint32_t opcode : 10; // opcode |
| 22068 | uint32_t reserved0 : 4; |
| 22069 | uint32_t control : 2; // control |
| 22070 | uint32_t reserved1 : 16; |
| 22071 | uint32_t length : 20; // Scale and bias stream byte length |
| 22072 | uint32_t reserved2 : 12; |
| 22073 | #ifdef __cplusplus |
| 22074 | public: |
| 22075 | npu_set_scale_length_t(uint32_t _length) : |
| 22076 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH)), reserved0(0), |
| 22077 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), |
| 22078 | length(static_cast<uint32_t>(_length) & ((1U << 20) - 1)), reserved2(0) |
| 22079 | { |
| 22080 | } |
| 22081 | CONSTEXPR npu_set_scale_length_t() : |
| 22082 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH)), reserved0(0), |
| 22083 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0), reserved2(0) |
| 22084 | { |
| 22085 | } |
| 22086 | CONSTEXPR bool valid() const |
| 22087 | { |
| 22088 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH) && control >= 1 && |
| 22089 | control <= 2; |
| 22090 | } |
| 22091 | CONSTEXPR void init() |
| 22092 | { |
| 22093 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE_LENGTH); |
| 22094 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22095 | } |
| 22096 | operator uint64_t() |
| 22097 | { |
| 22098 | uint64_t word; |
| 22099 | std::memcpy(&word, this, sizeof(word)); |
| 22100 | return word; |
| 22101 | } |
| 22102 | CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const |
| 22103 | { |
| 22104 | return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode); |
| 22105 | } |
| 22106 | CONSTEXPR npu_set_scale_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value) |
| 22107 | { |
| 22108 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 22109 | return *this; |
| 22110 | } |
| 22111 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 22112 | { |
| 22113 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 22114 | } |
| 22115 | CONSTEXPR npu_set_scale_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 22116 | { |
| 22117 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 22118 | return *this; |
| 22119 | } |
| 22120 | CONSTEXPR uint32_t get_length() const |
| 22121 | { |
| 22122 | return static_cast<uint32_t>(length); |
| 22123 | } |
| 22124 | CONSTEXPR npu_set_scale_length_t &set_length(uint32_t value) |
| 22125 | { |
| 22126 | length = static_cast<uint32_t>(value) & ((1U << 20) - 1); |
| 22127 | return *this; |
| 22128 | } |
| 22129 | #ifdef NPU_DISASSEMBLE |
| 22130 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22131 | { |
| 22132 | fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length))); |
| 22133 | } |
| 22134 | #endif |
| 22135 | #endif |
| 22136 | }; |
| 22137 | // OFM scale |
| 22138 | struct npu_set_ofm_scale_t |
| 22139 | { |
| 22140 | #ifdef __cplusplus |
| 22141 | private: |
| 22142 | #endif |
| 22143 | uint32_t opcode : 10; // opcode |
| 22144 | uint32_t reserved0 : 4; |
| 22145 | uint32_t control : 2; // control |
| 22146 | uint32_t shift : 6; // Shift |
| 22147 | uint32_t reserved1 : 10; |
| 22148 | uint32_t scale : 32; // Scale. Not applied for 32-bit operations |
| 22149 | #ifdef __cplusplus |
| 22150 | public: |
| 22151 | npu_set_ofm_scale_t(uint32_t _shift, uint32_t _scale) : |
| 22152 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE)), reserved0(0), |
| 22153 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22154 | shift(static_cast<uint8_t>(_shift) & ((1U << 6) - 1)), reserved1(0), scale(static_cast<uint32_t>(_scale)) |
| 22155 | { |
| 22156 | } |
| 22157 | CONSTEXPR npu_set_ofm_scale_t() : |
| 22158 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE)), reserved0(0), |
| 22159 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), shift(0), reserved1(0), scale(0) |
| 22160 | { |
| 22161 | } |
| 22162 | CONSTEXPR bool valid() const |
| 22163 | { |
| 22164 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE) && control >= 1 && |
| 22165 | control <= 2; |
| 22166 | } |
| 22167 | CONSTEXPR void init() |
| 22168 | { |
| 22169 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OFM_SCALE); |
| 22170 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22171 | } |
| 22172 | operator uint64_t() |
| 22173 | { |
| 22174 | uint64_t word; |
| 22175 | std::memcpy(&word, this, sizeof(word)); |
| 22176 | return word; |
| 22177 | } |
| 22178 | CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const |
| 22179 | { |
| 22180 | return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode); |
| 22181 | } |
| 22182 | CONSTEXPR npu_set_ofm_scale_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value) |
| 22183 | { |
| 22184 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 22185 | return *this; |
| 22186 | } |
| 22187 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 22188 | { |
| 22189 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 22190 | } |
| 22191 | CONSTEXPR npu_set_ofm_scale_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 22192 | { |
| 22193 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 22194 | return *this; |
| 22195 | } |
| 22196 | CONSTEXPR uint32_t get_shift() const |
| 22197 | { |
| 22198 | return static_cast<uint32_t>(shift); |
| 22199 | } |
| 22200 | CONSTEXPR npu_set_ofm_scale_t &set_shift(uint32_t value) |
| 22201 | { |
| 22202 | shift = static_cast<uint8_t>(value) & ((1U << 6) - 1); |
| 22203 | return *this; |
| 22204 | } |
| 22205 | CONSTEXPR uint32_t get_scale() const |
| 22206 | { |
| 22207 | return static_cast<uint32_t>(scale); |
| 22208 | } |
| 22209 | CONSTEXPR npu_set_ofm_scale_t &set_scale(uint32_t value) |
| 22210 | { |
| 22211 | scale = static_cast<uint32_t>(value); |
| 22212 | return *this; |
| 22213 | } |
| 22214 | #ifdef NPU_DISASSEMBLE |
| 22215 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22216 | { |
| 22217 | fields.push_back(std::make_pair<std::string, std::string>("shift", std::to_string(shift))); |
| 22218 | fields.push_back(std::make_pair<std::string, std::string>("scale", std::to_string(scale))); |
| 22219 | } |
| 22220 | #endif |
| 22221 | #endif |
| 22222 | }; |
| 22223 | // Input operand A scale |
| 22224 | struct npu_set_opa_scale_t |
| 22225 | { |
| 22226 | #ifdef __cplusplus |
| 22227 | private: |
| 22228 | #endif |
| 22229 | uint32_t opcode : 10; // opcode |
| 22230 | uint32_t reserved0 : 4; |
| 22231 | uint32_t control : 2; // control |
| 22232 | uint32_t shift : 6; // Shift. Ignored if IFM scale mode is 0 |
| 22233 | uint32_t reserved1 : 10; |
| 22234 | uint32_t scale : 32; // Scale. 16-bit if IFM scale mode is 0 |
| 22235 | #ifdef __cplusplus |
| 22236 | public: |
| 22237 | npu_set_opa_scale_t(uint32_t _shift, uint32_t _scale) : |
| 22238 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE)), reserved0(0), |
| 22239 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22240 | shift(static_cast<uint8_t>(_shift) & ((1U << 6) - 1)), reserved1(0), scale(static_cast<uint32_t>(_scale)) |
| 22241 | { |
| 22242 | } |
| 22243 | CONSTEXPR npu_set_opa_scale_t() : |
| 22244 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE)), reserved0(0), |
| 22245 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), shift(0), reserved1(0), scale(0) |
| 22246 | { |
| 22247 | } |
| 22248 | CONSTEXPR bool valid() const |
| 22249 | { |
| 22250 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE) && control >= 1 && |
| 22251 | control <= 2; |
| 22252 | } |
| 22253 | CONSTEXPR void init() |
| 22254 | { |
| 22255 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPA_SCALE); |
| 22256 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22257 | } |
| 22258 | operator uint64_t() |
| 22259 | { |
| 22260 | uint64_t word; |
| 22261 | std::memcpy(&word, this, sizeof(word)); |
| 22262 | return word; |
| 22263 | } |
| 22264 | CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const |
| 22265 | { |
| 22266 | return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode); |
| 22267 | } |
| 22268 | CONSTEXPR npu_set_opa_scale_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value) |
| 22269 | { |
| 22270 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 22271 | return *this; |
| 22272 | } |
| 22273 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 22274 | { |
| 22275 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 22276 | } |
| 22277 | CONSTEXPR npu_set_opa_scale_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 22278 | { |
| 22279 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 22280 | return *this; |
| 22281 | } |
| 22282 | CONSTEXPR uint32_t get_shift() const |
| 22283 | { |
| 22284 | return static_cast<uint32_t>(shift); |
| 22285 | } |
| 22286 | CONSTEXPR npu_set_opa_scale_t &set_shift(uint32_t value) |
| 22287 | { |
| 22288 | shift = static_cast<uint8_t>(value) & ((1U << 6) - 1); |
| 22289 | return *this; |
| 22290 | } |
| 22291 | CONSTEXPR uint32_t get_scale() const |
| 22292 | { |
| 22293 | return static_cast<uint32_t>(scale); |
| 22294 | } |
| 22295 | CONSTEXPR npu_set_opa_scale_t &set_scale(uint32_t value) |
| 22296 | { |
| 22297 | scale = static_cast<uint32_t>(value); |
| 22298 | return *this; |
| 22299 | } |
| 22300 | #ifdef NPU_DISASSEMBLE |
| 22301 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22302 | { |
| 22303 | fields.push_back(std::make_pair<std::string, std::string>("shift", std::to_string(shift))); |
| 22304 | fields.push_back(std::make_pair<std::string, std::string>("scale", std::to_string(scale))); |
| 22305 | } |
| 22306 | #endif |
| 22307 | #endif |
| 22308 | }; |
| 22309 | // Input operand B scale |
| 22310 | struct npu_set_opb_scale_t |
| 22311 | { |
| 22312 | #ifdef __cplusplus |
| 22313 | private: |
| 22314 | #endif |
| 22315 | uint32_t opcode : 10; // opcode |
| 22316 | uint32_t reserved0 : 4; |
| 22317 | uint32_t control : 2; // control |
| 22318 | uint32_t reserved1 : 16; |
| 22319 | uint32_t scale : 16; // Scale. Not used if IFM scale mode is 1 or 2 |
| 22320 | uint32_t reserved2 : 16; |
| 22321 | #ifdef __cplusplus |
| 22322 | public: |
| 22323 | npu_set_opb_scale_t(uint32_t _scale) : |
| 22324 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE)), reserved0(0), |
| 22325 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), |
| 22326 | scale(static_cast<uint16_t>(_scale) & ((1U << 16) - 1)), reserved2(0) |
| 22327 | { |
| 22328 | } |
| 22329 | CONSTEXPR npu_set_opb_scale_t() : |
| 22330 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE)), reserved0(0), |
| 22331 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), scale(0), reserved2(0) |
| 22332 | { |
| 22333 | } |
| 22334 | CONSTEXPR bool valid() const |
| 22335 | { |
| 22336 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE) && control >= 1 && |
| 22337 | control <= 2; |
| 22338 | } |
| 22339 | CONSTEXPR void init() |
| 22340 | { |
| 22341 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_OPB_SCALE); |
| 22342 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22343 | } |
| 22344 | operator uint64_t() |
| 22345 | { |
| 22346 | uint64_t word; |
| 22347 | std::memcpy(&word, this, sizeof(word)); |
| 22348 | return word; |
| 22349 | } |
| 22350 | CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const |
| 22351 | { |
| 22352 | return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode); |
| 22353 | } |
| 22354 | CONSTEXPR npu_set_opb_scale_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value) |
| 22355 | { |
| 22356 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 22357 | return *this; |
| 22358 | } |
| 22359 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 22360 | { |
| 22361 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 22362 | } |
| 22363 | CONSTEXPR npu_set_opb_scale_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 22364 | { |
| 22365 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 22366 | return *this; |
| 22367 | } |
| 22368 | CONSTEXPR uint32_t get_scale() const |
| 22369 | { |
| 22370 | return static_cast<uint32_t>(scale); |
| 22371 | } |
| 22372 | CONSTEXPR npu_set_opb_scale_t &set_scale(uint32_t value) |
| 22373 | { |
| 22374 | scale = static_cast<uint16_t>(value) & ((1U << 16) - 1); |
| 22375 | return *this; |
| 22376 | } |
| 22377 | #ifdef NPU_DISASSEMBLE |
| 22378 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22379 | { |
| 22380 | fields.push_back(std::make_pair<std::string, std::string>("scale", std::to_string(scale))); |
| 22381 | } |
| 22382 | #endif |
| 22383 | #endif |
| 22384 | }; |
| 22385 | // DMA user channel 0 source byte offset from DMA0_SRC_REGION |
| 22386 | struct npu_set_dma0_src_t |
| 22387 | { |
| 22388 | #ifdef __cplusplus |
| 22389 | private: |
| 22390 | #endif |
| 22391 | uint32_t opcode : 10; // opcode |
| 22392 | uint32_t reserved0 : 4; |
| 22393 | uint32_t control : 2; // control |
| 22394 | uint32_t addr_hi : 8; // address extension |
| 22395 | uint32_t reserved1 : 8; |
| 22396 | uint32_t addr_lo : 32; // address offset |
| 22397 | #ifdef __cplusplus |
| 22398 | public: |
| 22399 | npu_set_dma0_src_t(uint64_t _addr) : |
| 22400 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC)), reserved0(0), |
| 22401 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22402 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22403 | reserved1(0), |
| 22404 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22405 | { |
| 22406 | } |
| 22407 | CONSTEXPR npu_set_dma0_src_t() : |
| 22408 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC)), reserved0(0), |
| 22409 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22410 | { |
| 22411 | } |
| 22412 | CONSTEXPR bool valid() const |
| 22413 | { |
| 22414 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC) && control >= 1 && |
| 22415 | control <= 2; |
| 22416 | } |
| 22417 | CONSTEXPR void init() |
| 22418 | { |
| 22419 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SRC); |
| 22420 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22421 | } |
| 22422 | operator uint64_t() |
| 22423 | { |
| 22424 | uint64_t word; |
| 22425 | std::memcpy(&word, this, sizeof(word)); |
| 22426 | return word; |
| 22427 | } |
| 22428 | CONSTEXPR uint64_t get_addr() const |
| 22429 | { |
| 22430 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22431 | } |
| 22432 | CONSTEXPR npu_set_dma0_src_t &set_addr(uint64_t value) |
| 22433 | { |
| 22434 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22435 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22436 | return *this; |
| 22437 | } |
| 22438 | #ifdef NPU_DISASSEMBLE |
| 22439 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22440 | { |
| 22441 | std::stringstream saddr; |
| 22442 | saddr << std::hex << "0x" << get_addr(); |
| 22443 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22444 | } |
| 22445 | #endif |
| 22446 | #endif |
| 22447 | }; |
| 22448 | // DMA user channel 0 destination byte offset from DMA0_DST_REGION |
| 22449 | struct npu_set_dma0_dst_t |
| 22450 | { |
| 22451 | #ifdef __cplusplus |
| 22452 | private: |
| 22453 | #endif |
| 22454 | uint32_t opcode : 10; // opcode |
| 22455 | uint32_t reserved0 : 4; |
| 22456 | uint32_t control : 2; // control |
| 22457 | uint32_t addr_hi : 8; // address extension |
| 22458 | uint32_t reserved1 : 8; |
| 22459 | uint32_t addr_lo : 32; // address offset |
| 22460 | #ifdef __cplusplus |
| 22461 | public: |
| 22462 | npu_set_dma0_dst_t(uint64_t _addr) : |
| 22463 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST)), reserved0(0), |
| 22464 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22465 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22466 | reserved1(0), |
| 22467 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22468 | { |
| 22469 | } |
| 22470 | CONSTEXPR npu_set_dma0_dst_t() : |
| 22471 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST)), reserved0(0), |
| 22472 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22473 | { |
| 22474 | } |
| 22475 | CONSTEXPR bool valid() const |
| 22476 | { |
| 22477 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST) && control >= 1 && |
| 22478 | control <= 2; |
| 22479 | } |
| 22480 | CONSTEXPR void init() |
| 22481 | { |
| 22482 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_DST); |
| 22483 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22484 | } |
| 22485 | operator uint64_t() |
| 22486 | { |
| 22487 | uint64_t word; |
| 22488 | std::memcpy(&word, this, sizeof(word)); |
| 22489 | return word; |
| 22490 | } |
| 22491 | CONSTEXPR uint64_t get_addr() const |
| 22492 | { |
| 22493 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22494 | } |
| 22495 | CONSTEXPR npu_set_dma0_dst_t &set_addr(uint64_t value) |
| 22496 | { |
| 22497 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22498 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22499 | return *this; |
| 22500 | } |
| 22501 | #ifdef NPU_DISASSEMBLE |
| 22502 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22503 | { |
| 22504 | std::stringstream saddr; |
| 22505 | saddr << std::hex << "0x" << get_addr(); |
| 22506 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22507 | } |
| 22508 | #endif |
| 22509 | #endif |
| 22510 | }; |
| 22511 | // DMA user channel 0 transfer length in bytes for 1D mode |
| 22512 | struct npu_set_dma0_len_t |
| 22513 | { |
| 22514 | #ifdef __cplusplus |
| 22515 | private: |
| 22516 | #endif |
| 22517 | uint32_t opcode : 10; // opcode |
| 22518 | uint32_t reserved0 : 4; |
| 22519 | uint32_t control : 2; // control |
| 22520 | uint32_t addr_hi : 8; // address extension |
| 22521 | uint32_t reserved1 : 8; |
| 22522 | uint32_t addr_lo : 32; // address offset |
| 22523 | #ifdef __cplusplus |
| 22524 | public: |
| 22525 | npu_set_dma0_len_t(uint64_t _addr) : |
| 22526 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN)), reserved0(0), |
| 22527 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22528 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22529 | reserved1(0), |
| 22530 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22531 | { |
| 22532 | } |
| 22533 | CONSTEXPR npu_set_dma0_len_t() : |
| 22534 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN)), reserved0(0), |
| 22535 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22536 | { |
| 22537 | } |
| 22538 | CONSTEXPR bool valid() const |
| 22539 | { |
| 22540 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN) && control >= 1 && |
| 22541 | control <= 2; |
| 22542 | } |
| 22543 | CONSTEXPR void init() |
| 22544 | { |
| 22545 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_LEN); |
| 22546 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22547 | } |
| 22548 | operator uint64_t() |
| 22549 | { |
| 22550 | uint64_t word; |
| 22551 | std::memcpy(&word, this, sizeof(word)); |
| 22552 | return word; |
| 22553 | } |
| 22554 | CONSTEXPR uint64_t get_addr() const |
| 22555 | { |
| 22556 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22557 | } |
| 22558 | CONSTEXPR npu_set_dma0_len_t &set_addr(uint64_t value) |
| 22559 | { |
| 22560 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22561 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22562 | return *this; |
| 22563 | } |
| 22564 | #ifdef NPU_DISASSEMBLE |
| 22565 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22566 | { |
| 22567 | std::stringstream saddr; |
| 22568 | saddr << std::hex << "0x" << get_addr(); |
| 22569 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22570 | } |
| 22571 | #endif |
| 22572 | #endif |
| 22573 | }; |
| 22574 | // byte distance to skip after each inner (1D) transfer (2D/3D mode) (any alignment) |
| 22575 | struct npu_set_dma0_skip0_t |
| 22576 | { |
| 22577 | #ifdef __cplusplus |
| 22578 | private: |
| 22579 | #endif |
| 22580 | uint32_t opcode : 10; // opcode |
| 22581 | uint32_t reserved0 : 4; |
| 22582 | uint32_t control : 2; // control |
| 22583 | uint32_t addr_hi : 8; // address extension |
| 22584 | uint32_t reserved1 : 8; |
| 22585 | uint32_t addr_lo : 32; // address offset |
| 22586 | #ifdef __cplusplus |
| 22587 | public: |
| 22588 | npu_set_dma0_skip0_t(uint64_t _addr) : |
| 22589 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0)), reserved0(0), |
| 22590 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22591 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22592 | reserved1(0), |
| 22593 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22594 | { |
| 22595 | } |
| 22596 | CONSTEXPR npu_set_dma0_skip0_t() : |
| 22597 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0)), reserved0(0), |
| 22598 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22599 | { |
| 22600 | } |
| 22601 | CONSTEXPR bool valid() const |
| 22602 | { |
| 22603 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0) && control >= 1 && |
| 22604 | control <= 2; |
| 22605 | } |
| 22606 | CONSTEXPR void init() |
| 22607 | { |
| 22608 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP0); |
| 22609 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22610 | } |
| 22611 | operator uint64_t() |
| 22612 | { |
| 22613 | uint64_t word; |
| 22614 | std::memcpy(&word, this, sizeof(word)); |
| 22615 | return word; |
| 22616 | } |
| 22617 | CONSTEXPR uint64_t get_addr() const |
| 22618 | { |
| 22619 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22620 | } |
| 22621 | CONSTEXPR npu_set_dma0_skip0_t &set_addr(uint64_t value) |
| 22622 | { |
| 22623 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22624 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22625 | return *this; |
| 22626 | } |
| 22627 | #ifdef NPU_DISASSEMBLE |
| 22628 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22629 | { |
| 22630 | std::stringstream saddr; |
| 22631 | saddr << std::hex << "0x" << get_addr(); |
| 22632 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22633 | } |
| 22634 | #endif |
| 22635 | #endif |
| 22636 | }; |
| 22637 | // byte distance to skip after each 2D transfer (3D mode) (any alignment) |
| 22638 | struct npu_set_dma0_skip1_t |
| 22639 | { |
| 22640 | #ifdef __cplusplus |
| 22641 | private: |
| 22642 | #endif |
| 22643 | uint32_t opcode : 10; // opcode |
| 22644 | uint32_t reserved0 : 4; |
| 22645 | uint32_t control : 2; // control |
| 22646 | uint32_t addr_hi : 8; // address extension |
| 22647 | uint32_t reserved1 : 8; |
| 22648 | uint32_t addr_lo : 32; // address offset |
| 22649 | #ifdef __cplusplus |
| 22650 | public: |
| 22651 | npu_set_dma0_skip1_t(uint64_t _addr) : |
| 22652 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1)), reserved0(0), |
| 22653 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22654 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22655 | reserved1(0), |
| 22656 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22657 | { |
| 22658 | } |
| 22659 | CONSTEXPR npu_set_dma0_skip1_t() : |
| 22660 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1)), reserved0(0), |
| 22661 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22662 | { |
| 22663 | } |
| 22664 | CONSTEXPR bool valid() const |
| 22665 | { |
| 22666 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1) && control >= 1 && |
| 22667 | control <= 2; |
| 22668 | } |
| 22669 | CONSTEXPR void init() |
| 22670 | { |
| 22671 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_DMA0_SKIP1); |
| 22672 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22673 | } |
| 22674 | operator uint64_t() |
| 22675 | { |
| 22676 | uint64_t word; |
| 22677 | std::memcpy(&word, this, sizeof(word)); |
| 22678 | return word; |
| 22679 | } |
| 22680 | CONSTEXPR uint64_t get_addr() const |
| 22681 | { |
| 22682 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22683 | } |
| 22684 | CONSTEXPR npu_set_dma0_skip1_t &set_addr(uint64_t value) |
| 22685 | { |
| 22686 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22687 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22688 | return *this; |
| 22689 | } |
| 22690 | #ifdef NPU_DISASSEMBLE |
| 22691 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22692 | { |
| 22693 | std::stringstream saddr; |
| 22694 | saddr << std::hex << "0x" << get_addr(); |
| 22695 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22696 | } |
| 22697 | #endif |
| 22698 | #endif |
| 22699 | }; |
| 22700 | // IFM2 Tile 0 address |
| 22701 | struct npu_set_ifm2_base0_t |
| 22702 | { |
| 22703 | #ifdef __cplusplus |
| 22704 | private: |
| 22705 | #endif |
| 22706 | uint32_t opcode : 10; // opcode |
| 22707 | uint32_t reserved0 : 4; |
| 22708 | uint32_t control : 2; // control |
| 22709 | uint32_t addr_hi : 8; // address extension |
| 22710 | uint32_t reserved1 : 8; |
| 22711 | uint32_t addr_lo : 32; // address offset |
| 22712 | #ifdef __cplusplus |
| 22713 | public: |
| 22714 | npu_set_ifm2_base0_t(uint64_t _addr) : |
| 22715 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0)), reserved0(0), |
| 22716 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22717 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22718 | reserved1(0), |
| 22719 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22720 | { |
| 22721 | } |
| 22722 | CONSTEXPR npu_set_ifm2_base0_t() : |
| 22723 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0)), reserved0(0), |
| 22724 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22725 | { |
| 22726 | } |
| 22727 | CONSTEXPR bool valid() const |
| 22728 | { |
| 22729 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0) && control >= 1 && |
| 22730 | control <= 2; |
| 22731 | } |
| 22732 | CONSTEXPR void init() |
| 22733 | { |
| 22734 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE0); |
| 22735 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22736 | } |
| 22737 | operator uint64_t() |
| 22738 | { |
| 22739 | uint64_t word; |
| 22740 | std::memcpy(&word, this, sizeof(word)); |
| 22741 | return word; |
| 22742 | } |
| 22743 | CONSTEXPR uint64_t get_addr() const |
| 22744 | { |
| 22745 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22746 | } |
| 22747 | CONSTEXPR npu_set_ifm2_base0_t &set_addr(uint64_t value) |
| 22748 | { |
| 22749 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22750 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22751 | return *this; |
| 22752 | } |
| 22753 | #ifdef NPU_DISASSEMBLE |
| 22754 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22755 | { |
| 22756 | std::stringstream saddr; |
| 22757 | saddr << std::hex << "0x" << get_addr(); |
| 22758 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22759 | } |
| 22760 | #endif |
| 22761 | #endif |
| 22762 | }; |
| 22763 | // IFM2 Tile 1 address |
| 22764 | struct npu_set_ifm2_base1_t |
| 22765 | { |
| 22766 | #ifdef __cplusplus |
| 22767 | private: |
| 22768 | #endif |
| 22769 | uint32_t opcode : 10; // opcode |
| 22770 | uint32_t reserved0 : 4; |
| 22771 | uint32_t control : 2; // control |
| 22772 | uint32_t addr_hi : 8; // address extension |
| 22773 | uint32_t reserved1 : 8; |
| 22774 | uint32_t addr_lo : 32; // address offset |
| 22775 | #ifdef __cplusplus |
| 22776 | public: |
| 22777 | npu_set_ifm2_base1_t(uint64_t _addr) : |
| 22778 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1)), reserved0(0), |
| 22779 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22780 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22781 | reserved1(0), |
| 22782 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22783 | { |
| 22784 | } |
| 22785 | CONSTEXPR npu_set_ifm2_base1_t() : |
| 22786 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1)), reserved0(0), |
| 22787 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22788 | { |
| 22789 | } |
| 22790 | CONSTEXPR bool valid() const |
| 22791 | { |
| 22792 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1) && control >= 1 && |
| 22793 | control <= 2; |
| 22794 | } |
| 22795 | CONSTEXPR void init() |
| 22796 | { |
| 22797 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE1); |
| 22798 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22799 | } |
| 22800 | operator uint64_t() |
| 22801 | { |
| 22802 | uint64_t word; |
| 22803 | std::memcpy(&word, this, sizeof(word)); |
| 22804 | return word; |
| 22805 | } |
| 22806 | CONSTEXPR uint64_t get_addr() const |
| 22807 | { |
| 22808 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22809 | } |
| 22810 | CONSTEXPR npu_set_ifm2_base1_t &set_addr(uint64_t value) |
| 22811 | { |
| 22812 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22813 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22814 | return *this; |
| 22815 | } |
| 22816 | #ifdef NPU_DISASSEMBLE |
| 22817 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22818 | { |
| 22819 | std::stringstream saddr; |
| 22820 | saddr << std::hex << "0x" << get_addr(); |
| 22821 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22822 | } |
| 22823 | #endif |
| 22824 | #endif |
| 22825 | }; |
| 22826 | // IFM2 Tile 2 address |
| 22827 | struct npu_set_ifm2_base2_t |
| 22828 | { |
| 22829 | #ifdef __cplusplus |
| 22830 | private: |
| 22831 | #endif |
| 22832 | uint32_t opcode : 10; // opcode |
| 22833 | uint32_t reserved0 : 4; |
| 22834 | uint32_t control : 2; // control |
| 22835 | uint32_t addr_hi : 8; // address extension |
| 22836 | uint32_t reserved1 : 8; |
| 22837 | uint32_t addr_lo : 32; // address offset |
| 22838 | #ifdef __cplusplus |
| 22839 | public: |
| 22840 | npu_set_ifm2_base2_t(uint64_t _addr) : |
| 22841 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2)), reserved0(0), |
| 22842 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22843 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22844 | reserved1(0), |
| 22845 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22846 | { |
| 22847 | } |
| 22848 | CONSTEXPR npu_set_ifm2_base2_t() : |
| 22849 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2)), reserved0(0), |
| 22850 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22851 | { |
| 22852 | } |
| 22853 | CONSTEXPR bool valid() const |
| 22854 | { |
| 22855 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2) && control >= 1 && |
| 22856 | control <= 2; |
| 22857 | } |
| 22858 | CONSTEXPR void init() |
| 22859 | { |
| 22860 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE2); |
| 22861 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22862 | } |
| 22863 | operator uint64_t() |
| 22864 | { |
| 22865 | uint64_t word; |
| 22866 | std::memcpy(&word, this, sizeof(word)); |
| 22867 | return word; |
| 22868 | } |
| 22869 | CONSTEXPR uint64_t get_addr() const |
| 22870 | { |
| 22871 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22872 | } |
| 22873 | CONSTEXPR npu_set_ifm2_base2_t &set_addr(uint64_t value) |
| 22874 | { |
| 22875 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22876 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22877 | return *this; |
| 22878 | } |
| 22879 | #ifdef NPU_DISASSEMBLE |
| 22880 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22881 | { |
| 22882 | std::stringstream saddr; |
| 22883 | saddr << std::hex << "0x" << get_addr(); |
| 22884 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22885 | } |
| 22886 | #endif |
| 22887 | #endif |
| 22888 | }; |
| 22889 | // IFM2 Tile 3 address |
| 22890 | struct npu_set_ifm2_base3_t |
| 22891 | { |
| 22892 | #ifdef __cplusplus |
| 22893 | private: |
| 22894 | #endif |
| 22895 | uint32_t opcode : 10; // opcode |
| 22896 | uint32_t reserved0 : 4; |
| 22897 | uint32_t control : 2; // control |
| 22898 | uint32_t addr_hi : 8; // address extension |
| 22899 | uint32_t reserved1 : 8; |
| 22900 | uint32_t addr_lo : 32; // address offset |
| 22901 | #ifdef __cplusplus |
| 22902 | public: |
| 22903 | npu_set_ifm2_base3_t(uint64_t _addr) : |
| 22904 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3)), reserved0(0), |
| 22905 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22906 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22907 | reserved1(0), |
| 22908 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22909 | { |
| 22910 | } |
| 22911 | CONSTEXPR npu_set_ifm2_base3_t() : |
| 22912 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3)), reserved0(0), |
| 22913 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22914 | { |
| 22915 | } |
| 22916 | CONSTEXPR bool valid() const |
| 22917 | { |
| 22918 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3) && control >= 1 && |
| 22919 | control <= 2; |
| 22920 | } |
| 22921 | CONSTEXPR void init() |
| 22922 | { |
| 22923 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_BASE3); |
| 22924 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22925 | } |
| 22926 | operator uint64_t() |
| 22927 | { |
| 22928 | uint64_t word; |
| 22929 | std::memcpy(&word, this, sizeof(word)); |
| 22930 | return word; |
| 22931 | } |
| 22932 | CONSTEXPR uint64_t get_addr() const |
| 22933 | { |
| 22934 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22935 | } |
| 22936 | CONSTEXPR npu_set_ifm2_base3_t &set_addr(uint64_t value) |
| 22937 | { |
| 22938 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22939 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 22940 | return *this; |
| 22941 | } |
| 22942 | #ifdef NPU_DISASSEMBLE |
| 22943 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 22944 | { |
| 22945 | std::stringstream saddr; |
| 22946 | saddr << std::hex << "0x" << get_addr(); |
| 22947 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 22948 | } |
| 22949 | #endif |
| 22950 | #endif |
| 22951 | }; |
| 22952 | // IFM2 byte stride between horizontal values |
| 22953 | struct npu_set_ifm2_stride_x_t |
| 22954 | { |
| 22955 | #ifdef __cplusplus |
| 22956 | private: |
| 22957 | #endif |
| 22958 | uint32_t opcode : 10; // opcode |
| 22959 | uint32_t reserved0 : 4; |
| 22960 | uint32_t control : 2; // control |
| 22961 | uint32_t addr_hi : 8; // address extension |
| 22962 | uint32_t reserved1 : 8; |
| 22963 | uint32_t addr_lo : 32; // address offset |
| 22964 | #ifdef __cplusplus |
| 22965 | public: |
| 22966 | npu_set_ifm2_stride_x_t(uint64_t _addr) : |
| 22967 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X)), reserved0(0), |
| 22968 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 22969 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 22970 | reserved1(0), |
| 22971 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 22972 | { |
| 22973 | } |
| 22974 | CONSTEXPR npu_set_ifm2_stride_x_t() : |
| 22975 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X)), reserved0(0), |
| 22976 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 22977 | { |
| 22978 | } |
| 22979 | CONSTEXPR bool valid() const |
| 22980 | { |
| 22981 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X) && control >= 1 && |
| 22982 | control <= 2; |
| 22983 | } |
| 22984 | CONSTEXPR void init() |
| 22985 | { |
| 22986 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_X); |
| 22987 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 22988 | } |
| 22989 | operator uint64_t() |
| 22990 | { |
| 22991 | uint64_t word; |
| 22992 | std::memcpy(&word, this, sizeof(word)); |
| 22993 | return word; |
| 22994 | } |
| 22995 | CONSTEXPR uint64_t get_addr() const |
| 22996 | { |
| 22997 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 22998 | } |
| 22999 | CONSTEXPR npu_set_ifm2_stride_x_t &set_addr(uint64_t value) |
| 23000 | { |
| 23001 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23002 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23003 | return *this; |
| 23004 | } |
| 23005 | #ifdef NPU_DISASSEMBLE |
| 23006 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 23007 | { |
| 23008 | std::stringstream saddr; |
| 23009 | saddr << std::hex << "0x" << get_addr(); |
| 23010 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 23011 | } |
| 23012 | #endif |
| 23013 | #endif |
| 23014 | }; |
| 23015 | // IFM2 byte stride between vertical values |
| 23016 | struct npu_set_ifm2_stride_y_t |
| 23017 | { |
| 23018 | #ifdef __cplusplus |
| 23019 | private: |
| 23020 | #endif |
| 23021 | uint32_t opcode : 10; // opcode |
| 23022 | uint32_t reserved0 : 4; |
| 23023 | uint32_t control : 2; // control |
| 23024 | uint32_t addr_hi : 8; // address extension |
| 23025 | uint32_t reserved1 : 8; |
| 23026 | uint32_t addr_lo : 32; // address offset |
| 23027 | #ifdef __cplusplus |
| 23028 | public: |
| 23029 | npu_set_ifm2_stride_y_t(uint64_t _addr) : |
| 23030 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y)), reserved0(0), |
| 23031 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 23032 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 23033 | reserved1(0), |
| 23034 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 23035 | { |
| 23036 | } |
| 23037 | CONSTEXPR npu_set_ifm2_stride_y_t() : |
| 23038 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y)), reserved0(0), |
| 23039 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 23040 | { |
| 23041 | } |
| 23042 | CONSTEXPR bool valid() const |
| 23043 | { |
| 23044 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y) && control >= 1 && |
| 23045 | control <= 2; |
| 23046 | } |
| 23047 | CONSTEXPR void init() |
| 23048 | { |
| 23049 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_Y); |
| 23050 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 23051 | } |
| 23052 | operator uint64_t() |
| 23053 | { |
| 23054 | uint64_t word; |
| 23055 | std::memcpy(&word, this, sizeof(word)); |
| 23056 | return word; |
| 23057 | } |
| 23058 | CONSTEXPR uint64_t get_addr() const |
| 23059 | { |
| 23060 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 23061 | } |
| 23062 | CONSTEXPR npu_set_ifm2_stride_y_t &set_addr(uint64_t value) |
| 23063 | { |
| 23064 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23065 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23066 | return *this; |
| 23067 | } |
| 23068 | #ifdef NPU_DISASSEMBLE |
| 23069 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 23070 | { |
| 23071 | std::stringstream saddr; |
| 23072 | saddr << std::hex << "0x" << get_addr(); |
| 23073 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 23074 | } |
| 23075 | #endif |
| 23076 | #endif |
| 23077 | }; |
| 23078 | // IFM2 byte stride between channel blocks (of 16 bytes each block) |
| 23079 | struct npu_set_ifm2_stride_c_t |
| 23080 | { |
| 23081 | #ifdef __cplusplus |
| 23082 | private: |
| 23083 | #endif |
| 23084 | uint32_t opcode : 10; // opcode |
| 23085 | uint32_t reserved0 : 4; |
| 23086 | uint32_t control : 2; // control |
| 23087 | uint32_t addr_hi : 8; // address extension |
| 23088 | uint32_t reserved1 : 8; |
| 23089 | uint32_t addr_lo : 32; // address offset |
| 23090 | #ifdef __cplusplus |
| 23091 | public: |
| 23092 | npu_set_ifm2_stride_c_t(uint64_t _addr) : |
| 23093 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C)), reserved0(0), |
| 23094 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 23095 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 23096 | reserved1(0), |
| 23097 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 23098 | { |
| 23099 | } |
| 23100 | CONSTEXPR npu_set_ifm2_stride_c_t() : |
| 23101 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C)), reserved0(0), |
| 23102 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 23103 | { |
| 23104 | } |
| 23105 | CONSTEXPR bool valid() const |
| 23106 | { |
| 23107 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C) && control >= 1 && |
| 23108 | control <= 2; |
| 23109 | } |
| 23110 | CONSTEXPR void init() |
| 23111 | { |
| 23112 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_IFM2_STRIDE_C); |
| 23113 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 23114 | } |
| 23115 | operator uint64_t() |
| 23116 | { |
| 23117 | uint64_t word; |
| 23118 | std::memcpy(&word, this, sizeof(word)); |
| 23119 | return word; |
| 23120 | } |
| 23121 | CONSTEXPR uint64_t get_addr() const |
| 23122 | { |
| 23123 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 23124 | } |
| 23125 | CONSTEXPR npu_set_ifm2_stride_c_t &set_addr(uint64_t value) |
| 23126 | { |
| 23127 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23128 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23129 | return *this; |
| 23130 | } |
| 23131 | #ifdef NPU_DISASSEMBLE |
| 23132 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 23133 | { |
| 23134 | std::stringstream saddr; |
| 23135 | saddr << std::hex << "0x" << get_addr(); |
| 23136 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 23137 | } |
| 23138 | #endif |
| 23139 | #endif |
| 23140 | }; |
| 23141 | // Weight stream byte offset in WEIGHT_REGION for core 1 |
| 23142 | struct npu_set_weight1_base_t |
| 23143 | { |
| 23144 | #ifdef __cplusplus |
| 23145 | private: |
| 23146 | #endif |
| 23147 | uint32_t opcode : 10; // opcode |
| 23148 | uint32_t reserved0 : 4; |
| 23149 | uint32_t control : 2; // control |
| 23150 | uint32_t addr_hi : 8; // address extension |
| 23151 | uint32_t reserved1 : 8; |
| 23152 | uint32_t addr_lo : 32; // address offset |
| 23153 | #ifdef __cplusplus |
| 23154 | public: |
| 23155 | npu_set_weight1_base_t(uint64_t _addr) : |
| 23156 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE)), reserved0(0), |
| 23157 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 23158 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 23159 | reserved1(0), |
| 23160 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 23161 | { |
| 23162 | } |
| 23163 | CONSTEXPR npu_set_weight1_base_t() : |
| 23164 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE)), reserved0(0), |
| 23165 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 23166 | { |
| 23167 | } |
| 23168 | CONSTEXPR bool valid() const |
| 23169 | { |
| 23170 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE) && control >= 1 && |
| 23171 | control <= 2; |
| 23172 | } |
| 23173 | CONSTEXPR void init() |
| 23174 | { |
| 23175 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_BASE); |
| 23176 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 23177 | } |
| 23178 | operator uint64_t() |
| 23179 | { |
| 23180 | uint64_t word; |
| 23181 | std::memcpy(&word, this, sizeof(word)); |
| 23182 | return word; |
| 23183 | } |
| 23184 | CONSTEXPR uint64_t get_addr() const |
| 23185 | { |
| 23186 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 23187 | } |
| 23188 | CONSTEXPR npu_set_weight1_base_t &set_addr(uint64_t value) |
| 23189 | { |
| 23190 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23191 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23192 | return *this; |
| 23193 | } |
| 23194 | #ifdef NPU_DISASSEMBLE |
| 23195 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 23196 | { |
| 23197 | std::stringstream saddr; |
| 23198 | saddr << std::hex << "0x" << get_addr(); |
| 23199 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 23200 | } |
| 23201 | #endif |
| 23202 | #endif |
| 23203 | }; |
| 23204 | // Weight stream byte length for core 1 |
| 23205 | struct npu_set_weight1_length_t |
| 23206 | { |
| 23207 | #ifdef __cplusplus |
| 23208 | private: |
| 23209 | #endif |
| 23210 | uint32_t opcode : 10; // opcode |
| 23211 | uint32_t reserved0 : 4; |
| 23212 | uint32_t control : 2; // control |
| 23213 | uint32_t reserved1 : 16; |
| 23214 | uint32_t length : 32; // Weight stream byte length |
| 23215 | #ifdef __cplusplus |
| 23216 | public: |
| 23217 | npu_set_weight1_length_t(uint32_t _length) : |
| 23218 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH)), reserved0(0), |
| 23219 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), |
| 23220 | length(static_cast<uint32_t>(_length)) |
| 23221 | { |
| 23222 | } |
| 23223 | CONSTEXPR npu_set_weight1_length_t() : |
| 23224 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH)), reserved0(0), |
| 23225 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0) |
| 23226 | { |
| 23227 | } |
| 23228 | CONSTEXPR bool valid() const |
| 23229 | { |
| 23230 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH) && |
| 23231 | control >= 1 && control <= 2; |
| 23232 | } |
| 23233 | CONSTEXPR void init() |
| 23234 | { |
| 23235 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_WEIGHT1_LENGTH); |
| 23236 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 23237 | } |
| 23238 | operator uint64_t() |
| 23239 | { |
| 23240 | uint64_t word; |
| 23241 | std::memcpy(&word, this, sizeof(word)); |
| 23242 | return word; |
| 23243 | } |
| 23244 | CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const |
| 23245 | { |
| 23246 | return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode); |
| 23247 | } |
| 23248 | CONSTEXPR npu_set_weight1_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value) |
| 23249 | { |
| 23250 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 23251 | return *this; |
| 23252 | } |
| 23253 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 23254 | { |
| 23255 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 23256 | } |
| 23257 | CONSTEXPR npu_set_weight1_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 23258 | { |
| 23259 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 23260 | return *this; |
| 23261 | } |
| 23262 | CONSTEXPR uint32_t get_length() const |
| 23263 | { |
| 23264 | return static_cast<uint32_t>(length); |
| 23265 | } |
| 23266 | CONSTEXPR npu_set_weight1_length_t &set_length(uint32_t value) |
| 23267 | { |
| 23268 | length = static_cast<uint32_t>(value); |
| 23269 | return *this; |
| 23270 | } |
| 23271 | #ifdef NPU_DISASSEMBLE |
| 23272 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 23273 | { |
| 23274 | fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length))); |
| 23275 | } |
| 23276 | #endif |
| 23277 | #endif |
| 23278 | }; |
| 23279 | // Scale and bias stream input byte offset from SCALE_REGION for core 1 |
| 23280 | struct npu_set_scale1_base_t |
| 23281 | { |
| 23282 | #ifdef __cplusplus |
| 23283 | private: |
| 23284 | #endif |
| 23285 | uint32_t opcode : 10; // opcode |
| 23286 | uint32_t reserved0 : 4; |
| 23287 | uint32_t control : 2; // control |
| 23288 | uint32_t addr_hi : 8; // address extension |
| 23289 | uint32_t reserved1 : 8; |
| 23290 | uint32_t addr_lo : 32; // address offset |
| 23291 | #ifdef __cplusplus |
| 23292 | public: |
| 23293 | npu_set_scale1_base_t(uint64_t _addr) : |
| 23294 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE)), reserved0(0), |
| 23295 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), |
| 23296 | addr_hi(static_cast<uint8_t>((_addr >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))), |
| 23297 | reserved1(0), |
| 23298 | addr_lo(static_cast<uint32_t>((_addr) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max()))) |
| 23299 | { |
| 23300 | } |
| 23301 | CONSTEXPR npu_set_scale1_base_t() : |
| 23302 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE)), reserved0(0), |
| 23303 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), addr_hi(0), reserved1(0), addr_lo(0) |
| 23304 | { |
| 23305 | } |
| 23306 | CONSTEXPR bool valid() const |
| 23307 | { |
| 23308 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE) && control >= 1 && |
| 23309 | control <= 2; |
| 23310 | } |
| 23311 | CONSTEXPR void init() |
| 23312 | { |
| 23313 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_BASE); |
| 23314 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 23315 | } |
| 23316 | operator uint64_t() |
| 23317 | { |
| 23318 | uint64_t word; |
| 23319 | std::memcpy(&word, this, sizeof(word)); |
| 23320 | return word; |
| 23321 | } |
| 23322 | CONSTEXPR uint64_t get_addr() const |
| 23323 | { |
| 23324 | return (static_cast<uint64_t>(addr_hi) << 32) | addr_lo; |
| 23325 | } |
| 23326 | CONSTEXPR npu_set_scale1_base_t &set_addr(uint64_t value) |
| 23327 | { |
| 23328 | addr_lo = static_cast<uint32_t>((value) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23329 | addr_hi = static_cast<uint8_t>((value >> 32) & static_cast<uint64_t>(std::numeric_limits<uint64_t>::max())); |
| 23330 | return *this; |
| 23331 | } |
| 23332 | #ifdef NPU_DISASSEMBLE |
| 23333 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 23334 | { |
| 23335 | std::stringstream saddr; |
| 23336 | saddr << std::hex << "0x" << get_addr(); |
| 23337 | fields.push_back(std::make_pair<std::string, std::string>("addr", saddr.str())); |
| 23338 | } |
| 23339 | #endif |
| 23340 | #endif |
| 23341 | }; |
| 23342 | // Scale and bias stream input byte length for core 1 |
| 23343 | struct npu_set_scale1_length_t |
| 23344 | { |
| 23345 | #ifdef __cplusplus |
| 23346 | private: |
| 23347 | #endif |
| 23348 | uint32_t opcode : 10; // opcode |
| 23349 | uint32_t reserved0 : 4; |
| 23350 | uint32_t control : 2; // control |
| 23351 | uint32_t reserved1 : 16; |
| 23352 | uint32_t length : 20; // Scale and bias stream byte length |
| 23353 | uint32_t reserved2 : 12; |
| 23354 | #ifdef __cplusplus |
| 23355 | public: |
| 23356 | npu_set_scale1_length_t(uint32_t _length) : |
| 23357 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH)), reserved0(0), |
| 23358 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), |
| 23359 | length(static_cast<uint32_t>(_length) & ((1U << 20) - 1)), reserved2(0) |
| 23360 | { |
| 23361 | } |
| 23362 | CONSTEXPR npu_set_scale1_length_t() : |
| 23363 | opcode(static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH)), reserved0(0), |
| 23364 | control(static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL)), reserved1(0), length(0), reserved2(0) |
| 23365 | { |
| 23366 | } |
| 23367 | CONSTEXPR bool valid() const |
| 23368 | { |
| 23369 | return opcode == static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH) && control >= 1 && |
| 23370 | control <= 2; |
| 23371 | } |
| 23372 | CONSTEXPR void init() |
| 23373 | { |
| 23374 | opcode = static_cast<uint16_t>(NPU_NAMESPACE::cmd1_opcode::NPU_SET_SCALE1_LENGTH); |
| 23375 | control = static_cast<uint8_t>(NPU_NAMESPACE::cmd_ctrl::CMD1_CTRL); |
| 23376 | } |
| 23377 | operator uint64_t() |
| 23378 | { |
| 23379 | uint64_t word; |
| 23380 | std::memcpy(&word, this, sizeof(word)); |
| 23381 | return word; |
| 23382 | } |
| 23383 | CONSTEXPR NPU_NAMESPACE::cmd1_opcode get_opcode() const |
| 23384 | { |
| 23385 | return static_cast<NPU_NAMESPACE::cmd1_opcode>(opcode); |
| 23386 | } |
| 23387 | CONSTEXPR npu_set_scale1_length_t &set_opcode(NPU_NAMESPACE::cmd1_opcode value) |
| 23388 | { |
| 23389 | opcode = static_cast<uint16_t>(value) & ((1U << 10) - 1); |
| 23390 | return *this; |
| 23391 | } |
| 23392 | CONSTEXPR NPU_NAMESPACE::cmd_ctrl get_control() const |
| 23393 | { |
| 23394 | return static_cast<NPU_NAMESPACE::cmd_ctrl>(control); |
| 23395 | } |
| 23396 | CONSTEXPR npu_set_scale1_length_t &set_control(NPU_NAMESPACE::cmd_ctrl value) |
| 23397 | { |
| 23398 | control = static_cast<uint8_t>(value) & ((1U << 2) - 1); |
| 23399 | return *this; |
| 23400 | } |
| 23401 | CONSTEXPR uint32_t get_length() const |
| 23402 | { |
| 23403 | return static_cast<uint32_t>(length); |
| 23404 | } |
| 23405 | CONSTEXPR npu_set_scale1_length_t &set_length(uint32_t value) |
| 23406 | { |
| 23407 | length = static_cast<uint32_t>(value) & ((1U << 20) - 1); |
| 23408 | return *this; |
| 23409 | } |
| 23410 | #ifdef NPU_DISASSEMBLE |
| 23411 | void disassemble(std::vector<std::pair<std::string, std::string>> &fields) const |
| 23412 | { |
| 23413 | fields.push_back(std::make_pair<std::string, std::string>("length", std::to_string(length))); |
| 23414 | } |
| 23415 | #endif |
| 23416 | #endif |
| 23417 | }; |
| 23418 | #ifdef __cplusplus |
| 23419 | }; |
| 23420 | #endif |
| 23421 | #define NPU_OP_STRUCTS \ |
| 23422 | NPU_OP_(stop) \ |
| 23423 | NPU_OP_(irq) \ |
| 23424 | NPU_OP_(conv) \ |
| 23425 | NPU_OP_(depthwise) \ |
| 23426 | NPU_OP_(pool) \ |
| 23427 | NPU_OP_(elementwise) \ |
| 23428 | NPU_OP_(dma_start) \ |
| 23429 | NPU_OP_(dma_wait) \ |
| 23430 | NPU_OP_(kernel_wait) \ |
| 23431 | NPU_OP_(pmu_mask) |
| 23432 | |
| 23433 | #define NPU_SET_STRUCTS \ |
| 23434 | NPU_SET_(ifm_pad_top) \ |
| 23435 | NPU_SET_(ifm_pad_left) \ |
| 23436 | NPU_SET_(ifm_pad_right) \ |
| 23437 | NPU_SET_(ifm_pad_bottom) \ |
| 23438 | NPU_SET_(ifm_depth_m1) \ |
| 23439 | NPU_SET_(ifm_precision) \ |
| 23440 | NPU_SET_(ifm_upscale) \ |
| 23441 | NPU_SET_(ifm_zero_point) \ |
| 23442 | NPU_SET_(ifm_width0_m1) \ |
| 23443 | NPU_SET_(ifm_height0_m1) \ |
| 23444 | NPU_SET_(ifm_height1_m1) \ |
| 23445 | NPU_SET_(ifm_ib_end) \ |
| 23446 | NPU_SET_(ifm_region) \ |
| 23447 | NPU_SET_(ofm_width_m1) \ |
| 23448 | NPU_SET_(ofm_height_m1) \ |
| 23449 | NPU_SET_(ofm_depth_m1) \ |
| 23450 | NPU_SET_(ofm_precision) \ |
| 23451 | NPU_SET_(ofm_blk_width_m1) \ |
| 23452 | NPU_SET_(ofm_blk_height_m1) \ |
| 23453 | NPU_SET_(ofm_blk_depth_m1) \ |
| 23454 | NPU_SET_(ofm_zero_point) \ |
| 23455 | NPU_SET_(ofm_width0_m1) \ |
| 23456 | NPU_SET_(ofm_height0_m1) \ |
| 23457 | NPU_SET_(ofm_height1_m1) \ |
| 23458 | NPU_SET_(ofm_region) \ |
| 23459 | NPU_SET_(kernel_width_m1) \ |
| 23460 | NPU_SET_(kernel_height_m1) \ |
| 23461 | NPU_SET_(kernel_stride) \ |
| 23462 | NPU_SET_(parallel_mode) \ |
| 23463 | NPU_SET_(acc_format) \ |
| 23464 | NPU_SET_(activation) \ |
| 23465 | NPU_SET_(activation_min) \ |
| 23466 | NPU_SET_(activation_max) \ |
| 23467 | NPU_SET_(weight_region) \ |
| 23468 | NPU_SET_(scale_region) \ |
| 23469 | NPU_SET_(ab_start) \ |
| 23470 | NPU_SET_(blockdep) \ |
| 23471 | NPU_SET_(dma0_src_region) \ |
| 23472 | NPU_SET_(dma0_dst_region) \ |
| 23473 | NPU_SET_(dma0_size0) \ |
| 23474 | NPU_SET_(dma0_size1) \ |
| 23475 | NPU_SET_(ifm2_broadcast) \ |
| 23476 | NPU_SET_(ifm2_scalar) \ |
| 23477 | NPU_SET_(ifm2_precision) \ |
| 23478 | NPU_SET_(ifm2_zero_point) \ |
| 23479 | NPU_SET_(ifm2_width0_m1) \ |
| 23480 | NPU_SET_(ifm2_height0_m1) \ |
| 23481 | NPU_SET_(ifm2_height1_m1) \ |
| 23482 | NPU_SET_(ifm2_ib_start) \ |
| 23483 | NPU_SET_(ifm2_region) \ |
| 23484 | NPU_SET_(ifm_base0) \ |
| 23485 | NPU_SET_(ifm_base1) \ |
| 23486 | NPU_SET_(ifm_base2) \ |
| 23487 | NPU_SET_(ifm_base3) \ |
| 23488 | NPU_SET_(ifm_stride_x) \ |
| 23489 | NPU_SET_(ifm_stride_y) \ |
| 23490 | NPU_SET_(ifm_stride_c) \ |
| 23491 | NPU_SET_(ofm_base0) \ |
| 23492 | NPU_SET_(ofm_base1) \ |
| 23493 | NPU_SET_(ofm_base2) \ |
| 23494 | NPU_SET_(ofm_base3) \ |
| 23495 | NPU_SET_(ofm_stride_x) \ |
| 23496 | NPU_SET_(ofm_stride_y) \ |
| 23497 | NPU_SET_(ofm_stride_c) \ |
| 23498 | NPU_SET_(weight_base) \ |
| 23499 | NPU_SET_(weight_length) \ |
| 23500 | NPU_SET_(scale_base) \ |
| 23501 | NPU_SET_(scale_length) \ |
| 23502 | NPU_SET_(ofm_scale) \ |
| 23503 | NPU_SET_(opa_scale) \ |
| 23504 | NPU_SET_(opb_scale) \ |
| 23505 | NPU_SET_(dma0_src) \ |
| 23506 | NPU_SET_(dma0_dst) \ |
| 23507 | NPU_SET_(dma0_len) \ |
| 23508 | NPU_SET_(dma0_skip0) \ |
| 23509 | NPU_SET_(dma0_skip1) \ |
| 23510 | NPU_SET_(ifm2_base0) \ |
| 23511 | NPU_SET_(ifm2_base1) \ |
| 23512 | NPU_SET_(ifm2_base2) \ |
| 23513 | NPU_SET_(ifm2_base3) \ |
| 23514 | NPU_SET_(ifm2_stride_x) \ |
| 23515 | NPU_SET_(ifm2_stride_y) \ |
| 23516 | NPU_SET_(ifm2_stride_c) \ |
| 23517 | NPU_SET_(weight1_base) \ |
| 23518 | NPU_SET_(weight1_length) \ |
| 23519 | NPU_SET_(scale1_base) \ |
| 23520 | NPU_SET_(scale1_length) |
| 23521 | |
| 23522 | #define EXPAND_ACC_FORMAT(FUNC, SEP) FUNC(acc_format, I32) SEP FUNC(acc_format, I40) SEP FUNC(acc_format, F16) |
| 23523 | |
| 23524 | #define EXPAND_ACTIVATION_CLIP_RANGE(FUNC, SEP) \ |
| 23525 | FUNC(activation_clip_range, OFM_PRECISION) \ |
| 23526 | SEP FUNC(activation_clip_range, FORCE_UINT8) SEP FUNC(activation_clip_range, FORCE_INT8) \ |
| 23527 | SEP FUNC(activation_clip_range, FORCE_INT16) |
| 23528 | |
| 23529 | #define EXPAND_ACTIVATION_FORMAT(FUNC, SEP) FUNC(activation_format, NHWC) SEP FUNC(activation_format, NHCWB16) |
| 23530 | |
| 23531 | #define EXPAND_ACTIVATION_FUNCTION(FUNC, SEP) \ |
| 23532 | FUNC(activation_function, RELU) \ |
| 23533 | SEP FUNC(activation_function, TANH) SEP FUNC(activation_function, SIGMOID) SEP FUNC(activation_function, TABLE_0) \ |
| 23534 | SEP FUNC(activation_function, TABLE_1) SEP FUNC(activation_function, TABLE_2) \ |
| 23535 | SEP FUNC(activation_function, TABLE_3) SEP FUNC(activation_function, TABLE_4) \ |
| 23536 | SEP FUNC(activation_function, TABLE_5) SEP FUNC(activation_function, TABLE_6) \ |
| 23537 | SEP FUNC(activation_function, TABLE_7) |
| 23538 | |
| 23539 | #define EXPAND_ACTIVATION_PRECISION(FUNC, SEP) \ |
| 23540 | FUNC(activation_precision, B8) \ |
| 23541 | SEP FUNC(activation_precision, B16) SEP FUNC(activation_precision, B32) SEP FUNC(activation_precision, B64) |
| 23542 | |
| 23543 | #define EXPAND_ACTIVATION_TYPE(FUNC, SEP) FUNC(activation_type, UNSIGNED) SEP FUNC(activation_type, SIGNED) |
| 23544 | |
| 23545 | #define EXPAND_AXI_MEM_ENCODING(FUNC, SEP) \ |
| 23546 | FUNC(axi_mem_encoding, DEVICE_NON_BUFFERABLE) \ |
| 23547 | SEP FUNC(axi_mem_encoding, DEVICE_BUFFERABLE) SEP FUNC(axi_mem_encoding, NORMAL_NON_CACHEABLE_NON_BUFFERABLE) \ |
| 23548 | SEP FUNC(axi_mem_encoding, NORMAL_NON_CACHEABLE_BUFFERABLE) \ |
| 23549 | SEP FUNC(axi_mem_encoding, WRITE_THROUGH_NO_ALLOCATE) \ |
| 23550 | SEP FUNC(axi_mem_encoding, WRITE_THROUGH_READ_ALLOCATE) \ |
| 23551 | SEP FUNC(axi_mem_encoding, WRITE_THROUGH_WRITE_ALLOCATE) \ |
| 23552 | SEP FUNC(axi_mem_encoding, WRITE_THROUGH_READ_AND_WRITE_ALLOCATE) \ |
| 23553 | SEP FUNC(axi_mem_encoding, WRITE_BACK_NO_ALLOCATE) \ |
| 23554 | SEP FUNC(axi_mem_encoding, WRITE_BACK_READ_ALLOCATE) \ |
| 23555 | SEP FUNC(axi_mem_encoding, WRITE_BACK_WRITE_ALLOCATE) \ |
| 23556 | SEP FUNC(axi_mem_encoding, WRITE_BACK_READ_AND_WRITE_ALLOCATE) |
| 23557 | |
| 23558 | #define EXPAND_BROADCAST_MODE(FUNC, SEP) FUNC(broadcast_mode, DISABLE) SEP FUNC(broadcast_mode, ENABLE) |
| 23559 | |
| 23560 | #define EXPAND_CMD0_OPCODE(FUNC, SEP) \ |
| 23561 | FUNC(cmd0_opcode, NPU_OP_STOP) \ |
| 23562 | SEP FUNC(cmd0_opcode, NPU_OP_IRQ) SEP FUNC(cmd0_opcode, NPU_OP_CONV) SEP FUNC( \ |
| 23563 | cmd0_opcode, NPU_OP_DEPTHWISE) SEP FUNC(cmd0_opcode, NPU_OP_POOL) SEP FUNC(cmd0_opcode, NPU_OP_ELEMENTWISE) \ |
| 23564 | SEP FUNC(cmd0_opcode, NPU_OP_DMA_START) SEP FUNC(cmd0_opcode, NPU_OP_DMA_WAIT) SEP FUNC( \ |
| 23565 | cmd0_opcode, NPU_OP_KERNEL_WAIT) SEP FUNC(cmd0_opcode, NPU_OP_PMU_MASK) SEP FUNC(cmd0_opcode, \ |
| 23566 | NPU_SET_IFM_PAD_TOP) \ |
| 23567 | SEP FUNC(cmd0_opcode, NPU_SET_IFM_PAD_LEFT) SEP FUNC(cmd0_opcode, NPU_SET_IFM_PAD_RIGHT) SEP FUNC( \ |
| 23568 | cmd0_opcode, NPU_SET_IFM_PAD_BOTTOM) SEP FUNC(cmd0_opcode, \ |
| 23569 | NPU_SET_IFM_DEPTH_M1) SEP FUNC(cmd0_opcode, \ |
| 23570 | NPU_SET_IFM_PRECISION) \ |
| 23571 | SEP FUNC(cmd0_opcode, NPU_SET_IFM_UPSCALE) SEP FUNC(cmd0_opcode, NPU_SET_IFM_ZERO_POINT) SEP FUNC( \ |
| 23572 | cmd0_opcode, NPU_SET_IFM_WIDTH0_M1) SEP FUNC(cmd0_opcode, NPU_SET_IFM_HEIGHT0_M1) \ |
| 23573 | SEP FUNC(cmd0_opcode, NPU_SET_IFM_HEIGHT1_M1) SEP FUNC(cmd0_opcode, NPU_SET_IFM_IB_END) SEP FUNC( \ |
| 23574 | cmd0_opcode, NPU_SET_IFM_REGION) SEP FUNC(cmd0_opcode, NPU_SET_OFM_WIDTH_M1) \ |
| 23575 | SEP FUNC(cmd0_opcode, NPU_SET_OFM_HEIGHT_M1) SEP FUNC(cmd0_opcode, NPU_SET_OFM_DEPTH_M1) \ |
| 23576 | SEP FUNC(cmd0_opcode, NPU_SET_OFM_PRECISION) SEP FUNC( \ |
| 23577 | cmd0_opcode, NPU_SET_OFM_BLK_WIDTH_M1) SEP FUNC(cmd0_opcode, \ |
| 23578 | NPU_SET_OFM_BLK_HEIGHT_M1) \ |
| 23579 | SEP FUNC(cmd0_opcode, NPU_SET_OFM_BLK_DEPTH_M1) SEP FUNC( \ |
| 23580 | cmd0_opcode, NPU_SET_OFM_ZERO_POINT) SEP FUNC(cmd0_opcode, NPU_SET_OFM_WIDTH0_M1) \ |
| 23581 | SEP FUNC(cmd0_opcode, NPU_SET_OFM_HEIGHT0_M1) SEP FUNC( \ |
| 23582 | cmd0_opcode, \ |
| 23583 | NPU_SET_OFM_HEIGHT1_M1) SEP FUNC(cmd0_opcode, NPU_SET_OFM_REGION) \ |
| 23584 | SEP FUNC(cmd0_opcode, NPU_SET_KERNEL_WIDTH_M1) SEP FUNC( \ |
| 23585 | cmd0_opcode, \ |
| 23586 | NPU_SET_KERNEL_HEIGHT_M1) SEP FUNC(cmd0_opcode, NPU_SET_KERNEL_STRIDE) \ |
| 23587 | SEP FUNC(cmd0_opcode, NPU_SET_PARALLEL_MODE) SEP FUNC( \ |
| 23588 | cmd0_opcode, \ |
| 23589 | NPU_SET_ACC_FORMAT) SEP FUNC(cmd0_opcode, NPU_SET_ACTIVATION) \ |
| 23590 | SEP FUNC(cmd0_opcode, \ |
| 23591 | NPU_SET_ACTIVATION_MIN) SEP FUNC(cmd0_opcode, \ |
| 23592 | NPU_SET_ACTIVATION_MAX) \ |
| 23593 | SEP FUNC(cmd0_opcode, NPU_SET_WEIGHT_REGION) SEP FUNC( \ |
| 23594 | cmd0_opcode, \ |
| 23595 | NPU_SET_SCALE_REGION) SEP FUNC(cmd0_opcode, NPU_SET_AB_START) \ |
| 23596 | SEP FUNC(cmd0_opcode, NPU_SET_BLOCKDEP) \ |
| 23597 | SEP FUNC(cmd0_opcode, NPU_SET_DMA0_SRC_REGION) SEP FUNC( \ |
| 23598 | cmd0_opcode, \ |
| 23599 | NPU_SET_DMA0_DST_REGION) SEP FUNC(cmd0_opcode, \ |
| 23600 | NPU_SET_DMA0_SIZE0) \ |
| 23601 | SEP FUNC(cmd0_opcode, NPU_SET_DMA0_SIZE1) SEP FUNC( \ |
| 23602 | cmd0_opcode, \ |
| 23603 | NPU_SET_IFM2_BROADCAST) SEP \ |
| 23604 | FUNC(cmd0_opcode, NPU_SET_IFM2_SCALAR) SEP FUNC( \ |
| 23605 | cmd0_opcode, \ |
| 23606 | NPU_SET_IFM2_PRECISION) SEP \ |
| 23607 | FUNC(cmd0_opcode, NPU_SET_IFM2_ZERO_POINT) SEP \ |
| 23608 | FUNC(cmd0_opcode, \ |
| 23609 | NPU_SET_IFM2_WIDTH0_M1) SEP \ |
| 23610 | FUNC(cmd0_opcode, \ |
| 23611 | NPU_SET_IFM2_HEIGHT0_M1) SEP \ |
| 23612 | FUNC(cmd0_opcode, \ |
| 23613 | NPU_SET_IFM2_HEIGHT1_M1) \ |
| 23614 | SEP FUNC( \ |
| 23615 | cmd0_opcode, \ |
| 23616 | NPU_SET_IFM2_IB_START) \ |
| 23617 | SEP FUNC( \ |
| 23618 | cmd0_opcode, \ |
| 23619 | NPU_SET_IFM2_REGION) |
| 23620 | |
| 23621 | #define EXPAND_CMD1_OPCODE(FUNC, SEP) \ |
| 23622 | FUNC(cmd1_opcode, NPU_SET_IFM_BASE0) \ |
| 23623 | SEP FUNC(cmd1_opcode, NPU_SET_IFM_BASE1) SEP FUNC(cmd1_opcode, NPU_SET_IFM_BASE2) \ |
| 23624 | SEP FUNC(cmd1_opcode, NPU_SET_IFM_BASE3) SEP FUNC(cmd1_opcode, NPU_SET_IFM_STRIDE_X) \ |
| 23625 | SEP FUNC(cmd1_opcode, NPU_SET_IFM_STRIDE_Y) SEP FUNC(cmd1_opcode, NPU_SET_IFM_STRIDE_C) SEP FUNC( \ |
| 23626 | cmd1_opcode, NPU_SET_OFM_BASE0) SEP FUNC(cmd1_opcode, NPU_SET_OFM_BASE1) \ |
| 23627 | SEP FUNC(cmd1_opcode, NPU_SET_OFM_BASE2) SEP FUNC(cmd1_opcode, NPU_SET_OFM_BASE3) SEP FUNC( \ |
| 23628 | cmd1_opcode, NPU_SET_OFM_STRIDE_X) SEP FUNC(cmd1_opcode, NPU_SET_OFM_STRIDE_Y) \ |
| 23629 | SEP FUNC(cmd1_opcode, NPU_SET_OFM_STRIDE_C) SEP FUNC(cmd1_opcode, NPU_SET_WEIGHT_BASE) SEP FUNC( \ |
| 23630 | cmd1_opcode, NPU_SET_WEIGHT_LENGTH) SEP FUNC(cmd1_opcode, NPU_SET_SCALE_BASE) \ |
| 23631 | SEP FUNC(cmd1_opcode, NPU_SET_SCALE_LENGTH) SEP FUNC(cmd1_opcode, NPU_SET_OFM_SCALE) \ |
| 23632 | SEP FUNC(cmd1_opcode, NPU_SET_OPA_SCALE) SEP FUNC(cmd1_opcode, NPU_SET_OPB_SCALE) \ |
| 23633 | SEP FUNC(cmd1_opcode, NPU_SET_DMA0_SRC) SEP FUNC(cmd1_opcode, NPU_SET_DMA0_DST) \ |
| 23634 | SEP FUNC(cmd1_opcode, NPU_SET_DMA0_LEN) SEP FUNC(cmd1_opcode, NPU_SET_DMA0_SKIP0) \ |
| 23635 | SEP FUNC(cmd1_opcode, NPU_SET_DMA0_SKIP1) SEP FUNC( \ |
| 23636 | cmd1_opcode, NPU_SET_IFM2_BASE0) SEP FUNC(cmd1_opcode, NPU_SET_IFM2_BASE1) \ |
| 23637 | SEP FUNC(cmd1_opcode, NPU_SET_IFM2_BASE2) SEP FUNC(cmd1_opcode, \ |
| 23638 | NPU_SET_IFM2_BASE3) \ |
| 23639 | SEP FUNC(cmd1_opcode, NPU_SET_IFM2_STRIDE_X) \ |
| 23640 | SEP FUNC(cmd1_opcode, NPU_SET_IFM2_STRIDE_Y) \ |
| 23641 | SEP FUNC(cmd1_opcode, NPU_SET_IFM2_STRIDE_C) \ |
| 23642 | SEP FUNC(cmd1_opcode, NPU_SET_WEIGHT1_BASE) \ |
| 23643 | SEP FUNC(cmd1_opcode, NPU_SET_WEIGHT1_LENGTH) \ |
| 23644 | SEP FUNC(cmd1_opcode, NPU_SET_SCALE1_BASE) \ |
| 23645 | SEP FUNC(cmd1_opcode, NPU_SET_SCALE1_LENGTH) |
| 23646 | |
| 23647 | #define EXPAND_CMD_CTRL(FUNC, SEP) FUNC(cmd_ctrl, CMD0_CTRL) SEP FUNC(cmd_ctrl, CMD1_CTRL) |
| 23648 | |
| 23649 | #define EXPAND_CUSTOM_DMA(FUNC, SEP) FUNC(custom_dma, NOT_IMPLEMENTED) SEP FUNC(custom_dma, IMPLEMENTED) |
| 23650 | |
| 23651 | #define EXPAND_DMA_FAULT_SRC(FUNC, SEP) FUNC(dma_fault_src, AXI_M0) SEP FUNC(dma_fault_src, AXI_M1) |
| 23652 | |
| 23653 | #define EXPAND_DMA_REGION_MODE(FUNC, SEP) FUNC(dma_region_mode, EXTERNAL) SEP FUNC(dma_region_mode, INTERNAL) |
| 23654 | |
| 23655 | #define EXPAND_DMA_STRIDE_MODE(FUNC, SEP) \ |
| 23656 | FUNC(dma_stride_mode, D1) SEP FUNC(dma_stride_mode, D2) SEP FUNC(dma_stride_mode, D3) |
| 23657 | |
| 23658 | #define EXPAND_ELEMENTWISE_MODE(FUNC, SEP) \ |
| 23659 | FUNC(elementwise_mode, MUL) \ |
| 23660 | SEP FUNC(elementwise_mode, ADD) SEP FUNC(elementwise_mode, SUB) SEP FUNC(elementwise_mode, MIN) \ |
| 23661 | SEP FUNC(elementwise_mode, MAX) SEP FUNC(elementwise_mode, LRELU) SEP FUNC(elementwise_mode, ABS) \ |
| 23662 | SEP FUNC(elementwise_mode, CLZ) SEP FUNC(elementwise_mode, SHR) SEP FUNC(elementwise_mode, SHL) |
| 23663 | |
| 23664 | #define EXPAND_FUNCTIONAL_SAFETY(FUNC, SEP) \ |
| 23665 | FUNC(functional_safety, NOT_IMPLEMENTED) SEP FUNC(functional_safety, IMPLEMENTED) |
| 23666 | |
| 23667 | #define EXPAND_IFM2_OPERAND_ORDER(FUNC, SEP) FUNC(ifm2_operand_order, ORDER_B) SEP FUNC(ifm2_operand_order, ORDER_A) |
| 23668 | |
| 23669 | #define EXPAND_IFM_SCALE_MODE(FUNC, SEP) \ |
| 23670 | FUNC(ifm_scale_mode, OPA_OPB_16) SEP FUNC(ifm_scale_mode, OPA_32) SEP FUNC(ifm_scale_mode, OPB_32) |
| 23671 | |
| 23672 | #define EXPAND_IFM_UPSCALE_MODE(FUNC, SEP) \ |
| 23673 | FUNC(ifm_upscale_mode, NONE) SEP FUNC(ifm_upscale_mode, NEAREST) SEP FUNC(ifm_upscale_mode, ZEROS) |
| 23674 | |
| 23675 | #define EXPAND_KERNEL_DECOMPOSITION(FUNC, SEP) FUNC(kernel_decomposition, D8X8) SEP FUNC(kernel_decomposition, D4X4) |
| 23676 | |
| 23677 | #define EXPAND_KERNEL_DILATION(FUNC, SEP) FUNC(kernel_dilation, NONE) SEP FUNC(kernel_dilation, X2) |
| 23678 | |
| 23679 | #define EXPAND_MAX_BEATS(FUNC, SEP) FUNC(max_beats, B64) SEP FUNC(max_beats, B128) SEP FUNC(max_beats, B256) |
| 23680 | |
| 23681 | #define EXPAND_MEM_ATTR(FUNC, SEP) \ |
| 23682 | FUNC(mem_attr, AXI0_OUTSTANDING_COUNTER0) \ |
| 23683 | SEP FUNC(mem_attr, AXI0_OUTSTANDING_COUNTER1) SEP FUNC(mem_attr, AXI1_OUTSTANDING_COUNTER2) \ |
| 23684 | SEP FUNC(mem_attr, AXI1_OUTSTANDING_COUNTER3) |
| 23685 | |
| 23686 | #define EXPAND_OFM_SCALE_MODE(FUNC, SEP) FUNC(ofm_scale_mode, PER_CHANNEL) SEP FUNC(ofm_scale_mode, GLOBAL) |
| 23687 | |
| 23688 | #define EXPAND_PARALLEL_MODE(FUNC, SEP) FUNC(parallel_mode, SINGLE_CORE) SEP FUNC(parallel_mode, DUAL_CORE_DEPTH) |
| 23689 | |
| 23690 | #define EXPAND_PMU_AXI_CHANNEL(FUNC, SEP) \ |
| 23691 | FUNC(pmu_axi_channel, RD_CMD) \ |
| 23692 | SEP FUNC(pmu_axi_channel, RD_IFM) SEP FUNC(pmu_axi_channel, RD_WEIGHTS) SEP FUNC(pmu_axi_channel, RD_SCALE_BIAS) \ |
| 23693 | SEP FUNC(pmu_axi_channel, RD_MEM2MEM) SEP FUNC(pmu_axi_channel, WR_OFM) SEP FUNC(pmu_axi_channel, WR_MEM2MEM) |
| 23694 | |
| 23695 | #define EXPAND_PMU_EVENT(FUNC, SEP) \ |
| 23696 | FUNC(pmu_event, NO_EVENT) \ |
| 23697 | SEP FUNC(pmu_event, CYCLE) SEP FUNC(pmu_event, NPU_IDLE) SEP FUNC(pmu_event, CC_STALLED_ON_BLOCKDEP) SEP FUNC( \ |
| 23698 | pmu_event, CC_STALLED_ON_SHRAM_RECONFIG) SEP FUNC(pmu_event, NPU_ACTIVE) SEP FUNC(pmu_event, MAC_ACTIVE) \ |
| 23699 | SEP FUNC(pmu_event, MAC_ACTIVE_8BIT) SEP FUNC(pmu_event, MAC_ACTIVE_16BIT) SEP FUNC( \ |
| 23700 | pmu_event, MAC_DPU_ACTIVE) SEP FUNC(pmu_event, MAC_STALLED_BY_WD_ACC) SEP FUNC(pmu_event, \ |
| 23701 | MAC_STALLED_BY_WD) \ |
| 23702 | SEP FUNC(pmu_event, MAC_STALLED_BY_ACC) SEP FUNC(pmu_event, MAC_STALLED_BY_IB) SEP FUNC( \ |
| 23703 | pmu_event, \ |
| 23704 | MAC_ACTIVE_32BIT) SEP FUNC(pmu_event, \ |
| 23705 | MAC_STALLED_BY_INT_W) SEP FUNC(pmu_event, \ |
| 23706 | MAC_STALLED_BY_INT_ACC) SEP FUNC(pmu_event, \ |
| 23707 | AO_ACTIVE) \ |
| 23708 | SEP FUNC(pmu_event, AO_ACTIVE_8BIT) SEP FUNC(pmu_event, AO_ACTIVE_16BIT) SEP FUNC( \ |
| 23709 | pmu_event, AO_STALLED_BY_OFMP_OB) SEP FUNC(pmu_event, AO_STALLED_BY_OFMP) SEP \ |
| 23710 | FUNC(pmu_event, AO_STALLED_BY_OB) SEP FUNC(pmu_event, AO_STALLED_BY_ACC_IB) SEP FUNC( \ |
| 23711 | pmu_event, AO_STALLED_BY_ACC) SEP FUNC(pmu_event, AO_STALLED_BY_IB) SEP \ |
| 23712 | FUNC(pmu_event, WD_ACTIVE) SEP FUNC(pmu_event, WD_STALLED) SEP FUNC(pmu_event, WD_STALLED_BY_WS) SEP FUNC( \ |
| 23713 | pmu_event, WD_STALLED_BY_WD_BUF) SEP FUNC(pmu_event, \ |
| 23714 | WD_PARSE_ACTIVE) SEP \ |
| 23715 | FUNC(pmu_event, WD_PARSE_STALLED) SEP FUNC(pmu_event, WD_PARSE_STALLED_IN) SEP FUNC( \ |
| 23716 | pmu_event, WD_PARSE_STALLED_OUT) SEP FUNC(pmu_event, \ |
| 23717 | WD_TRANS_WS) SEP \ |
| 23718 | FUNC(pmu_event, WD_TRANS_WB) SEP FUNC(pmu_event, WD_TRANS_DW0) SEP FUNC( \ |
| 23719 | pmu_event, WD_TRANS_DW1) SEP FUNC(pmu_event, \ |
| 23720 | AXI0_RD_TRANS_ACCEPTED) SEP \ |
| 23721 | FUNC(pmu_event, AXI0_RD_TRANS_COMPLETED) SEP FUNC(pmu_event, AXI0_RD_DATA_BEAT_RECEIVED) SEP FUNC( \ |
| 23722 | pmu_event, AXI0_RD_TRAN_REQ_STALLED) SEP FUNC(pmu_event, \ |
| 23723 | AXI0_WR_TRANS_ACCEPTED) SEP \ |
| 23724 | FUNC(pmu_event, AXI0_WR_TRANS_COMPLETED_M) SEP FUNC( \ |
| 23725 | pmu_event, AXI0_WR_TRANS_COMPLETED_S) SEP \ |
| 23726 | FUNC(pmu_event, AXI0_WR_DATA_BEAT_WRITTEN) SEP FUNC( \ |
| 23727 | pmu_event, AXI0_WR_TRAN_REQ_STALLED) SEP \ |
| 23728 | FUNC(pmu_event, AXI0_WR_DATA_BEAT_STALLED) SEP FUNC( \ |
| 23729 | pmu_event, \ |
| 23730 | AXI0_ENABLED_CYCLES) SEP FUNC(pmu_event, \ |
| 23731 | AXI0_RD_STALL_LIMIT) SEP \ |
| 23732 | FUNC(pmu_event, AXI0_WR_STALL_LIMIT) SEP FUNC( \ |
| 23733 | pmu_event, \ |
| 23734 | AXI_LATENCY_ANY) SEP FUNC(pmu_event, \ |
| 23735 | AXI_LATENCY_32) SEP \ |
| 23736 | FUNC(pmu_event, \ |
| 23737 | AXI_LATENCY_64) SEP FUNC(pmu_event, \ |
| 23738 | AXI_LATENCY_128) SEP \ |
| 23739 | FUNC(pmu_event, AXI_LATENCY_256) SEP FUNC( \ |
| 23740 | pmu_event, \ |
| 23741 | AXI_LATENCY_512) SEP FUNC(pmu_event, \ |
| 23742 | AXI_LATENCY_1024) SEP \ |
| 23743 | FUNC(pmu_event, ECC_DMA) SEP FUNC( \ |
| 23744 | pmu_event, \ |
| 23745 | ECC_SB0) SEP FUNC(pmu_event, \ |
| 23746 | AXI1_RD_TRANS_ACCEPTED) SEP \ |
| 23747 | FUNC(pmu_event, AXI1_RD_TRANS_COMPLETED) SEP FUNC( \ |
| 23748 | pmu_event, AXI1_RD_DATA_BEAT_RECEIVED) SEP \ |
| 23749 | FUNC(pmu_event, AXI1_RD_TRAN_REQ_STALLED) SEP FUNC( \ |
| 23750 | pmu_event, AXI1_WR_TRANS_ACCEPTED) SEP \ |
| 23751 | FUNC(pmu_event, AXI1_WR_TRANS_COMPLETED_M) SEP FUNC( \ |
| 23752 | pmu_event, \ |
| 23753 | AXI1_WR_TRANS_COMPLETED_S) SEP \ |
| 23754 | FUNC(pmu_event, \ |
| 23755 | AXI1_WR_DATA_BEAT_WRITTEN) SEP \ |
| 23756 | FUNC(pmu_event, \ |
| 23757 | AXI1_WR_TRAN_REQ_STALLED) SEP \ |
| 23758 | FUNC( \ |
| 23759 | pmu_event, \ |
| 23760 | AXI1_WR_DATA_BEAT_STALLED) SEP \ |
| 23761 | FUNC( \ |
| 23762 | pmu_event, \ |
| 23763 | AXI1_ENABLED_CYCLES) SEP \ |
| 23764 | FUNC( \ |
| 23765 | pmu_event, \ |
| 23766 | AXI1_RD_STALL_LIMIT) SEP \ |
| 23767 | FUNC( \ |
| 23768 | pmu_event, \ |
| 23769 | AXI1_WR_STALL_LIMIT) \ |
| 23770 | SEP FUNC( \ |
| 23771 | pmu_event, \ |
| 23772 | ECC_SB1) |
| 23773 | |
| 23774 | #define EXPAND_POOLING_MODE(FUNC, SEP) \ |
| 23775 | FUNC(pooling_mode, MAX) SEP FUNC(pooling_mode, AVERAGE) SEP FUNC(pooling_mode, REDUCE_SUM) |
| 23776 | |
| 23777 | #define EXPAND_PRIVILEGE_LEVEL(FUNC, SEP) FUNC(privilege_level, USER) SEP FUNC(privilege_level, PRIVILEGED) |
| 23778 | |
| 23779 | #define EXPAND_ROUND_MODE(FUNC, SEP) FUNC(round_mode, DBL) SEP FUNC(round_mode, TRUNCATE) SEP FUNC(round_mode, NATURAL) |
| 23780 | |
| 23781 | #define EXPAND_SECURITY_LEVEL(FUNC, SEP) FUNC(security_level, SECURE) SEP FUNC(security_level, NON_SECURE) |
| 23782 | |
| 23783 | #define EXPAND_STATE(FUNC, SEP) FUNC(state, STOPPED) SEP FUNC(state, RUNNING) |
| 23784 | |
| 23785 | #define EXPAND_WD_CORE_SLICE_STATE(FUNC, SEP) \ |
| 23786 | FUNC(wd_core_slice_state, HEADER) SEP FUNC(wd_core_slice_state, PALETTE) SEP FUNC(wd_core_slice_state, WEIGHTS) |
| 23787 | |
| 23788 | #define EXPAND_WD_CTRL_STATE(FUNC, SEP) \ |
| 23789 | FUNC(wd_ctrl_state, IDLE) \ |
| 23790 | SEP FUNC(wd_ctrl_state, DRAIN) SEP FUNC(wd_ctrl_state, OFD_INIT) SEP FUNC(wd_ctrl_state, OFD_RUN) |
| 23791 | |
| 23792 | #define EXPAND_WEIGHT_ORDER(FUNC, SEP) FUNC(weight_order, DEPTH_FIRST) SEP FUNC(weight_order, PART_KERNEL_FIRST) |
| 23793 | |
| 23794 | #ifdef __cplusplus |
| 23795 | } |
| 23796 | #endif |
| 23797 | #endif |