blob: 6fac5b0a04f7256c6559c5d96e6437e6fc517432 [file] [log] [blame]
Kristofer Jonsson74226102022-05-25 16:55:24 +02001/*
2 * Copyright (c) 2022 Arm Limited.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19/****************************************************************************
20 * Includes
21 ****************************************************************************/
22
23#include "target.hpp"
24
25#ifdef ETHOSU
26#include <ethosu_driver.h>
27#endif
28
29#include "mpu.hpp"
30#include "uart_stdout.h"
31
32#include <inttypes.h>
33#include <stdio.h>
34#include <stdlib.h>
35#include <vector>
36
37using namespace EthosU;
38
39/****************************************************************************
40 * Defines
41 ****************************************************************************/
42
43#ifdef ETHOSU
44#define ETHOSU_BASE_ADDRESS <TODO>
45#define ETHOSU_IRQ <TODO>
46#endif
47
48/****************************************************************************
49 * Variables
50 ****************************************************************************/
51
52#ifdef ETHOSU
53#if defined(ETHOSU_FAST_MEMORY_SIZE) && ETHOSU_FAST_MEMORY_SIZE > 0
54__attribute__((aligned(16), section(".bss.ethosu_scratch"))) uint8_t ethosu_scratch[ETHOSU_FAST_MEMORY_SIZE];
55#else
56#define ethosu_scratch 0
57#define ETHOSU_FAST_MEMORY_SIZE 0
58#endif
59
60struct ethosu_driver ethosu0_driver;
61#endif
62
63/****************************************************************************
64 * Cache maintenance
65 ****************************************************************************/
66
67#if defined(CPU_CACHE_ENABLE) && defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
68extern "C" {
69void ethosu_flush_dcache(uint32_t *p, size_t bytes) {
70 if (p)
71 SCB_CleanDCache_by_Addr(p, bytes);
72 else
73 SCB_CleanDCache();
74}
75
76void ethosu_invalidate_dcache(uint32_t *p, size_t bytes) {
77 if (p)
78 SCB_InvalidateDCache_by_Addr(p, bytes);
79 else
80 SCB_InvalidateDCache();
81}
82}
83#endif
84
85/****************************************************************************
86 * Init
87 ****************************************************************************/
88
89namespace {
90
91#ifdef ETHOSU
92void ethosuIrqHandler() {
93 ethosu_irq_handler(&ethosu0_driver);
94}
95#endif
96
97} // namespace
98
99namespace EthosU {
100
101void targetSetup() {
102 // Initialize UART driver
103 UartStdOutInit();
104
105#ifdef ETHOSU
106 // Initialize Ethos-U NPU driver
107 if (ethosu_init(&ethosu0_driver,
108 reinterpret_cast<void *>(ETHOSU_BASE_ADDRESS),
109 ethosu_scratch,
110 ETHOSU_FAST_MEMORY_SIZE,
111 1,
112 1)) {
113 printf("Failed to initialize NPU.\n");
114 return;
115 }
116
117 // Assumes SCB->VTOR point to RW memory
118 NVIC_SetVector(static_cast<IRQn_Type>(ETHOSU_IRQ), (uint32_t)&ethosuIrqHandler);
119 NVIC_EnableIRQ(static_cast<IRQn_Type>(ETHOSU_IRQ));
120#endif
121
122 // MPU setup
123 // TODO Add memory protection unit configuration
124 const std::vector<ARM_MPU_Region_t> mpuConfig = {};
125
126 // Setup MPU configuration
127 Mpu::loadAndEnableConfig(&mpuConfig[0], mpuConfig.size());
128
129#if defined(CPU_CACHE_ENABLE) && defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
130 SCB_EnableICache();
131 SCB_EnableDCache();
132#endif
133}
134
135} // namespace EthosU