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Kristofer Jonsson3f5510f2023-02-08 14:23:00 +01001/*
2 * SPDX-FileCopyrightText: Copyright 2022-2023 Arm Limited and/or its affiliates <open-source-office@arm.com>
Kristofer Jonsson3f5510f2023-02-08 14:23:00 +01003 * SPDX-License-Identifier: Apache-2.0
4 *
5 * Licensed under the Apache License, Version 2.0 (the License); you may
6 * not use _this file except in compliance with the License.
7 * You may obtain a copy of the License at
8 *
9 * www.apache.org/licenses/LICENSE-2.0
10 *
11 * Unless required by applicable law or agreed to in writing, software
12 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
13 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
14 * See the License for the specific language governing permissions and
15 * limitations under the License.
16 */
17
18/*****************************************************************************
19 * Includes
20 *****************************************************************************/
21
Kristofer Jonsson7716cee2023-02-10 13:30:16 +010022#include <cinttypes>
Kristofer Jonsson3f5510f2023-02-08 14:23:00 +010023#include <memory>
24#include <stdio.h>
25
26#include <ethosu_log.h>
27#include <mailbox.hpp>
28
29#if defined(MHU_V2)
30#include <mhu_v2.hpp>
31#elif defined(MHU_JUNO)
32#include <mhu_juno.hpp>
33#else
34#include <mhu_dummy.hpp>
35#endif
36
37#include "inference_runner.hpp"
38#include "message_handler.hpp"
39#include "remoteproc.hpp"
40
41/*****************************************************************************
42 * TFLM arena
43 *****************************************************************************/
44
45// Number of parallell inference tasks. Typically one per NPU.
46#if defined(ETHOSU) && defined(ETHOSU_NPU_COUNT) && ETHOSU_NPU_COUNT > 0
47constexpr size_t NUM_PARALLEL_TASKS = ETHOSU_NPU_COUNT;
48#else
49constexpr size_t NUM_PARALLEL_TASKS = 1;
50#endif
51
52#ifndef TENSOR_ARENA_SIZE
53#define TENSOR_ARENA_SIZE 2000000
54#endif
55
56// TensorArena static initialisation
57constexpr size_t arenaSize = TENSOR_ARENA_SIZE;
58
59/*****************************************************************************
60 * Resource table
61 *****************************************************************************/
62
Ledion Dajab00e4ed2023-05-22 10:45:31 +020063#if defined(REMOTEPROC_TRACE_BUFFER)
64#if defined(__ARMCC_VERSION)
65extern uint32_t Image$$trace_buffer$$Base;
66extern uint32_t Image$$trace_buffer$$Length;
67#define __ethosu_core_trace_buffer_start__ Image$$trace_buffer$$Base
68#define __ethosu_core_trace_buffer_size__ Image$$trace_buffer$$Length
69#else
70extern uint32_t __ethosu_core_trace_buffer_start__;
71extern uint32_t __ethosu_core_trace_buffer_size__;
72#endif
73#endif
74
Kristofer Jonsson3f5510f2023-02-08 14:23:00 +010075extern "C" {
Ledion Dajab00e4ed2023-05-22 10:45:31 +020076// clang-format off
77__attribute__((section(".resource_table"))) ResourceTable resourceTable = {
78 // Table
79 {
80 ResourceTable::VERSION,
81 ResourceTable::NUM_RESOURCES,
82 {ResourceTable::RESERVED, ResourceTable::RESERVED},
83 {}
84 },
85 // Offset
86 {
87#if defined(REMOTEPROC_TRACE_BUFFER)
88 offsetof(ResourceTable, trace),
89#endif
90 offsetof(ResourceTable, vdev),
91 offsetof(ResourceTable, carveout),
92 },
93 // Trace buffer
94#if defined(REMOTEPROC_TRACE_BUFFER)
95 {
96 RSC_TRACE,
97 reinterpret_cast<uint32_t>(&__ethosu_core_trace_buffer_start__),
98 reinterpret_cast<uint32_t>(&__ethosu_core_trace_buffer_size__),
99 ResourceTable::RESERVED,
100 "Trace resource"
101 },
102#endif
103 // VDEV
104 {
105 RSC_VDEV,
106 VIRTIO_ID_RPMSG,
107 2, // Notify ID
108 1 << VIRTIO_RPMSG_F_NS,
109 0,
110 0,
111 0,
112 ResourceTable::NUM_VRINGS,
113 {ResourceTable::RESERVED, ResourceTable::RESERVED},
114 {}
115 },
116 // Vrings
117 {
118 {FW_RSC_U32_ADDR_ANY, ResourceTable::VRING_ALIGN, ResourceTable::VRING_SIZE, 1, ResourceTable::RESERVED},
119 {FW_RSC_U32_ADDR_ANY, ResourceTable::VRING_ALIGN, ResourceTable::VRING_SIZE, 2, ResourceTable::RESERVED}
120 },
121 // Carveout
122 {
123 RSC_CARVEOUT,
124 FW_RSC_U32_ADDR_ANY,
125 FW_RSC_U32_ADDR_ANY,
126 arenaSize * NUM_PARALLEL_TASKS,
127 0,
128 ResourceTable::RESERVED,
129 "TFLM arena"
130 }
131};
132// clang-format on
Kristofer Jonsson3f5510f2023-02-08 14:23:00 +0100133}
134
135/*****************************************************************************
136 * Mailbox
137 *****************************************************************************/
138
139namespace {
140
141#ifdef MHU_V2
142Mailbox::MHUv2 mailbox(MHU_TX_BASE_ADDRESS, MHU_RX_BASE_ADDRESS); // txBase, rxBase
143#elif defined(MHU_JUNO)
144Mailbox::MHUJuno mailbox(MHU_BASE_ADDRESS);
145#else
146Mailbox::MHUDummy mailbox;
147#endif
148
149#ifdef MHU_IRQ
150void mailboxIrqHandler() {
151 LOG_DEBUG("");
152 mailbox.handleMessage();
153}
Mikael Olssonca4c3422023-09-21 10:05:54 +0200154#define MHU_IRQ_PRIORITY 5
Kristofer Jonsson3f5510f2023-02-08 14:23:00 +0100155#endif
156
157} // namespace
158
159/*****************************************************************************
160 * main
161 *****************************************************************************/
162
163int main() {
164 printf("Ethos-U Message Handler OpenAMP\n");
165
166 auto mem = std::make_shared<MetalIO>();
167 auto rproc = std::make_shared<RProc>(mailbox, resourceTable.table, sizeof(resourceTable), *mem);
168 auto messageHandler = std::make_shared<MessageHandler>(*rproc, "ethos-u-0.0");
169
Kristofer Jonsson7716cee2023-02-10 13:30:16 +0100170 printf("TFLM arena. pa=%" PRIx32 ", da=%" PRIx32 ", len=%" PRIx32 "\n",
171 resourceTable.carveout.da,
172 resourceTable.carveout.pa,
173 resourceTable.carveout.len);
174
Kristofer Jonsson3f5510f2023-02-08 14:23:00 +0100175 std::array<std::shared_ptr<InferenceRunner>, NUM_PARALLEL_TASKS> inferenceRunner;
176
177 for (size_t i = 0; i < NUM_PARALLEL_TASKS; i++) {
178 auto tensorArena = static_cast<uint8_t *>(messageHandler->physicalToVirtual(resourceTable.carveout.pa));
179
180 inferenceRunner[i] = std::make_shared<InferenceRunner>(&tensorArena[arenaSize * i],
181 arenaSize,
182 messageHandler->getInferenceQueue(),
183 messageHandler->getResponseQueue());
184 }
185
186#ifdef MHU_IRQ
187 // Register mailbox interrupt handler
Mikael Olssonca4c3422023-09-21 10:05:54 +0200188 NVIC_SetVector(static_cast<IRQn_Type>(MHU_IRQ), (uint32_t)&mailboxIrqHandler);
189 NVIC_SetPriority(static_cast<IRQn_Type>(MHU_IRQ), MHU_IRQ_PRIORITY);
190 NVIC_EnableIRQ(static_cast<IRQn_Type>(MHU_IRQ));
Kristofer Jonsson3f5510f2023-02-08 14:23:00 +0100191#endif
192
193 // Start Scheduler
194 vTaskStartScheduler();
195
196 return 0;
197}