blob: 3d18680168067ebd90841ab68477845d59304150 [file] [log] [blame]
Kristofer Jonssonf62c3d72021-01-21 17:39:03 +01001/*
2 * Copyright (c) 2020 Arm Limited. All rights reserved.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 *
6 * Licensed under the Apache License, Version 2.0 (the License); you may
7 * not use this file except in compliance with the License.
8 * You may obtain a copy of the License at
9 *
10 * www.apache.org/licenses/LICENSE-2.0
11 *
12 * Unless required by applicable law or agreed to in writing, software
13 * distributed under the License is distributed on an AS IS BASIS, WITHOUT
14 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
15 * See the License for the specific language governing permissions and
16 * limitations under the License.
17 */
18
19/****************************************************************************
20 * Includes
21 ****************************************************************************/
22
23#include "target.hpp"
24
25#ifdef ETHOSU
26#include <ethosu_driver.h>
27#endif
28
29#include "uart.h"
30
31#include <stdio.h>
32
33using namespace EthosU;
34
35/****************************************************************************
36 * Defines
37 ****************************************************************************/
38
39#define ETHOSU_BASE_ADDRESS 0x48102000
40
41#define ETHOSU_IRQ 56
42
43/****************************************************************************
44 * Variables
45 ****************************************************************************/
46
47#if defined(ETHOSU_FAST_MEMORY_SIZE) && ETHOSU_FAST_MEMORY_SIZE > 0
48__attribute__((aligned(16), section(".bss.ethosu_scratch"))) uint8_t ethosu_scratch[ETHOSU_FAST_MEMORY_SIZE];
49#else
50#define ethosu_scratch 0
51#define ETHOSU_FAST_MEMORY_SIZE 0
52#endif
53
54/****************************************************************************
55 * Cache maintenance
56 ****************************************************************************/
57
58#if defined(CPU_CACHE_ENABLE) && defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
59extern "C" {
60void ethosu_flush_dcache(uint32_t *p, size_t bytes) {
61 if (p)
62 SCB_CleanDCache_by_Addr(p, bytes);
63 else
64 SCB_CleanDCache();
65}
66
67void ethosu_invalidate_dcache(uint32_t *p, size_t bytes) {
68 if (p)
69 SCB_InvalidateDCache_by_Addr(p, bytes);
70 else
71 SCB_InvalidateDCache();
72}
73}
74#endif
75
76/****************************************************************************
77 * Init
78 ****************************************************************************/
79
80namespace {
81
82#ifdef ETHOSU
83void ethosuIrqHandler() {
84 ethosu_irq_handler();
85}
86#endif
87
88} // namespace
89
90namespace EthosU {
91
92void targetSetup() {
93 // Initialize UART driver
94 uart_init();
95
96#ifdef ETHOSU
97 // Initialize Ethos-U NPU driver
98 if (ethosu_init_v3(reinterpret_cast<void *>(ETHOSU_BASE_ADDRESS), ethosu_scratch, ETHOSU_FAST_MEMORY_SIZE, 1, 1)) {
99 printf("Failed to initialize NPU.\n");
100 return;
101 }
102
103 /* Assumes SCB->VTOR point to RW memory */
104 NVIC_SetVector(static_cast<IRQn_Type>(ETHOSU_IRQ), (uint32_t)&ethosuIrqHandler);
105 NVIC_EnableIRQ(static_cast<IRQn_Type>(ETHOSU_IRQ));
106#endif
107}
108
109} // namespace EthosU